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Reintegrate s100 -> trunk

patch
wayne 13 years ago
parent
804ee6f3d8
commit
202e23d6d9
21 changed files with 6075 additions and 427 deletions
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  1. BIN
      Doc/S100_Project_Board_List.xlsx
  2. 111
      Source/config_s100.asm
  3. 2777
      Source/master-dwg.asm
  4. 138
      Source/memmgr.asm
  5. 6
      Source/s100cpu.inc
  6. 10
      Source/s100dide.inc
  7. 9
      Source/s100iob.inc
  8. 10
      Source/s100rrf.inc
  9. 310
      Source/std-n8.inc
  10. 213
      Source/std-n8vem.inc
  11. 64
      Source/std-s100.inc
  12. 696
      Source/std-s2i.inc
  13. 98
      Source/std-zeta.inc
  14. 276
      Source/std.asm
  15. 2
      Source/ver.inc
  16. 72
      XSource/Makefile
  17. 431
      XSource/Makefile_n8_2312
  18. 431
      XSource/Makefile_n8vem
  19. 431
      XSource/Makefile_zeta
  20. 5
      XSource/makeall

BIN
Doc/S100_Project_Board_List.xlsx
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111
Source/config_s100.asm
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@ -0,0 +1,111 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8 5/8/2012
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
PLATFORM .EQU PLT_S100 ; PLT_N8VEM, PLT_ZETA, PLT_N8, PLT_S100
;
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_VDU, DIODEV_PRPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_7220, V\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
DEFEMU .EQU EMUTYP_TTY ; DEFAULT EMULATION TYPE (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKMAP .EQU DM_RAM ; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTFIFO .EQU TRUE ; TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UARTAFC .EQU FALSE ; TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_N8 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
;;
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEMODE .EQU PPIDEMODE_STD ; PPIDEMODE_STD, PPIDEMODE_DIO3
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIO .EQU TRUE ; TRUE IF USING THE CSIO PORT (N8 ONLY)
SDCSIOFAST .EQU FALSE ; TRUE IF USING THE LOOKUP TABLE RATHER THAN SHIFTS AND ROTATES (N8 ONLY)
PPISD .EQU FALSE ; TRUE IF USING PPISD MINI-BOARD (DO NOT COMBINE WITH PPIDE)
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU TRUE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
;
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
; Z180_CLKDIV .EQU 1 ; 0=XTAL/2, 1=XTAL/1
;; Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
;; Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
;; Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;; Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;;;;;;;;;;;;;;;;;;;;;;;;
; EOF - CONFG_S100.ASM ;
;;;;;;;;;;;;;;;;;;;;;;;;

2777
Source/master-dwg.asm
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138
Source/memmgr.asm
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@ -7,10 +7,79 @@
; RAMPGZ AND ROMPGZ ARE SHORTCUTS TO PAGE IN THE RAM/ROM ZERO PAGE.
;______________________________________________________________________________________________________________________
;
#IF (PLATFORM = PLT_N8)
;______________________________________________________________________________________________________________________;
; MACROS TO PERFORM RAM/ROM PAGE SELECTION INTO LOWER 32K OF MEMORY SPACE
; PGRAM(P) SELECT RAM PAGE P
; PGRAMF(P) SELECT RAM PAGE P, FAST VERSION ASSUMES CURRENT PAGE IS A RAM PAGE
; PGROM(P) SELECT ROM PAGE P
; PGROMF(P) SELECT ROM PAGE P, FAST VERSION ASSUMES CURRENT PAGE IS A ROM PAGE
;
; REGISTER A IS DESTROYED
;______________________________________________________________________________________________________________________
;
#IF (PLATFORM == PLT_N8VEM)
RAMPGZ: ; SELECT RAM PAGE ZERO
XOR A
RAMPG:
OR 80H ; TURN ON BIT 7 TO SELECT RAM PAGES
JR PGSEL
ROMPGZ: ; SELECT ROM PAGE ZERO
XOR A
ROMPG:
AND 7FH ; TURN OFF BIT 7 TO SELECT ROM PAGES
JR PGSEL
PGSEL:
OUT (MPCL_ROM),A
OUT (MPCL_RAM),A
RET
#DEFINE PGRAM(P) LD A,P | 80H \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGRAMF(P) LD A,P | 80H \ OUT (MPCL_RAM),A
#DEFINE PGROM(P) LD A,P & 7FH \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGROMF(P) LD A,P & 7FH \ OUT (MPCL_ROM),A
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_ZETA)
RAMPGZ: ; SELECT RAM PAGE ZERO
XOR A
RAMPG:
OR 80H ; TURN ON BIT 7 TO SELECT RAM PAGES
JR PGSEL
ROMPGZ: ; SELECT ROM PAGE ZERO
XOR A
ROMPG:
AND 7FH ; TURN OFF BIT 7 TO SELECT ROM PAGES
JR PGSEL
PGSEL:
OUT (MPCL_ROM),A
OUT (MPCL_RAM),A
RET
#DEFINE PGRAM(P) LD A,P | 80H \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGRAMF(P) LD A,P | 80H \ OUT (MPCL_RAM),A
#DEFINE PGROM(P) LD A,P & 7FH \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGROMF(P) LD A,P & 7FH \ OUT (MPCL_ROM),A
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_N8)
RAMPGZ: ; SELECT RAM PAGE ZERO
XOR A
RAMPG:
RLCA
RLCA
@ -19,10 +88,9 @@ RAMPG:
LD A,DEFACR | 80H
OUT0 (ACR),A
RET
;
;a
ROMPGZ: ; SELECT ROM PAGE ZERO
XOR A
ROMPG:
OUT0 (RMAP),A
XOR A
@ -30,17 +98,26 @@ ROMPG:
LD A,DEFACR
OUT0 (ACR),A
RET
#ELSE
#DEFINE PGRAM(P) LD A,P << 3 \ OUT0 (CPU_BBR),A \ LD A,DEFACR | 80H \ OUT0 (ACR),A
#DEFINE PGRAMF(P) LD A,P << 3 \ OUT0 (CPU_BBR),A
#DEFINE PGROM(P) LD A,P \ OUT0 (RMAP),A \ XOR A \ OUT0 (CPU_BBR),A \ LD A,DEFACR \ OUT0 (ACR),A
#DEFINE PGROMF(P) LD A,P \ OUT0 (RMAP),A
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_S2I)
RAMPGZ: ; SELECT RAM PAGE ZERO
XOR A
RAMPG:
OR 80H ; TURN ON BIT 7 TO SELECT RAM PAGES
JR PGSEL
ROMPGZ: ; SELECT ROM PAGE ZERO
XOR A
ROMPG:
AND 7FH ; TURN OFF BIT 7 TO SELECT ROM PAGES
JR PGSEL
@ -49,31 +126,44 @@ PGSEL:
OUT (MPCL_ROM),A
OUT (MPCL_RAM),A
RET
#DEFINE PGRAM(P) LD A,P | 80H \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGRAMF(P) LD A,P | 80H \ OUT (MPCL_RAM),A
#DEFINE PGROM(P) LD A,P & 7FH \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGROMF(P) LD A,P & 7FH \ OUT (MPCL_ROM),A
#ENDIF
;
;______________________________________________________________________________________________________________________
;
; MACROS TO PERFORM RAM/ROM PAGE SELECTION INTO LOWER 32K OF MEMORY SPACE
; PGRAM(P) SELECT RAM PAGE P
; PGRAMF(P) SELECT RAM PAGE P, FAST VERSION ASSUMES CURRENT PAGE IS A RAM PAGE
; PGROM(P) SELECT ROM PAGE P
; PGROMF(P) SELECT ROM PAGE P, FAST VERSION ASSUMES CURRENT PAGE IS A ROM PAGE
;
; REGISTER A IS DESTROYED
;______________________________________________________________________________________________________________________
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_S100)
RAMPGZ: ; SELECT RAM PAGE ZERO
XOR A
RAMPG:
OR 80H ; TURN ON BIT 7 TO SELECT RAM PAGES
JR PGSEL
ROMPGZ: ; SELECT ROM PAGE ZERO
XOR A
ROMPG:
AND 7FH ; TURN OFF BIT 7 TO SELECT ROM PAGES
JR PGSEL
#IF (PLATFORM = PLT_N8)
#DEFINE PGRAM(P) LD A,P << 3 \ OUT0 (CPU_BBR),A \ LD A,DEFACR | 80H \ OUT0 (ACR),A
#DEFINE PGRAMF(P) LD A,P << 3 \ OUT0 (CPU_BBR),A
PGSEL:
OUT (MPCL_ROM),A
OUT (MPCL_RAM),A
RET
#DEFINE PGROM(P) LD A,P \ OUT0 (RMAP),A \ XOR A \ OUT0 (CPU_BBR),A \ LD A,DEFACR \ OUT0 (ACR),A
#DEFINE PGROMF(P) LD A,P \ OUT0 (RMAP),A
#ELSE
#DEFINE PGRAM(P) LD A,P | 80H \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGRAMF(P) LD A,P | 80H \ OUT (MPCL_RAM),A
#DEFINE PGROM(P) LD A,P & 7FH \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
#DEFINE PGROMF(P) LD A,P & 7FH \ OUT (MPCL_ROM),A
#ENDIF
;;;;;;;;;;;;;;;;;;;;
; EOF - MEMMGR.ASM ;
;;;;;;;;;;;;;;;;;;;;

6
Source/s100cpu.inc
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@ -0,0 +1,6 @@
; ~/RomWBW/branches/s100/Source/s100cpu.inc 1/17/2013 dwg -
; S100COMPUTERS.COM Z80 Master CPU Board Schema
#DEFINE IC_Z80

10
Source/s100dide.inc
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@ -0,0 +1,10 @@
; ~/RomWBW/branches/s100/Source/s100dide.inc 1/17/2013 dwg -
; S100COMPUTERS.COM Dual IDE Board Schema
;#DEFINE IC_SCC_8530
;#DEFINE IC_PPI_8255

9
Source/s100iob.inc
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@ -0,0 +1,9 @@
; ~/RomWBW/branches/s100/Source/s100iob.inc 1/17/2013 dwg -
; S100COMPUTERS.COM Input Output Board Schema
#DEFINE IC_SCC_8530
#DEFINE IC_PPI_8255

10
Source/s100rrf.inc
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@ -0,0 +1,10 @@
; ~/RomWBW/branches/s100/Source/s100rrf.inc 1/17/2013 dwg -
; S100COMPUTERS.COM Ram Rom Flash Board Schema
;#DEFINE IC_SCC_8530
;#DEFINE IC_PPI_8255

310
Source/std-n8.inc
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@ -0,0 +1,310 @@
; std-n8.inc 1/19/2013 dwg -
;;CIODEV_BAT .EQU $E0
;;CIODEV_NUL .EQU $F0
;
; CHARACTER DEVICES
;
CIODEV_UART .SET $00
;CIODEV_ASCI .EQU $10
;CIODEV_VDU .EQU $20
;CIODEV_CVDU .EQU $30
;CIODEV_UPD7220 .EQU $40
CIODEV_N8V .EQU $50
;CIODEV_PRPCON .EQU $60
;CIODEV_PPPCON .EQU $70
CIODEV_CRT .EQU $D0
;CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
;DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_IDE .EQU $20
DIODEV_ATAPI .EQU $30
DIODEV_PPIDE .EQU $40
DIODEV_SD .EQU $50
DIODEV_PRPSD .EQU $60
DIODEV_PPPSD .EQU $70
DIODEV_HDSK .EQU $80
;
; RAM DISK INITIALIZATION OPTIONS
;
;CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
;CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
;;CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
;
; DISK MAP SELECTION OPTIONS
;
;DM_ROM .EQU 1 ; ROM DRIVE PRIORITY
;DM_RAM .EQU 2 ; RAM DRIVE PRIORITY
;DM_FD .EQU 3 ; FLOPPY DRIVE PRIORITY
;DM_IDE .EQU 4 ; IDE DRIVE PRIORITY
;DM_PPIDE .EQU 5 ; PPIDE DRIVE PRIORITY
:DM_SD .EQU 6 ; SD DRIVE PRIORITY
;DM_PRPSD .EQU 7 ; PROPIO SD DRIVE PRIORITY
;DM_PPPSD .EQU 8 ; PROPIO SD DRIVE PRIORITY
;DM_HDSK .EQU 9 ; SIMH HARD DISK DRIVE PRIORITY
;
; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
;
;FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
;FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
;FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
;FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
;FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
;
; MEDIA ID VALUES
;
;MID_NONE .EQU 0
;MID_MDROM .EQU 1
;MID_MDRAM .EQU 2
;MID_HD .EQU 3
;MID_FD720 .EQU 4
;MID_FD144 .EQU 5
;MID_FD360 .EQU 6
;MID_FD120 .EQU 7
;MID_FD111 .EQU 8
;
; FD MODE SELECTIONS
;
;FDMODE_DIO .EQU 1 ; DISKIO V1
;FDMODE_ZETA .EQU 2 ; ZETA
;FDMODE_DIDE .EQU 3 ; DUAL IDE
;FDMODE_N8 .EQU 4 ; N8
;FDMODE_DIO3 .EQU 5 ; DISKIO V3
;
; IDE MODE SELECTIONS
;
;IDEMODE_DIO .EQU 1 ; DISKIO V1
;IDEMODE_DIDE .EQU 2 ; DUAL IDE
;
; PPIDE MODE SELECTIONS
;
;PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
;PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
;
; CONSOLE TERMINAL TYPE CHOICES
;
;TERM_TTY .EQU 0
;TERM_ANSI .EQU 1
;TERM_WYSE .EQU 2
;TERM_VT52 .EQU 3
;
; EMULATION TYPES
;
;EMUTYP_NONE .EQU 0
;EMUTYP_TTY .EQU 1
;EMUTYP_ANSI .EQU 2
;
; SYSTEM GENERATION SETTINGS
;
;SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
;SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
;
;DOS_BDOS .EQU 1 ; BDOS
;DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
;DOS_ZSDOS .EQU 3 ; ZSDOS
;
;CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
;CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
;
; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
;
;#IFNDEF BLD_SYS
;SYS .EQU SYS_CPM
;#ELSE
;SYS .EQU BLD_SYS
;#ENDIF
;
#IF (SYS == SYS_CPM)
;DOS .EQU DOS_BDOS
;CP .EQU CP_CCP
#DEFINE OSLBL "CP/M-80 2.2"
#ENDIF
;
#IF (SYS == SYS_ZSYS)
DOS .EQU DOS_ZSDOS
CP .EQU CP_ZCPR
#DEFINE OSLBL "ZSDOS 1.1"
#ENDIF
;
; INCLUDE VERSION AND BUILD SETTINGS
;
;#INCLUDE "ver.inc" ; ADD BIOSVER
;
;#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Support for S100COMPUTERS.COM Hardware ;
; Phase One Support - Minimum Board Set ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_S100)
;
#IFDEF S100_CPU
#INCLUDE "S100CPU.INC"
#ENDIF
;
#IFDEF S100_IOB
#INCLUDE "S100IOB.INC"
#ENDIF
;
#IFDEF S100_RRF
#INCLUDE "S100RRF.INC"
#ENDIF
#IFDEF S100_DIDE
#INCLUDE "S100DIDE.INC"
#ENDIF
;
#ENDIF
#IF (PLATFORM != PLT_N8)
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
#IF (PLATFORM == PLT_S2I)
PPIBASE .EQU 80H
#ELSE
PPIBASE .EQU 60H
#ENDIF
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
; 16C550 SERIAL LINE UART
;
#IF (PLATFORM == PLT_S2I)
SIO_BASE .EQU 90H
#ELSE
SIO_BASE .EQU 68H
#ENDIF
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;
#ENDIF ; (PLATFORM != PLT_N8)
;
#IF (PLATFORM == PLT_N8)
;
; Z180 REGISTERS
;
CPU_IOBASE .EQU 40H ; ONLY RELEVANT FOR Z180
;
CPU_CNTLA0: .EQU CPU_IOBASE+$00 ;ASCI0 control A
CPU_CNTLA1: .EQU CPU_IOBASE+$01 ;ASCI1 control A
CPU_CNTLB0: .EQU CPU_IOBASE+$02 ;ASCI0 control B
CPU_CNTLB1: .EQU CPU_IOBASE+$03 ;ASCI1 control B
CPU_STAT0: .EQU CPU_IOBASE+$04 ;ASCI0 status
CPU_STAT1: .EQU CPU_IOBASE+$05 ;ASCI1 status
CPU_TDR0: .EQU CPU_IOBASE+$06 ;ASCI0 transmit
CPU_TDR1: .EQU CPU_IOBASE+$07 ;ASCI1 transmit
CPU_RDR0: .EQU CPU_IOBASE+$08 ;ASCI0 receive
CPU_RDR1: .EQU CPU_IOBASE+$09 ;ASCI1 receive
CPU_CNTR: .EQU CPU_IOBASE+$0A ;CSI/O control
CPU_TRDR: .EQU CPU_IOBASE+$0B ;CSI/O transmit/receive
CPU_TMDR0L: .EQU CPU_IOBASE+$0C ;Timer 0 data lo
CPU_TMDR0H: .EQU CPU_IOBASE+$0D ;Timer 0 data hi
CPU_RLDR0L: .EQU CPU_IOBASE+$0E ;Timer 0 reload lo
CPU_RLDR0H: .EQU CPU_IOBASE+$0F ;Timer 0 reload hi
CPU_TCR: .EQU CPU_IOBASE+$10 ;Timer control
;
CPU_ASEXT0: .EQU CPU_IOBASE+$12 ;ASCI0 extension control (Z8S180)
CPU_ASEXT1: .EQU CPU_IOBASE+$13 ;ASCI1 extension control (Z8S180)
;
CPU_TMDR1L: .EQU CPU_IOBASE+$14 ;Timer 1 data lo
CPU_TMDR1H: .EQU CPU_IOBASE+$15 ;Timer 1 data hi
CPU_RLDR1L: .EQU CPU_IOBASE+$16 ;Timer 1 reload lo
CPU_RLDR1H: .EQU CPU_IOBASE+$17 ;Timer 1 reload hi
CPU_FRC: .EQU CPU_IOBASE+$18 ;Free running counter
CPU_ASTC0L: .EQU CPU_IOBASE+$1A ;ASCI0 Time constant lo (Z8S180)
CPU_ASTC0H: .EQU CPU_IOBASE+$1B ;ASCI0 Time constant hi (Z8S180)
CPU_ASTC1L: .EQU CPU_IOBASE+$1C ;ASCI1 Time constant lo (Z8S180)
CPU_ASTC1H: .EQU CPU_IOBASE+$1D ;ASCI1 Time constant hi (Z8S180)
CPU_CMR: .EQU CPU_IOBASE+$1E ;Clock multiplier (latest Z8S180)
CPU_CCR: .EQU CPU_IOBASE+$1F ;CPU control (Z8S180)
;
CPU_SAR0L: .EQU CPU_IOBASE+$20 ;DMA0 source addr lo
CPU_SAR0H: .EQU CPU_IOBASE+$21 ;DMA0 source addr hi
CPU_SAR0B: .EQU CPU_IOBASE+$22 ;DMA0 source addr bank
CPU_DAR0L: .EQU CPU_IOBASE+$23 ;DMA0 dest addr lo
CPU_DAR0H: .EQU CPU_IOBASE+$24 ;DMA0 dest addr hi
CPU_DAR0B: .EQU CPU_IOBASE+$25 ;DMA0 dest addr bank
CPU_BCR0L: .EQU CPU_IOBASE+$26 ;DMA0 byte count lo
CPU_BCR0H: .EQU CPU_IOBASE+$27 ;DMA0 byte count hi
CPU_MAR1L: .EQU CPU_IOBASE+$28 ;DMA1 memory addr lo
CPU_MAR1H: .EQU CPU_IOBASE+$29 ;DMA1 memory addr hi
CPU_MAR1B: .EQU CPU_IOBASE+$2A ;DMA1 memory addr bank
CPU_IAR1L: .EQU CPU_IOBASE+$2B ;DMA1 I/O addr lo
CPU_IAR1H: .EQU CPU_IOBASE+$2C ;DMA1 I/O addr hi
CPU_IAR1B: .EQU CPU_IOBASE+$2D ;DMA1 I/O addr bank (Z8S180)
CPU_BCR1L: .EQU CPU_IOBASE+$2E ;DMA1 byte count lo
CPU_BCR1H: .EQU CPU_IOBASE+$2F ;DMA1 byte count hi
CPU_DSTAT: .EQU CPU_IOBASE+$30 ;DMA status
CPU_DMODE: .EQU CPU_IOBASE+$31 ;DMA mode
CPU_DCNTL: .EQU CPU_IOBASE+$32 ;DMA/WAIT control
CPU_IL: .EQU CPU_IOBASE+$33 ;Interrupt vector load
CPU_ITC: .EQU CPU_IOBASE+$34 ;INT/TRAP control
;
CPU_RCR: .EQU CPU_IOBASE+$36 ;Refresh control
;
CPU_CBR: .EQU CPU_IOBASE+$38 ;MMU common base register
CPU_BBR: .EQU CPU_IOBASE+$39 ;MMU bank base register
CPU_CBAR .EQU CPU_IOBASE+$3A ;MMU common/bank area register
;
CPU_OMCR: .EQU CPU_IOBASE+$3E ;Operation mode control
CPU_ICR: .EQU $3F ;I/O control register (not relocated!!!)
;
; N8 ONBOARD I/O REGISTERS
;
N8_IOBASE .EQU $80
;
PPI .EQU N8_IOBASE+$00
PPIA .EQU PPI+$00 ; PORT A
PPIB .EQU PPI+$01 ; PORT B
PPIC .EQU PPI+$02 ; PORT C
PPIX .EQU PPI+$03 ; PPI CONTROL PORT
;
PPI2 .EQU N8_IOBASE+$04
PPI2A .EQU PPI2+$00 ; PORT A
PPI2B .EQU PPI2+$01 ; PORT B
PPI2C .EQU PPI2+$02 ; PORT C
PPI2X .EQU PPI2+$03 ; PPI CONTROL PORT
;
RTC: .EQU N8_IOBASE+$08 ;RTC latch and buffer
;FDC: .EQU N8_IOBASE+$0C ;Floppy disk controller
;UTIL: .EQU N8_IOBASE+$10 ;Floppy disk utility
ACR: .EQU N8_IOBASE+$14 ;auxillary control register
RMAP: .EQU N8_IOBASE+$16 ;ROM page register
VDP: .EQU N8_IOBASE+$18 ;Video Display Processor (TMS9918A)
PSG: .EQU N8_IOBASE+$1C ;Programmable Sound Generator (AY-3-8910)
;
DEFACR .EQU $1B
;
#ENDIF

213
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@ -0,0 +1,213 @@
; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg -
;
;
; DEPRECATED STUFF!!!
;
;DIOPLT .EQU 0 ; DEPRECATED!!!
;VDUMODE .EQU 0 ; DEPRECATED!!!
;BIOSSIZE .EQU 0100H ; DEPRECATED!!!
;
; PRIMARY HARDWARE PLATFORMS
;
;PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
;PLT_ZETA .EQU 2 ; ZETA Z80 SBC
;PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
;PLT_S2I .EQU 4 ; SCSI2IDE
;PLT_S100 .EQU 5 ; S100COMPUTERS Z80 based system
; BOOT STYLE
;
;BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
;BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; VDA DEVICES (VIDEO DISPLAY ADAPTER)
;
;VDADEV_NONE .EQU $00 ; NO VDA DEVICE
;VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
;VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMPLEMENTED)
;VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NO T IMPLEMENTED)
;VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM
;
; CHARACTER DEVICES
;
;CIODEV_UART .EQU $00
CIODEV_ASCI .EQU $10
CIODEV_VDU .EQU $20
CIODEV_CVDU .EQU $30
CIODEV_UPD7220 .EQU $40
CIODEV_N8V .EQU $50
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CRT .EQU $D0
;CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
;DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_IDE .EQU $20
DIODEV_ATAPI .EQU $30
DIODEV_PPIDE .EQU $40
DIODEV_SD .EQU $50
DIODEV_PRPSD .EQU $60
DIODEV_PPPSD .EQU $70
DIODEV_HDSK .EQU $80
;
; RAM DISK INITIALIZATION OPTIONS
;
;;CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
;;CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
;;CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
;
; DISK MAP SELECTION OPTIONS
;
;DM_ROM .EQU 1 ; ROM DRIVE PRIORITY
;DM_RAM .EQU 2 ; RAM DRIVE PRIORITY
;DM_FD .EQU 3 ; FLOPPY DRIVE PRIORITY
;DM_IDE .EQU 4 ; IDE DRIVE PRIORITY
;DM_PPIDE .EQU 5 ; PPIDE DRIVE PRIORITY
;DM_SD .EQU 6 ; SD DRIVE PRIORITY
;DM_PRPSD .EQU 7 ; PROPIO SD DRIVE PRIORITY
;DM_PPPSD .EQU 8 ; PROPIO SD DRIVE PRIORITY
;DM_HDSK .EQU 9 ; SIMH HARD DISK DRIVE PRIORITY
;
; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
;
;FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
;FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
;FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
;FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
;FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
;
; MEDIA ID VALUES
;
;MID_NONE .EQU 0
;MID_MDROM .EQU 1
;MID_MDRAM .EQU 2
;MID_HD .EQU 3
;MID_FD720 .EQU 4
;MID_FD144 .EQU 5
;MID_FD360 .EQU 6
;MID_FD120 .EQU 7
;MID_FD111 .EQU 8
;
; FD MODE SELECTIONS
;
;;FDMODE_DIO .EQU 1 ; DISKIO V1
;;FDMODE_ZETA .EQU 2 ; ZETA
;;FDMODE_DIDE .EQU 3 ; DUAL IDE
;;FDMODE_N8 .EQU 4 ; N8
;;FDMODE_DIO3 .EQU 5 ; DISKIO V3
;
; IDE MODE SELECTIONS
;
;;IDEMODE_DIO .EQU 1 ; DISKIO V1
;;IDEMODE_DIDE .EQU 2 ; DUAL IDE
;
; PPIDE MODE SELECTIONS
;
;;PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
;;PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
;
; CONSOLE TERMINAL TYPE CHOICES
;
;;TERM_TTY .EQU 0
;;TERM_ANSI .EQU 1
;;TERM_WYSE .EQU 2
;;TERM_VT52 .EQU 3
;
; EMULATION TYPES
;
;;EMUTYP_NONE .EQU 0
;;EMUTYP_TTY .EQU 1
;;EMUTYP_ANSI .EQU 2
;
; SYSTEM GENERATION SETTINGS
;
;;SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
;;SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
;
;;DOS_BDOS .EQU 1 ; BDOS
;;DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
;;DOS_ZSDOS .EQU 3 ; ZSDOS
;
;;CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
;;CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
;
; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
;
;#IFNDEF BLD_SYS
;SYS .EQU SYS_CPM
;#ELSE
;SYS .EQU BLD_SYS
;#ENDIF
;
;#IF (SYS == SYS_CPM)
;DOS .EQU DOS_BDOS
;CP .EQU CP_CCP
;#DEFINE OSLBL "CP/M-80 2.2"
;#ENDIF
;
;#IF (SYS == SYS_ZSYS)
;DOS .EQU DOS_ZSDOS
;CP .EQU CP_ZCPR
;#DEFINE OSLBL "ZSDOS 1.1"
;#ENDIF
;
; INCLUDE VERSION AND BUILD SETTINGS
;
;#INCLUDE "ver.inc" ; ADD BIOSVER
;
;#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
;
#IF (PLATFORM != PLT_N8)
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
PPIBASE .EQU 60H
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
; 16C550 SERIAL LINE UART
;
SIO_BASE .EQU 68H
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;
#ENDIF ; (PLATFORM != PLT_N8)
;
;;;;;;;;;;;;;;;;;;;;;;;
; eof - std-n8vem.inc ;
;;;;;;;;;;;;;;;;;;;;;;;

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; std-s100.inc 1/19/2013 dwg -
;
;===============================================================================
;------------------------------------------------------------------------------
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
;
; CHARACTER DEVICES
;
;CIODEV_UART .EQU $00
CIODEV_N8V .EQU $50
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CRT .EQU $D0
;CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
;DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_IDE .EQU $20
DIODEV_ATAPI .EQU $30
DIODEV_PPIDE .EQU $40
DIODEV_SD .EQU $50
DIODEV_PRPSD .EQU $60
DIODEV_PPPSD .EQU $70
DIODEV_HDSK .EQU $80
;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
PPIBASE .EQU 60H
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
; 16C550 SERIAL LINE UART
;
SIO_BASE .EQU 68H
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;;;;;;;;;;;;;;;;;;;;;;
; eof - std-s100.inc ;
;;;;;;;;;;;;;;;;;;;;;;

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;
;==================================================================================================
; STANDARD INCLUDE STUFF
;==================================================================================================
;
; 5/21/2012 2.0.0.0 dwg - added B1F0PEEK & B1F0POKE
;
; 5/11/2012 2.0.0.0 dwg - moved BIOS JMPS together
;
; 3/04/2012 2.0.0.0 dwg - added CBIOS_BNKSEL for new BIOS jump (OEM extension)
;
; 2/21/2012 dwg - added TERM_VT52 terminal type for VDU
; 12/12/2011 dwg - changed TERM_NOT_SPEC to TERM_TTY & TTY=0 ANSI=1 WYSE=2
;
; 12/11/2011 dwg - added TERM_ANSI and TERM_WYSE for TERMTYPE
;
; 11/29/2011 dwg - now uses dynamically generated include file
; instead of static definitions.
;
;---------------------------------------------------------------------------------------------------
;
TRUE .EQU 1
FALSE .EQU 0
;
; DEPRECATED STUFF!!!
;
DIOPLT .EQU 0 ; DEPRECATED!!!
VDUMODE .EQU 0 ; DEPRECATED!!!
BIOSSIZE .EQU 0100H ; DEPRECATED!!!
;
; PRIMARY HARDWARE PLATFORMS
;
PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
PLT_ZETA .EQU 2 ; ZETA Z80 SBC
PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
PLT_S2I .EQU 4 ; SCSI2IDE
PLT_S100 .EQU 5 ; S100COMPUTERS Z80 based system
; BOOT STYLE
;
BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
;
; VDA DEVICES (VIDEO DISPLAY ADAPTER)
;
VDADEV_NONE .EQU $00 ; NO VDA DEVICE
VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMPLEMENTED)
VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED)
VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM
;
; CHARACTER DEVICES
;
CIODEV_UART .EQU $00
CIODEV_ASCI .EQU $10
CIODEV_VDU .EQU $20
CIODEV_CVDU .EQU $30
CIODEV_UPD7220 .EQU $40
CIODEV_N8V .EQU $50
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CRT .EQU $D0
CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_IDE .EQU $20
DIODEV_ATAPI .EQU $30
DIODEV_PPIDE .EQU $40
DIODEV_SD .EQU $50
DIODEV_PRPSD .EQU $60
DIODEV_PPPSD .EQU $70
DIODEV_HDSK .EQU $80
;
; RAM DISK INITIALIZATION OPTIONS
;
CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
;
; DISK MAP SELECTION OPTIONS
;
DM_ROM .EQU 1 ; ROM DRIVE PRIORITY
DM_RAM .EQU 2 ; RAM DRIVE PRIORITY
DM_FD .EQU 3 ; FLOPPY DRIVE PRIORITY
DM_IDE .EQU 4 ; IDE DRIVE PRIORITY
DM_PPIDE .EQU 5 ; PPIDE DRIVE PRIORITY
DM_SD .EQU 6 ; SD DRIVE PRIORITY
DM_PRPSD .EQU 7 ; PROPIO SD DRIVE PRIORITY
DM_PPPSD .EQU 8 ; PROPIO SD DRIVE PRIORITY
DM_HDSK .EQU 9 ; SIMH HARD DISK DRIVE PRIORITY
;
; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
;
FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
;
; MEDIA ID VALUES
;
MID_NONE .EQU 0
MID_MDROM .EQU 1
MID_MDRAM .EQU 2
MID_HD .EQU 3
MID_FD720 .EQU 4
MID_FD144 .EQU 5
MID_FD360 .EQU 6
MID_FD120 .EQU 7
MID_FD111 .EQU 8
;
; FD MODE SELECTIONS
;
FDMODE_DIO .EQU 1 ; DISKIO V1
FDMODE_ZETA .EQU 2 ; ZETA
FDMODE_DIDE .EQU 3 ; DUAL IDE
FDMODE_N8 .EQU 4 ; N8
FDMODE_DIO3 .EQU 5 ; DISKIO V3
;
; IDE MODE SELECTIONS
;
IDEMODE_DIO .EQU 1 ; DISKIO V1
IDEMODE_DIDE .EQU 2 ; DUAL IDE
;
; PPIDE MODE SELECTIONS
;
PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
;
; CONSOLE TERMINAL TYPE CHOICES
;
TERM_TTY .EQU 0
TERM_ANSI .EQU 1
TERM_WYSE .EQU 2
TERM_VT52 .EQU 3
;
; EMULATION TYPES
;
EMUTYP_NONE .EQU 0
EMUTYP_TTY .EQU 1
EMUTYP_ANSI .EQU 2
;
; SYSTEM GENERATION SETTINGS
;
SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
;
DOS_BDOS .EQU 1 ; BDOS
DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
DOS_ZSDOS .EQU 3 ; ZSDOS
;
CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
;
; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
;
#IFNDEF BLD_SYS
SYS .EQU SYS_CPM
#ELSE
SYS .EQU BLD_SYS
#ENDIF
;
#IF (SYS == SYS_CPM)
DOS .EQU DOS_BDOS
CP .EQU CP_CCP
#DEFINE OSLBL "CP/M-80 2.2"
#ENDIF
;
#IF (SYS == SYS_ZSYS)
DOS .EQU DOS_ZSDOS
CP .EQU CP_ZCPR
#DEFINE OSLBL "ZSDOS 1.1"
#ENDIF
;
; INCLUDE VERSION AND BUILD SETTINGS
;
#INCLUDE "ver.inc" ; ADD BIOSVER
;
#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Support for S100COMPUTERS.COM Hardware ;
; Phase One Support - Minimum Board Set ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_S100)
;
#IFDEF S100_CPU
#INCLUDE "S100CPU.INC"
#ENDIF
;
#IFDEF S100_IOB
#INCLUDE "S100IOB.INC"
#ENDIF
;
#IFDEF S100_RRF
#INCLUDE "S100RRF.INC"
#ENDIF
;
#IFDEF S100_DIDE
#INCLUDE "S100DIDE.INC"
#ENDIF
;
#ENDIF
#IF (PLATFORM != PLT_N8)
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
#IF (PLATFORM == PLT_S2I)
PPIBASE .EQU 80H
#ELSE
PPIBASE .EQU 60H
#ENDIF
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
; 16C550 SERIAL LINE UART
;
#IF (PLATFORM == PLT_S2I)
SIO_BASE .EQU 90H
#ELSE
SIO_BASE .EQU 68H
#ENDIF
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;
#ENDIF ; (PLATFORM != PLT_N8)
;
#IF (PLATFORM == PLT_N8)
;
; Z180 REGISTERS
;
CPU_IOBASE .EQU 40H ; ONLY RELEVANT FOR Z180
;
CPU_CNTLA0: .EQU CPU_IOBASE+$00 ;ASCI0 control A
CPU_CNTLA1: .EQU CPU_IOBASE+$01 ;ASCI1 control A
CPU_CNTLB0: .EQU CPU_IOBASE+$02 ;ASCI0 control B
CPU_CNTLB1: .EQU CPU_IOBASE+$03 ;ASCI1 control B
CPU_STAT0: .EQU CPU_IOBASE+$04 ;ASCI0 status
CPU_STAT1: .EQU CPU_IOBASE+$05 ;ASCI1 status
CPU_TDR0: .EQU CPU_IOBASE+$06 ;ASCI0 transmit
CPU_TDR1: .EQU CPU_IOBASE+$07 ;ASCI1 transmit
CPU_RDR0: .EQU CPU_IOBASE+$08 ;ASCI0 receive
CPU_RDR1: .EQU CPU_IOBASE+$09 ;ASCI1 receive
CPU_CNTR: .EQU CPU_IOBASE+$0A ;CSI/O control
CPU_TRDR: .EQU CPU_IOBASE+$0B ;CSI/O transmit/receive
CPU_TMDR0L: .EQU CPU_IOBASE+$0C ;Timer 0 data lo
CPU_TMDR0H: .EQU CPU_IOBASE+$0D ;Timer 0 data hi
CPU_RLDR0L: .EQU CPU_IOBASE+$0E ;Timer 0 reload lo
CPU_RLDR0H: .EQU CPU_IOBASE+$0F ;Timer 0 reload hi
CPU_TCR: .EQU CPU_IOBASE+$10 ;Timer control
;
CPU_ASEXT0: .EQU CPU_IOBASE+$12 ;ASCI0 extension control (Z8S180)
CPU_ASEXT1: .EQU CPU_IOBASE+$13 ;ASCI1 extension control (Z8S180)
;
CPU_TMDR1L: .EQU CPU_IOBASE+$14 ;Timer 1 data lo
CPU_TMDR1H: .EQU CPU_IOBASE+$15 ;Timer 1 data hi
CPU_RLDR1L: .EQU CPU_IOBASE+$16 ;Timer 1 reload lo
CPU_RLDR1H: .EQU CPU_IOBASE+$17 ;Timer 1 reload hi
CPU_FRC: .EQU CPU_IOBASE+$18 ;Free running counter
CPU_ASTC0L: .EQU CPU_IOBASE+$1A ;ASCI0 Time constant lo (Z8S180)
CPU_ASTC0H: .EQU CPU_IOBASE+$1B ;ASCI0 Time constant hi (Z8S180)
CPU_ASTC1L: .EQU CPU_IOBASE+$1C ;ASCI1 Time constant lo (Z8S180)
CPU_ASTC1H: .EQU CPU_IOBASE+$1D ;ASCI1 Time constant hi (Z8S180)
CPU_CMR: .EQU CPU_IOBASE+$1E ;Clock multiplier (latest Z8S180)
CPU_CCR: .EQU CPU_IOBASE+$1F ;CPU control (Z8S180)
;
CPU_SAR0L: .EQU CPU_IOBASE+$20 ;DMA0 source addr lo
CPU_SAR0H: .EQU CPU_IOBASE+$21 ;DMA0 source addr hi
CPU_SAR0B: .EQU CPU_IOBASE+$22 ;DMA0 source addr bank
CPU_DAR0L: .EQU CPU_IOBASE+$23 ;DMA0 dest addr lo
CPU_DAR0H: .EQU CPU_IOBASE+$24 ;DMA0 dest addr hi
CPU_DAR0B: .EQU CPU_IOBASE+$25 ;DMA0 dest addr bank
CPU_BCR0L: .EQU CPU_IOBASE+$26 ;DMA0 byte count lo
CPU_BCR0H: .EQU CPU_IOBASE+$27 ;DMA0 byte count hi
CPU_MAR1L: .EQU CPU_IOBASE+$28 ;DMA1 memory addr lo
CPU_MAR1H: .EQU CPU_IOBASE+$29 ;DMA1 memory addr hi
CPU_MAR1B: .EQU CPU_IOBASE+$2A ;DMA1 memory addr bank
CPU_IAR1L: .EQU CPU_IOBASE+$2B ;DMA1 I/O addr lo
CPU_IAR1H: .EQU CPU_IOBASE+$2C ;DMA1 I/O addr hi
CPU_IAR1B: .EQU CPU_IOBASE+$2D ;DMA1 I/O addr bank (Z8S180)
CPU_BCR1L: .EQU CPU_IOBASE+$2E ;DMA1 byte count lo
CPU_BCR1H: .EQU CPU_IOBASE+$2F ;DMA1 byte count hi
CPU_DSTAT: .EQU CPU_IOBASE+$30 ;DMA status
CPU_DMODE: .EQU CPU_IOBASE+$31 ;DMA mode
CPU_DCNTL: .EQU CPU_IOBASE+$32 ;DMA/WAIT control
CPU_IL: .EQU CPU_IOBASE+$33 ;Interrupt vector load
CPU_ITC: .EQU CPU_IOBASE+$34 ;INT/TRAP control
;
CPU_RCR: .EQU CPU_IOBASE+$36 ;Refresh control
;
CPU_CBR: .EQU CPU_IOBASE+$38 ;MMU common base register
CPU_BBR: .EQU CPU_IOBASE+$39 ;MMU bank base register
CPU_CBAR .EQU CPU_IOBASE+$3A ;MMU common/bank area register
;
CPU_OMCR: .EQU CPU_IOBASE+$3E ;Operation mode control
CPU_ICR: .EQU $3F ;I/O control register (not relocated!!!)
;
; N8 ONBOARD I/O REGISTERS
;
N8_IOBASE .EQU $80
;
PPI .EQU N8_IOBASE+$00
PPIA .EQU PPI+$00 ; PORT A
PPIB .EQU PPI+$01 ; PORT B
PPIC .EQU PPI+$02 ; PORT C
PPIX .EQU PPI+$03 ; PPI CONTROL PORT
;
PPI2 .EQU N8_IOBASE+$04
PPI2A .EQU PPI2+$00 ; PORT A
PPI2B .EQU PPI2+$01 ; PORT B
PPI2C .EQU PPI2+$02 ; PORT C
PPI2X .EQU PPI2+$03 ; PPI CONTROL PORT
;
RTC: .EQU N8_IOBASE+$08 ;RTC latch and buffer
;FDC: .EQU N8_IOBASE+$0C ;Floppy disk controller
;UTIL: .EQU N8_IOBASE+$10 ;Floppy disk utility
ACR: .EQU N8_IOBASE+$14 ;auxillary control register
RMAP: .EQU N8_IOBASE+$16 ;ROM page register
VDP: .EQU N8_IOBASE+$18 ;Video Display Processor (TMS9918A)
PSG: .EQU N8_IOBASE+$1C ;Programmable Sound Generator (AY-3-8910)
;
DEFACR .EQU $1B
;
#ENDIF
;
; CHARACTER DEVICE FUNCTIONS
;
CF_INIT .EQU 0
CF_IN .EQU 1
CF_IST .EQU 2
CF_OUT .EQU 3
CF_OST .EQU 4
;
; DISK OPERATIONS
;
DOP_READ .EQU 0 ; READ OPERATION
DOP_WRITE .EQU 1 ; WRITE OPERATION
DOP_FORMAT .EQU 2 ; FORMAT OPERATION
DOP_READID .EQU 3 ; READ ID OPERATION
;
; DISK DRIVER FUNCTIONS
;
DF_READY .EQU 1
DF_SELECT .EQU 2
DF_READ .EQU 3
DF_WRITE .EQU 4
DF_FORMAT .EQU 5
;
; BIOS FUNCTIONS
;
BF_CIO .EQU $00
BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT
BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT
BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS
BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS
BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG
;
BF_DIO .EQU $10
BF_DIORD .EQU BF_DIO + 0 ; DISK READ
BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE
BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS
BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA
BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY
BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR
BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR
;
BF_RTC .EQU $20
BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME
BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME
BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX
BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX
BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK
BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK
;
BF_EMU .EQU $30
BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT
BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT
BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS
BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS
BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG
BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION
BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS
;
BF_VDA .EQU $40
BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU
BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS
BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU
BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE
BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION
BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE
BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR
BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER
BF_VDAFIL .EQU BF_VDA + 8 ; FILL
BF_VDASCR .EQU BF_VDA + 9 ; SCROLL
BF_VDAKST .EQU BF_VDA + 10 ; GET KEYBOARD STATUS
BF_VDAKFL .EQU BF_VDA + 11 ; FLUSH KEYBOARD BUFFER
BF_VDAKRD .EQU BF_VDA + 12 ; READ KEYBOARD
;
BF_SYS .EQU $F0
BF_SYSGETCFG .EQU BF_SYS + 0 ; GET CONFIGURATION DATA BLOCK
BF_SYSSETCFG .EQU BF_SYS + 1 ; SET CONFIGURATION DATA BLOCK
BF_SYSBNKCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK
BF_SYSGETVER .EQU BF_SYS + 3 ; GET VERSION OF HBIOS
;
;
; MEMORY LAYOUT
;
CPM_LOC .EQU 0D000H ; CONFIGURABLE: LOCATION OF CPM FOR RUNNING SYSTEM
CPM_SIZ .EQU 2F00H ; SIZE OF CPM IMAGE (CCP + BDOS + CBIOS (INCLUDING DATA))
CPM_END .EQU CPM_LOC + CPM_SIZ
;
CCP_LOC .EQU CPM_LOC ; START OF COMMAND PROCESSOR
CCP_SIZ .EQU 800H
CCP_END .EQU CCP_LOC + CCP_SIZ
;
BDOS_LOC .EQU CCP_END ; START OF BDOS
BDOS_SIZ .EQU 0E00H
BDOS_END .EQU BDOS_LOC + BDOS_SIZ
;
CBIOS_LOC .EQU BDOS_END
CBIOS_SIZ .EQU CPM_END - CBIOS_LOC
CBIOS_END .EQU CBIOS_LOC + CBIOS_SIZ
;
CPM_ENT .EQU CBIOS_LOC
;
HB_LOC .EQU CPM_END
HB_SIZ .EQU 100H
HB_END .EQU HB_LOC + HB_SIZ
;
MON_LOC .EQU 0C000H ; LOCATION OF MONITOR FOR RUNNING SYSTEM
MON_SIZ .EQU 01000H ; SIZE OF MONITOR BINARY IMAGE
MON_END .EQU MON_LOC + MON_SIZ
MON_DSKY .EQU MON_LOC ; MONITOR ENTRY (DSKY)
MON_UART .EQU MON_LOC + 3 ; MONITOR ENTRY (UART)
;
CBIOS_BOOT .EQU CBIOS_LOC + 0
CBIOS_WBOOT .EQU CBIOS_LOC + 3
CBIOS_CONST .EQU CBIOS_LOC + 6
CBIOS_CONIN .EQU CBIOS_LOC + 9
CBIOS_CONOUT .EQU CBIOS_LOC + 12
CBIOS_LIST .EQU CBIOS_LOC + 15
CBIOS_PUNCH .EQU CBIOS_LOC + 18
CBIOS_READER .EQU CBIOS_LOC + 21
CBIOS_HOME .EQU CBIOS_LOC + 24
CBIOS_SELDSK .EQU CBIOS_LOC + 27
CBIOS_SETTRK .EQU CBIOS_LOC + 30
CBIOS_SETSEC .EQU CBIOS_LOC + 33
CBIOS_SETDMA .EQU CBIOS_LOC + 36
CBIOS_READ .EQU CBIOS_LOC + 39
CBIOS_WRITE .EQU CBIOS_LOC + 42
CBIOS_LISTST .EQU CBIOS_LOC + 45
CBIOS_SECTRN .EQU CBIOS_LOC + 48
;
; EXTENDED CBIOS FUNCTIONS
;
CBIOS_BNKSEL .EQU CBIOS_LOC + 51
CBIOS_GETDSK .EQU CBIOS_LOC + 54
CBIOS_SETDSK .EQU CBIOS_LOC + 57
CBIOS_GETINFO .EQU CBIOS_LOC + 60
;
; PLACEHOLDERS FOR FUTURE CBIOS EXTENSIONS
;
CBIOS_RSVD1 .EQU CBIOS_LOC + 63
CBIOS_RSVD2 .EQU CBIOS_LOC + 76
CBIOS_RSVD3 .EQU CBIOS_LOC + 69
CBIOS_RSVD4 .EQU CBIOS_LOC + 72
;
CDISK: .EQU 00004H ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P
IOBYTE: .EQU 00003H ; LOC IN PAGE 0 OF I/O DEFINITION BYTE.
;
; MEMORY CONFIGURATION
;
MSIZE .EQU 59 ; CP/M VERSION MEMORY SIZE IN KILOBYTES
;
; "BIAS" IS ADDRESS OFFSET FROM 3400H FOR MEMORY SYSTEMS
; THAN 16K (REFERRED TO AS "B" THROUGHOUT THE TEXT)
;
BIAS: .EQU (MSIZE-20)*1024
CCP: .EQU 3400H+BIAS ; BASE OF CCP
BDOS: .EQU CCP+806H ; BASE OF BDOS
BIOS: .EQU CCP+1600H ; BASE OF BIOS
CCPSIZ: .EQU 00800H
;
#IF (PLATFORM == PLT_N8VEM)
#DEFINE PLATFORM_NAME "N8VEM Z80 SBC"
#ENDIF
#IF (PLATFORM == PLT_ZETA)
#DEFINE PLATFORM_NAME "ZETA Z80 SBC"
#ENDIF
#IF (PLATFORM == PLT_N8)
#DEFINE PLATFORM_NAME "N8 Z180 SBC"
#ENDIF
#IF (PLATFORM == PLT_S2I)
#DEFINE PLATFORM_NAME "SCSI2IDE"
#ENDIF
#IF (PLATFORM == PLT_S100)
#DEFINE PLATFORM_NAME "S100"
#ENDIF
;
#IF (DSKYENABLE)
#DEFINE DSKYLBL ", DSKY"
#ELSE
#DEFINE DSKYLBL ""
#ENDIF
;
#IF (VDUENABLE)
#DEFINE VDULBL ", VDU"
#ELSE
#DEFINE VDULBL ""
#ENDIF
;
#IF (CVDUENABLE)
#DEFINE CVDULBL ", CVDU"
#ELSE
#DEFINE CVDULBL ""
#ENDIF
;
#IF (UPD7220ENABLE)
#DEFINE UPD7220LBL ", UPD7220"
#ELSE
#DEFINE UPD7220LBL ""
#ENDIF
;
#IF (N8VENABLE)
#DEFINE N8VLBL ", N8V"
#ELSE
#DEFINE N8VLBL ""
#ENDIF
;
#IF (FDENABLE)
#IF (FDMAUTO)
#DEFINE FDLBL ", FLOPPY (AUTOSIZE)"
#ELSE
#IF (FDMEDIA == FDM720)
#DEFINE FDLBL ", FLOPPY (720KB)"
#ENDIF
#IF (FDMEDIA == FDM144)
#DEFINE FDLBL ", FLOPPY (1.44MB)"
#ENDIF
#IF (FDMEDIA == FDM120)
#DEFINE FDLBL ", FLOPPY (1.20MB)"
#ENDIF
#IF (FDMEDIA == FDM360)
#DEFINE FDLBL ", FLOPPY (360KB)"
#ENDIF
#IF (FDMEDIA == FDM111)
#DEFINE FDLBL ", FLOPPY (1.11MB)"
#ENDIF
#ENDIF
#ELSE
#DEFINE FDLBL ""
#ENDIF
;
#IF (IDEENABLE)
#IF (IDEMODE == IDEMODE_DIO)
#DEFINE IDELBL ", IDE (DISKIO)"
#ENDIF
#IF (IDEMODE == IDEMODE_DIDE)
#DEFINE IDELBL ", IDE (DUAL IDE)"
#ENDIF
#ELSE
#DEFINE IDELBL ""
#ENDIF
;
#IF (PPIDEENABLE)
#IF (PPIDEMODE == PPIDEMODE_STD)
#DEFINE PPIDELBL ", PPIDE (STD)"
#ENDIF
#IF (PPIDEMODE == PPIDEMODE_DIO3)
#DEFINE PPIDELBL ", PPIDE (DISKIO V3)"
#ENDIF
#ELSE
#DEFINE PPIDELBL ""
#ENDIF
;
#IF (SDENABLE)
#DEFINE SDLBL ", SD CARD"
#ELSE
#DEFINE SDLBL ""
#ENDIF
;
#IF (IDEENABLE)
#DEFINE IDELBL ", IDE"
#ELSE
#DEFINE IDELBL ""
#ENDIF
;
#IF (PPIDEENABLE)
#DEFINE PPIDELBL ", PPIDE"
#ELSE
#DEFINE PPIDELBL ""
#ENDIF
#IF (SDENABLE)
#DEFINE SDLBL ", SD CARD"
#ELSE
#DEFINE SDLBL ""
#ENDIF
#IF (HDSKENABLE)
#DEFINE HDSKLBL ", SIMH DISK"
#ELSE
#DEFINE HDSKLBL ""
#ENDIF
#IF (PRPENABLE)
#IF (PRPCONENABLE & PRPSDENABLE)
#DEFINE PRPLBL ", PROPIO (CONSOLE, SD CARD)"
#ENDIF
#IF (PRPCONENABLE & !PRPSDENABLE)
#DEFINE PRPLBL ", PROPIO (CONSOLE)"
#ENDIF
#IF (!PRPCONENABLE & PRPSDENABLE)
#DEFINE PRPLBL ", PROPIO (SD CARD)"
#ENDIF
#IF (!PRPCONENABLE & !PRPSDENABLE)
#DEFINE PRPLBL ", PROPIO ()"
#ENDIF
#ELSE
#DEFINE PRPLBL ""
#ENDIF
#IF (PPPENABLE)
#IF (PPPCONENABLE & PPPSDENABLE)
#DEFINE PPPLBL ", PARPORTPROP (CONSOLE, SD CARD)"
#ENDIF
#IF (PPPCONENABLE & !PPPSDENABLE)
#DEFINE PPPLBL ", PARPORTPROP (CONSOLE)"
#ENDIF
#IF (!PPPCONENABLE & PPPSDENABLE)
#DEFINE PPPLBL ", PARPORTPROP (SD CARD)"
#ENDIF
#IF (!PPPCONENABLE & !PPPSDENABLE)
#DEFINE PPPLBL ", PARPORTPROP ()"
#ENDIF
#ELSE
#DEFINE PPPLBL ""
#ENDIF
#IFDEF (HISTENABLE)
#DEFINE HISTLBL ", HIST"
#ELSE
#DEFINE HISTLBL ""
#ENDIF
.ECHO "Configuration: "
.ECHO PLATFORM_NAME
.ECHO DSKYLBL
.ECHO VDULBL
.ECHO FDLBL
.ECHO IDELBL
.ECHO PPIDELBL
.ECHO SDLBL
.ECHO PRPLBL
.ECHO PPPLBL
.ECHO HISTLBL
.ECHO "\n"
;
; HELPER MACROS
;
#DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X')
#DEFINE PRTS(S) CALL PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO")
#DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)
;
#DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X')
#DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO")
#DEFINE XIO_PRTX(X) CALL XIO_PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)

98
Source/std-zeta.inc
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@ -0,0 +1,98 @@
; ~/RomWBW/branches/s100/Source/std-zeta.asm 1/19/2013 dwg -
;
;==============================================================================
; STANDARD INCLUDE STUFF
;==============================================================================
;
; DEPRECATED STUFF!!!
;
;;DIOPLT .EQU 0 ; DEPRECATED!!!
;;VDUMODE .EQU 0 ; DEPRECATED!!!
;;BIOSSIZE .EQU 0100H ; DEPRECATED!!!
;
; PRIMARY HARDWARE PLATFORMS
;
;PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
;PLT_ZETA .EQU 2 ; ZETA Z80 SBC
;PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
;PLT_S2I .EQU 4 ; SCSI2IDE
;PLT_S100 .EQU 5 ; S100COMPUTERS Z80 based system
; BOOT STYLE
;
;BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
;BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; VDA DEVICES (VIDEO DISPLAY ADAPTER)
;
;VDADEV_NONE .EQU $00 ; NO VDA DEVICE
;
; CHARACTER DEVICES
;
;CIODEV_UART .EQU $00
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CRT .EQU $D0
;CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
;DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_IDE .EQU $20
DIODEV_ATAPI .EQU $30
DIODEV_PPIDE .EQU $40
DIODEV_SD .EQU $50
DIODEV_PRPSD .EQU $60
DIODEV_PPPSD .EQU $70
DIODEV_HDSK .EQU $80
;
;
; PPIDE MODE SELECTIONS
;
;PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
;PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
;
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
PPIBASE .EQU 60H
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
; 16C550 SERIAL LINE UART
;
SIO_BASE .EQU 68H
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;;;;;;;;;;;;;;;;;;;;;;
; eof - std-zeta.inc ;
;;;;;;;;;;;;;;;;;;;;;;

276
Source/std.asm
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@ -1,26 +1,26 @@
; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg -
;
;==================================================================================================
; STANDARD INCLUDE STUFF
;==================================================================================================
;
; 5/21/2012 2.0.0.0 dwg - added B1F0PEEK & B1F0POKE
;
; 5/11/2012 2.0.0.0 dwg - moved BIOS JMPS together
;
; 3/04/2012 2.0.0.0 dwg - added CBIOS_BNKSEL for new BIOS jump (OEM extension)
;
; 2/21/2012 dwg - added TERM_VT52 terminal type for VDU
; 12/12/2011 dwg - changed TERM_NOT_SPEC to TERM_TTY & TTY=0 ANSI=1 WYSE=2
;
; 12/11/2011 dwg - added TERM_ANSI and TERM_WYSE for TERMTYPE
;
; 11/29/2011 dwg - now uses dynamically generated include file
; instead of static definitions.
;
;---------------------------------------------------------------------------------------------------
;
; The purpose of this file is to define generic symbols and to include
; the appropriate std-*.inc file to bring in platform specifics.
; There are four classes of systems supported by N8VEM.
; 1. N8VEM Platforms that include ECB interface
; 2. ZETA Genrally N8VEM-like, but no ECB
; 3. N8 Generally N8VEM-like bt 180 and extra embedded devices
; 4. S100 Assumes Z80 Master CPU Card
; All the classes require certain generic definitions, and these are
; defined here prior to the inclusion of platform specific .inc files.
; It is unfortunate, but all the possible config items must be defined
; here because the config gets read before the specific std-*.inc's
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
TRUE .EQU 1
FALSE .EQU 0
;
; DEPRECATED STUFF!!!
;
@ -34,45 +34,57 @@ PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
PLT_ZETA .EQU 2 ; ZETA Z80 SBC
PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
PLT_S2I .EQU 4 ; SCSI2IDE
;
PLT_S100 .EQU 5 ; S100COMPUTERS Z80 based system
; BOOT STYLE
;
BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; VDA DEVICES (VIDEO DISPLAY ADAPTER)
;
VDADEV_NONE .EQU $00 ; NO VDA DEVICE
; the following are specific
VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMPLEMENTED)
VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMP)
VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED)
VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM
;
; CHARACTER DEVICES
;
CIODEV_UART .EQU $00
CIODEV_ASCI .EQU $10
CIODEV_VDU .EQU $20
CIODEV_CVDU .EQU $30
CIODEV_UPD7220 .EQU $40
CIODEV_N8V .EQU $50
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CRT .EQU $D0
CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
CIODEV_UART .EQU $00
;CIODEV_ASCI .EQU $10
;CIODEV_VDU .EQU $20
;CIODEV_CVDU .EQU $30
;CIODEV_UPD7220 .EQU $40
;;CIODEV_N8V .EQU $50
;CIODEV_PRPCON .EQU $60
;CIODEV_PPPCON .EQU $70
;CIODEV_CRT .EQU $D0
CIODEV_BAT .EQU $E0
;CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_IDE .EQU $20
DIODEV_ATAPI .EQU $30
DIODEV_PPIDE .EQU $40
DIODEV_SD .EQU $50
DIODEV_PRPSD .EQU $60
DIODEV_PPPSD .EQU $70
DIODEV_HDSK .EQU $80
; The following are specific
;DIODEV_FD .EQU $10
;DIODEV_IDE .EQU $20
;DIODEV_ATAPI .EQU $30
;DIODEV_PPIDE .EQU $40
;DIODEV_SD .EQU $50
;DIODEV_PRPSD .EQU $60
;DIODEV_PPPSD .EQU $70
;DIODEV_HDSK .EQU $80
;
; RAM DISK INITIALIZATION OPTIONS
;
@ -114,6 +126,7 @@ MID_FD111 .EQU 8
;
; FD MODE SELECTIONS
;
FDMODE_NONE .equ 0 ; FD modes defined in std-*.inc
FDMODE_DIO .EQU 1 ; DISKIO V1
FDMODE_ZETA .EQU 2 ; ZETA
FDMODE_DIDE .EQU 3 ; DUAL IDE
@ -122,11 +135,14 @@ FDMODE_DIO3 .EQU 5 ; DISKIO V3
;
; IDE MODE SELECTIONS
;
IDEMODE_NONE .EQU 0
IDEMODE_DIO .EQU 1 ; DISKIO V1
IDEMODE_DIDE .EQU 2 ; DUAL IDE
;
; PPIDE MODE SELECTIONS
;
PPIDEMODE_NONE .EQU 0
PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
;
@ -181,148 +197,44 @@ CP .EQU CP_ZCPR
;
#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
;
#IF (PLATFORM != PLT_N8)
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
#IF (PLATFORM == PLT_N8VEM)
#INCLUDE "std-n8vem.inc"
#ENDIF
#IF (PLATFORM == PLT_ZETA)
#INCLUDE "std-zeta.inc"
#ENDIF
#IF (PLATFORM == PLT_N8)
#INCLUDE "std-n8.inc"
#ENDIF
#IF (PLATFORM == PLT_S2I)
PPIBASE .EQU 80H
#ELSE
PPIBASE .EQU 60H
#INCLUDE "std-s2i.inc"
#ENDIF
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
#IF (PLATFORM == PLT_S100)
#INCLUDE "std-s100.inc")
;
; 16C550 SERIAL LINE UART
#IFDEF S100_CPU
#INCLUDE "S100CPU.INC"
#ENDIF
;
#IF (PLATFORM == PLT_S2I)
SIO_BASE .EQU 90H
#ELSE
SIO_BASE .EQU 68H
#ENDIF
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;
#ENDIF ; (PLATFORM != PLT_N8)
#IFDEF S100_IOB
#INCLUDE "S100IOB.INC"
#ENDIF
;
#IF (PLATFORM == PLT_N8)
#IFDEF S100_RRF
#INCLUDE "S100RRF.INC"
#ENDIF
;
; Z180 REGISTERS
;
CPU_IOBASE .EQU 40H ; ONLY RELEVANT FOR Z180
;
CPU_CNTLA0: .EQU CPU_IOBASE+$00 ;ASCI0 control A
CPU_CNTLA1: .EQU CPU_IOBASE+$01 ;ASCI1 control A
CPU_CNTLB0: .EQU CPU_IOBASE+$02 ;ASCI0 control B
CPU_CNTLB1: .EQU CPU_IOBASE+$03 ;ASCI1 control B
CPU_STAT0: .EQU CPU_IOBASE+$04 ;ASCI0 status
CPU_STAT1: .EQU CPU_IOBASE+$05 ;ASCI1 status
CPU_TDR0: .EQU CPU_IOBASE+$06 ;ASCI0 transmit
CPU_TDR1: .EQU CPU_IOBASE+$07 ;ASCI1 transmit
CPU_RDR0: .EQU CPU_IOBASE+$08 ;ASCI0 receive
CPU_RDR1: .EQU CPU_IOBASE+$09 ;ASCI1 receive
CPU_CNTR: .EQU CPU_IOBASE+$0A ;CSI/O control
CPU_TRDR: .EQU CPU_IOBASE+$0B ;CSI/O transmit/receive
CPU_TMDR0L: .EQU CPU_IOBASE+$0C ;Timer 0 data lo
CPU_TMDR0H: .EQU CPU_IOBASE+$0D ;Timer 0 data hi
CPU_RLDR0L: .EQU CPU_IOBASE+$0E ;Timer 0 reload lo
CPU_RLDR0H: .EQU CPU_IOBASE+$0F ;Timer 0 reload hi
CPU_TCR: .EQU CPU_IOBASE+$10 ;Timer control
;
CPU_ASEXT0: .EQU CPU_IOBASE+$12 ;ASCI0 extension control (Z8S180)
CPU_ASEXT1: .EQU CPU_IOBASE+$13 ;ASCI1 extension control (Z8S180)
;
CPU_TMDR1L: .EQU CPU_IOBASE+$14 ;Timer 1 data lo
CPU_TMDR1H: .EQU CPU_IOBASE+$15 ;Timer 1 data hi
CPU_RLDR1L: .EQU CPU_IOBASE+$16 ;Timer 1 reload lo
CPU_RLDR1H: .EQU CPU_IOBASE+$17 ;Timer 1 reload hi
CPU_FRC: .EQU CPU_IOBASE+$18 ;Free running counter
CPU_ASTC0L: .EQU CPU_IOBASE+$1A ;ASCI0 Time constant lo (Z8S180)
CPU_ASTC0H: .EQU CPU_IOBASE+$1B ;ASCI0 Time constant hi (Z8S180)
CPU_ASTC1L: .EQU CPU_IOBASE+$1C ;ASCI1 Time constant lo (Z8S180)
CPU_ASTC1H: .EQU CPU_IOBASE+$1D ;ASCI1 Time constant hi (Z8S180)
CPU_CMR: .EQU CPU_IOBASE+$1E ;Clock multiplier (latest Z8S180)
CPU_CCR: .EQU CPU_IOBASE+$1F ;CPU control (Z8S180)
;
CPU_SAR0L: .EQU CPU_IOBASE+$20 ;DMA0 source addr lo
CPU_SAR0H: .EQU CPU_IOBASE+$21 ;DMA0 source addr hi
CPU_SAR0B: .EQU CPU_IOBASE+$22 ;DMA0 source addr bank
CPU_DAR0L: .EQU CPU_IOBASE+$23 ;DMA0 dest addr lo
CPU_DAR0H: .EQU CPU_IOBASE+$24 ;DMA0 dest addr hi
CPU_DAR0B: .EQU CPU_IOBASE+$25 ;DMA0 dest addr bank
CPU_BCR0L: .EQU CPU_IOBASE+$26 ;DMA0 byte count lo
CPU_BCR0H: .EQU CPU_IOBASE+$27 ;DMA0 byte count hi
CPU_MAR1L: .EQU CPU_IOBASE+$28 ;DMA1 memory addr lo
CPU_MAR1H: .EQU CPU_IOBASE+$29 ;DMA1 memory addr hi
CPU_MAR1B: .EQU CPU_IOBASE+$2A ;DMA1 memory addr bank
CPU_IAR1L: .EQU CPU_IOBASE+$2B ;DMA1 I/O addr lo
CPU_IAR1H: .EQU CPU_IOBASE+$2C ;DMA1 I/O addr hi
CPU_IAR1B: .EQU CPU_IOBASE+$2D ;DMA1 I/O addr bank (Z8S180)
CPU_BCR1L: .EQU CPU_IOBASE+$2E ;DMA1 byte count lo
CPU_BCR1H: .EQU CPU_IOBASE+$2F ;DMA1 byte count hi
CPU_DSTAT: .EQU CPU_IOBASE+$30 ;DMA status
CPU_DMODE: .EQU CPU_IOBASE+$31 ;DMA mode
CPU_DCNTL: .EQU CPU_IOBASE+$32 ;DMA/WAIT control
CPU_IL: .EQU CPU_IOBASE+$33 ;Interrupt vector load
CPU_ITC: .EQU CPU_IOBASE+$34 ;INT/TRAP control
;
CPU_RCR: .EQU CPU_IOBASE+$36 ;Refresh control
;
CPU_CBR: .EQU CPU_IOBASE+$38 ;MMU common base register
CPU_BBR: .EQU CPU_IOBASE+$39 ;MMU bank base register
CPU_CBAR .EQU CPU_IOBASE+$3A ;MMU common/bank area register
;
CPU_OMCR: .EQU CPU_IOBASE+$3E ;Operation mode control
CPU_ICR: .EQU $3F ;I/O control register (not relocated!!!)
;
; N8 ONBOARD I/O REGISTERS
;
N8_IOBASE .EQU $80
;
PPI .EQU N8_IOBASE+$00
PPIA .EQU PPI+$00 ; PORT A
PPIB .EQU PPI+$01 ; PORT B
PPIC .EQU PPI+$02 ; PORT C
PPIX .EQU PPI+$03 ; PPI CONTROL PORT
;
PPI2 .EQU N8_IOBASE+$04
PPI2A .EQU PPI2+$00 ; PORT A
PPI2B .EQU PPI2+$01 ; PORT B
PPI2C .EQU PPI2+$02 ; PORT C
PPI2X .EQU PPI2+$03 ; PPI CONTROL PORT
;
RTC: .EQU N8_IOBASE+$08 ;RTC latch and buffer
;FDC: .EQU N8_IOBASE+$0C ;Floppy disk controller
;UTIL: .EQU N8_IOBASE+$10 ;Floppy disk utility
ACR: .EQU N8_IOBASE+$14 ;auxillary control register
RMAP: .EQU N8_IOBASE+$16 ;ROM page register
VDP: .EQU N8_IOBASE+$18 ;Video Display Processor (TMS9918A)
PSG: .EQU N8_IOBASE+$1C ;Programmable Sound Generator (AY-3-8910)
;
DEFACR .EQU $1B
#IFDEF S100_DIDE
#INCLUDE "S100DIDE.INC"
#ENDIF
;
#ENDIF
;
; CHARACTER DEVICE FUNCTIONS
;
@ -494,6 +406,9 @@ CCPSIZ: .EQU 00800H
#IF (PLATFORM == PLT_S2I)
#DEFINE PLATFORM_NAME "SCSI2IDE"
#ENDIF
#IF (PLATFORM == PLT_S100)
#DEFINE PLATFORM_NAME "S100"
#ENDIF
;
#IF (DSKYENABLE)
#DEFINE DSKYLBL ", DSKY"
@ -530,15 +445,6 @@ CCPSIZ: .EQU 00800H
#DEFINE FDLBL ", FLOPPY (AUTOSIZE)"
#ELSE
#IF (FDMEDIA == FDM720)
#DEFINE FDLBL ", FLOPPY (720KB)"
#ENDIF
#IF (FDMEDIA == FDM144)
#DEFINE FDLBL ", FLOPPY (1.44MB)"
#ENDIF
#IF (FDMEDIA == FDM120)
#DEFINE FDLBL ", FLOPPY (1.20MB)"
#ENDIF
#IF (FDMEDIA == FDM360)
#DEFINE FDLBL ", FLOPPY (360KB)"
#ENDIF
#IF (FDMEDIA == FDM111)

2
Source/ver.inc
View File

@ -3,4 +3,4 @@
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "2.3(int)"
#DEFINE REVISION 236
#DEFINE REVISION 248

72
XSource/Makefile
View File

@ -1,3 +1,8 @@
# RomWBW/branches/s100/XSource/Makefile 1/19/2013 dgw -
# This makefile is a preliminary build script for the new std.asm schema.
# It currently builds the zeta and n8_2312 platforms and work on the
# n8vem platform is in progress but not working yet.
# RomWBW/branches/dwg/XSource/Makefile 1/16/2013 dwg - validate build on Linux
# RomWBW/branches/dwg/XSource/Makefile 11/09/2012 dwg - add copy rule for n8chars.inc
# RomWBW/branches/dwg/XSource/Makefile 10/24/2012 dwg -
@ -89,11 +94,34 @@
#
# Uncomment and update values below to hardcode settings:
#
CONFIG := n8_2312
# 1/19/2013 dwg - tested zeta,
CONFIG := S100
ROMSIZE := 512
CPU := 180
SYS := CPM
ROMNAME := n8_2312
CPU := 80
SYS := CPM
#CONFIG := zeta
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := zeta
#CONFIG := n8_2312
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := n8_2312
#CONFIG := N8VEM
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := N8VEM
ifndef ROMNAME
ROMNAME := $(CONFIG)
@ -147,7 +175,9 @@ $(error Usage: make CONFIG=<config> ROMSIZE=[512|1024] CPU=[80|180] SYS=[CPM|ZSY
endif
endif
all: tasm80.tab tasm85.tab $(OUTDIR)/$(ROMNAME).rom $(OUTDIR)/$(ROMNAME).sys $(OUTDIR)/$(ROMNAME).com
STDS = std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
all: $(STDS) tasm80.tab tasm85.tab $(OUTDIR)/$(ROMNAME).rom $(OUTDIR)/$(ROMNAME).sys $(OUTDIR)/$(ROMNAME).com
rm -f *.asm
rm -f *.bin
rm -f *.inc *.tab *.tmp
@ -228,7 +258,7 @@ bdosb01.asm: $(SRC)bdosb01.asm
cp $< $@
$(CVT) $@
hbios.asm: $(SRC)hbios.asm fd.asm ppide.asm n8v.asm n8chars.inc ppk.asm sd.asm tty.asm ansi.asm
hbios.asm: $(SRC)hbios.asm kbd.asm fd.asm ppide.asm n8v.asm n8chars.inc ppk.asm sd.asm tty.asm ansi.asm
cp $(SRC)hbios.asm $@
$(CVT) $@
@ -252,10 +282,6 @@ cnfgdata.inc: $(SRC)cnfgdata.inc
cp $< $@
$(CVT) $@
##config_zeta.asm: $(SRC)config_zeta.asm
## cp $< $@
## $(CVT) $@
config_$(CONFIG).asm: $(SRC)config_$(CONFIG).asm
cp $< $@
$(CVT) $@
@ -288,6 +314,10 @@ infolist.inc: $(SRC)infolist.inc
cp $< $@
$(CVT) $@
kbd.asm: $(SRC)kbd.asm
cp $< $@
$(CVT) $@
loader.asm: $(SRC)loader.asm util.asm
cp $(SRC)loader.asm $@
$(CVT) $@
@ -348,6 +378,26 @@ std.asm: $(SRC)std.asm
cp $< $@
$(CVT) $@
std-n8.inc: $(SRC)std-n8.inc
cp $< $@
$(CVT) $@
std-n8vem.inc: $(SRC)std-n8vem.inc
cp $< $@
$(CVT) $@
std-s100.inc: $(SRC)std-s100.inc
cp $< $@
$(CVT) $@
std-s2i.inc: $(SRC)std-s2i.inc
cp $< $@
$(CVT) $@
std-zeta.inc: $(SRC)std-zeta.inc
cp $< $@
$(CVT) $@
syscfg.asm: $(SRC)syscfg.asm config_$(CONFIG).asm cnfgdata.inc
cp $< $@
$(CVT) $@
@ -378,5 +428,5 @@ xio.asm: $(SRC)xio.asm
clean:
rm -f *.tab *.TAB *.inc *.asm *.bin *.com *.img *.rom *.lst *.exp *.tmp
rm -f build.inc diskdefs
rm -f build.inc diskdefs *.inc
rm -f $(OUTDIR)/*.*

431
XSource/Makefile_n8_2312
View File

@ -0,0 +1,431 @@
# RomWBW/branches/s100/XSource/Makefile 1/19/2013 dgw -
# This makefile is a preliminary build script for the new std.asm schema.
# It currently builds the zeta and n8_2312 platforms and work on the
# n8vem platform is in progress but not working yet.
# RomWBW/branches/dwg/XSource/Makefile 1/16/2013 dwg - validate build on Linux
# RomWBW/branches/dwg/XSource/Makefile 11/09/2012 dwg - add copy rule for n8chars.inc
# RomWBW/branches/dwg/XSource/Makefile 10/24/2012 dwg -
#
# GCC based makefile
#
# 09/28/2012 2.2 dwg - updated for Mac OS X 10.8.2 Mountain Lion
#
# 06/18/2012 2.0 dgg - updated for v2.0
#
# 02/22/2012 1.5 dgg - modified for assembly under Linux
#
# 01/11/2011 1.4 wbw - added support for ZSDOS/ZDDOS/ZCPR
#
# 12/22/2011 1.3 wbw - removed all built-in config stuff, operation is now entirely
# dependent on variables CONFIG, ROMSIZE, and CPU
#
# 12/02/2011 1.3 wbw - replaced makever functionality with built-in makefile stuff
#
# 11/29/2011 1.3 dwg - uses makever to generate stdincl.inc from the version.hpp file
#
# 11/19/2011 1.3 dwg - added n8vem_vdu to "usage" and "all" rules
# enhanced clean to get files in $(OUTDIR)
# added custom to "all" rule
#
# The operation of this makefile is entirely dependent on the setting
# of three variables: CONFIG, ROMSIZE, and CPU:
#
# CONFIG determines which configuration to build which means that
# it will determine the config_xxx.asm config settings file to
# include as well as the output file names. So, for example,
# if CONFIG is "n8vem", the config_n8vem.asm file will be used
# for BIOS configuration settings and the output files will be
# n8vem.rom, n8vem.sys, and n8vem.com.
#
# ROMSIZE specifies the size of the ROM image to be produced and
# currently must be either "1024" for a 1MB ROM or "512" for a
# 512KB ROM.
#
# CPU specifies the instruction set to be used in assembly and
# must be either "80" for Z80 or "180" for Z180. Currently,
# you should use 180 for N8 ROMs and 80 for everything else.
#
# SYS specifies the system variant to build in. CPM will
# build traditional CP/M. ZSYS will build ZSystem which
# currently means ZSDOS 1.2 & ZCPR 1.0
#
# ROMNAME names the output file. It defaults to
# CONFIG. The output of the build will be:
# <ROMNAME>.rom, <ROMNAME>.sys, and <ROMNAME>.com.
#
# These variables can be passed into the makefile by the command
# line, hardcoded in this file, or set as environment variables
# in the OS. To use a command line, use the following format:
#
# make CONFIG=<config> ROMSIZE=<romsize> CPU=<cpu> SYS=<sys> ROMNAME=<romname>
#
# An example of this is:
#
# make CONFIG=n8vem ROMSIZE=512 CPU=80 SYS=CPM ROMNAME=n8vem
#
# Alternatively, you can specify the variables by hardcoding them
# in this file. To do so, uncomment the five lines after these
# comments and change the values as desired.
# If the variables are specified this way, you would then invoke
# the make by simply using "make"
#
# If you want to set them as environment variables, you can
# do this with commands like the following at an OS command
# prompt or in a batch file:
#
# SET CONFIG=zeta
# SET ROMSIZE=512
# SET CPU=80
# SET SYS=CPM
# SET ROMNAME=zeta
#
# Note: use "make clean" to delete temporary and output files
#
# A good idea is to do a clean with every build and this can be
# accomplished on one command line doing something like this:
#
# make clean all CONFIG=n8vem ROMSIZE=512 CPU=80 SYS=CPM ROMNAME=n8vem
#
# or, if you are using hard coded variables above:
#
# make clean all
#
# Uncomment and update values below to hardcode settings:
#
# 1/19/2013 dwg - tested zeta,
#CONFIG := zeta
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := zeta
CONFIG := n8_2312
ROMSIZE := 512
CPU := 180
SYS := CPM
ROMNAME := n8_2312
#CONFIG := N8VEM
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := N8VEM
ifndef ROMNAME
ROMNAME := $(CONFIG)
endif
CPMCP := bin/cpmcp
CVT := bin/CVT2MAC
SRC := ../Source/
ROMDSKFILES := ../RomDsk/$(SYS)_$(ROMSIZE)KB/*.* ../RomDsk/cfg_$(CONFIG)/*.* ../Apps/core/*.*
ifeq "$(SYS)" "CPM"
DOSBIN := bdosb01.bin
CPBIN := ccpb03.bin
else
DOSBIN := zsdos.bin
CPBIN := zcprw.bin
endif
OUTDIR := ../Output
TASM := bin/TASM
TASMTABS := bin
export TASMTABS
ASMOPT80 := -t$(CPU) -g3
ASMOPT85 := -t85 -g3
ASM80 := $(TASM) $(ASMOPT80)
ASM85 := $(TASM) $(ASMOPT85)
ASMIMG := $(TASM) $(ASMOPT80) -b -fE5
NULL :=
SPACE := ${NULL} ${NULL}
%.bin: %.asm
$(ASM80) $< $@
%.com: %.asm
$(ASM80) $< $@
%.img: %.asm
$(ASMIMG) $< $@
%.exe: %.cpp
$(CC) $< -o $@
ifneq ($(MAKECMDGOALS),clean)
ifeq "$(and $(CONFIG), $(ROMSIZE), $(CPU), $(SYS), $(ROMNAME))" ""
$(error Usage: make CONFIG=<config> ROMSIZE=[512|1024] CPU=[80|180] SYS=[CPM|ZSYS] ROMNAME=<romname>)
endif
endif
STDS = std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
all: $(STDS) tasm80.tab tasm85.tab $(OUTDIR)/$(ROMNAME).rom $(OUTDIR)/$(ROMNAME).sys $(OUTDIR)/$(ROMNAME).com
rm -f *.asm
rm -f *.bin
rm -f *.inc *.tab *.tmp
rm -f diskdefs *.exp
tasm80.tab: bin/TASM80.TAB
cp bin/TASM80.TAB tasm80.tab
tasm85.tab: bin/TASM85.TAB
cp bin/TASM85.TAB tasm85.tab
build.inc:
/bin/echo ';' >$@
/bin/echo -n '; RomWBW Configured for '$(CONFIG)' ' >>$@
date >> $@
/bin/echo ; >>$@
/bin/echo -n '#DEFINE TIMESTAMP "' >>$@
date '+%Y %m %d %H%M"' >>$@
/bin/echo ; >>$@
/bin/echo '#DEFINE VARIANT "WBW-$(USERNAME)"' >>$@
/bin/echo ; >>$@
/bin/echo ROMSIZE .EQU $(ROMSIZE) >>$@
/bin/echo ; >>$@
/bin/echo '#INCLUDE "config_'$(CONFIG)'.asm"' >>$@
/bin/echo ; >>$@
# 12/31/2012 dwg - added xio.asm as dependency
bootrom.bin : bootrom.asm std.asm build.inc ver.inc memmgr.asm config_$(CONFIG).asm xio.asm
$(TASM) $(ASMOPT80) $< $@
bootapp.bin: bootapp.asm std.asm build.inc ver.inc
$(TASM) $(ASMOPT80) $< $@
pgzero.bin: pgzero.asm std.asm build.inc ver.inc
$(TASM) $(ASMOPT80) $< $@
zcprw.bin: zcprw.asm zcpr.asm
$(TASM) $(ASMOPT85) $< $@
zsdos.bin: zsdos.asm zsdos.lib zsdos-gp.z80
$(TASM) $(ASMOPT80) $< $@
cbios.bin: cbios.asm fd_data.asm ide_data.asm ppide_data.asm sd_data.asm prp_data.asm ppp_data.asm uart.asm vdu.asm std.asm ver.inc build.inc infolist.inc
$(TASM) $(ASMOPT80) -dBLD_SYS=SYS_$(SYS) $< $@
dbgmon.bin: dbgmon.asm std.asm ver.inc build.inc
syscfg.bin: syscfg.asm std.asm build.inc ver.inc
os.bin: $(CPBIN) $(DOSBIN) cbios.bin
cat $(CPBIN) $(DOSBIN) cbios.bin >>$@
rom0.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin
cat pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin >>$@
# fixed 1/16/20113 dwg - added hbios.bin to end of cat list
rom1.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin
cat pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin >>$@
$(OUTDIR)/$(ROMNAME).rom: rom0.bin rom1.bin $(ROMDISKFILES) $(OUTDIR)/$(ROMNAME).sys diskdefs
cp $(SRC)blank$(ROMSIZE)KB.dat RomDisk.tmp
$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp $(ROMDSKFILES) 0:
$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp ../Output/$(ROMNAME).sys 0:$(SYS).sys
cat rom0.bin rom1.bin RomDisk.tmp >>$@
$(OUTDIR)/$(ROMNAME).com: bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin
cat bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin >>$@
$(OUTDIR)/$(ROMNAME).sys: prefix.bin os.bin
cat prefix.bin os.bin >>$@
ansi.asm: $(SRC)ansi.asm
cp $< $@
$(CVT) $@
bdosb01.asm: $(SRC)bdosb01.asm
cp $< $@
$(CVT) $@
hbios.asm: $(SRC)hbios.asm kbd.asm fd.asm ppide.asm n8v.asm n8chars.inc ppk.asm sd.asm tty.asm ansi.asm
cp $(SRC)hbios.asm $@
$(CVT) $@
bootapp.asm: $(SRC)bootapp.asm
cp $< $@
$(CVT) $@
bootrom.asm: $(SRC)bootrom.asm
cp $< $@
$(CVT) $@
cbios.asm: $(SRC)cbios.asm
cp $< $@
$(CVT) $@
ccpb03.asm: $(SRC)ccpb03.asm
cp $< $@
$(CVT) $@
cnfgdata.inc: $(SRC)cnfgdata.inc
cp $< $@
$(CVT) $@
##config_zeta.asm: $(SRC)config_zeta.asm
## cp $< $@
## $(CVT) $@
config_$(CONFIG).asm: $(SRC)config_$(CONFIG).asm
cp $< $@
$(CVT) $@
dbgmon.asm: $(SRC)dbgmon.asm
cp $< $@
$(CVT) $@
diskdefs: $(SRC)diskdefs
cp $< $@
$(CVT) $@
fd.asm: $(SRC)fd.asm
cp $< $@
$(CVT) $@
fd_data.asm: $(SRC)fd_data.asm
cp $< $@
$(CVT) $@
hbfill.asm: $(SRC)hbfill.asm
cp $< $@
$(CVT) $@
ide_data.asm: $(SRC)ide_data.asm
cp $< $@
$(CVT) $@
infolist.inc: $(SRC)infolist.inc
cp $< $@
$(CVT) $@
kbd.asm: $(SRC)kbd.asm
cp $< $@
$(CVT) $@
loader.asm: $(SRC)loader.asm util.asm
cp $(SRC)loader.asm $@
$(CVT) $@
memmgr.asm: $(SRC)memmgr.asm
cp $< $@
$(CVT) $@
n8chars.inc: $(SRC)n8chars.inc
cp $< $@
$(CVT) $@
n8v.asm: $(SRC)n8v.asm
cp $< $@
$(CVT) $@
pgzero.asm: $(SRC)pgzero.asm
cp $< $@
$(CVT) $@
ppide.asm: $(SRC)ppide.asm
cp $< $@
$(CVT) $@
ppide_data.asm: $(SRC)ppide_data.asm
cp $< $@
$(CVT) $@
ppk.asm: $(SRC)ppk.asm
cp $< $@
$(CVT) $@
ppp_data.asm: $(SRC)ppp_data.asm
cp $< $@
$(CVT) $@
prefix.asm: $(SRC)prefix.asm
cp $< $@
$(CVT) $@
prp_data.asm: $(SRC)prp_data.asm
cp $< $@
$(CVT) $@
romfill.asm: $(SRC)romfill.asm
cp $< $@
$(CVT) $@
sd.asm: $(SRC)sd.asm
cp $< $@
$(CVT) $@
sd_data.asm: $(SRC)sd_data.asm
cp $< $@
$(CVT) $@
std.asm: $(SRC)std.asm
cp $< $@
$(CVT) $@
std-n8.inc: $(SRC)std-n8.inc
cp $< $@
$(CVT) $@
std-n8vem.inc: $(SRC)std-n8vem.inc
cp $< $@
$(CVT) $@
std-s100.inc: $(SRC)std-s100.inc
cp $< $@
$(CVT) $@
std-s2i.inc: $(SRC)std-s2i.inc
cp $< $@
$(CVT) $@
std-zeta.inc: $(SRC)std-zeta.inc
cp $< $@
$(CVT) $@
syscfg.asm: $(SRC)syscfg.asm config_$(CONFIG).asm cnfgdata.inc
cp $< $@
$(CVT) $@
tty.asm: $(SRC)tty.asm
cp $< $@
$(CVT) $@
uart.asm: $(SRC)uart.asm
cp $< $@
$(CVT) $@
util.asm: $(SRC)util.asm
cp $< $@
$(CVT) $@
vdu.asm: $(SRC)vdu.asm
cp $< $@
$(CVT) $@
ver.inc: $(SRC)ver.inc
cp $< $@
$(CVT) $@
xio.asm: $(SRC)xio.asm
cp $< $@
$(CVT) $@
clean:
rm -f *.tab *.TAB *.inc *.asm *.bin *.com *.img *.rom *.lst *.exp *.tmp
rm -f build.inc diskdefs *.inc
rm -f $(OUTDIR)/*.*

431
XSource/Makefile_n8vem
View File

@ -0,0 +1,431 @@
# RomWBW/branches/s100/XSource/Makefile 1/19/2013 dgw -
# This makefile is a preliminary build script for the new std.asm schema.
# It currently builds the zeta and n8_2312 platforms and work on the
# n8vem platform is in progress but not working yet.
# RomWBW/branches/dwg/XSource/Makefile 1/16/2013 dwg - validate build on Linux
# RomWBW/branches/dwg/XSource/Makefile 11/09/2012 dwg - add copy rule for n8chars.inc
# RomWBW/branches/dwg/XSource/Makefile 10/24/2012 dwg -
#
# GCC based makefile
#
# 09/28/2012 2.2 dwg - updated for Mac OS X 10.8.2 Mountain Lion
#
# 06/18/2012 2.0 dgg - updated for v2.0
#
# 02/22/2012 1.5 dgg - modified for assembly under Linux
#
# 01/11/2011 1.4 wbw - added support for ZSDOS/ZDDOS/ZCPR
#
# 12/22/2011 1.3 wbw - removed all built-in config stuff, operation is now entirely
# dependent on variables CONFIG, ROMSIZE, and CPU
#
# 12/02/2011 1.3 wbw - replaced makever functionality with built-in makefile stuff
#
# 11/29/2011 1.3 dwg - uses makever to generate stdincl.inc from the version.hpp file
#
# 11/19/2011 1.3 dwg - added n8vem_vdu to "usage" and "all" rules
# enhanced clean to get files in $(OUTDIR)
# added custom to "all" rule
#
# The operation of this makefile is entirely dependent on the setting
# of three variables: CONFIG, ROMSIZE, and CPU:
#
# CONFIG determines which configuration to build which means that
# it will determine the config_xxx.asm config settings file to
# include as well as the output file names. So, for example,
# if CONFIG is "n8vem", the config_n8vem.asm file will be used
# for BIOS configuration settings and the output files will be
# n8vem.rom, n8vem.sys, and n8vem.com.
#
# ROMSIZE specifies the size of the ROM image to be produced and
# currently must be either "1024" for a 1MB ROM or "512" for a
# 512KB ROM.
#
# CPU specifies the instruction set to be used in assembly and
# must be either "80" for Z80 or "180" for Z180. Currently,
# you should use 180 for N8 ROMs and 80 for everything else.
#
# SYS specifies the system variant to build in. CPM will
# build traditional CP/M. ZSYS will build ZSystem which
# currently means ZSDOS 1.2 & ZCPR 1.0
#
# ROMNAME names the output file. It defaults to
# CONFIG. The output of the build will be:
# <ROMNAME>.rom, <ROMNAME>.sys, and <ROMNAME>.com.
#
# These variables can be passed into the makefile by the command
# line, hardcoded in this file, or set as environment variables
# in the OS. To use a command line, use the following format:
#
# make CONFIG=<config> ROMSIZE=<romsize> CPU=<cpu> SYS=<sys> ROMNAME=<romname>
#
# An example of this is:
#
# make CONFIG=n8vem ROMSIZE=512 CPU=80 SYS=CPM ROMNAME=n8vem
#
# Alternatively, you can specify the variables by hardcoding them
# in this file. To do so, uncomment the five lines after these
# comments and change the values as desired.
# If the variables are specified this way, you would then invoke
# the make by simply using "make"
#
# If you want to set them as environment variables, you can
# do this with commands like the following at an OS command
# prompt or in a batch file:
#
# SET CONFIG=zeta
# SET ROMSIZE=512
# SET CPU=80
# SET SYS=CPM
# SET ROMNAME=zeta
#
# Note: use "make clean" to delete temporary and output files
#
# A good idea is to do a clean with every build and this can be
# accomplished on one command line doing something like this:
#
# make clean all CONFIG=n8vem ROMSIZE=512 CPU=80 SYS=CPM ROMNAME=n8vem
#
# or, if you are using hard coded variables above:
#
# make clean all
#
# Uncomment and update values below to hardcode settings:
#
# 1/19/2013 dwg - tested zeta,
#CONFIG := zeta
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := zeta
#CONFIG := n8_2312
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := n8_2312
CONFIG := n8vem
ROMSIZE := 512
CPU := 180
SYS := CPM
ROMNAME := n8vem
ifndef ROMNAME
ROMNAME := $(CONFIG)
endif
CPMCP := bin/cpmcp
CVT := bin/CVT2MAC
SRC := ../Source/
ROMDSKFILES := ../RomDsk/$(SYS)_$(ROMSIZE)KB/*.* ../RomDsk/cfg_$(CONFIG)/*.* ../Apps/core/*.*
ifeq "$(SYS)" "CPM"
DOSBIN := bdosb01.bin
CPBIN := ccpb03.bin
else
DOSBIN := zsdos.bin
CPBIN := zcprw.bin
endif
OUTDIR := ../Output
TASM := bin/TASM
TASMTABS := bin
export TASMTABS
ASMOPT80 := -t$(CPU) -g3
ASMOPT85 := -t85 -g3
ASM80 := $(TASM) $(ASMOPT80)
ASM85 := $(TASM) $(ASMOPT85)
ASMIMG := $(TASM) $(ASMOPT80) -b -fE5
NULL :=
SPACE := ${NULL} ${NULL}
%.bin: %.asm
$(ASM80) $< $@
%.com: %.asm
$(ASM80) $< $@
%.img: %.asm
$(ASMIMG) $< $@
%.exe: %.cpp
$(CC) $< -o $@
ifneq ($(MAKECMDGOALS),clean)
ifeq "$(and $(CONFIG), $(ROMSIZE), $(CPU), $(SYS), $(ROMNAME))" ""
$(error Usage: make CONFIG=<config> ROMSIZE=[512|1024] CPU=[80|180] SYS=[CPM|ZSYS] ROMNAME=<romname>)
endif
endif
STDS = std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
all: $(STDS) tasm80.tab tasm85.tab $(OUTDIR)/$(ROMNAME).rom $(OUTDIR)/$(ROMNAME).sys $(OUTDIR)/$(ROMNAME).com
rm -f *.asm
rm -f *.bin
rm -f *.inc *.tab *.tmp
rm -f diskdefs *.exp
tasm80.tab: bin/TASM80.TAB
cp bin/TASM80.TAB tasm80.tab
tasm85.tab: bin/TASM85.TAB
cp bin/TASM85.TAB tasm85.tab
build.inc:
/bin/echo ';' >$@
/bin/echo -n '; RomWBW Configured for '$(CONFIG)' ' >>$@
date >> $@
/bin/echo ; >>$@
/bin/echo -n '#DEFINE TIMESTAMP "' >>$@
date '+%Y %m %d %H%M"' >>$@
/bin/echo ; >>$@
/bin/echo '#DEFINE VARIANT "WBW-$(USERNAME)"' >>$@
/bin/echo ; >>$@
/bin/echo ROMSIZE .EQU $(ROMSIZE) >>$@
/bin/echo ; >>$@
/bin/echo '#INCLUDE "config_'$(CONFIG)'.asm"' >>$@
/bin/echo ; >>$@
# 12/31/2012 dwg - added xio.asm as dependency
bootrom.bin : bootrom.asm std.asm build.inc ver.inc memmgr.asm config_$(CONFIG).asm xio.asm
$(TASM) $(ASMOPT80) $< $@
bootapp.bin: bootapp.asm std.asm build.inc ver.inc
$(TASM) $(ASMOPT80) $< $@
pgzero.bin: pgzero.asm std.asm build.inc ver.inc
$(TASM) $(ASMOPT80) $< $@
zcprw.bin: zcprw.asm zcpr.asm
$(TASM) $(ASMOPT85) $< $@
zsdos.bin: zsdos.asm zsdos.lib zsdos-gp.z80
$(TASM) $(ASMOPT80) $< $@
cbios.bin: cbios.asm fd_data.asm ide_data.asm ppide_data.asm sd_data.asm prp_data.asm ppp_data.asm uart.asm vdu.asm std.asm ver.inc build.inc infolist.inc
$(TASM) $(ASMOPT80) -dBLD_SYS=SYS_$(SYS) $< $@
dbgmon.bin: dbgmon.asm std.asm ver.inc build.inc
syscfg.bin: syscfg.asm std.asm build.inc ver.inc
os.bin: $(CPBIN) $(DOSBIN) cbios.bin
cat $(CPBIN) $(DOSBIN) cbios.bin >>$@
rom0.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin
cat pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin >>$@
# fixed 1/16/20113 dwg - added hbios.bin to end of cat list
rom1.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin
cat pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin >>$@
$(OUTDIR)/$(ROMNAME).rom: rom0.bin rom1.bin $(ROMDISKFILES) $(OUTDIR)/$(ROMNAME).sys diskdefs
cp $(SRC)blank$(ROMSIZE)KB.dat RomDisk.tmp
$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp $(ROMDSKFILES) 0:
$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp ../Output/$(ROMNAME).sys 0:$(SYS).sys
cat rom0.bin rom1.bin RomDisk.tmp >>$@
$(OUTDIR)/$(ROMNAME).com: bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin
cat bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin >>$@
$(OUTDIR)/$(ROMNAME).sys: prefix.bin os.bin
cat prefix.bin os.bin >>$@
ansi.asm: $(SRC)ansi.asm
cp $< $@
$(CVT) $@
bdosb01.asm: $(SRC)bdosb01.asm
cp $< $@
$(CVT) $@
hbios.asm: $(SRC)hbios.asm kbd.asm fd.asm ppide.asm n8v.asm n8chars.inc ppk.asm sd.asm tty.asm ansi.asm
cp $(SRC)hbios.asm $@
$(CVT) $@
bootapp.asm: $(SRC)bootapp.asm
cp $< $@
$(CVT) $@
bootrom.asm: $(SRC)bootrom.asm
cp $< $@
$(CVT) $@
cbios.asm: $(SRC)cbios.asm
cp $< $@
$(CVT) $@
ccpb03.asm: $(SRC)ccpb03.asm
cp $< $@
$(CVT) $@
cnfgdata.inc: $(SRC)cnfgdata.inc
cp $< $@
$(CVT) $@
##config_zeta.asm: $(SRC)config_zeta.asm
## cp $< $@
## $(CVT) $@
config_$(CONFIG).asm: $(SRC)config_$(CONFIG).asm
cp $< $@
$(CVT) $@
dbgmon.asm: $(SRC)dbgmon.asm
cp $< $@
$(CVT) $@
diskdefs: $(SRC)diskdefs
cp $< $@
$(CVT) $@
fd.asm: $(SRC)fd.asm
cp $< $@
$(CVT) $@
fd_data.asm: $(SRC)fd_data.asm
cp $< $@
$(CVT) $@
hbfill.asm: $(SRC)hbfill.asm
cp $< $@
$(CVT) $@
ide_data.asm: $(SRC)ide_data.asm
cp $< $@
$(CVT) $@
infolist.inc: $(SRC)infolist.inc
cp $< $@
$(CVT) $@
kbd.asm: $(SRC)kbd.asm
cp $< $@
$(CVT) $@
loader.asm: $(SRC)loader.asm util.asm
cp $(SRC)loader.asm $@
$(CVT) $@
memmgr.asm: $(SRC)memmgr.asm
cp $< $@
$(CVT) $@
n8chars.inc: $(SRC)n8chars.inc
cp $< $@
$(CVT) $@
n8v.asm: $(SRC)n8v.asm
cp $< $@
$(CVT) $@
pgzero.asm: $(SRC)pgzero.asm
cp $< $@
$(CVT) $@
ppide.asm: $(SRC)ppide.asm
cp $< $@
$(CVT) $@
ppide_data.asm: $(SRC)ppide_data.asm
cp $< $@
$(CVT) $@
ppk.asm: $(SRC)ppk.asm
cp $< $@
$(CVT) $@
ppp_data.asm: $(SRC)ppp_data.asm
cp $< $@
$(CVT) $@
prefix.asm: $(SRC)prefix.asm
cp $< $@
$(CVT) $@
prp_data.asm: $(SRC)prp_data.asm
cp $< $@
$(CVT) $@
romfill.asm: $(SRC)romfill.asm
cp $< $@
$(CVT) $@
sd.asm: $(SRC)sd.asm
cp $< $@
$(CVT) $@
sd_data.asm: $(SRC)sd_data.asm
cp $< $@
$(CVT) $@
std.asm: $(SRC)std.asm
cp $< $@
$(CVT) $@
std-n8.inc: $(SRC)std-n8.inc
cp $< $@
$(CVT) $@
std-n8vem.inc: $(SRC)std-n8vem.inc
cp $< $@
$(CVT) $@
std-s100.inc: $(SRC)std-s100.inc
cp $< $@
$(CVT) $@
std-s2i.inc: $(SRC)std-s2i.inc
cp $< $@
$(CVT) $@
std-zeta.inc: $(SRC)std-zeta.inc
cp $< $@
$(CVT) $@
syscfg.asm: $(SRC)syscfg.asm config_$(CONFIG).asm cnfgdata.inc
cp $< $@
$(CVT) $@
tty.asm: $(SRC)tty.asm
cp $< $@
$(CVT) $@
uart.asm: $(SRC)uart.asm
cp $< $@
$(CVT) $@
util.asm: $(SRC)util.asm
cp $< $@
$(CVT) $@
vdu.asm: $(SRC)vdu.asm
cp $< $@
$(CVT) $@
ver.inc: $(SRC)ver.inc
cp $< $@
$(CVT) $@
xio.asm: $(SRC)xio.asm
cp $< $@
$(CVT) $@
clean:
rm -f *.tab *.TAB *.inc *.asm *.bin *.com *.img *.rom *.lst *.exp *.tmp
rm -f build.inc diskdefs *.inc
rm -f $(OUTDIR)/*.*

431
XSource/Makefile_zeta
View File

@ -0,0 +1,431 @@
# RomWBW/branches/s100/XSource/Makefile 1/19/2013 dgw -
# This makefile is a preliminary build script for the new std.asm schema.
# It currently builds the zeta and n8_2312 platforms and work on the
# n8vem platform is in progress but not working yet.
# RomWBW/branches/dwg/XSource/Makefile 1/16/2013 dwg - validate build on Linux
# RomWBW/branches/dwg/XSource/Makefile 11/09/2012 dwg - add copy rule for n8chars.inc
# RomWBW/branches/dwg/XSource/Makefile 10/24/2012 dwg -
#
# GCC based makefile
#
# 09/28/2012 2.2 dwg - updated for Mac OS X 10.8.2 Mountain Lion
#
# 06/18/2012 2.0 dgg - updated for v2.0
#
# 02/22/2012 1.5 dgg - modified for assembly under Linux
#
# 01/11/2011 1.4 wbw - added support for ZSDOS/ZDDOS/ZCPR
#
# 12/22/2011 1.3 wbw - removed all built-in config stuff, operation is now entirely
# dependent on variables CONFIG, ROMSIZE, and CPU
#
# 12/02/2011 1.3 wbw - replaced makever functionality with built-in makefile stuff
#
# 11/29/2011 1.3 dwg - uses makever to generate stdincl.inc from the version.hpp file
#
# 11/19/2011 1.3 dwg - added n8vem_vdu to "usage" and "all" rules
# enhanced clean to get files in $(OUTDIR)
# added custom to "all" rule
#
# The operation of this makefile is entirely dependent on the setting
# of three variables: CONFIG, ROMSIZE, and CPU:
#
# CONFIG determines which configuration to build which means that
# it will determine the config_xxx.asm config settings file to
# include as well as the output file names. So, for example,
# if CONFIG is "n8vem", the config_n8vem.asm file will be used
# for BIOS configuration settings and the output files will be
# n8vem.rom, n8vem.sys, and n8vem.com.
#
# ROMSIZE specifies the size of the ROM image to be produced and
# currently must be either "1024" for a 1MB ROM or "512" for a
# 512KB ROM.
#
# CPU specifies the instruction set to be used in assembly and
# must be either "80" for Z80 or "180" for Z180. Currently,
# you should use 180 for N8 ROMs and 80 for everything else.
#
# SYS specifies the system variant to build in. CPM will
# build traditional CP/M. ZSYS will build ZSystem which
# currently means ZSDOS 1.2 & ZCPR 1.0
#
# ROMNAME names the output file. It defaults to
# CONFIG. The output of the build will be:
# <ROMNAME>.rom, <ROMNAME>.sys, and <ROMNAME>.com.
#
# These variables can be passed into the makefile by the command
# line, hardcoded in this file, or set as environment variables
# in the OS. To use a command line, use the following format:
#
# make CONFIG=<config> ROMSIZE=<romsize> CPU=<cpu> SYS=<sys> ROMNAME=<romname>
#
# An example of this is:
#
# make CONFIG=n8vem ROMSIZE=512 CPU=80 SYS=CPM ROMNAME=n8vem
#
# Alternatively, you can specify the variables by hardcoding them
# in this file. To do so, uncomment the five lines after these
# comments and change the values as desired.
# If the variables are specified this way, you would then invoke
# the make by simply using "make"
#
# If you want to set them as environment variables, you can
# do this with commands like the following at an OS command
# prompt or in a batch file:
#
# SET CONFIG=zeta
# SET ROMSIZE=512
# SET CPU=80
# SET SYS=CPM
# SET ROMNAME=zeta
#
# Note: use "make clean" to delete temporary and output files
#
# A good idea is to do a clean with every build and this can be
# accomplished on one command line doing something like this:
#
# make clean all CONFIG=n8vem ROMSIZE=512 CPU=80 SYS=CPM ROMNAME=n8vem
#
# or, if you are using hard coded variables above:
#
# make clean all
#
# Uncomment and update values below to hardcode settings:
#
# 1/19/2013 dwg - tested zeta,
CONFIG := zeta
ROMSIZE := 512
CPU := 180
SYS := CPM
ROMNAME := zeta
#CONFIG := n8_2312
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := n8_2312
#CONFIG := N8VEM
#ROMSIZE := 512
#CPU := 180
#SYS := CPM
#ROMNAME := N8VEM
ifndef ROMNAME
ROMNAME := $(CONFIG)
endif
CPMCP := bin/cpmcp
CVT := bin/CVT2MAC
SRC := ../Source/
ROMDSKFILES := ../RomDsk/$(SYS)_$(ROMSIZE)KB/*.* ../RomDsk/cfg_$(CONFIG)/*.* ../Apps/core/*.*
ifeq "$(SYS)" "CPM"
DOSBIN := bdosb01.bin
CPBIN := ccpb03.bin
else
DOSBIN := zsdos.bin
CPBIN := zcprw.bin
endif
OUTDIR := ../Output
TASM := bin/TASM
TASMTABS := bin
export TASMTABS
ASMOPT80 := -t$(CPU) -g3
ASMOPT85 := -t85 -g3
ASM80 := $(TASM) $(ASMOPT80)
ASM85 := $(TASM) $(ASMOPT85)
ASMIMG := $(TASM) $(ASMOPT80) -b -fE5
NULL :=
SPACE := ${NULL} ${NULL}
%.bin: %.asm
$(ASM80) $< $@
%.com: %.asm
$(ASM80) $< $@
%.img: %.asm
$(ASMIMG) $< $@
%.exe: %.cpp
$(CC) $< -o $@
ifneq ($(MAKECMDGOALS),clean)
ifeq "$(and $(CONFIG), $(ROMSIZE), $(CPU), $(SYS), $(ROMNAME))" ""
$(error Usage: make CONFIG=<config> ROMSIZE=[512|1024] CPU=[80|180] SYS=[CPM|ZSYS] ROMNAME=<romname>)
endif
endif
STDS = std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
all: $(STDS) tasm80.tab tasm85.tab $(OUTDIR)/$(ROMNAME).rom $(OUTDIR)/$(ROMNAME).sys $(OUTDIR)/$(ROMNAME).com
rm -f *.asm
rm -f *.bin
rm -f *.inc *.tab *.tmp
rm -f diskdefs *.exp
tasm80.tab: bin/TASM80.TAB
cp bin/TASM80.TAB tasm80.tab
tasm85.tab: bin/TASM85.TAB
cp bin/TASM85.TAB tasm85.tab
build.inc:
/bin/echo ';' >$@
/bin/echo -n '; RomWBW Configured for '$(CONFIG)' ' >>$@
date >> $@
/bin/echo ; >>$@
/bin/echo -n '#DEFINE TIMESTAMP "' >>$@
date '+%Y %m %d %H%M"' >>$@
/bin/echo ; >>$@
/bin/echo '#DEFINE VARIANT "WBW-$(USERNAME)"' >>$@
/bin/echo ; >>$@
/bin/echo ROMSIZE .EQU $(ROMSIZE) >>$@
/bin/echo ; >>$@
/bin/echo '#INCLUDE "config_'$(CONFIG)'.asm"' >>$@
/bin/echo ; >>$@
# 12/31/2012 dwg - added xio.asm as dependency
bootrom.bin : bootrom.asm std.asm build.inc ver.inc memmgr.asm config_$(CONFIG).asm xio.asm
$(TASM) $(ASMOPT80) $< $@
bootapp.bin: bootapp.asm std.asm build.inc ver.inc
$(TASM) $(ASMOPT80) $< $@
pgzero.bin: pgzero.asm std.asm build.inc ver.inc
$(TASM) $(ASMOPT80) $< $@
zcprw.bin: zcprw.asm zcpr.asm
$(TASM) $(ASMOPT85) $< $@
zsdos.bin: zsdos.asm zsdos.lib zsdos-gp.z80
$(TASM) $(ASMOPT80) $< $@
cbios.bin: cbios.asm fd_data.asm ide_data.asm ppide_data.asm sd_data.asm prp_data.asm ppp_data.asm uart.asm vdu.asm std.asm ver.inc build.inc infolist.inc
$(TASM) $(ASMOPT80) -dBLD_SYS=SYS_$(SYS) $< $@
dbgmon.bin: dbgmon.asm std.asm ver.inc build.inc
syscfg.bin: syscfg.asm std.asm build.inc ver.inc
os.bin: $(CPBIN) $(DOSBIN) cbios.bin
cat $(CPBIN) $(DOSBIN) cbios.bin >>$@
rom0.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin
cat pgzero.bin bootrom.bin syscfg.bin loader.bin romfill.bin dbgmon.bin os.bin hbfill.bin >>$@
# fixed 1/16/20113 dwg - added hbios.bin to end of cat list
rom1.bin: pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin
cat pgzero.bin bootrom.bin syscfg.bin loader.bin hbios.bin >>$@
$(OUTDIR)/$(ROMNAME).rom: rom0.bin rom1.bin $(ROMDISKFILES) $(OUTDIR)/$(ROMNAME).sys diskdefs
cp $(SRC)blank$(ROMSIZE)KB.dat RomDisk.tmp
$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp $(ROMDSKFILES) 0:
$(CPMCP) -f rom$(ROMSIZE)KB RomDisk.tmp ../Output/$(ROMNAME).sys 0:$(SYS).sys
cat rom0.bin rom1.bin RomDisk.tmp >>$@
$(OUTDIR)/$(ROMNAME).com: bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin
cat bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin os.bin >>$@
$(OUTDIR)/$(ROMNAME).sys: prefix.bin os.bin
cat prefix.bin os.bin >>$@
ansi.asm: $(SRC)ansi.asm
cp $< $@
$(CVT) $@
bdosb01.asm: $(SRC)bdosb01.asm
cp $< $@
$(CVT) $@
hbios.asm: $(SRC)hbios.asm kbd.asm fd.asm ppide.asm n8v.asm n8chars.inc ppk.asm sd.asm tty.asm ansi.asm
cp $(SRC)hbios.asm $@
$(CVT) $@
bootapp.asm: $(SRC)bootapp.asm
cp $< $@
$(CVT) $@
bootrom.asm: $(SRC)bootrom.asm
cp $< $@
$(CVT) $@
cbios.asm: $(SRC)cbios.asm
cp $< $@
$(CVT) $@
ccpb03.asm: $(SRC)ccpb03.asm
cp $< $@
$(CVT) $@
cnfgdata.inc: $(SRC)cnfgdata.inc
cp $< $@
$(CVT) $@
##config_zeta.asm: $(SRC)config_zeta.asm
## cp $< $@
## $(CVT) $@
config_$(CONFIG).asm: $(SRC)config_$(CONFIG).asm
cp $< $@
$(CVT) $@
dbgmon.asm: $(SRC)dbgmon.asm
cp $< $@
$(CVT) $@
diskdefs: $(SRC)diskdefs
cp $< $@
$(CVT) $@
fd.asm: $(SRC)fd.asm
cp $< $@
$(CVT) $@
fd_data.asm: $(SRC)fd_data.asm
cp $< $@
$(CVT) $@
hbfill.asm: $(SRC)hbfill.asm
cp $< $@
$(CVT) $@
ide_data.asm: $(SRC)ide_data.asm
cp $< $@
$(CVT) $@
infolist.inc: $(SRC)infolist.inc
cp $< $@
$(CVT) $@
kbd.asm: $(SRC)kbd.asm
cp $< $@
$(CVT) $@
loader.asm: $(SRC)loader.asm util.asm
cp $(SRC)loader.asm $@
$(CVT) $@
memmgr.asm: $(SRC)memmgr.asm
cp $< $@
$(CVT) $@
n8chars.inc: $(SRC)n8chars.inc
cp $< $@
$(CVT) $@
n8v.asm: $(SRC)n8v.asm
cp $< $@
$(CVT) $@
pgzero.asm: $(SRC)pgzero.asm
cp $< $@
$(CVT) $@
ppide.asm: $(SRC)ppide.asm
cp $< $@
$(CVT) $@
ppide_data.asm: $(SRC)ppide_data.asm
cp $< $@
$(CVT) $@
ppk.asm: $(SRC)ppk.asm
cp $< $@
$(CVT) $@
ppp_data.asm: $(SRC)ppp_data.asm
cp $< $@
$(CVT) $@
prefix.asm: $(SRC)prefix.asm
cp $< $@
$(CVT) $@
prp_data.asm: $(SRC)prp_data.asm
cp $< $@
$(CVT) $@
romfill.asm: $(SRC)romfill.asm
cp $< $@
$(CVT) $@
sd.asm: $(SRC)sd.asm
cp $< $@
$(CVT) $@
sd_data.asm: $(SRC)sd_data.asm
cp $< $@
$(CVT) $@
std.asm: $(SRC)std.asm
cp $< $@
$(CVT) $@
std-n8.inc: $(SRC)std-n8.inc
cp $< $@
$(CVT) $@
std-n8vem.inc: $(SRC)std-n8vem.inc
cp $< $@
$(CVT) $@
std-s100.inc: $(SRC)std-s100.inc
cp $< $@
$(CVT) $@
std-s2i.inc: $(SRC)std-s2i.inc
cp $< $@
$(CVT) $@
std-zeta.inc: $(SRC)std-zeta.inc
cp $< $@
$(CVT) $@
syscfg.asm: $(SRC)syscfg.asm config_$(CONFIG).asm cnfgdata.inc
cp $< $@
$(CVT) $@
tty.asm: $(SRC)tty.asm
cp $< $@
$(CVT) $@
uart.asm: $(SRC)uart.asm
cp $< $@
$(CVT) $@
util.asm: $(SRC)util.asm
cp $< $@
$(CVT) $@
vdu.asm: $(SRC)vdu.asm
cp $< $@
$(CVT) $@
ver.inc: $(SRC)ver.inc
cp $< $@
$(CVT) $@
xio.asm: $(SRC)xio.asm
cp $< $@
$(CVT) $@
clean:
rm -f *.tab *.TAB *.inc *.asm *.bin *.com *.img *.rom *.lst *.exp *.tmp
rm -f build.inc diskdefs *.inc
rm -f $(OUTDIR)/*.*

5
XSource/makeall
View File

@ -0,0 +1,5 @@
make clean
make -f Makefile_n8vem
make -f Makefile_n8_2312
make -f Makefile_zeta
ls -l ../Output
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