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ez80: ported ppide.asm driver

master
Dean Netherton 2 years ago
parent
0eb0855948
commit
55d8c6ce7d
2 changed files with 50 additions and 3 deletions
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  1. 8
      Source/HBIOS/Config/RCEZ80_std.asm
  2. 45
      Source/HBIOS/ppide.asm

8
Source/HBIOS/Config/RCEZ80_std.asm
View File

@ -30,7 +30,7 @@ CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
@ -48,7 +48,7 @@ VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
@ -56,7 +56,7 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
@ -69,3 +69,5 @@ EZ80RTCENABLE .SET TRUE ; EZ80 ON CHIP RTC
EZ80TIMER .SET EZ80TMR_INT ; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
EZ80_IO_FREQ .SET 5250
EZ80_MEM_FREQ .SET 8000
EZ80_ASSIGN .EQU 1 ; 0 -> USE FREQ, 1 -> USE CYCLES
EZ80_IO_CYCLES .EQU 5 ; EZ80 CYCLES FOR IO (1-15)

45
Source/HBIOS/ppide.asm
View File

@ -487,11 +487,14 @@ PPIDE_DETECT:
;
LD A,PPIDE_DIR_WRITE ; SET DATA BUS DIRECTION TO WRITE
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
;
LD C,(IY+PPIDE_DATALO) ; PPI PORT A, DATALO
LD A,$A5 ; TEST VALUE
EZ80_IO
OUT (C),A ; PUSH VALUE TO PORT
EZ80_IO
IN A,(C) ; GET PORT VALUE
#IF (PPIDETRACE >= 3)
CALL PC_SPACE
@ -1131,12 +1134,14 @@ PPIDE_GET:
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
;
; SELECT READ/WRITE IDE REGISTER
LD A,PPIDE_REG_DATA ; DATA REGISTER
;OUT (PPIDE_REG_CTL),A ; DO IT
LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
EZ80_IO
OUT (C),A ; DO IT
LD E,A ; E := READ UNASSERTED
XOR PPIDE_CTL_DIOR ; SWAP THE READ LINE BIT
@ -1159,19 +1164,25 @@ PPIDE_GET2:
;
PPIDE_GET8: ; 8 BIT WIDE READ LOOP
; ENTER W/ C = PPIDE_REG_CTL
EZ80_IO
OUT (C),D ; ASSERT READ
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
INI ; READ FROM LSB
INC C ; LSB -> MSB
INC C ; MSB -> CTL
EZ80_IO
OUT (C),E ; DEASSERT READ
EZ80_IO
OUT (C),D ; ASSERT READ
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
INI ; READ FROM LSB
INC C ; LSB -> MSB
INC C ; MSB -> CTL
EZ80_IO
OUT (C),E ; DEASSERT READ
DEC A
JR NZ,PPIDE_GET8 ; LOOP UNTIL DONE
@ -1179,13 +1190,17 @@ PPIDE_GET8: ; 8 BIT WIDE READ LOOP
;
PPIDE_GET16: ; 16 BIT WIDE READ LOOP
; ENTER W/ C = PPIDE_REG_CTL
EZ80_IO
OUT (C),D ; ASSERT READ
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
INI ; READ FROM LSB
INC C ; LSB -> MSB
EZ80_IO
INI ; READ MSB FOR 16 BIT
INC C ; MSB -> CTL
EZ80_IO
OUT (C),E ; DEASSERT READ
DEC A
JR NZ,PPIDE_GET16 ; LOOP UNTIL DONE
@ -1217,12 +1232,14 @@ PPIDE_PUT:
LD A,PPIDE_DIR_WRITE ; SET DATA BUS DIRECTION TO WRITE
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
;
; SELECT READ/WRITE IDE REGISTER
LD A,PPIDE_REG_DATA ; DATA REGISTER
;OUT (PPIDE_REG_CTL),A ; DO IT
LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
EZ80_IO
OUT (C),A ; DO IT
LD E,A ; E := WRITE UNASSERTED
XOR PPIDE_CTL_DIOW ; SWAP THE READ LINE BIT
@ -1247,17 +1264,23 @@ PPIDE_PUT2:
PPIDE_PUT8: ; 8 BIT WIDE WRITE LOOP
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
OUTI ; WRITE NEXT BYTE (LSB)
INC C ; LSB -> MSB
INC C ; MSB -> CTL
EZ80_IO
OUT (C),D ; ASSERT WRITE
EZ80_IO
OUT (C),E ; DEASSERT WRITE
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
OUTI ; WRITE NEXT BYTE (LSB)
INC C ; LSB -> MSB
INC C ; MSB -> CTL
EZ80_IO
OUT (C),D ; ASSERT WRITE
EZ80_IO
OUT (C),E ; DEASSERT WRITE
DEC A
JR NZ,PPIDE_PUT8 ; LOOP UNTIL DONE
@ -1266,11 +1289,15 @@ PPIDE_PUT8: ; 8 BIT WIDE WRITE LOOP
PPIDE_PUT16: ; 16 BIT WIDE WRITE LOOP
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
OUTI ; WRITE NEXT BYTE (LSB)
INC C ; LSB -> MSB
EZ80_IO
OUTI ; WRITE NEXT BYTE (MSB)
INC C ; MSB -> CTL
EZ80_IO
OUT (C),D ; ASSERT WRITE
EZ80_IO
OUT (C),E ; DEASSERT WRITE
DEC A
JR NZ,PPIDE_PUT16 ; LOOP UNTIL DONE
@ -1320,6 +1347,7 @@ PPIDE_RESET:
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
;
; IF A DSKYNG IS ACTIVE AND IS ON THE SAME PPI PORT AS THE PPIDE BEING
@ -1348,11 +1376,13 @@ PPIDE_RESET:
LD A,PPIDE_CTL_RESET
;OUT (PPIDE_REG_CTL),A
LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
EZ80_IO
OUT (C),A
LD DE,20 ; DELAY 320US (SPEC IS >= 25US)
CALL VDELAY
XOR A
;OUT (PPIDE_REG_CTL),A
EZ80_IO
OUT (C),A
LD DE,20
CALL VDELAY
@ -1889,24 +1919,29 @@ PPIDE_IN:
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ ; 7TS
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD ; 19TS
EZ80_IO
OUT (C),A ; WRITE IT ; 12TS
;
LD B,(HL) ; GET CTL PORT VALUE ; 7TS
;LD C,PPIDE_REG_CTL ; SETUP PORT TO WRITE
;LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
DEC C ; SET IDE ADDRESS ; 4TS
EZ80_IO
OUT (C),B ; SET ADDRESS LINES ; 12TS
SET 6,B ; TURN ON READ BIT ; 8TS
EZ80_IO
OUT (C),B ; ASSERT READ LINE ; 12TS
;
;IN A,(PPIDE_REG_DATALO) ; GET DATA VALUE FROM DEVICE
DEC C ; 4TS
DEC C ; 4TS
EZ80_IO
IN A,(C) ; GET DATA VALUE FROM DEVICE ; 12
INC C ; 4TS
INC C ; 4TS
;
RES 6,B ; CLEAR READ BIT ; 8TS
EZ80_IO
OUT (C),B ; DEASSERT READ LINE ; 12TS
POP BC ; RECOVER INCOMING BC ; 10TS
INC HL ; POINT PAST PARM ; 6TS
@ -1923,6 +1958,7 @@ PPIDE_OUT:
LD A,PPIDE_DIR_WRITE ; SET DATA BUS DIRECTION TO WRITE
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
POP AF ; RECOVER VALUE TO WRITE
;
@ -1930,18 +1966,22 @@ PPIDE_OUT:
;LD C,PPIDE_REG_CTL ; SETUP PORT TO WRITE
;LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
DEC C ; SET IDE ADDRESS
EZ80_IO
OUT (C),B ; SET ADDRESS LINES
SET 5,B ; TURN ON WRITE BIT
EZ80_IO
OUT (C),B ; ASSERT WRITE LINE
;
DEC C
DEC C
;OUT (PPIDE_REG_DATALO),A ; SEND DATA VALUE TO DEVICE
EZ80_IO
OUT (C),A ; SEND DATA VALUE TO DEVICE
INC C
INC C
;
RES 5,B ; CLEAR WRITE BIT
EZ80_IO
OUT (C),B ; DEASSERT WRITE LINE
POP BC ; RECOVER INCOMING BC
INC HL ; POINT PAST PARM
@ -2084,6 +2124,7 @@ PPIDE_REGDUMP:
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
LD E,PPIDE_REG_CMD
@ -2091,19 +2132,23 @@ PPIDE_REGDUMP:
PPIDE_REGDUMP1:
LD A,E ; REGISTER ADDRESS
;OUT (PPIDE_REG_CTL),A ; SET IT
EZ80_IO
OUT (C),A ; REGISTER ADDRESS
XOR PPIDE_CTL_DIOR ; SET BIT TO ASSERT READ LINE
;OUT (PPIDE_REG_CTL),A ; ASSERT READ
EZ80_IO
OUT (C),A ; ASSERT READ
;IN A,(PPIDE_REG_DATALO) ; GET VALUE
DEC C ; CTL -> MSB
DEC C ; MSB -> LSB
EZ80_IO
IN A,(C) ; GET VALUE
INC C ; LSB -> MSB
INC C ; MSB -> CTL
CALL PRTHEXBYTE ; DISPLAY IT
;LD A,C ; RELOAD ADDRESS W/ READ UNASSERTED
;OUT (PPIDE_REG_CTL),A ; AND SET IT
EZ80_IO
OUT (C),E ; RELOAD ADDRESS W/ READ UNASSERTED
;DEC C ; NEXT LOWER REGISTER
DEC E ; NEXT LOWER REGISTER

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