Miscellaneous

- Updated S100 Monitor launch code to warn user if console will be directed to S100 bus vs. active on-board UART.
- Updated Duodyne early boot to add a delay to stabilize the boot process.  This is temporary and needs to be further investigated.

Source/HBIOS/cfg_duo.asm

@@ -29,7 +29,7 @@ BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_UNSUP	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
-INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -292,8 +292,8 @@ AYMODE		.EQU	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|
 ;
 SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
-DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
-DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAENABLE	.EQU	TRUE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$40		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
 ;
 YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)

Source/HBIOS/dma.asm

@@ -103,9 +103,9 @@ DMA_FAIL_FLAG:
 ;==================================================================================================
 ;
 DMAProbe:
-	ld	a,DMA_RESET	
+	ld	a,DMA_RESET		; $C3
 	out	(DMABASE),a
-	ld	a,%01111101 		; R0-Transfer mode, A -> B, start address follows
+	ld	a,%01111101 		; R0-Transfer mode, A -> B, start address follows $7D
 	out	(DMABASE),a
 	ld	a,$cc
 	out	(DMABASE),a
@@ -115,14 +115,14 @@ DMAProbe:
 	out	(DMABASE),a
 	ld	a,$1a
 	out	(DMABASE),a
-	ld	a,DMA_LOAD
+	ld	a,DMA_LOAD		; $CF
 	out	(DMABASE),a
 ;
-	ld	a,DMA_READ_MASK_FOLLOWS	; set up
+	ld	a,DMA_READ_MASK_FOLLOWS	; set up ; $BB
 	out	(DMABASE),a		; for 
-	ld	a,%00011000		; register
+	ld	a,%00011000		; register $18
 	out	(DMABASE),a		; read
-	ld	a,DMA_START_READ_SEQUENCE
+	ld	a,DMA_START_READ_SEQUENCE	; $A7
 	out	(DMABASE),a
 ;
 	in	a,(DMABASE)		; read in 

Source/HBIOS/hbios.asm

@@ -1110,7 +1110,23 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 ;
 	DI				; NO INTERRUPTS
 	IM	1			; INTERRUPT MODE 1
-
+;
+#IF ((PLATFORM == PLT_DUO) & FALSE)
+	; WAIT A WHILE
+	LD	B,0
+	DJNZ	$
+#ENDIF
+;
+#IF ((PLATFORM == PLT_DUO) & TRUE)
+	; WAIT A WHILE
+	LD	HL,0
+BOOTWAIT:
+	DEC	HL
+	LD	A,H
+	OR	L
+	JR	NZ,BOOTWAIT
+#ENDIF
+;
 ;#IF ((PLATFORM == PLT_MBC) | (PLATFORM == PLT_SBC))
 	; INITIALIZE RTC LATCH BYTE
 	; FOR SOME PLATFORMS THIS CONTROLS HI/LO SPEED CIRCUIT

Source/HBIOS/romldr.asm

@@ -1343,18 +1343,32 @@ diskread:
 ;
 #endif
 ;
-; Built-in mini-loader for S100 Monitor
+; Built-in mini-loader for S100 Monitor.  The S100 platform build
+; imbeds the S100 Monitor in the ROM at the start of bank 3 (BID_IMG2).
+; This bit of code just launches the monitor directly from that bank.
 ;
 #if (BIOS == BIOS_WBW)
   #if (PLATFORM == PLT_S100)
 ;
 s100mon:
+	; Warn user that console is being directed to the S100 bus
+	; if the IOBYTE bit 0 is 0 (%xxxxxxx0).
+	in	a,($75)			; get IO byte
+	and	%00000001		; isolate console bit
+	jr	nz,s100mon1		; if 0, bypass msg
+	ld	hl,str_s100con		; console msg string
+	call	pstr			; display it
 ;
+s100mon1:
 	; Launch S100 Monitor from ROM Bank 3
 	call	ldelay			; wait for UART buf to empty
+	di				; suspend interrupts
 	ld	a,BID_IMG2		; S100 monitor bank
 	ld	ix,0			; execution resumes here
 	jp	HB_BNKCALL		; do it
+;
+str_smon	.db	"S100 Z180 Monitor",0
+str_s100con	.db	"\r\n\r\nConsole on S100 Bus",0
 ;
   #endif
 #endif
@@ -2370,7 +2384,6 @@ str_tbas	.db	"Tasty BASIC",0
 str_play	.db	"Play a Game",0
 str_upd		.db	"XModem Flash Updater",0
 str_user	.db	"User App",0
-str_smon	.db	"S100 Z180 Monitor",0
 str_egg		.db	"",0
 str_net		.db	"Network Boot",0
 str_switches	.db	"FP Switches = 0x",0

Source/ver.inc

@@ -2,7 +2,7 @@
 #DEFINE	RMN	3
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.3.0-dev.39"
+#DEFINE BIOSVER	"3.3.0-dev.40"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	3
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.3.0-dev.39"
+	db	"3.3.0-dev.40"
 	endm