mirror of https://github.com/wwarthen/RomWBW.git
wayne
13 years ago
15 changed files with 277 additions and 42 deletions
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Interrupts for RomWBW Firmware |
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INTRODUCTION |
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The Z80 has four modes of interrupts. Mode 0 is not suitable as the N8VEM range does not have the hardware to support it. Mode 1 interrupts can be used if we're very careful when using banked memory. This means either disabling interrupts whenever a new bank of memory is switched into the lower 32k or providing a means of dealing with the interrupt in each bank of memory switched into the lower 32k. The /NMI interrupt has similar problems except that it must have a way dealing with it in all banks as it can't be disabled with the hardware provided. |
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So that leaves the Z80's most powerful interrupt mode - Mode 2. Which is now catered for in the RomWBW firmware. As of v2.2 the firmware will allow Mode 2 interrupts on the N8 or an N8VEM Z80-SBC with either a Zilog Peripherals or a 4PIO board. Mode 2 allows interrupt service routines to be placed anywhere within the 64k addressable by the Z80. The firmware is configured to keep these routines in the top 32k, out of harm's way. |
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WHAT WON'T WORK |
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First the warnings. The N8VEM Z80-SBC by itself can't use Mode 2 interrupts as it does not have the necessary hardware. Similarly for the Zeta. The /NMI input for any of the boards should not be used as mentioned in the introduction. |
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N8 HARDWARE |
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The Z180 has 10 sources of maskable interrupts, three external and seven internal. |
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/INT0 works in much the same way as the /INT pin on a Z80. It does not generate its own vector; that must be supplied externally by the interrupting device. It should only be used with hardware that supports Mode 2 e.g. a Zilog Peripherals Board on the ECB BUS. None of the on-board sources are suitable (PPI U7, TMS9918A). |
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/INT1 generates its own vector and is suitable to be used with the on-board peripherals. |
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/INT2 generates its own vector and is connected to the on-board floppy drive controller. |
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All internal interrupts only use Mode 2. |
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N8VEM Z80-SBC HARDWARE |
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The only interrupt source on the Z80-SBC is the UART. The UART's INT pin needs to be inverted and connected to a Z80 peripheral chip that can generate the interrupt vector. For a MK-I board a modification is needed. The collector of Q1 should be disconnected from the /INT pin and routed to pin A23 of the ECB connector with a 4k7 pull-up resistor (The /INT pin should still have its pull-up resistor R4 connected). For the MK-II board install a jumper on pins 2-3 of K12. |
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ZILOG PERIPHERALS |
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This board contains a Z80-DART, Z80-CTC and two Z80-PIOs, all of which can be used with Mode 2 interrupts. To use an external non-vectored interrupt source (such as the CPU board's UART), pin A23 of the ECB BUS can be connected to an unused input of any of these chips. The recommended modification is connecting ECB BUS pin A23 to pin 10 of header X4. Then install a jumper on pins 9-10 of header X4 to use the channel 3 input of the CTC as a interrupt controller. |
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4PIO |
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This board contains four Z80-PIOs, all of which can be used with Mode 2 interrupts. To use an external non-vectored interrupt source one of the ports should be configured in PIO Mode 3. This bit I/O mode can set up any to all of its eight port pins as an interrupt input. |
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FIRMWARE |
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The RomWBW firmware itself does not use any interrupts (though this may change). All it does is check which platform it is configured for and set the CPU to the appropriate mode. Thirty-two bytes at FF00-FF1F are reserved for sixteen Mode 2 interrupt vectors. All are set to point to a dummy Interrupt Service Routine (ISR) which merely: |
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DUMISR: |
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EI ; RE-ENABLE INTERRUPTS |
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RETI ; RETURN FROM INTERRUPT |
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It is left to the application to alter the vector address to point to the new ISR. The firmware will configure the N8's CPU or chips on a Zilog Peripherals or 4PIO board to point to the vector table. The default table (from bnk1.asm) is |
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; DEFAULT VECTORS ALL POINT TO DUMMY INTERRUPT SERVICE ROUTINE |
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HB_IVT: ; *** = NOT USED |
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; VECTOR ADDR N8 4PIO ZILOG PERIPHERAL |
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.DW DUMISR ; FF00 /INT1 PIO0 A CTC CHANNEL 0 |
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.DW DUMISR ; FF02 /INT2 PIO0 B CTC CHANNEL 1 |
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.DW DUMISR ; FF04 PRT0 PIO1 A CTC CHANNEL 2 |
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.DW DUMISR ; FF06 PRT1 PIO1 B CTC CHANNEL 3 |
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.DW DUMISR ; FF08 DMA0 PIO2 A PIO1 PORT A |
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.DW DUMISR ; FF0A DMA1 PIO2 B PIO1 PORT B |
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.DW DUMISR ; FF0C CSI/O PIO3 A PIO2 PORT A |
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.DW DUMISR ; FF0E ASCI0 PIO3 B PIO2 PORT B |
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.DW DUMISR ; FF10 ASCI1 *** DART - ANY OR CH.B TX EMPTY |
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.DW DUMISR ; FF12 *** *** DART CH.B EXTERNAL STATUS CHANGE |
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.DW DUMISR ; FF14 *** *** DART CH.B RX CHAR AVAILABLE |
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.DW DUMISR ; FF16 *** *** DART CH.B SPECIAL RECEIVE CONDITION |
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.DW DUMISR ; FF18 *** *** DART CH.A TX EMPTY |
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.DW DUMISR ; FF1A *** *** DART CH.A EXTERNAL STATUS CHANGE |
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.DW DUMISR ; FF1C *** *** DART CH.A RX CHAR AVAILABLE |
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.DW DUMISR ; FF1E *** *** DART CH.A SPECIAL RECEIVE CONDITION |
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FIRMWARE CONFIGURATION |
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For the N8 or Zeta boards no changes need to be made. For the Z80-SBC boards there are configuration options for a Zilog Peripherals or one 4PIO board. Only the board's base address needs to be set to match the jumpers on the board. Suitable values that are unlikely to clash with other hardware are 10H, 0A0H, 0B0H, 0C0H, 0D0H and 0E0H. A value of 0 is for no board attached. |
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Alter these to suit your hardware (only one board of either type is supported by default). |
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PIO4BASE .EQU 0 ; |
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ZPBASE .EQU 0 ; |
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OTHER NOTES |
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While there is no reason why a Zilog Peripherals or 4PIO board cannot be connected to a N8, this combination isn't configured in the firmware. |
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In the source is a file called "isr.asm". Any interrupt service routines needed to be placed in the CBIOS area can be added to this file. |
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DGG |
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