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Support for MG014 RCBus Parallel Port Module

pull/351/head v3.3.0-dev.13
Wayne Warthen 3 years ago
parent
commit
3f23396536
  1. 1
      Doc/ChangeLog.txt
  2. 2
      Source/HBIOS/Config/MBC_std.asm
  3. 2
      Source/HBIOS/Config/RCZ80_std.asm
  4. 2
      Source/HBIOS/cfg_master.asm
  5. 4
      Source/HBIOS/cfg_mbc.asm
  6. 2
      Source/HBIOS/cfg_mk4.asm
  7. 5
      Source/HBIOS/cfg_rcz180.asm
  8. 5
      Source/HBIOS/cfg_rcz280.asm
  9. 5
      Source/HBIOS/cfg_rcz80.asm
  10. 2
      Source/HBIOS/cfg_sbc.asm
  11. 5
      Source/HBIOS/cfg_scz180.asm
  12. 150
      Source/HBIOS/lpt.asm
  13. 6
      Source/HBIOS/std.asm
  14. 2
      Source/ver.inc
  15. 2
      Source/ver.lib

1
Doc/ChangeLog.txt

@ -6,6 +6,7 @@ Version 3.3
- A?C: Support for Z80-Retro SD interface
- WBW: Support per-drive floppy configuration
- WBW: Support for Bill Shen's VGARC
- WBW: Support for MG014 Parallel Port module + printer
Version 3.2.1
-------------

2
Source/HBIOS/Config/MBC_std.asm

@ -48,6 +48,8 @@ DSKYMODE .SET DSKYMODE_NG ; DSKY VERSION: DSKYMODE_[V1|NG]
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)

2
Source/HBIOS/Config/RCZ80_std.asm

@ -40,6 +40,8 @@ ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]

2
Source/HBIOS/cfg_master.asm

@ -311,7 +311,9 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

4
Source/HBIOS/cfg_mbc.asm

@ -234,8 +234,10 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_IBM ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

2
Source/HBIOS/cfg_mk4.asm

@ -248,7 +248,9 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

5
Source/HBIOS/cfg_rcz180.asm

@ -257,6 +257,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

5
Source/HBIOS/cfg_rcz280.asm

@ -261,6 +261,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

5
Source/HBIOS/cfg_rcz80.asm

@ -255,6 +255,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_sbc.asm

@ -234,7 +234,9 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

5
Source/HBIOS/cfg_scz180.asm

@ -251,6 +251,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

150
Source/HBIOS/lpt.asm

@ -3,12 +3,15 @@
; CENTRONICS (LPT) INTERFACE DRIVER
;==================================================================================================
;
; CENTRONICS-STYLE PARALLEL PRINTER DRIVER. ASSUMES IBM STYLE
; HARDWARE INTERFACE AS DESCRIBED BELOW.
; CENTRONICS-STYLE PARALLEL PRINTER DRIVER.
;
; IMPLEMENTED AS A ROMWBW CHARACTER DEVICE. CURRENTLY HANDLES OUPUT
; ONLY.
;
;==================================================================================================
;
; IBM STYLE INTERFACE (USED BY NHYODYNE PRINT MODULE):
;
; PORT 0 (INPUT/OUTPUT):
;
; D7 D6 D5 D4 D3 D2 D1 D0
@ -20,7 +23,7 @@
;
; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+
; | BUSY | ACK | POUT | SEL | ERR | 0 | 0 | 0 |
; | /BUSY | /ACK | POUT | SEL | /ERR | 0 | 0 | 0 |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
; PORT 2 (INPUT/OUTPUT):
@ -30,16 +33,40 @@
; | STAT1 | STAT0 | ENBL | PINT | SEL | RES | LF | STB |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
LPT_NONE .EQU 0 ; NOT PRESENT
LPT_IBM .EQU 1 ; IBM PC STYLE INTERFACE
;==================================================================================================
;
; MG014 STYLE INTERFACE (USED BY RCBUS MG014 MODULE):
;
; PORT 0 (INPUT/OUTPUT):
;
; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+
; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
; PORT 1 (INPUT):
;
; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+
; | | | | /ERR | SEL | POUT | BUSY | /ACK |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
; PORT 2 (INPUT/OUTPUT):
;
; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+
; | LED | | | | /SEL | /RES | /LF | /STB |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
;==================================================================================================
;
; PRE-CONSOLE INITIALIZATION - DETECT AND INIT HARDWARE
;
LPT_PREINIT:
;
; SETUP THE DISPATCH TABLE ENTRIES
; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN
; DISABLED.
; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST
; REMAIN DISABLED.
;
LD B,LPT_CFGCNT ; LOOP CONTROL
XOR A ; ZERO TO ACCUM
@ -136,18 +163,26 @@ LPT_IN:
LPT_OUT:
CALL LPT_OST ; READY TO SEND?
JR Z,LPT_OUT ; LOOP IF NOT
LD A,(IY+3)
LD C,A ; PORT 0 (DATA)
LD C,(IY+3) ; PORT 0 (DATA)
OUT (C),E ; OUTPUT DATA TO PORT
CALL DELAY ; IGNORE ANYTHING BACK AFTER A RESET
#IF (LPTMODE == LPTMODE_IBM)
LD A,%00001101 ; SELECT & STROBE, LEDS OFF
#ENDIF
#IF (LPTMODE == LPTMODE_MG014)
LD A,%00000100 ; SELECT & STROBE, LED OFF
#ENDIF
INC C ; PUT CONTROL PORT IN C
INC C
OUT (C),A ; OUTPUT DATA TO PORT
CALL DELAY ; IGNORE ANYTHING BACK AFTER A RESET
CALL DELAY
#IF (LPTMODE == LPTMODE_IBM)
LD A,%00001100 ; SELECT, LEDS OFF
#ENDIF
#IF (LPTMODE == LPTMODE_MG014)
LD A,%00000101 ; SELECT, LED OFF
#ENDIF
OUT (C),A ; OUTPUT DATA TO PORT
CALL DELAY
XOR A ; SIGNAL SUCCESS
RET
;
@ -161,11 +196,16 @@ LPT_IST:
; OUTPUT STATUS
;
LPT_OST:
LD A,(IY+3)
LD C,A ; PORT 0 (DATA)
LD C,(IY+3) ; BASE PORT
INC C ; SELECT STATUS PORT
IN A,(C) ; GET STATUS INFO
AND %10000000 ; ONLY INTERESTED IN BUSY FLAG
#IF (LPTMODE == LPTMODE_IBM)
AND %10000000 ; ISOLATE /BUSY
#ENDIF
#IF (LPTMODE == LPTMODE_MG014)
AND %00000010 ; ISOLATE BUSY
XOR %00000010 ; INVERT TO READY
#ENDIF
RET ; DONE
;
; INITIALIZE DEVICE
@ -180,8 +220,10 @@ LPT_INITDEV:
; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS!
;
LPT_INITDEVX:
LD A,(IY+3)
LD C,A ; PORT 0 (DATA)
;
#IF (LPTMODE == LPTMODE_IBM)
;
LD C,(IY+3) ; PORT 0 (DATA)
XOR A ; CLEAR ACCUM
OUT (C),A ; SEND IT
INC C ; BUMP TO
@ -194,6 +236,24 @@ LPT_INITDEVX:
XOR A ; SIGNAL SUCCESS
RET ; RETURN
;
#ENDIF
;
#IF (LPTMODE == LPTMODE_MG014)
LD A,(IY+3) ; BASE PORT
ADD A,3 ; BUMP TO CONTROL PORT
LD C,A ; MOVE TO C FOR I/O
LD A,$82 ; CONFIG A OUT, B IN, C OUT
OUT (C),A ; DO IT
DEC C ; OUTPUT PORT
LD A,$81 ; STROBE OFF, SELECT ON, RES ON, LED ON
OUT (C),A ; SEND IT
CALL LDELAY ; HALF SECOND DELAY
LD A,$05 ; STROBE OFF, SELECT ON, RES OFF, LED OFF
OUT (C),A ; SEND IT
XOR A ; SIGNAL SUCCESS
RET ; RETURN
#ENDIF
;
;
;
LPT_QUERY:
@ -215,17 +275,26 @@ LPT_DEVICE:
;
; LPT DETECTION ROUTINE
;
#IF (LPTMODE == LPTMODE_NONE)
;
LPT_DETECT:
LD A,(IY+3) ; BASE PORT ADDRESS
LD C,A ; PUT IN C FOR I/O
LD A,LPTMODE_NONE ; NOTHING TO DETECT
RET
;
#ENDIF
;
#IF (LPTMODE == LPTMODE_IBM)
;
LPT_DETECT:
LD C,(IY+3) ; BASE PORT ADDRESS
CALL LPT_DETECT2 ; CHECK IT
JR Z,LPT_DETECT1 ; FOUND IT, RECORD IT
LD A,LPT_NONE ; NOTHING FOUND
LD A,LPTMODE_NONE ; NOTHING FOUND
RET ; DONE
;
LPT_DETECT1:
; LPT FOUND, RECORD IT
LD A,LPT_IBM ; RETURN CHIP TYPE
LD A,LPTMODE_IBM ; RETURN CHIP TYPE
RET ; DONE
;
LPT_DETECT2:
@ -253,6 +322,43 @@ LPT_DETECT2:
CP $A5 ; CORRECT?
RET ; RETURN (ZF SET CORRECTLY)
;
#ENDIF
;
#IF (LPTMODE == LPTMODE_MG014)
LPT_DETECT:
;
; TEST FOR PPI EXISTENCE
; WE SETUP THE PPI TO WRITE, THEN WRITE A VALUE OF $A5
; TO PORT A (DATALO), THEN READ IT BACK. IF THE PPI IS THERE
; THEN THE BUS HOLD CIRCUITRY WILL READ BACK THE $A5. SINCE
; WE ARE IN WRITE MODE, AN IDE CONTROLLER WILL NOT BE ABLE TO
; INTERFERE WITH THE VALUE BEING READ.
;
LD A,(IY+3) ; BASE IO ADDRESS
ADD A,3 ; BUMP TO CONTROL PORT
LD C,A ; PUT IN C
LD A,$80 ; SET PORT A TO WRITE
OUT (C),A ; WRITE IT
;
LD C,(IY+3) ; PPI PORT A
LD A,$A5 ; TEST VALUE
OUT (C),A ; PUSH VALUE TO PORT
IN A,(C) ; GET PORT VALUE
#IF (LPTTRACE >= 3)
CALL PC_SPACE
CALL PRTHEXBYTE
#ENDIF
CP $A5 ; CHECK FOR TEST VALUE
JR Z,LPT_DETECT1 ; FOUND IT
LD A,LPTMODE_NONE ; NOT FOUND
RET
;
LPT_DETECT1:
; LPT FOUND, RECORD IT
LD A,LPTMODE_MG014 ; RETURN CHIP TYPE
RET ; DONE
#ENDIF
;
;
;
LPT_PRTCFG:
@ -291,9 +397,11 @@ LPT_PRTCFG:
LPT_TYPE_MAP:
.DW LPT_STR_NONE
.DW LPT_STR_IBM
.DW LPT_STR_MG014
;
LPT_STR_NONE .DB "<NOT PRESENT>$"
LPT_STR_IBM .DB "IBM$"
LPT_STR_MG014 .DB "MG014$"
;
; WORKING VARIABLES
;

6
Source/HBIOS/std.asm

@ -242,6 +242,12 @@ GDCMODE_NONE .EQU 0
GDCMODE_ECB .EQU 1 ; ECB GDC
GDCMODE_RPH .EQU 2 ; RPH GDC
;
; LPT DRIVER MODE SELECTIONS
;
LPTMODE_NONE .EQU 0 ; NONE
LPTMODE_IBM .EQU 1 ; IBM STYLE INTERFACE
LPTMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE
;
; GDC MONITOR SELECTIONS
;
GDCMON_NONE .EQU 0

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 3
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.3.0-dev.12"
#DEFINE BIOSVER "3.3.0-dev.13"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 3
rup equ 0
rtp equ 0
biosver macro
db "3.3.0-dev.12"
db "3.3.0-dev.13"
endm

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