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@ -23,16 +23,20 @@ |
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; - Max Z80 CPU clock is about 8MHz or sound chip will not handle speed. |
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; - Higher CPU clock speeds are possible on Z180 because extra I/O |
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; wait states are added during I/O to sound chip. |
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; - Uses hardware timer support on Z180 processors. Otherwise, a delay |
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; loop calibrated to CPU speed is used. |
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; - Uses hardware timer support on systems that support a timer. Otherwise, |
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; a delay loop calibrated to CPU speed is used. |
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; - Delay loop is calibrated to CPU speed, but it does not compensate for |
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; time variations in each quark loop resulting from data decompression. |
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; An average quark processing time is assumed in each loop. |
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; - Most sound files originally targeted MSX or ZX Spectrum which used |
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; 1.7897725 MHz and 1.773400 MHz respectively for the PSG clock. For best |
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; sound playback, PSG should be run at approx. this clock rate. |
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;_______________________________________________________________________________ |
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; |
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; Change Log: |
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; 2018-01-26 [WBW] Initial release |
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; 2018-01-28 [WBW] Added support for MYM sound files |
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; 2019-11-21 [WBW] Added table-driven configuration |
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;_______________________________________________________________________________ |
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; |
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; ToDo: |
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@ -54,8 +58,6 @@ RMN .EQU 9 ; intended CBIOS version - minor |
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BF_SYSVER .EQU $F1 ; BIOS: VER function |
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BF_SYSGET .EQU $F8 ; HBIOS: SYSGET function |
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; |
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DCNTL .EQU $72 ; Z180 DCNTL PORT |
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; |
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FCB .EQU $5C ; Location of default FCB |
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; |
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HEAPEND .EQU $C000 ; End of heap storage |
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@ -79,48 +81,60 @@ TYPMYM .EQU 3 ; FILTYP value for MYM sound file |
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LD A,RMJ << 4 | RMN ; Expected HBIOS ver |
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CP D ; Compare with result above |
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JP NZ,ERRBIO ; Handle BIOS error |
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; |
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; Use platform id to derive port addresses |
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; |
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; Use platform id to setup active configuration |
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LD A,L ; Platform ID is still in L from above |
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LD C,L ; Save platform id in C for now |
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LD HL,$D0D8 ; For RC2014 Z80, RSEL=D8, RDAT=D0 |
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LD DE,MSGRCZ80 ; Message for RC2014 Z80 platform |
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CP 7 ; RC2014 Z80? |
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JR Z,_SETP ; If so, set ports |
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LD DE,MSGEZ ; Message for Easy Z80 platform |
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CP 9 ; Easy Z80? |
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LD HL,$6068 ; For RC2014 Z180, RSEL=D8, RDAT=D0 |
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LD DE,MSGRCZ180 ; Message for RC2014 Z180 platform |
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CP 8 ; RC2014 Z80? |
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JR Z,_SETP ; If so, set ports |
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LD DE,MSGSCZ180 ; Message for SC Z180 platform |
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CP 10 ; SCZ180? |
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JR Z,_SETP ; If so, same ports as RC2014 |
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LD HL,$9D9C ; For N8, RSEL=9C, RDAT=9D |
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LD DE,MSGN8 ; Message for N8 platform |
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CP 4 ; N8? |
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JR Z,_SETP ; If so, set ports |
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LD HL,$9B9A ; Otherwise SCG, RSEL=9A, RDAT=9B |
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LD DE,MSGSCG ; Message for SCG platform |
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LD A,$FF ; Write $FF to the |
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OUT ($9C),A ; ... SCG ACR register to activate card |
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_SETP LD (PORTS),HL ; Save port values |
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RLCA ; Adjust for table entry size (4 bytes) |
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PUSH AF ; Save ID * 2 for later |
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RLCA |
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LD HL,CFGTBL ; Point to start of config table |
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CALL ADDHLA ; HL := desired config table entry |
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LD DE,CFG ; Dest is active config |
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LD BC,4 ; Copy 4 bytes |
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LDIR ; Copy to active config |
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; |
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LD HL,PLTSTR ; Point to platform string table |
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POP AF ; Recover platform id * 2 for table offset |
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CALL ADDHLA ; HL := Platform string index adr |
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LD E,(HL) ; DE := Platform string adr |
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INC HL |
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LD D,(HL) |
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CALL CRLF ; Formatting |
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CALL PRTSTR ; Display platform string |
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; |
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; Choose quark wait mode based on platform |
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LD A,C ; Recover platform id |
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LD B,1 ; Assume timer mode |
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LD DE,MSGTIM ; Corresponding display string |
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CP 4 ; N8? |
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JR Z,_SETM ; If so, commit timer mode |
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CP 5 ; MK4? |
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JR Z,_SETM ; If so, commit timer mode |
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LD B,0 ; Otherwise, delay mode |
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LD DE,MSGDLY ; Corresponding display string |
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_SETM LD A,B ; Mode flag value to A |
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; |
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LD A,(CFG) ; RSEL port address to A |
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INC A ; Test for $FF |
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JP Z,ERRPLT ; Bail out if unsupported platform |
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; |
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; Test for timer running to determine if it can be used for delay |
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LD B,BF_SYSGET ; HBIOS: GET function |
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LD C,$D0 ; TIMER subfunction |
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RST 08 ; DE:HL := current tick count |
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LD A,L ; DE:HL == 0? |
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OR H |
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OR E |
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OR D |
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LD A,0 ; Assume no timer |
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LD DE,MSGDLY ; Delay mode msg |
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JR Z,SETDLY ; If tick count is zero, no timer active |
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LD A,$FF ; Value for timer active |
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LD DE,MSGTIM ; Timer mode msg |
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SETDLY: |
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LD (WMOD),A ; Save wait mode |
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CALL PRTSTR ; Print it |
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; |
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; ; *DEBUG* |
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; LD A,',' |
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; CALL PRTCHR |
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; LD HL,CFG |
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; LD B,4 |
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;DBGLP: |
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; LD A,' ' |
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; CALL PRTCHR |
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; LD A,(HL) |
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; INC HL |
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; CALL PRTHEX |
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; DJNZ DBGLP |
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; |
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; Get CPU speed & type from RomWBW HBIOS and compute quark delay factor |
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LD B,$F8 ; HBIOS SYSGET function 0xF8 |
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@ -130,9 +144,19 @@ _SETM LD A,B ; Mode flag value to A |
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RR E ; ... for delay factor |
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EX DE,HL ; Move result to HL |
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LD (QDLY),HL ; Save result as quark delay factor |
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; |
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; Activate SCG card if applicable |
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LD A,(CFG+3) |
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CP $FF |
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JR Z,NOSCG |
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LD C,A |
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LD A,$FF |
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OUT (C),A |
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NOSCG: |
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; |
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; Test for hardware (sound chip detection) |
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LD DE,(PORTS) ; D := RDAT, E := RSEL |
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CALL SLOWIO |
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LD DE,(CFG) ; D := RDAT, E := RSEL |
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LD C,E ; Port = RSEL |
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LD A,2 ; Register 2 |
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OUT (C),A ; Select register 2 |
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@ -141,6 +165,9 @@ _SETM LD A,B ; Mode flag value to A |
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OUT (C),A ; Write $AA to register 2 |
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LD C,E ; Port = RSEL |
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IN A,(C) ; Read back value in register 2 |
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PUSH AF |
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CALL NORMIO |
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POP AF |
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;CALL PRTHEX ; *debug* |
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CP $AA ; Value as written? |
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JP NZ,ERRHW ; If not, handle hardware error |
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@ -228,7 +255,7 @@ _LDX LD C,16 ; CPM Close File function |
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LD DE,MSGPLY ; Playing message |
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CALL PRTSTR ; Print message |
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;CALL CRLF2 ; Formatting |
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;CALL SLOWCPU |
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LD A,(FILTYP) ; Get file type |
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CP TYPPT2 ; PT2? |
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JR Z,GOPT2 ; If so, do it |
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@ -292,6 +319,7 @@ waitvb call WAITQ |
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jr mymlp |
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; |
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EXIT CALL START+8 ; Mute audio |
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;CALL NORMCPU |
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;CALL CRLF2 ; Formatting |
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LD DE,MSGEND ; Completion message |
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CALL PRTSTR ; Print message |
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@ -389,6 +417,70 @@ IDBIO2: |
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XOR A ; Setup return value of 0 |
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RET ; and done |
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; |
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; |
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; |
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SLOWCPU: |
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LD A,(CFG+2) ; Z180 base I/O port |
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CP $FF ; Check for no value |
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RET Z ; Bail out if no value |
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ADD A,$1E ; Apply offset of CMR register |
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LD C,A ; And put it in C |
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LD B,0 ; MSB for 16-bit I/O |
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IN A,(C) ; Get current value |
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LD (CMRSAV),A ; Save it to restore later |
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XOR A ; Go slow |
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OUT (C),A ; And update CMR |
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INC C ; Now point to CCR register |
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IN A,(C) ; Get current value |
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LD (CCRSAV),A ; Save it to restore later |
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XOR A ; Go slow |
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OUT (C),A ; And update CCR |
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RET |
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; |
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; |
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; |
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NORMCPU: |
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LD A,(CFG+2) ; Z180 base I/O port |
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CP $FF ; Check for no value |
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RET Z ; Bail out if no value |
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ADD A,$1E ; Apply offset of CMR register |
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LD C,A ; And put it in C |
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LD B,0 ; MSB for 16-bit I/O |
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LD A,(CMRSAV) ; Get original CMR value |
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OUT (C),A ; And update CMR |
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INC C ; Now point to CCR register |
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LD A,(CCRSAV) ; Get original CCR value |
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OUT (C),A ; And update CCR |
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RET |
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; |
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; |
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; |
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SLOWIO: |
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LD A,(CFG+2) ; Z180 base I/O port |
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CP $FF ; Check for no value |
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RET Z ; Bail out if no value |
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ADD A,$32 ; Apply offset of DCNTL register |
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LD C,A ; And put it in C |
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LD B,0 ; MSB for 16-bit I/O |
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IN A,(C) ; Get current value |
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LD (DCSAV),A ; Save it to restore later |
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OR %00110000 ; Force slow operation (I/O W/S=3) |
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OUT (C),A ; And update DCNTL |
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RET |
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; |
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; |
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; |
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NORMIO: |
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LD A,(CFG+2) ; Z180 base I/O port |
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CP $FF ; Check for no value |
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RET Z ; Bail out if no value |
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ADD A,$32 ; Apply offset of DCNTL register |
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LD C,A ; And put it in C |
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LD B,0 ; MSB for 16-bit I/O |
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LD A,(DCSAV) ; Get saved DCNTL value |
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OUT (C),A ; And restore it |
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RET |
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; |
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; Print character in A without destroying any registers |
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; |
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PRTCHR: |
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@ -562,10 +654,25 @@ CRLF: |
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POP AF ; restore AF |
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RET |
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; |
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; ADD HL,A |
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; |
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; A REGISTER IS DESTROYED! |
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; |
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ADDHLA: |
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ADD A,L |
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LD L,A |
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RET NC |
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INC H |
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RET |
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; |
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ERRBIO: ; Invalid BIOS or version |
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LD DE,MSGBIO |
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JR ERR |
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; |
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ERRPLT: ; Invalid BIOS or version |
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LD DE,MSGPLT |
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JR ERR |
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; |
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ERRHW: ; Hardware error, sound chip not detected |
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LD DE,MSGHW |
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JR ERR |
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@ -595,41 +702,81 @@ ERR1: ; without the leading crlf |
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ERR2: ; without the string |
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CALL CRLF ; print newline |
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JP 0 ; fast exit |
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; |
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; CONFIG TABLE, ENTRY ORDER MATCHES HBIOS PLATFORM ID |
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; |
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CFGTBL: ; RSEL RDAT Z180 ACR |
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.DB $FF, $FF, $FF, $FF ; PLATFORM ID 0 IS INVALID |
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.DB $9A, $9B, $FF, $9C ; SBC W/ SCG |
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.DB $FF, $FF, $FF, $FF ; ZETA (NOT POSSIBLE) |
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.DB $FF, $FF, $FF, $FF ; ZETA 2 (NOT POSSIBLE) |
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.DB $9C, $9D, $40, $FF ; N8 W/ ONBOARD PSG |
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.DB $9A, $9B, $40, $9C ; MK4 W/ SCG |
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.DB $9A, $9B, $FF, $FF ; UNA (NOT SUPPORTED) |
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.DB $D8, $D0, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB) |
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.DB $68, $60, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB) |
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.DB $D8, $D0, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB) |
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.DB $68, $60, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB) |
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; |
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CFG: ; ACTIVE CONFIG VALUES (FROM SELECTED CFGTBL) |
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RSEL .DB 0 ; Register selection port |
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RDAT .DB 0 ; Register data port |
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Z180 .DB 0 ; Z180 base I/O port |
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ACR .DB 0 ; Aux Ctrl Reg I/O port on SCG |
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; |
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QDLY .DW 0 ; quark delay factor |
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WMOD .DB 0 ; delay mode, non-zero to use timer |
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DCSAV .DB 0 ; for saving Z180 DCNTL value |
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DCSAV .DB 0 ; for saving original Z180 DCNTL value |
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CCRSAV .DB 0 ; for saving original Z180 CCR value |
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CMRSAV .DB 0 ; for saving original Z180 CMR value |
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; |
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DMA .DW 0 ; Working DMA |
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FILTYP .DB 0 ; Sound file type (TYPPT2, TYPPT3, TYPMYM) |
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; |
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TMP .DB 0 ; work around use of undocumented Z80 |
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PORTS: |
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RSEL .DB 0 ; Register selection port |
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RDAT .DB 0 ; Register data port |
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; |
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MSGBAN .DB "Tune Player for RomWBW v2.1, 11-Aug-2019",0 |
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MSGBAN .DB "Tune Player for RomWBW v2.2, 21-Nov-2019",0 |
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MSGUSE .DB "Copyright (C) 2019, Wayne Warthen, GNU GPL v3",13,10 |
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.DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10 |
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.DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10 |
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.DB "Usage: TUNE <filename>.[PT2|PT3|MYM]",0 |
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MSGBIO .DB "Incompatible BIOS or version, " |
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.DB "HBIOS v", '0' + RMJ, ".", '0' + RMN, " required",0 |
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MSGPLT .DB "Hardware error, system not supported!",0 |
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MSGHW .DB "Hardware error, sound chip not detected!",0 |
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MSGNAM .DB "Sound filename invalid (must be .PT2, .PT3, or .MYM)",0 |
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MSGFIL .DB "Sound file not found!",0 |
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MSGSIZ .DB "Sound file too large to load!",0 |
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MSGRCZ80 .DB "RC2014 Z80 w/ Ed Brindley Sound Module",0 |
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MSGRCZ180 .DB "RC2014 Z180 w/ Ed Brindley Sound Module",0 |
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MSGSCZ180 .DB "SC Z180 w/ Ed Brindley Sound Module",0 |
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MSGEZ .DB "Easy Z80 w/ Ed Brindley Sound Module",0 |
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MSGN8 .DB "RetroBrew N8 Onboard Sound System",0 |
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MSGSCG .DB "RetroBrew SCG ECB Adapter Sound System",0 |
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MSGTIM .DB ", timer mode",0 |
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MSGDLY .DB ", delay mode",0 |
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MSGPLY .DB "Playing...",0 |
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MSGEND .DB " Done",0 |
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; |
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PLTSTR: |
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.DW 0 |
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.DW PLTSTR_SBC |
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.DW PLTSTR_ZETA |
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.DW PLTSTR_ZETA2 |
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.DW PLTSTR_N8 |
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.DW PLTSTR_MK4 |
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.DW PLTSTR_UNA |
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.DW PLTSTR_RCZ80 |
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.DW PLTSTR_RCZ180 |
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.DW PLTSTR_EZZ80 |
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.DW PLTSTR_SCZ180 |
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; |
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PLTSTR_SBC .DB "SBC w/ SCG ECB Sound Card",0 |
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PLTSTR_ZETA .DB "Zeta -- Not Supported!!!",0 |
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PLTSTR_ZETA2 .DB "Zeta 2 -- Not Supported!!!",0 |
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PLTSTR_N8 .DB "N8 Onboard Sound System",0 |
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PLTSTR_MK4 .DB "Mark IV w/ SCG ECB Sound Card",0 |
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PLTSTR_UNA .DB "UNA -- Not Supported!!!",0 |
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PLTSTR_RCZ80 .DB "RC2014 Z80 w/ Sound Module (EB)",0 |
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PLTSTR_RCZ180 .DB "RC2014 Z180 w/ Sound Module (EB)",0 |
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PLTSTR_EZZ80 .DB "Easy Z80 w/ Sound Module (EB)",0 |
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PLTSTR_SCZ180 .DB "SC Z180 w/ Sound Module (EB)",0 |
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; |
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;=============================================================================== |
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; PTx Player Routines |
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;=============================================================================== |
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@ -2012,15 +2159,9 @@ LOUT OUT (C),A |
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#ENDIF |
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#IF WBW |
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LD A,(WMOD) ; If WMOD = 1, CPU is Z180 |
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OR A ; Set flags |
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JR Z,LOUT0 ; Skip Z180 stuff |
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DI |
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IN0 A,(DCNTL) ; Get wait states |
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LD (DCSAV),A ; Save value |
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OR %00110000 ; Force slow operation (I/O W/S=3) |
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OUT0 (DCNTL),A ; And update DCNTL |
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LOUT0 LD DE,(PORTS) ; D := RDAT, E := RSEL |
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CALL SLOWIO |
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LD DE,(CFG) ; D := RDAT, E := RSEL |
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XOR A ; start with reg 0 |
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LD C,E ; point to address port |
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LD HL,AYREGS ; start of value list |
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@ -2037,11 +2178,8 @@ LOUT OUT (C),A ; select register |
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JP M,LOUT2 ; if bit 7 set, return w/o writing value |
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LD C,D ; select data port |
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OUT (C),A ; write value to register 13 |
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LOUT2 LD A,(WMOD) ; If WMOD = 1, CPU is Z180 |
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OR A ; Set flags |
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RET Z ; Skip Z180 stuff |
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LD A,(DCSAV) ; Get saved DCNTL value |
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OUT0 (DCNTL),A ; And restore it |
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LOUT2 |
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CALL NORMIO |
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EI |
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RET ; And done |
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#ENDIF |
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@ -2405,13 +2543,10 @@ upsg: ld a,(WMOD) ; if WMOD = 1, CPU is z180 |
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or a ; set flags |
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jr z,upsg1 ; skip z180 stuff |
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di |
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in0 a,(DCNTL) ; get wait states |
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ld (DCSAV),a ; save value |
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or %00110000 ; force slow operation (i/o w/s=3) |
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out0 (DCNTL),a ; and update DCNTL |
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call SLOWIO |
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upsg1: ld hl,(psource) |
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ld de,(PORTS) ; E := RSEL, D := RDAT |
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ld de,(CFG) ; E := RSEL, D := RDAT |
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xor a |
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psglp: ld c,e ; C := RSEL |
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@ -2443,11 +2578,7 @@ notrig: ld hl,(psource) |
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dec a |
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ld (played),a |
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endint: ld a,(WMOD) ; If WMOD = 1, CPU is Z180 |
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or a ; Set flags |
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ret z ; Skip Z180 stuff |
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ld a,(DCSAV) ; Get saved DCNTL value |
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out0 (DCNTL),a ; And restore it |
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endint: call NORMIO |
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ei |
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ret ; And done |
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; |
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Phillip Stevens
6 years ago
GitHub