mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
Preliminary RC2014 Support
This commit is contained in:
Wayne Warthen
@@ -1,5 +1,5 @@
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#DEFINE RMJ 2
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#DEFINE RMN 8
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#DEFINE RUP 5
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#DEFINE RUP 6
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#DEFINE RTP 0
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#DEFINE BIOSVER "2.8.5"
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#DEFINE BIOSVER "2.8.6"
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@@ -3,8 +3,8 @@ param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "512", [s
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$Platform = $Platform.ToUpper()
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while ($true)
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{
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if (($Platform -eq "SBC") -or ($Platform -eq "ZETA") -or ($Platform -eq "ZETA2") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "UNA")) {break}
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$Platform = (Read-Host -prompt "Platform [SBC|ZETA|ZETA2|N8|MK4|UNA]").Trim().ToUpper()
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if (($Platform -eq "SBC") -or ($Platform -eq "ZETA") -or ($Platform -eq "ZETA2") -or ($Platform -eq "RC") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "UNA")) {break}
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$Platform = (Read-Host -prompt "Platform [SBC|ZETA|ZETA2|RC|N8|MK4|UNA]").Trim().ToUpper()
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}
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while ($true)
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8
Source/HBIOS/Config/RC_std.asm
Normal file
8
Source/HBIOS/Config/RC_std.asm
Normal file
@@ -0,0 +1,8 @@
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;
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;==================================================================================================
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; RC2014 STANDARD CONFIGURATION
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;==================================================================================================
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;
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#include "cfg_rc.asm"
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;
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IDEENABLE .SET TRUE ; TRUE FOR IDE DEVICE SUPPORT
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73
Source/HBIOS/cfg_rc.asm
Normal file
73
Source/HBIOS/cfg_rc.asm
Normal file
@@ -0,0 +1,73 @@
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;
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;==================================================================================================
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; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014
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;==================================================================================================
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;
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; BUILD CONFIGURATION OPTIONS
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;
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CPUOSC .EQU 7372800 ; CPU OSC FREQ
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RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
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DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
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INTTYPE .EQU IT_NONE ; INTERRUPT HANDLING TYPE (IT_NONE, IT_SIMH, IT_Z180, IT_CTC, ...)
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;
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CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
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VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
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;
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DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
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;
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SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
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DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER
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DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
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;
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ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
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UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
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UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
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SIOENABLE .EQU TRUE ; TRUE FOR SIO SUPPORT
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;
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VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
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CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
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NECENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
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TMSENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
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VGAENABLE .EQU FALSE ; TRUE FOR VGA VIDEO/KBD SUPPORT
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;
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MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
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MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
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;
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FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
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FDMODE .EQU FDMODE_ZETA ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
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FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
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FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
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FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
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FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
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;
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RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
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;
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IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
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IDEMODE .EQU IDEMODE_RC ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_RC
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IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
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IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
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;
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PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
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PPIDEMODE .EQU PPIDEMODE_SBC ; PPIDEMODE_SBC, PPPIDEMODE_DIO3, PPIDEMODE_MFP, PPIDEMODE_N8
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PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
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PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
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;
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SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
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SDMODE .EQU SDMODE_PPI ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
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SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
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SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
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;
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PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SUPPORT
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;
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PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
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PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
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PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
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PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
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;
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HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
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;
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TERMENABLE .EQU FALSE ; TERM PSEUDO DEVICE, WILL BE ENABLED IF A VDA IS ENABLED
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;
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BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
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BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
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BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
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@@ -249,7 +249,7 @@ HBX_BNKSEL_INT:
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OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR
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RET ; DONE
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#ENDIF
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#IF (PLATFORM == PLT_ZETA2)
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#IF ((PLATFORM == PLT_ZETA2) | (PLATFORM == PLT_RC))
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BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE
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JR Z,HBX_ROM ; NOT SET, SELECT ROM PAGE
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RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT
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@@ -623,7 +623,7 @@ HB_START:
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#ENDIF
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;
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#IF (PLATFORM == PLT_ZETA2)
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#IF ((PLATFORM == PLT_ZETA2) | (PLATFORM == PLT_RC))
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; SET PAGING REGISTERS
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#IFDEF ROMBOOT
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XOR A
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@@ -720,6 +720,9 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
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#IF (UARTENABLE)
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CALL UART_PREINIT
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#ENDIF
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#IF (SIOENABLE)
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CALL SIO_PREINIT
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#ENDIF
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;
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; PRIOR TO THIS POINT, CONSOLE I/O WAS DIRECTED TO HARDWARE (XIO.ASM).
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; NOW THAT HBIOS IS READY, SET THE CONSOLE UNIT TO ACTIVATE CONSOLE I/O
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@@ -951,6 +954,9 @@ HB_INITTBL:
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#IF (UARTENABLE)
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.DW UART_INIT
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#ENDIF
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#IF (SIOENABLE)
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.DW SIO_INIT
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#ENDIF
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#IF (SIMRTCENABLE)
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.DW SIMRTC_INIT
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#ENDIF
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@@ -2001,6 +2007,15 @@ SIZ_DSRTC .EQU $ - ORG_DSRTC
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.ECHO " bytes.\n"
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#ENDIF
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;
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#IF (ASCIENABLE)
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ORG_ASCI .EQU $
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#INCLUDE "asci.asm"
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SIZ_ASCI .EQU $ - ORG_ASCI
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.ECHO "ASCI occupies "
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.ECHO SIZ_ASCI
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.ECHO " bytes.\n"
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#ENDIF
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;
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#IF (UARTENABLE)
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ORG_UART .EQU $
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#INCLUDE "uart.asm"
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@@ -2010,12 +2025,12 @@ SIZ_UART .EQU $ - ORG_UART
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.ECHO " bytes.\n"
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#ENDIF
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;
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#IF (ASCIENABLE)
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ORG_ASCI .EQU $
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#INCLUDE "asci.asm"
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SIZ_ASCI .EQU $ - ORG_ASCI
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.ECHO "ASCI occupies "
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.ECHO SIZ_ASCI
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#IF (SIOENABLE)
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ORG_SIO .EQU $
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#INCLUDE "sio.asm"
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SIZ_SIO .EQU $ - ORG_SIO
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.ECHO "SIO occupies "
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.ECHO SIZ_SIO
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.ECHO " bytes.\n"
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#ENDIF
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;
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@@ -2871,13 +2886,14 @@ PS_FLPED .TEXT "ED$"
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;
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PS_SDSTRREF:
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.DW PS_SDUART, PS_SDASCI, PS_SDTERM,
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.DW PS_SDPRPCON, PS_SDPPPCON
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.DW PS_SDPRPCON, PS_SDPPPCON, PS_SDSIO
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;
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PS_SDUART .TEXT "UART$"
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PS_SDASCI .TEXT "ASCI$"
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PS_SDTERM .TEXT "TERM$"
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PS_SDPRPCON .TEXT "PRPCON$"
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PS_SDPPPCON .TEXT "PPPCON$"
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PS_SDSIO .TEXT "SIO$"
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;
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; SERIAL TYPE STRINGS
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;
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@@ -83,6 +83,7 @@ CIODEV_ASCI .EQU $10
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CIODEV_TERM .EQU $20
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CIODEV_PRPCON .EQU $30
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CIODEV_PPPCON .EQU $40
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CIODEV_SIO .EQU $50
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CIODEV_CONSOLE .EQU $D0
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;
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; DISK DEVICE IDS
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@@ -110,7 +110,11 @@ IDE_UNITCNT .EQU 2 ; ASSUME ONLY PRIMARY INTERFACE
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;
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#IF (IDEMODE == IDEMODE_MK4)
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IDE_IO_BASE .EQU MK4_IDE
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#ELSE
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#ENDIF
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#IF (IDEMODE == IDEMODE_RC)
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IDE_IO_BASE .EQU $10
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#ENDIF
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#IF ((IDEMODE != IDEMODE_MK4) & (IDEMODE != IDEMODE_RC))
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IDE_IO_BASE .EQU $20
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#ENDIF
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@@ -134,6 +138,11 @@ IDE_IO_DMA .EQU $IDE_IO_BASE + $09 ; DATA PORT (16 BIT DMA LO/HI BYTES) (R/W)
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#ENDIF
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#ENDIF
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;
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#IF (IDEMODE == IDEMODE_RC)
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IDE_UNITCNT .SET 1 ; RC2014 COMPACT FLASH SUPPORTS ONLY 1 DEVICE
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IDE_IO_DATA .EQU $IDE_IO_BASE + $00 ; DATA PORT (8 BIT) (R/W)
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#ENDIF
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;
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;IDE_IO_DATA .EQU $IDE_IO_BASE + $00 ; DATA INPUT/OUTPUT (R/W)
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IDE_IO_ERR .EQU $IDE_IO_BASE + $01 ; ERROR REGISTER (R)
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IDE_IO_FEAT .EQU $IDE_IO_BASE + $01 ; FEATURES REGISTER (W)
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1269
Source/HBIOS/ide.asm.new
Normal file
1269
Source/HBIOS/ide.asm.new
Normal file
File diff suppressed because it is too large
Load Diff
8
Source/HBIOS/plt_rc.inc
Normal file
8
Source/HBIOS/plt_rc.inc
Normal file
@@ -0,0 +1,8 @@
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;
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; RC2014 HARDWARE DEFINITIONS
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;
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MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY)
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MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY)
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MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY)
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MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY)
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MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
|
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292
Source/HBIOS/sio.asm
Normal file
292
Source/HBIOS/sio.asm
Normal file
@@ -0,0 +1,292 @@
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;
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||||
;
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||||
;==================================================================================================
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; SIO DRIVER (SERIAL PORT)
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||||
;==================================================================================================
|
||||
;
|
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; SETUP PARAMETER WORD:
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; +-------+---+-------------------+ +---+---+-----------+---+-------+
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||||
; | |RTS| ENCODED BAUD RATE | |DTR|XON| PARITY |STP| 8/7/6 |
|
||||
; +-------+---+---+---------------+ ----+---+-----------+---+-------+
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; F E D C B A 9 8 7 6 5 4 3 2 1 0
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||||
; -- MSB (D REGISTER) -- -- LSB (E REGISTER) --
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;
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SIO_DEBUG .EQU FALSE
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;
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SIO_NONE .EQU 0
|
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SIO_SIO .EQU 1
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||||
;
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||||
;
|
||||
;
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||||
SIO_PREINIT:
|
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;
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||||
; SETUP THE DISPATCH TABLE ENTRIES
|
||||
;
|
||||
LD B,SIO_CNT ; LOOP CONTROL
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||||
LD C,0 ; PHYSICAL UNIT INDEX
|
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SIO_PREINIT0:
|
||||
PUSH BC ; SAVE LOOP CONTROL
|
||||
LD A,C ; PHYSICAL UNIT TO A
|
||||
RLCA ; MULTIPLY BY CFG TABLE ENTRY SIZE (8 BYTES)
|
||||
RLCA ; ...
|
||||
RLCA ; ... TO GET OFFSET INTO CFG TABLE
|
||||
LD HL,SIO_CFG ; POINT TO START OF CFG TABLE
|
||||
CALL ADDHLA ; HL := ENTRY ADDRESS
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PUSH HL ; SAVE IT
|
||||
PUSH HL ; COPY CFG DATA PTR
|
||||
POP IY ; ... TO IY
|
||||
CALL SIO_INITUNIT ; HAND OFF TO GENERIC INIT CODE
|
||||
POP DE ; GET ENTRY ADDRESS BACK, BUT PUT IN DE
|
||||
POP BC ; RESTORE LOOP CONTROL
|
||||
;
|
||||
LD A,(IY + 1) ; GET THE SIO TYPE DETECTED
|
||||
OR A ; SET FLAGS
|
||||
JR Z,SIO_PREINIT2 ; SKIP IT IF NOTHING FOUND
|
||||
;
|
||||
PUSH BC ; SAVE LOOP CONTROL
|
||||
LD BC,SIO_DISPATCH ; BC := DISPATCH ADDRESS
|
||||
CALL NZ,CIO_ADDENT ; ADD ENTRY IF SIO FOUND, BC:DE
|
||||
POP BC ; RESTORE LOOP CONTROL
|
||||
;
|
||||
SIO_PREINIT2:
|
||||
INC C ; NEXT PHYSICAL UNIT
|
||||
DJNZ SIO_PREINIT0 ; LOOP UNTIL DONE
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET ; AND RETURN
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_INITUNIT:
|
||||
CALL SIO_DETECT ; DETERMINE SIO TYPE
|
||||
LD (IY + 1),A ; SAVE IN CONFIG TABLE
|
||||
OR A ; SET FLAGS
|
||||
RET Z ; ABORT IF NOTHING THERE
|
||||
|
||||
; UPDATE WORKING SIO DEVICE NUM
|
||||
LD HL,SIO_DEV ; POINT TO CURRENT UART DEVICE NUM
|
||||
LD A,(HL) ; PUT IN ACCUM
|
||||
INC (HL) ; INCREMENT IT (FOR NEXT LOOP)
|
||||
LD (IY),A ; UDPATE UNIT NUM
|
||||
|
||||
; SET DEFAULT CONFIG
|
||||
LD DE,-1 ; LEAVE CONFIG ALONE
|
||||
JP SIO_INITDEV ; IMPLEMENT IT AND RETURN
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_INIT:
|
||||
LD B,SIO_CNT ; COUNT OF POSSIBLE SIO UNITS
|
||||
LD C,0 ; INDEX INTO SIO CONFIG TABLE
|
||||
SIO_INIT1:
|
||||
PUSH BC ; SAVE LOOP CONTROL
|
||||
|
||||
LD A,C ; PHYSICAL UNIT TO A
|
||||
RLCA ; MULTIPLY BY CFG TABLE ENTRY SIZE (8 BYTES)
|
||||
RLCA ; ...
|
||||
RLCA ; ... TO GET OFFSET INTO CFG TABLE
|
||||
LD HL,SIO_CFG ; POINT TO START OF CFG TABLE
|
||||
CALL ADDHLA ; HL := ENTRY ADDRESS
|
||||
PUSH HL ; COPY CFG DATA PTR
|
||||
POP IY ; ... TO IY
|
||||
|
||||
CALL NZ,SIO_PRTCFG ; PRINT IF NOT ZERO
|
||||
|
||||
POP BC ; RESTORE LOOP CONTROL
|
||||
INC C ; NEXT UNIT
|
||||
DJNZ SIO_INIT1 ; LOOP TILL DONE
|
||||
;
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET ; DONE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_DISPATCH:
|
||||
; DISPATCH TO FUNCTION HANDLER
|
||||
PUSH HL ; SAVE HL FOR NOW
|
||||
LD A,B ; GET FUNCTION
|
||||
AND $0F ; ISOLATE LOW NIBBLE
|
||||
RLCA ; X 2 FOR WORD OFFSET INTO FUNCTION TABLE
|
||||
LD HL,SIO_FTBL ; START OF FUNC TABLE
|
||||
CALL ADDHLA ; HL := ADDRESS OF ADDRESS OF FUNCTION
|
||||
LD A,(HL) ; DEREF HL
|
||||
INC HL ; ...
|
||||
LD H,(HL) ; ...
|
||||
LD L,A ; ... TO GET ADDRESS OF FUNCTION
|
||||
EX (SP),HL ; RESTORE HL & PUT FUNC ADDRESS -> (SP)
|
||||
RET ; EFFECTIVELY A JP TO TGT ADDRESS
|
||||
|
||||
SIO_FTBL:
|
||||
.DW SIO_IN
|
||||
.DW SIO_OUT
|
||||
.DW SIO_IST
|
||||
.DW SIO_OST
|
||||
.DW SIO_INITDEV
|
||||
.DW SIO_QUERY
|
||||
.DW SIO_DEVICE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_IN:
|
||||
CALL SIO_IST ; RECEIVED CHAR READY?
|
||||
JR Z,SIO_IN ; LOOP IF NOT
|
||||
LD C,(IY + 2) ; C := BASE SIO PORT (WHICH IS ALSO RBR REG)
|
||||
IN E,(C) ; CHAR READ TO E
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET ; AND DONE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_OUT:
|
||||
CALL SIO_OST ; READY FOR CHAR?
|
||||
JR Z,SIO_OUT ; LOOP IF NOT
|
||||
LD C,(IY + 2) ; C := BASE SIO PORT (WHICH IS ALSO THR REG)
|
||||
OUT (C),E ; SEND CHAR FROM E
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_IST:
|
||||
LD C,(IY + 3) ; CMD PORT
|
||||
XOR A ; WR0
|
||||
OUT (C),A ; DO IT
|
||||
IN A,(C) ; GET STATUS
|
||||
AND $01 ; ISOLATE BIT 0 (RECEIVE DATA READY)
|
||||
JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING
|
||||
XOR A ; ZERO ACCUM
|
||||
INC A ; ACCUM := 1 TO SIGNAL 1 CHAR WAITING
|
||||
RET ; DONE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_OST:
|
||||
LD C,(IY + 3) ; CMD PORT
|
||||
XOR A ; WR0
|
||||
OUT (C),A ; DO IT
|
||||
IN A,(C) ; GET STATUS
|
||||
AND $04 ; ISOLATE BIT 2 (TX EMPTY)
|
||||
JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING
|
||||
XOR A ; ZERO ACCUM
|
||||
INC A ; ACCUM := 1 TO SIGNAL 1 BUFFER POSITION
|
||||
RET ; DONE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_INITDEV:
|
||||
LD C,(IY + 3) ; COMMAND PORT
|
||||
LD HL,SIO_INITVALS ; POINT TO INIT VALUES
|
||||
LD B,SIO_INITLEN ; COUNT OF BYTES TO WRITE
|
||||
OTIR ; WRITE ALL VALUES
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET ; RETURN
|
||||
;
|
||||
SIO_INITVALS:
|
||||
.DB $00, $18 ; WR0: CHANNEL RESET
|
||||
.DB $04, $C4 ; WR4: CLK/64=115200 BAUD, NO PARITY, 1 STOP BIT
|
||||
.DB $01, $00 ; WR1: NO INTERRUPTS
|
||||
.DB $03, $C1 ; WR3: 8 BIT RCV, RX ENABLE
|
||||
.DB $05, $EA ; WR5: DTR, 8 BITS SEND, TX ENABLE, RTS
|
||||
SIO_INITLEN .EQU $ - SIO_INITVALS
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_QUERY:
|
||||
LD E,(IY + 4) ; FIRST CONFIG BYTE TO E
|
||||
LD D,(IY + 5) ; SECOND CONFIG BYTE TO D
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET ; DONE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_DEVICE:
|
||||
LD D,CIODEV_SIO ; D := DEVICE TYPE
|
||||
LD E,(IY) ; E := PHYSICAL UNIT
|
||||
XOR A ; SIGNAL SUCCESS
|
||||
RET
|
||||
;
|
||||
; SIO DETECTION ROUTINE
|
||||
;
|
||||
SIO_DETECT:
|
||||
LD C,(IY + 3) ; COMMAND PORT
|
||||
XOR A
|
||||
OUT (C),A ; ACCESS RD0
|
||||
IN A,(C) ; GET RD0 VALUE
|
||||
LD B,A ; SAVE IT
|
||||
LD A,1
|
||||
OUT (C),A ; ACCESS RD1
|
||||
IN A,(C) ; GET RD1 VALUE
|
||||
CP B ; COMPARE
|
||||
LD A,SIO_NONE ; ASSUME NOTHING THERE
|
||||
RET Z ; RD0=RD1 MEANS NOTHING THERE
|
||||
LD A,SIO_SIO ; GUESS WE HAVE A VALID SIO HERE
|
||||
RET ; DONE
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_PRTCFG:
|
||||
; ANNOUNCE PORT
|
||||
CALL NEWLINE ; FORMATTING
|
||||
PRTS("SIO$") ; FORMATTING
|
||||
LD A,(IY) ; DEVICE NUM
|
||||
CALL PRTDECB ; PRINT DEVICE NUM
|
||||
PRTS(": IO=0x$") ; FORMATTING
|
||||
LD A,(IY + 3) ; GET BASE PORT
|
||||
CALL PRTHEXBYTE ; PRINT BASE PORT
|
||||
|
||||
; PRINT THE SIO TYPE
|
||||
CALL PC_SPACE ; FORMATTING
|
||||
LD A,(IY + 1) ; GET SIO TYPE BYTE
|
||||
RLCA ; MAKE IT A WORD OFFSET
|
||||
LD HL,SIO_TYPE_MAP ; POINT HL TO TYPE MAP TABLE
|
||||
CALL ADDHLA ; HL := ENTRY
|
||||
LD E,(HL) ; DEREFERENCE
|
||||
INC HL ; ...
|
||||
LD D,(HL) ; ... TO GET STRING POINTER
|
||||
CALL WRITESTR ; PRINT IT
|
||||
;
|
||||
; ALL DONE IF NO SIO WAS DETECTED
|
||||
LD A,(IY + 1) ; GET SIO TYPE BYTE
|
||||
OR A ; SET FLAGS
|
||||
RET Z ; IF ZERO, NOT PRESENT
|
||||
;
|
||||
PRTS(" MODE=$") ; FORMATTING
|
||||
LD E,(IY + 4) ; LOAD CONFIG
|
||||
LD D,(IY + 5) ; ... WORD TO DE
|
||||
CALL PS_PRTSC0 ; PRINT CONFIG
|
||||
;
|
||||
XOR A
|
||||
RET
|
||||
;
|
||||
;
|
||||
;
|
||||
SIO_TYPE_MAP:
|
||||
.DW SIO_STR_NONE
|
||||
.DW SIO_STR_SIO
|
||||
|
||||
SIO_STR_NONE .DB "<NOT PRESENT>$"
|
||||
SIO_STR_SIO .DB "SIO$"
|
||||
;
|
||||
; WORKING VARIABLES
|
||||
;
|
||||
SIO_DEV .DB 0 ; DEVICE NUM USED DURING INIT
|
||||
;
|
||||
; SIO PORT TABLE
|
||||
;
|
||||
SIO_CFG:
|
||||
; SIO/2 CHANNEL A
|
||||
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
|
||||
.DB 0 ; SIO TYPE
|
||||
.DB $81 ; DATA PORT
|
||||
.DB $80 ; CMD PORT
|
||||
.DW DEFSERCFG ; LINE CONFIGURATION
|
||||
.FILL 2,$FF ; FILLER
|
||||
;
|
||||
; SIO/2 CHANNEL B
|
||||
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
|
||||
.DB 0 ; SIO TYPE
|
||||
.DB $83 ; DATA PORT
|
||||
.DB $82 ; CMD PORT
|
||||
.DW DEFSERCFG ; LINE CONFIGURATION
|
||||
.FILL 2,$FF ; FILLER
|
||||
;
|
||||
SIO_CNT .EQU ($ - SIO_CFG) / 8
|
||||
@@ -8,6 +8,7 @@
|
||||
; 4. N8 MSX-compatible Z180 SBC w/ onboard video and sound
|
||||
; 5. MK4 Mark IV Z180 based SBC w/ ECB interface
|
||||
; 6. UNA Any Z80/Z180 computer with UNA BIOS
|
||||
; 7. RC RC2014 based system with SMB 512K RAM/ROM card
|
||||
|
||||
; All the classes require certain generic definitions, and these are
|
||||
; defined here prior to the inclusion of platform specific .inc files.
|
||||
@@ -32,6 +33,7 @@ PLT_ZETA2 .EQU 3 ; ZETA Z80 V2 SBC
|
||||
PLT_N8 .EQU 4 ; N8 (HOME COMPUTER) Z180 SBC
|
||||
PLT_MK4 .EQU 5 ; MARK IV
|
||||
PLT_UNA .EQU 6 ; UNA BIOS
|
||||
PLT_RC .EQU 7 ; RC2014
|
||||
;
|
||||
#IF (PLATFORM != PLT_UNA)
|
||||
#INCLUDE "hbios.inc"
|
||||
@@ -85,6 +87,7 @@ IDEMODE_NONE .EQU 0
|
||||
IDEMODE_DIO .EQU 1 ; DISKIO V1
|
||||
IDEMODE_DIDE .EQU 2 ; DUAL IDE
|
||||
IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT)
|
||||
IDEMODE_RC .EQU 4 ; RC2014 CF BOARD (8 BIT)
|
||||
;
|
||||
; PPIDE MODE SELECTIONS
|
||||
;
|
||||
@@ -189,6 +192,9 @@ IT_CTC .EQU 3
|
||||
#IF (PLATFORM == PLT_UNA)
|
||||
#DEFINE PLATFORM_NAME "UNA"
|
||||
#ENDIF
|
||||
#IF (PLATFORM == PLT_RC)
|
||||
#DEFINE PLATFORM_NAME "RC2014"
|
||||
#ENDIF
|
||||
;
|
||||
; INCLUDE PLATFORM SPECIFIC HARDWARE DEFINITIONS
|
||||
;
|
||||
@@ -208,6 +214,10 @@ IT_CTC .EQU 3
|
||||
#INCLUDE "plt_una.inc"
|
||||
#ENDIF
|
||||
;
|
||||
#IF (PLATFORM == PLT_RC)
|
||||
#INCLUDE "plt_rc.inc"
|
||||
#ENDIF
|
||||
;
|
||||
; SETUP DEFAULT CPU SPEED VALUES
|
||||
;
|
||||
CPUKHZ .EQU CPUOSC / 1000 ; CPU FREQ IN KHZ
|
||||
|
||||
@@ -20,8 +20,6 @@
|
||||
;
|
||||
UART_DEBUG .EQU FALSE
|
||||
;
|
||||
UART_DEFCFG .EQU %0010100110000011
|
||||
;
|
||||
UART_NONE .EQU 0 ; UNKNOWN OR NOT PRESENT
|
||||
UART_8250 .EQU 1
|
||||
UART_16450 .EQU 2
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#DEFINE RMJ 2
|
||||
#DEFINE RMN 8
|
||||
#DEFINE RUP 5
|
||||
#DEFINE RUP 6
|
||||
#DEFINE RTP 0
|
||||
#DEFINE BIOSVER "2.8.5"
|
||||
#DEFINE BIOSVER "2.8.6"
|
||||
|
||||
Reference in New Issue
Block a user