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Update CH Driver Port Config for RCBus Systems 

- Updated to standardize on 0x3E/0x3F for primary CH device and 0x3C/0x3D for secondary CH device.  Both devices are optional and detected automatically.
pull/378/head v3.4.0-dev.35
Wayne Warthen 2 years ago
parent
e286a428bf
commit
af00df9182
9 changed files with 33 additions and 33 deletions
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  1. 8
      Source/HBIOS/cfg_epitx.asm
  2. 8
      Source/HBIOS/cfg_master.asm
  3. 8
      Source/HBIOS/cfg_mon.asm
  4. 10
      Source/HBIOS/cfg_rcz180.asm
  5. 10
      Source/HBIOS/cfg_rcz280.asm
  6. 8
      Source/HBIOS/cfg_rcz80.asm
  7. 10
      Source/HBIOS/cfg_scz180.asm
  8. 2
      Source/ver.inc
  9. 2
      Source/ver.lib

8
Source/HBIOS/cfg_epitx.asm
View File

@ -253,12 +253,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

8
Source/HBIOS/cfg_master.asm
View File

@ -303,12 +303,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

8
Source/HBIOS/cfg_mon.asm
View File

@ -251,12 +251,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

10
Source/HBIOS/cfg_rcz180.asm
View File

@ -253,16 +253,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

10
Source/HBIOS/cfg_rcz280.asm
View File

@ -257,16 +257,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

8
Source/HBIOS/cfg_rcz80.asm
View File

@ -256,12 +256,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

10
Source/HBIOS/cfg_scz180.asm
View File

@ -247,16 +247,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/ver.inc
View File

@ -2,7 +2,7 @@
#DEFINE RMN 4
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.4.0-dev.34"
#DEFINE BIOSVER "3.4.0-dev.35"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib
View File

@ -3,5 +3,5 @@ rmn equ 4
rup equ 0
rtp equ 0
biosver macro
db "3.4.0-dev.34"
db "3.4.0-dev.35"
endm

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