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Reintegrate wbw -> trunk

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wwarthen 11 years ago
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de52c4f560
324 changed files with 8780 additions and 8670 deletions
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  1. 351
      Doc/Flash4.txt
  2. BIN
      Doc/Source/RomWBW Architecture.docx
  3. 2
      Source/Apps/OSLdr.asm
  4. 89
      Source/BIOS/memmgr.asm
  5. 125
      Source/BIOS/mk4.inc
  6. 131
      Source/BIOS/n8.inc
  7. 65
      Source/BIOS/n8vem.inc
  8. 36
      Source/BIOS/std-n8vem.inc
  9. 422
      Source/BIOS/std.asm
  10. 5
      Source/BIOS/ver.inc
  11. 8
      Source/BPBIOS/@WBW Z3ENV.txt
  12. 68
      Source/BPBIOS/Build.cmd
  13. 50
      Source/BPBIOS/bpbio-dx.z80
  14. 599
      Source/BPBIOS/bpbio-ww.z80
  15. 6
      Source/BPBIOS/byteio.z80
  16. 241
      Source/BPBIOS/cboot-dx.z80
  17. 771
      Source/BPBIOS/cboot-ww.z80
  18. 16
      Source/BPBIOS/deblock.z80
  19. 317
      Source/BPBIOS/deblock.z80.sav
  20. 100
      Source/BPBIOS/def-dx.lib
  21. 16
      Source/BPBIOS/def-ww-z33.lib
  22. 16
      Source/BPBIOS/def-ww-z33bnk.lib
  23. 16
      Source/BPBIOS/def-ww-z34.lib
  24. 16
      Source/BPBIOS/def-ww-z34bnk.lib
  25. 16
      Source/BPBIOS/def-ww-z41.lib
  26. 439
      Source/BPBIOS/def-ww.lib
  27. 8
      Source/BPBIOS/dpbhd-dx.lib
  28. 40
      Source/BPBIOS/dpbm-ww.lib
  29. 2
      Source/BPBIOS/dpbram.lib
  30. 274
      Source/BPBIOS/dph.sav
  31. 3
      Source/BPBIOS/dphhd.lib
  32. 193
      Source/BPBIOS/dphhd.lib.sav
  33. 16
      Source/BPBIOS/fdc-dx.z80
  34. 305
      Source/BPBIOS/fdc-ww.z80
  35. 0
      Source/BPBIOS/forlib.lib
  36. 620
      Source/BPBIOS/hard-ww.z80
  37. 2
      Source/BPBIOS/hbios.z80
  38. 235
      Source/BPBIOS/ibmv-dx.z80
  39. 16
      Source/BPBIOS/ibmv-ww.z80
  40. 2
      Source/BPBIOS/icfg-dx.z80
  41. 4
      Source/BPBIOS/icfg-ww.z80
  42. 187
      Source/BPBIOS/icfg-z34.z80
  43. 187
      Source/BPBIOS/icfg-z41.z80
  44. 1138
      Source/BPBIOS/iio-dx.z80
  45. 334
      Source/BPBIOS/iio-ww.z80
  46. 89
      Source/BPBIOS/ramd-ww.z80
  47. 16
      Source/BPBIOS/romwbw-mk4.lib
  48. 16
      Source/BPBIOS/romwbw-sim.lib
  49. 72
      Source/BPBIOS/romwbw.lib
  50. 12
      Source/BPBIOS/sectran.z80
  51. 19
      Source/BPBIOS/selrwd.z80
  52. 2
      Source/BPBIOS/util.z80
  53. 60
      Source/BPBIOS/wboot-dx.z80
  54. 191
      Source/BPBIOS/wboot-ww.z80
  55. 3
      Source/BPBIOS/z33.zex
  56. 3
      Source/BPBIOS/z34.zex
  57. 125
      Source/BPBIOS/z3base.lib.sav
  58. 4
      Source/BPBIOS/z41.zex
  59. BIN
      Source/BPBIOS/zcpr33.bin
  60. 2
      Source/Build.cmd
  61. 1
      Source/BuildCommon.cmd
  62. 16
      Source/CBIOS/Build.cmd
  63. 13
      Source/CBIOS/build.inc
  64. 1044
      Source/CBIOS/cbios.asm
  65. BIN
      Source/CBIOS/cbios.bin
  66. 4381
      Source/CBIOS/cbios.lst
  67. 26
      Source/CBIOS/config.asm
  68. 25
      Source/CBIOS/n8vem.inc
  69. 36
      Source/CBIOS/std-n8vem.inc
  70. 308
      Source/CBIOS/std.asm
  71. 177
      Source/CBIOS/util.asm
  72. 6
      Source/CBIOS/ver.inc
  73. 3
      Source/Clean.cmd
  74. 0
      Source/HBIOS/Build.cmd
  75. 17
      Source/HBIOS/Build.ps1
  76. 0
      Source/HBIOS/Clean.cmd
  77. 113
      Source/HBIOS/Config/mk4_cvdu.asm
  78. 41
      Source/HBIOS/Config/mk4_diskio3.asm
  79. 41
      Source/HBIOS/Config/mk4_propio.asm
  80. 61
      Source/HBIOS/Config/mk4_std.asm
  81. 39
      Source/HBIOS/Config/n8_2312.asm
  82. 39
      Source/HBIOS/Config/n8_2511.asm
  83. 33
      Source/HBIOS/Config/sbc_ci.asm
  84. 33
      Source/HBIOS/Config/sbc_cvdu.asm
  85. 31
      Source/HBIOS/Config/sbc_dide.asm
  86. 31
      Source/HBIOS/Config/sbc_diskio.asm
  87. 31
      Source/HBIOS/Config/sbc_diskio3+cvdu.asm
  88. 31
      Source/HBIOS/Config/sbc_diskio3.asm
  89. 31
      Source/HBIOS/Config/sbc_dsd.asm
  90. 39
      Source/HBIOS/Config/sbc_mfp.asm
  91. 31
      Source/HBIOS/Config/sbc_ppide.asm
  92. 31
      Source/HBIOS/Config/sbc_ppisd.asm
  93. 31
      Source/HBIOS/Config/sbc_propio.asm
  94. 31
      Source/HBIOS/Config/sbc_rf.asm
  95. 32
      Source/HBIOS/Config/sbc_simh.asm
  96. 31
      Source/HBIOS/Config/sbc_std.asm
  97. 31
      Source/HBIOS/Config/sbc_vdu.asm
  98. 10
      Source/HBIOS/Config/una_std.asm
  99. 31
      Source/HBIOS/Config/zeta2_ppide.asm
  100. 31
      Source/HBIOS/Config/zeta2_ppisd.asm

351
Doc/Flash4.txt
View File

@ -1,169 +1,182 @@
FLASH4 (c) 2014 William R Sowerbutts <will@sowerbutts.com>
http://sowerbutts.com/8bit/
= Warning =
FLASH4 has been tested and confirmed working on:
* SBCv2
* N8-2312
* Mark IV SBC
However it remains somewhat experimental. If it works for you, please let me
know. If it breaks please also let me know so I can fix it! Until it is more
widely tested please ensure you have some other means to reprogram your flash
ROM before exclusively trusting FLASH4.
= Introduction =
FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to
or from an image file stored on a CP/M filesystem. It is intended for in-system
programming of Flash ROM chips on N8VEM Z80 and Z180 systems.
FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to
support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If
FLASH4 does not support your chip please let me know and I will try to add
support.
When writing to the Flash ROM chip, FLASH4 will only reprogram the sectors
whose contents have changed. This helps to reduce wear on the flash memory,
makes the reprogram operation faster, and reduces the risk of leaving the
system unbootable if power fails during a reprogramming operation. FLASH4
always performs a full verify operation after writing to the chip to confirm
that the correct data has been loaded.
FLASH4 is reasonably fast. Reprogramming and verifying every sector on a 512KB
SST 39F040 chip takes 21 seconds on my Mark IV SBC, versus 45 seconds to
perform the same task using a USB MiniPro TL866 EEPROM programmer under Linux
on my PC. If only a subset of sectors require reprogramming FLASH4 will be
even faster.
FLASH4 works with binary ROM image files, it does not support Intel Hex format
files. Hex files can be easily converted to or from binaries using "hex2bin" or
the "srec_cat" program from SRecord:
$ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary
$ srec_cat image.bin -binary -output image.hex -intel
FLASH4 can use three different methods to access the Flash ROM chip. The best
available method is determined automatically at run time. Alternatively you may
provide a command-line option to force the use of a specific method.
The first two methods use bank switching to map sections of the ROM into the
CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and
use the bank switching methods they provide.
If neither RomWBW nor UNA BIOS is detected and the system has a Z180 CPU,
FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This does not
require any bank switching but it is slower and will not work on all platforms.
Z180 DMA access requires the flash ROM to be linearly mapped into the lower
region of physical memory, as it is on the Mark IV SBC. The N8-2312 has
additional memory mapping hardware, consequently Z180 DMA access on the N8-2312
is NOT SUPPORTED and if forced will corrupt the contents of RAM; use bank
switched access instead.
Z180 DMA access requires the Z180 CPU I/O base control register configured to
locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1).
= Usage =
The three basic operations are:
FLASH4 WRITE filename [options]
This will rewrite the flash ROM contents from the named file. The file size
must exactly match the size of the ROM chip. After the write operation, a
verify operation will be performed automatically.
FLASH4 VERIFY filename [options]
This will read out the flash ROM contents and report if it matches the contents
of the named file. The file size must exactly match the size of the ROM chip.
FLASH4 READ filename [options]
This will read out the entire flash ROM contents and write it to the named
file.
If your ROM chip is larger than the image you wish to write, use the "/PARTIAL"
(or "/P") command line option. To avoid accidentally flashing the wrong file,
the image file must be an exact multiple of 32KB in length. The portion of the
ROM not occupied by the image file is left either unmodified or erased.
One of the following optional command line arguments may be specified at the
end of the command line to force FLASH4 to use a particular method to access
the flash ROM chip:
/ROMWBW
/UNABIOS
/Z180DMA
If no option is specified FLASH4 attempts to determine the best available
method automatically.
= Supported chips and features =
FLASH4 will interrogate your flash ROM chip to identify it automatically.
FLASH4 assumes that you have a single flash ROM device and it is located at the
bottom of the physical memory map.
FLASH4 does not support setting or resetting the protection bits on individual
sectors within Flash ROM devices. If your Flash ROM chip has protected sectors
you will need to unprotect them by other means before FLASH4 can erase and
reprogram them.
AT29C series chips employ an optional "software data protection" feature. This
is supported by FLASH4 and is left activated after programming the chip to
prevent accidental reprogramming of sectors.
The following chips are supported:
AT29F010
AT29F040
M29F010
M29F040
MX29F040
SST 39F010
SST 39F020
SST 39F040
AT29C512
AT29C040
AT29C010
AT29C020
The following chips are supported but have unequal sector sizes; FLASH4 will
only erase and reprogram the entire chip at once rather than its normal
sector-by-sector operation:
AT49F001NT
AT49F001N
AT49F002N
AT49F002NT
AT49F040
If you use a flash ROM chip that is not listed above please email me
(will@sowerbutts.com) and I will try to add support for it.
= Compiling =
The software is written in a mix of C and assembler. It builds using the SDCC
toolchain and the SRecord tools. A Makefile is provided to build the executable
in Linux and I imagine it can be easily modified to build in Windows.
You may need to adjust the path to the SDCC libraries in the Makefile if your
sdcc installation is not in /usr/local
= License =
FLASH4 is licensed under the The GNU General Public License version 3 (see
included "LICENSE.txt" file).
FLASH4 is provided with NO WARRANTY. In no event will the author be liable for
any damages. Use of this program is at your own risk. May cause rifts in space
and time.
FLASH4 (c) 2014 William R Sowerbutts <will@sowerbutts.com>
http://sowerbutts.com/8bit/
= Warning =
FLASH4 has been tested and confirmed working on:
* N8VEM SBCv2
* N8VEM N8-2312
* N8VEM Mark IV SBC
* DX-Designs P112
* ZETA SBC v2
However it remains somewhat experimental. If it works for you, please let me
know. If it breaks please also let me know so I can fix it!
= Introduction =
FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to
or from an image file stored on a CP/M filesystem. It is intended for in-system
programming of Flash ROM chips on Z80 and Z180 systems.
FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to
support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If
FLASH4 does not support your chip please let me know and I will try to add
support.
When writing to the Flash ROM chip, FLASH4 will only reprogram the sectors
whose contents have changed. This helps to reduce wear on the flash memory,
makes the reprogram operation faster, and reduces the risk of leaving the
system unbootable if power fails during a reprogramming operation. FLASH4
always performs a full verify operation after writing to the chip to confirm
that the correct data has been loaded.
FLASH4 is reasonably fast. Reprogramming and verifying every sector on a 512KB
SST 39F040 chip takes 21 seconds on my Mark IV SBC, versus 45 seconds to
perform the same task using a USB MiniPro TL866 EEPROM programmer under Linux
on my PC. If only a subset of sectors require reprogramming FLASH4 will be
even faster.
FLASH4 works with binary ROM image files, it does not support Intel Hex format
files. Hex files can be easily converted to or from binaries using "hex2bin" or
the "srec_cat" program from SRecord:
$ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary
$ srec_cat image.bin -binary -output image.hex -intel
FLASH4 can use several different methods to access the Flash ROM chip. The best
available method is determined automatically at run time. Alternatively you may
provide a command-line option to force the use of a specific method.
The first two methods use bank switching to map sections of the ROM into the
CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and
use the bank switching methods they provide.
On P112 systems the P112 B/P BIOS is detected and P112 bank switching is used.
If no bank switching method can be auto-detected, and the system has a Z180
CPU, FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This
does not require any bank switching but it is slower and will not work on all
platforms.
Z180 DMA access requires the flash ROM to be linearly mapped into the lower
region of physical memory, as it is on the Mark IV SBC (for example). The
N8-2312 has additional memory mapping hardware, consequently Z180 DMA access on
the N8-2312 is NOT SUPPORTED and if forced will corrupt the contents of RAM;
use one of the supported bank switching methods instead.
Z180 DMA access requires the Z180 CPU I/O base control register configured to
locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1).
= Usage =
The three basic operations are:
FLASH4 WRITE filename [options]
This will rewrite the flash ROM contents from the named file. The file size
must exactly match the size of the ROM chip. After the write operation, a
verify operation will be performed automatically.
FLASH4 VERIFY filename [options]
This will read out the flash ROM contents and report if it matches the contents
of the named file. The file size must exactly match the size of the ROM chip.
FLASH4 READ filename [options]
This will read out the entire flash ROM contents and write it to the named
file.
If your ROM chip is larger than the image you wish to write, use the "/PARTIAL"
(or "/P") command line option. To avoid accidentally flashing the wrong file,
the image file must be an exact multiple of 32KB in length. The portion of the
ROM not occupied by the image file is left either unmodified or erased.
If you are using an ROM/EPROM/EEPROM chip which cannot be programmed in-system,
FLASH4 will not be able to recognise it, however the software can still
usefully READ and VERIFY the chip. Use the "/ROM" command line option to enable
"READ" or "VERIFY" mode with unrecognised chips. This mode assumes a 512K ROM
is fitted; smaller ROMs will be treated as a 512K ROM with the data repated
multiple times -- with a 256K chip the data is repeated twice, four times for a
128K chip, etc.
One of the following optional command line arguments may be specified at the
end of the command line to force FLASH4 to use a particular method to access
the flash ROM chip:
/ROMWBW For ROMWBW BIOS version 2.6 and later
/ROMWBWOLD For ROMWBW BIOS version 2.5 and earlier
/UNABIOS For UNA BIOS
/Z180DMA For Z180 DMA
/P112 For DX-Designs P112
If no option is specified FLASH4 attempts to determine the best available
method automatically.
= Supported chips and features =
FLASH4 will interrogate your flash ROM chip to identify it automatically.
FLASH4 assumes that you have a single flash ROM device and it is located at the
bottom of the physical memory map.
FLASH4 does not support setting or resetting the protection bits on individual
sectors within Flash ROM devices. If your Flash ROM chip has protected sectors
you will need to unprotect them by other means before FLASH4 can erase and
reprogram them.
AT29C series chips employ an optional "software data protection" feature. This
is supported by FLASH4 and is left activated after programming the chip to
prevent accidental reprogramming of sectors.
The following chips are supported:
AT29F010
AT29F040
M29F010
M29F040
MX29F040
SST 39F010
SST 39F020
SST 39F040
AT29C512
AT29C040
AT29C010
AT29C020
The following chips are supported but have unequal sector sizes; FLASH4 will
only erase and reprogram the entire chip at once rather than its normal
sector-by-sector operation:
AT49F001NT
AT49F001N
AT49F002N
AT49F002NT
AT49F040
If you use a flash ROM chip that is not listed above please email me
(will@sowerbutts.com) and I will try to add support for it.
= Compiling =
The software is written in a mix of C and assembler. It builds using the SDCC
toolchain and the SRecord tools. A Makefile is provided to build the executable
in Linux and I imagine it can be easily modified to build in Windows.
You may need to adjust the path to the SDCC libraries in the Makefile if your
sdcc installation is not in /usr/local
= License =
FLASH4 is licensed under the The GNU General Public License version 3 (see
included "LICENSE.txt" file).
FLASH4 is provided with NO WARRANTY. In no event will the author be liable for
any damages. Use of this program is at your own risk. May cause rifts in space
and time.

BIN
Doc/Source/RomWBW Architecture.docx
View File

Binary file not shown.

2
Source/Apps/OSLdr.asm
View File

@ -227,7 +227,7 @@ init:
jr nz,init1 ; if not, not UNA
ld hl,unamod ; point to UNA mode flag
ld (hl),$ff ; set UNA mode
ld a,7 ; UNA platform ID
ld a,6 ; UNA platform ID
ld (bioplt),a ; save it
ld de,msgub ; point to UBIOS string

89
Source/BIOS/memmgr.asm
View File

@ -1,89 +0,0 @@
;==================================================================================================
; MEMORY BANK MANAGEMENT
;==================================================================================================
;
; SELECT THE REQUESTED 32K BANK OF RAM/ROM INTO THE LOWER 32K OF CPU ADDRESS SPACE.
; LOAD DESIRED BANK INDEX INTO A AND CALL BNKSEL.
;______________________________________________________________________________________________________________________
;
#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA))
BNKSEL:
OUT (MPCL_ROM),A
OUT (MPCL_RAM),A
RET
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; ZETA SBC V2 USES 16K PAGES. ANY PAGE CAN BE MAPPED TO ONE OF FOUR BANKS:
; BANK_0: 0K - 16K; BANK_1: 16K - 32K; BANK_2: 32K - 48K; BANK_3: 48K - 64K
; THIS BNKSEL EMULATES N8VEM / ZETA BEHAVIOR BY SETTING BANK_0 and BANK_1 TO
; TWO CONSECUTIVE PAGES
#IF (PLATFORM == PLT_ZETA2)
BNKSEL:
BIT 7,A
JR Z,BNKSEL_ROM ; JUMP IF IT IS A ROM PAGE
RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT
ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K
;
BNKSEL_ROM:
RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
OUT (MPGSEL_0),A ; BANK_0: 0K - 16K
INC A
OUT (MPGSEL_1),A ; BANK_1: 16K - 32K
RET
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_N8)
BNKSEL:
BIT 7,A
JR Z,BNKSEL_ROM
;
BNKSEL_RAM:
RES 7,A
RLCA
RLCA
RLCA
OUT0 (CPU_BBR),A
LD A,DEFACR | 80H
OUT0 (ACR),A
RET
;
BNKSEL_ROM:
OUT0 (RMAP),A
XOR A
OUT0 (CPU_BBR),A
LD A,DEFACR
OUT0 (ACR),A
RET
;
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#IF (PLATFORM == PLT_MK4)
BNKSEL:
RLCA
RLCA
RLCA
OUT0 (CPU_BBR),A
RET
#ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; NOTE: S2I HAS NO BANKED MEMORY!
; ALL FUNCTIONALITY IS NULLED OUT HERE.
;
#IF (PLATFORM == PLT_S2I)
BNKSEL:
RET
#ENDIF
;;;;;;;;;;;;;;;;;;;;
; EOF - MEMMGR.ASM ;
;;;;;;;;;;;;;;;;;;;;

125
Source/BIOS/mk4.inc
View File

@ -1,125 +0,0 @@
;
; MARK IV HARDWARE DEFINITIONS
;
#IF (Z180_CLKDIV == 0)
CPUKHZ .EQU CPUOSC / 2 ; OSCILLATOR FREQ / 2
#ENDIF
#IF (Z180_CLKDIV == 1)
CPUKHZ .EQU CPUOSC ; OSCILLATOR FREQ
#ENDIF
#IF (Z180_CLKDIV == 2)
CPUKHZ .EQU CPUOSC * 2 ; OSCILLATOR FREQ * 2
#ENDIF
;
CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ
;
CPU_BASE .EQU $40 ; ONLY RELEVANT FOR Z180
;
RAMBIAS .EQU 512 ; RAM STARTS AT 512K
;
MK4_BASE .EQU $80
;
MK4_IDE .EQU MK4_BASE + $00 ; IDE REGISTERS ($00-$07, $0E-$0F)
MK4_XAR .EQU MK4_BASE + $08 ; EXTERNAL ADDRESS REGISTER (XAR)
MK4_SD .EQU MK4_BASE + $09 ; SD CARD CONTROL REGISTER
MK4_RTC .EQU MK4_BASE + $0A ; RTC INTERFACE REGISTER
;
RTC .EQU MK4_RTC ; GENERIC ALIAS FOR RTC PORT
;
; DUMMY VALUES BELOW TO ALLOW DBGMON TO BUILD...
; NEED TO REMOVE AND CLEAN THIS UP LATER.
;
PPIBASE .EQU $00
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
; MEMORY BANK CONFIGURATION
;
BID_ROM0 .EQU $00
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAM0 .EQU $10
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK
BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK
BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK
BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.)
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.)
BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K
;
; Z180 REGISTERS
;
CPU_CNTLA0 .EQU CPU_BASE + $00 ; ASCI0 CONTROL A
CPU_CNTLA1 .EQU CPU_BASE + $01 ; ASCI1 CONTROL A
CPU_CNTLB0 .EQU CPU_BASE + $02 ; ASCI0 CONTROL B
CPU_CNTLB1 .EQU CPU_BASE + $03 ; ASCI1 CONTROL B
CPU_STAT0 .EQU CPU_BASE + $04 ; ASCI0 STATUS
CPU_STAT1 .EQU CPU_BASE + $05 ; ASCI1 STATUS
CPU_TDR0 .EQU CPU_BASE + $06 ; ASCI0 TRANSMIT
CPU_TDR1 .EQU CPU_BASE + $07 ; ASCI1 TRANSMIT
CPU_RDR0 .EQU CPU_BASE + $08 ; ASCI0 RECEIVE
CPU_RDR1 .EQU CPU_BASE + $09 ; ASCI1 RECEIVE
CPU_CNTR .EQU CPU_BASE + $0A ; CSI/O CONTROL
CPU_TRDR .EQU CPU_BASE + $0B ; CSI/O TRANSMIT/RECEIVE
CPU_TMDR0L .EQU CPU_BASE + $0C ; TIMER 0 DATA LO
CPU_TMDR0H .EQU CPU_BASE + $0D ; TIMER 0 DATA HI
CPU_RLDR0L .EQU CPU_BASE + $0E ; TIMER 0 RELOAD LO
CPU_RLDR0H .EQU CPU_BASE + $0F ; TIMER 0 RELOAD HI
CPU_TCR .EQU CPU_BASE + $10 ; TIMER CONTROL
;
CPU_ASEXT0 .EQU CPU_BASE + $12 ; ASCI0 EXTENSION CONTROL (Z8S180)
CPU_ASEXT1 .EQU CPU_BASE + $13 ; ASCI1 EXTENSION CONTROL (Z8S180)
;
CPU_TMDR1L .EQU CPU_BASE + $14 ; TIMER 1 DATA LO
CPU_TMDR1H .EQU CPU_BASE + $15 ; TIMER 1 DATA HI
CPU_RLDR1L .EQU CPU_BASE + $16 ; TIMER 1 RELOAD LO
CPU_RLDR1H .EQU CPU_BASE + $17 ; TIMER 1 RELOAD HI
CPU_FRC .EQU CPU_BASE + $18 ; FREE RUNNING COUNTER
CPU_ASTC0L .EQU CPU_BASE + $1A ; ASCI0 TIME CONSTANT LO (Z8S180)
CPU_ASTC0H .EQU CPU_BASE + $1B ; ASCI0 TIME CONSTANT HI (Z8S180)
CPU_ASTC1L .EQU CPU_BASE + $1C ; ASCI1 TIME CONSTANT LO (Z8S180)
CPU_ASTC1H .EQU CPU_BASE + $1D ; ASCI1 TIME CONSTANT HI (Z8S180)
CPU_CMR .EQU CPU_BASE + $1E ; CLOCK MULTIPLIER (LATEST Z8S180)
CPU_CCR .EQU CPU_BASE + $1F ; CPU CONTROL (Z8S180)
;
CPU_SAR0L .EQU CPU_BASE + $20 ; DMA0 SOURCE ADDR LO
CPU_SAR0H .EQU CPU_BASE + $21 ; DMA0 SOURCE ADDR HI
CPU_SAR0B .EQU CPU_BASE + $22 ; DMA0 SOURCE ADDR BANK
CPU_DAR0L .EQU CPU_BASE + $23 ; DMA0 DEST ADDR LO
CPU_DAR0H .EQU CPU_BASE + $24 ; DMA0 DEST ADDR HI
CPU_DAR0B .EQU CPU_BASE + $25 ; DMA0 DEST ADDR BANK
CPU_BCR0L .EQU CPU_BASE + $26 ; DMA0 BYTE COUNT LO
CPU_BCR0H .EQU CPU_BASE + $27 ; DMA0 BYTE COUNT HI
CPU_MAR1L .EQU CPU_BASE + $28 ; DMA1 MEMORY ADDR LO
CPU_MAR1H .EQU CPU_BASE + $29 ; DMA1 MEMORY ADDR HI
CPU_MAR1B .EQU CPU_BASE + $2A ; DMA1 MEMORY ADDR BANK
CPU_IAR1L .EQU CPU_BASE + $2B ; DMA1 I/O ADDR LO
CPU_IAR1H .EQU CPU_BASE + $2C ; DMA1 I/O ADDR HI
CPU_IAR1B .EQU CPU_BASE + $2D ; DMA1 I/O ADDR BANK (Z8S180)
CPU_BCR1L .EQU CPU_BASE + $2E ; DMA1 BYTE COUNT LO
CPU_BCR1H .EQU CPU_BASE + $2F ; DMA1 BYTE COUNT HI
CPU_DSTAT .EQU CPU_BASE + $30 ; DMA STATUS
CPU_DMODE .EQU CPU_BASE + $31 ; DMA MODE
CPU_DCNTL .EQU CPU_BASE + $32 ; DMA/WAIT CONTROL
CPU_IL .EQU CPU_BASE + $33 ; INTERRUPT VECTOR LOAD
CPU_ITC .EQU CPU_BASE + $34 ; INT/TRAP CONTROL
;
CPU_RCR .EQU CPU_BASE + $36 ; REFRESH CONTROL
;
CPU_CBR .EQU CPU_BASE + $38 ; MMU COMMON BASE REGISTER
CPU_BBR .EQU CPU_BASE + $39 ; MMU BANK BASE REGISTER
CPU_CBAR .EQU CPU_BASE + $3A ; MMU COMMON/BANK AREA REGISTER
;
CPU_OMCR .EQU CPU_BASE + $3E ; OPERATION MODE CONTROL
CPU_ICR .EQU $3F ; I/O CONTROL REGISTER (NOT RELOCATED!!!)

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;
; N8 HARDWARE DEFINITIONS
;
#IF (Z180_CLKDIV == 0)
CPUKHZ .EQU CPUOSC / 2 ; OSCILLATOR FREQ / 2
#ENDIF
#IF (Z180_CLKDIV == 1)
CPUKHZ .EQU CPUOSC ; OSCILLATOR FREQ
#ENDIF
#IF (Z180_CLKDIV == 2)
CPUKHZ .EQU CPUOSC * 2 ; OSCILLATOR FREQ * 2
#ENDIF
;
CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ
;
CPU_BASE .EQU $40 ; ONLY RELEVANT FOR Z180
;
RAMBIAS .EQU 0 ; RAM STARTS AT 0K
;
N8_BASE .EQU $80 ; CPU INTERNAL I/O REGISTER BASE (AFTER RELOCATION)
;
PPIBASE .EQU N8_BASE + $00
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
PPI2BASE .EQU N8_BASE + $04
PPI2A .EQU PPI2BASE + 0 ; PORT A
PPI2B .EQU PPI2BASE + 1 ; PORT B
PPI2C .EQU PPI2BASE + 2 ; PORT C
PPI2X .EQU PPI2BASE + 3 ; PPI CONTROL PORT
;
RTC: .EQU N8_BASE + $08 ; RTC LATCH AND BUFFER
;FDC: .EQU N8_BASE + $0C ; FLOPPY DISK CONTROLLER
;UTIL: .EQU N8_BASE + $10 ; FLOPPY DISK UTILITY
ACR: .EQU N8_BASE + $14 ; AUXILLARY CONTROL REGISTER
RMAP: .EQU N8_BASE + $16 ; ROM PAGE REGISTER
VDP: .EQU N8_BASE + $18 ; VIDEO DISPLAY PROCESSOR (TMS9918A)
PSG: .EQU N8_BASE + $1C ; PROGRAMMABLE SOUND GENERATOR (AY-3-8910)
;
DEFACR .EQU $1B
;
; MEMORY BANK CONFIGURATION
;
BID_ROM0 .EQU $00
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAM0 .EQU $80
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK
BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK
BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK
BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.)
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.)
BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K
;
; Z180 REGISTERS
;
CPU_CNTLA0 .EQU CPU_BASE + $00 ; ASCI0 CONTROL A
CPU_CNTLA1 .EQU CPU_BASE + $01 ; ASCI1 CONTROL A
CPU_CNTLB0 .EQU CPU_BASE + $02 ; ASCI0 CONTROL B
CPU_CNTLB1 .EQU CPU_BASE + $03 ; ASCI1 CONTROL B
CPU_STAT0 .EQU CPU_BASE + $04 ; ASCI0 STATUS
CPU_STAT1 .EQU CPU_BASE + $05 ; ASCI1 STATUS
CPU_TDR0 .EQU CPU_BASE + $06 ; ASCI0 TRANSMIT
CPU_TDR1 .EQU CPU_BASE + $07 ; ASCI1 TRANSMIT
CPU_RDR0 .EQU CPU_BASE + $08 ; ASCI0 RECEIVE
CPU_RDR1 .EQU CPU_BASE + $09 ; ASCI1 RECEIVE
CPU_CNTR .EQU CPU_BASE + $0A ; CSI/O CONTROL
CPU_TRDR .EQU CPU_BASE + $0B ; CSI/O TRANSMIT/RECEIVE
CPU_TMDR0L .EQU CPU_BASE + $0C ; TIMER 0 DATA LO
CPU_TMDR0H .EQU CPU_BASE + $0D ; TIMER 0 DATA HI
CPU_RLDR0L .EQU CPU_BASE + $0E ; TIMER 0 RELOAD LO
CPU_RLDR0H .EQU CPU_BASE + $0F ; TIMER 0 RELOAD HI
CPU_TCR .EQU CPU_BASE + $10 ; TIMER CONTROL
;
CPU_ASEXT0 .EQU CPU_BASE + $12 ; ASCI0 EXTENSION CONTROL (Z8S180)
CPU_ASEXT1 .EQU CPU_BASE + $13 ; ASCI1 EXTENSION CONTROL (Z8S180)
;
CPU_TMDR1L .EQU CPU_BASE + $14 ; TIMER 1 DATA LO
CPU_TMDR1H .EQU CPU_BASE + $15 ; TIMER 1 DATA HI
CPU_RLDR1L .EQU CPU_BASE + $16 ; TIMER 1 RELOAD LO
CPU_RLDR1H .EQU CPU_BASE + $17 ; TIMER 1 RELOAD HI
CPU_FRC .EQU CPU_BASE + $18 ; FREE RUNNING COUNTER
CPU_ASTC0L .EQU CPU_BASE + $1A ; ASCI0 TIME CONSTANT LO (Z8S180)
CPU_ASTC0H .EQU CPU_BASE + $1B ; ASCI0 TIME CONSTANT HI (Z8S180)
CPU_ASTC1L .EQU CPU_BASE + $1C ; ASCI1 TIME CONSTANT LO (Z8S180)
CPU_ASTC1H .EQU CPU_BASE + $1D ; ASCI1 TIME CONSTANT HI (Z8S180)
CPU_CMR .EQU CPU_BASE + $1E ; CLOCK MULTIPLIER (LATEST Z8S180)
CPU_CCR .EQU CPU_BASE + $1F ; CPU CONTROL (Z8S180)
;
CPU_SAR0L .EQU CPU_BASE + $20 ; DMA0 SOURCE ADDR LO
CPU_SAR0H .EQU CPU_BASE + $21 ; DMA0 SOURCE ADDR HI
CPU_SAR0B .EQU CPU_BASE + $22 ; DMA0 SOURCE ADDR BANK
CPU_DAR0L .EQU CPU_BASE + $23 ; DMA0 DEST ADDR LO
CPU_DAR0H .EQU CPU_BASE + $24 ; DMA0 DEST ADDR HI
CPU_DAR0B .EQU CPU_BASE + $25 ; DMA0 DEST ADDR BANK
CPU_BCR0L .EQU CPU_BASE + $26 ; DMA0 BYTE COUNT LO
CPU_BCR0H .EQU CPU_BASE + $27 ; DMA0 BYTE COUNT HI
CPU_MAR1L .EQU CPU_BASE + $28 ; DMA1 MEMORY ADDR LO
CPU_MAR1H .EQU CPU_BASE + $29 ; DMA1 MEMORY ADDR HI
CPU_MAR1B .EQU CPU_BASE + $2A ; DMA1 MEMORY ADDR BANK
CPU_IAR1L .EQU CPU_BASE + $2B ; DMA1 I/O ADDR LO
CPU_IAR1H .EQU CPU_BASE + $2C ; DMA1 I/O ADDR HI
CPU_IAR1B .EQU CPU_BASE + $2D ; DMA1 I/O ADDR BANK (Z8S180)
CPU_BCR1L .EQU CPU_BASE + $2E ; DMA1 BYTE COUNT LO
CPU_BCR1H .EQU CPU_BASE + $2F ; DMA1 BYTE COUNT HI
CPU_DSTAT .EQU CPU_BASE + $30 ; DMA STATUS
CPU_DMODE .EQU CPU_BASE + $31 ; DMA MODE
CPU_DCNTL .EQU CPU_BASE + $32 ; DMA/WAIT CONTROL
CPU_IL .EQU CPU_BASE + $33 ; INTERRUPT VECTOR LOAD
CPU_ITC .EQU CPU_BASE + $34 ; INT/TRAP CONTROL
;
CPU_RCR .EQU CPU_BASE + $36 ; REFRESH CONTROL
;
CPU_CBR .EQU CPU_BASE + $38 ; MMU COMMON BASE REGISTER
CPU_BBR .EQU CPU_BASE + $39 ; MMU BANK BASE REGISTER
CPU_CBAR .EQU CPU_BASE + $3A ; MMU COMMON/BANK AREA REGISTER
;
CPU_OMCR .EQU CPU_BASE + $3E ; OPERATION MODE CONTROL
CPU_ICR .EQU $3F ; I/O CONTROL REGISTER (NOT RELOCATED!!!)

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;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
CPUKHZ .EQU CPUOSC ; FOR SBC 1/2, CPUFREQ == OSCILLATOR FREQ
CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ
;
#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA))
MPCL_RAM .EQU $78 ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH (WRITE ONLY)
MPCL_ROM .EQU $7C ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH (WRITE ONLY)
#ENDIF
;
#IF (PLATFORM == PLT_ZETA2)
MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY)
MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY)
MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY)
MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY)
MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
#ENDIF
;
RTC .EQU $70 ; ADDRESS OF RTC LATCH AND INPUT PORT
;
; PPI 82C55 I/O IS DECODED TO PORT 60-67
;
PPIBASE .EQU $60
PPIA .EQU PPIBASE + 0 ; PORT A
PPIB .EQU PPIBASE + 1 ; PORT B
PPIC .EQU PPIBASE + 2 ; PORT C
PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
;
; 16C550 SERIAL LINE UART
;
SIO_BASE .EQU $68
SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
;
; MEMORY BANK CONFIGURATION
;
BID_ROM0 .EQU $00
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAM0 .EQU $80
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK
BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK
BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK
BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.)
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.)
BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K

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;
; CHARACTER DEVICES
;
CIODEV_UART .EQU $00
CIODEV_ASCI .EQU $10
CIODEV_VDU .EQU $20
CIODEV_CVDU .EQU $30
CIODEV_UPD7220 .EQU $40
CIODEV_N8V .EQU $50
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CONSOLE .EQU $C0
CIODEV_CRT .EQU $D0
CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_RF .EQU $20
DIODEV_IDE .EQU $30
DIODEV_ATAPI .EQU $40
DIODEV_PPIDE .EQU $50
DIODEV_SD .EQU $60
DIODEV_PRPSD .EQU $70
DIODEV_PPPSD .EQU $80
DIODEV_HDSK .EQU $90
;
; VDA DEVICES (VIDEO DISPLAY ADAPTER)
;
VDADEV_NONE .EQU $00 ; NO VDA DEVICE
VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMP)
VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED)
VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM

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; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg -
;
; The purpose of this file is to define generic symbols and to include
; the appropriate std-*.inc file to bring in platform specifics.
; There are four classes of systems supported by N8VEM.
; 1. N8VEM Platforms that include ECB interface
; 2. ZETA Genrally N8VEM-like, but no ECB
; 3. N8 Generally N8VEM-like bt 180 and extra embedded devices
; 4. S100 Assumes Z80 Master CPU Card
; All the classes require certain generic definitions, and these are
; defined here prior to the inclusion of platform specific .inc files.
; It is unfortunate, but all the possible config items must be defined
; here because the config gets read before the specific std-*.inc's
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
TRUE .EQU 1
FALSE .EQU 0
;
; PRIMARY HARDWARE PLATFORMS
;
PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
PLT_ZETA .EQU 2 ; ZETA Z80 SBC
PLT_ZETA2 .EQU 3 ; ZETA Z80 V2 SBC
PLT_N8 .EQU 4 ; N8 (HOME COMPUTER) Z180 SBC
PLT_MK4 .EQU 5
PLT_S2I .EQU 6 ; SCSI2IDE
PLT_S100 .EQU 7 ; S100COMPUTERS Z80 based system
PLT_UNA .EQU 8 ; UNA BIOS
;
; BOOT STYLE
;
BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
;
; RAM DISK INITIALIZATION OPTIONS
;
CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
;
; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
;
FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
;
; MEDIA ID VALUES
;
MID_NONE .EQU 0
MID_MDROM .EQU 1
MID_MDRAM .EQU 2
MID_RF .EQU 3
MID_HD .EQU 4
MID_FD720 .EQU 5
MID_FD144 .EQU 6
MID_FD360 .EQU 7
MID_FD120 .EQU 8
MID_FD111 .EQU 9
;
; FD MODE SELECTIONS
;
FDMODE_NONE .EQU 0 ; FD modes defined in std-*.inc
FDMODE_DIO .EQU 1 ; DISKIO V1
FDMODE_ZETA .EQU 2 ; ZETA
FDMODE_ZETA2 .EQU 3 ; ZETA V2
FDMODE_DIDE .EQU 4 ; DUAL IDE
FDMODE_N8 .EQU 5 ; N8
FDMODE_DIO3 .EQU 6 ; DISKIO V3
;
; IDE MODE SELECTIONS
;
IDEMODE_NONE .EQU 0
IDEMODE_DIO .EQU 1 ; DISKIO V1
IDEMODE_DIDE .EQU 2 ; DUAL IDE
IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT)
;
; PPIDE MODE SELECTIONS
;
PPIDEMODE_NONE .EQU 0
PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
PPIDEMODE_MFP .EQU 3 ; MULTIFUNCTION / PIC
;
; SD MODE SELECTIONS
;
SDMODE_NONE .EQU 0
SDMODE_JUHA .EQU 1 ; JUHA MINI BOARD
SDMODE_N8 .EQU 2 ; N8-2511, UNMODIFIED
SDMODE_CSIO .EQU 3 ; N8-2312 OR N8-2511 MODIFIED
SDMODE_PPI .EQU 4 ; PPISD MINI BOARD
SDMODE_UART .EQU 5 ; S2ISD
SDMODE_DSD .EQU 6 ; DUAL SD
SDMODE_MK4 .EQU 7 ; MARK IV
;
; CONSOLE TERMINAL TYPE CHOICES
;
TERM_TTY .EQU 0
TERM_ANSI .EQU 1
TERM_WYSE .EQU 2
TERM_VT52 .EQU 3
;
; EMULATION TYPES
;
EMUTYP_NONE .EQU 0
EMUTYP_TTY .EQU 1
EMUTYP_ANSI .EQU 2
;
; SCSI DEVICE PERSONALITY CHOICES
;
S2I_PER_N8VEM .EQU 1
S2I_PER_ST125N .EQU 2
;
; SYSTEM GENERATION SETTINGS
;
SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
;
DOS_BDOS .EQU 1 ; BDOS
DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
DOS_ZSDOS .EQU 3 ; ZSDOS
;
CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
;
; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
;
#IFNDEF BLD_SYS
SYS .EQU SYS_CPM
#ELSE
SYS .EQU BLD_SYS
#ENDIF
;
#IF (SYS == SYS_CPM)
DOS .EQU DOS_BDOS
CP .EQU CP_CCP
#DEFINE OSLBL "CP/M-80 2.2"
#ENDIF
;
#IF (SYS == SYS_ZSYS)
DOS .EQU DOS_ZSDOS
CP .EQU CP_ZCPR
#DEFINE OSLBL "ZSDOS 1.1"
#ENDIF
;
; INCLUDE VERSION AND BUILD SETTINGS
;
#INCLUDE "ver.inc" ; ADD BIOSVER
;
#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
;
; INCLUDE PLATFORM SPECIFIC HARDWARE DEFINITIONS
;
#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2))
#INCLUDE "n8vem.inc"
#ENDIF
;
#IF (PLATFORM == PLT_S2I)
#INCLUDE "s2i.inc"
#ENDIF
;
#IF (PLATFORM == PLT_N8)
#INCLUDE "n8.inc"
#ENDIF
;
#IF (PLATFORM == PLT_MK4)
#INCLUDE "mk4.inc"
#ENDIF
;
#IF (PLATFORM == PLT_UNA)
#INCLUDE "una.inc"
#ENDIF
;
#IF (PLATFORM == PLT_S100)
;
#DEFINE S100_IOB ; WBW: FORCED ON TO MAKE BUILD WORK!
;
#IFDEF S100_CPU
#INCLUDE "S100CPU.INC"
#ENDIF
;
#IFDEF S100_IOB
#INCLUDE "S100IOB.INC"
#ENDIF
;
#IFDEF S100_RRF
#INCLUDE "S100RRF.INC"
#ENDIF
;
#IFDEF S100_DIDE
#INCLUDE "S100DIDE.INC"
#ENDIF
;
#ENDIF
;
; CHARACTER DEVICE FUNCTIONS
;
CF_INIT .EQU 0
CF_IN .EQU 1
CF_IST .EQU 2
CF_OUT .EQU 3
CF_OST .EQU 4
;
; DISK OPERATIONS
;
DOP_READ .EQU 0 ; READ OPERATION
DOP_WRITE .EQU 1 ; WRITE OPERATION
DOP_FORMAT .EQU 2 ; FORMAT OPERATION
DOP_READID .EQU 3 ; READ ID OPERATION
;
; DISK DRIVER FUNCTIONS
;
DF_READY .EQU 1
DF_SELECT .EQU 2
DF_READ .EQU 3
DF_WRITE .EQU 4
DF_FORMAT .EQU 5
;
; BIOS FUNCTIONS
;
#IF (PLATFORM == PLT_UNA)
BF_CIO .EQU $10
BF_CIOIN .EQU BF_CIO + 1 ; CHARACTER INPUT
BF_CIOOUT .EQU BF_CIO + 2 ; CHARACTER OUTPUT
BF_CIOIST .EQU BF_CIO + 3 ; CHARACTER INPUT STATUS
BF_CIOOST .EQU BF_CIO + 4 ; CHARACTER OUTPUT STATUS
;
BF_DIO .EQU $40
BF_DIORD .EQU BF_DIO + 2 ; DISK READ
BF_DIOWR .EQU BF_DIO + 3 ; DISK WRITE
#ELSE
BF_CIO .EQU $00
BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT
BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT
BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS
BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS
BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG
BF_CIOGETCNT .EQU BF_CIO + 8 ; CHARACTER DEVICE COUNT
BF_CIOGETINF .EQU BF_CIO + 9 ; CHARACTER DEVICE INFO
;
BF_DIO .EQU $10
BF_DIORD .EQU BF_DIO + 0 ; DISK READ
BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE
BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS
BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA
BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY
BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR
BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR
BF_DIODEVCNT .EQU BF_DIO + 10 ; DISK DEVICE COUNT
BF_DIODEVINF .EQU BF_DIO + 11 ; DISK DEVICE INFO
;
BF_RTC .EQU $20
BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME
BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME
BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX
BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX
BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK
BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK
;
BF_EMU .EQU $30
BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT
BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT
BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS
BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS
BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG
BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION
BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS
;
BF_VDA .EQU $40
BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU
BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS
BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU
BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE
BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION
BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE
BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR
BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER
BF_VDAFIL .EQU BF_VDA + 8 ; FILL
BF_VDACPY .EQU BF_VDA + 9 ; COPY
BF_VDASCR .EQU BF_VDA + 10 ; SCROLL
BF_VDAKST .EQU BF_VDA + 11 ; GET KEYBOARD STATUS
BF_VDAKFL .EQU BF_VDA + 12 ; FLUSH KEYBOARD BUFFER
BF_VDAKRD .EQU BF_VDA + 13 ; READ KEYBOARD
;
BF_SYS .EQU $F0
BF_SYSSETBNK .EQU BF_SYS + 0 ; SET CURRENT BANK
BF_SYSGETBNK .EQU BF_SYS + 1 ; GET CURRENT BANK
BF_SYSCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK
BF_SYSXCPY .EQU BF_SYS + 3 ; EXTENDED COPY SETUP
BF_SYSATTR .EQU BF_SYS + 4 ; GET/SET SYSTEM ATTRIBUTE VALUE
;BF_SYSXXXX .EQU BF_SYS + 5 ;
BF_SYSGETVER .EQU BF_SYS + 6 ; GET VERSION OF HBIOS
#ENDIF
;
; SYSTEM ATTRIBUTE IDS
;
AID_BOOTVOL .EQU 0 ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU
AID_BOOTROM .EQU 0 ; BANK ID OF ROM PAGE BOOTED
;
; MEMORY LAYOUT
;
SYS_SIZ .EQU $3000 ; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY)
HBBUF_SIZ .EQU 1024 ; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K
HBX_SIZ .EQU $200 ; HBIOS PROXY SIZE (SUBJECT TO CHANGE)
CPM_SIZ .EQU SYS_SIZ - HBX_SIZ ; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY)
CCP_SIZ .EQU $800 ; INVARIANT SIZE OF CCP
BDOS_SIZ .EQU $E00 ; INVARIANT SIZE OF BDOS
CBIOS_SIZ .EQU CPM_SIZ - CCP_SIZ - BDOS_SIZ ; CBIOS IS THE REMAINDER
MEMTOP .EQU $10000 ; INVARIANT TOP OF Z80 ADDRESSABLE MEMORY
BNKTOP .EQU $8000 ; BANK MEMORY BARRIER
HBX_IMG .EQU $200 ; LOC OF HBX IMAGE IN HBIOS IMAGE BANK
HBBUF_END .EQU BNKTOP ; END OF PHYSICAL DISK BUFFER IN HBIOS
HBBUF_LOC .EQU HBBUF_END - HBBUF_SIZ ; START OF PHYSICAL DISK BUFFER
HBX_END .EQU MEMTOP ; END OF HBIOS PROXY
HBX_LOC .EQU HBX_END - HBX_SIZ ; START OF HBIOS PROXY
CPM_END .EQU HBX_LOC ; END OF CPM COMPONENTS (INCLUDING CBIOS)
CPM_LOC .EQU CPM_END - CPM_SIZ ; START OF CPM COMPONENTS
CBIOS_END .EQU HBX_LOC ; END OF CBIOS
CBIOS_LOC .EQU CBIOS_END - CBIOS_SIZ ; START OF CBIOS
BDOS_END .EQU CBIOS_LOC ; END OF BDOS
BDOS_LOC .EQU BDOS_END - BDOS_SIZ ; START OF BDOS
CCP_END .EQU BDOS_LOC ; END OF CCP
CCP_LOC .EQU CCP_END - CCP_SIZ ; START OF CCP
CPM_ENT .EQU CBIOS_LOC ; CPM ENTRY POINT (IN CBIOS)
CCP_ENT .EQU CPM_LOC ; COMMAND PROCESSOR ENTRY POINT (IN CCP)
MON_LOC .EQU $C000 ; LOCATION OF MONITOR FOR RUNNING SYSTEM
MON_SIZ .EQU $1000 ; SIZE OF MONITOR BINARY IMAGE
MON_END .EQU MON_LOC + MON_SIZ ; END OF MONITOR
MON_DSKY .EQU MON_LOC + (0 * 3) ; MONITOR ENTRY (DSKY)
MON_SERIAL .EQU MON_LOC + (1 * 3) ; MONITOR ENTRY (SERIAL PORT)
CBIOS_BOOT .EQU CBIOS_LOC + (0 * 3)
CBIOS_WBOOT .EQU CBIOS_LOC + (1 * 3)
CBIOS_CONST .EQU CBIOS_LOC + (2 * 3)
CBIOS_CONIN .EQU CBIOS_LOC + (3 * 3)
CBIOS_CONOUT .EQU CBIOS_LOC + (4 * 3)
CBIOS_LIST .EQU CBIOS_LOC + (5 * 3)
CBIOS_PUNCH .EQU CBIOS_LOC + (6 * 3)
CBIOS_READER .EQU CBIOS_LOC + (7 * 3)
CBIOS_HOME .EQU CBIOS_LOC + (8 * 3)
CBIOS_SELDSK .EQU CBIOS_LOC + (9 * 3)
CBIOS_SETTRK .EQU CBIOS_LOC + (10 * 3)
CBIOS_SETSEC .EQU CBIOS_LOC + (11 * 3)
CBIOS_SETDMA .EQU CBIOS_LOC + (12 * 3)
CBIOS_READ .EQU CBIOS_LOC + (13 * 3)
CBIOS_WRITE .EQU CBIOS_LOC + (14 * 3)
CBIOS_LISTST .EQU CBIOS_LOC + (15 * 3)
CBIOS_SECTRN .EQU CBIOS_LOC + (16 * 3)
;
CDISK: .EQU 4 ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P
IOBYTE: .EQU 3 ; LOC IN PAGE 0 OF I/O DEFINITION BYTE
;
; HBIOS PROXY COMMON DATA BLOCK
; EXACTLY 32 BYTES AT $FFE0-$FFFF
;
HBX_XFC .EQU $10000 - $20 ; HBIOS PROXY INTERFACE AREA, 32 BYTES FIXED
;
HBX_XFCDAT .EQU HBX_XFC ; DATA PORTION OF HBIOX PROXY INTERFACE AREA
HB_CURBNK .EQU HBX_XFCDAT + 0 ; CURRENTLY ACTIVE LOW MEMORY BANK ID
;HB_PRVBNK .EQU HBX_XFCDAT + 1 ; PREVIOUS BANK (DEPRECATED)
HB_SRCADR .EQU HBX_XFCDAT + 2 ; BNKCPY: DESTINATION BANK ID
HB_SRCBNK .EQU HBX_XFCDAT + 4 ; BNKCPY: SOURCE BANK ID
HB_DSTADR .EQU HBX_XFCDAT + 5 ; BNKCPY: DESTINATION ADDRESS
HB_DSTBNK .EQU HBX_XFCDAT + 7 ; BNKCPY: SOURCE ADDRESS
HB_CNT .EQU HBX_XFCDAT + 8 ; BNKCPY: COUNT
;
HBX_XFCFNS .EQU HBX_XFC + $10 ; JUMP TABLE PORTION OF HBIOS PROXY INTERFACE AREA
HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION
HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID
HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY
HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL
;HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START (DEPRECATED)
HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK
;
;
;
#IF (PLATFORM == PLT_N8VEM)
#DEFINE PLATFORM_NAME "N8VEM Z80"
#ENDIF
#IF (PLATFORM == PLT_ZETA)
#DEFINE PLATFORM_NAME "ZETA Z80"
#ENDIF
#IF (PLATFORM == PLT_ZETA2)
#DEFINE PLATFORM_NAME "ZETA Z80 V2"
#ENDIF
#IF (PLATFORM == PLT_N8)
#DEFINE PLATFORM_NAME "N8 Z180"
#ENDIF
#IF (PLATFORM == PLT_MK4)
#DEFINE PLATFORM_NAME "MARK IV Z180"
#ENDIF
#IF (PLATFORM == PLT_S2I)
#DEFINE PLATFORM_NAME "SCSI2IDE Z80"
#ENDIF
#IF (PLATFORM == PLT_S100)
#DEFINE PLATFORM_NAME "S100"
#ENDIF
#IF (PLATFORM == PLT_UNA)
#DEFINE PLATFORM_NAME "UNA"
#ENDIF
;
; HELPER MACROS
;
#DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X')
#DEFINE PRTS(S) CALL PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO")
#DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)
;
#DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X')
#DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO")
#DEFINE XIO_PRTX(X) CALL XIO_PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)

5
Source/BIOS/ver.inc
View File

@ -1,5 +0,0 @@
#DEFINE RMJ 2
#DEFINE RMN 7
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "2.7.1"

8
Source/BPBIOS/@WBW Z3ENV.txt
View File

@ -109,9 +109,15 @@ Ext FCB FDD0 FDD0 F9D0 E9D0 FDD0
Ext Stack FFD0 FFD0 FBB0 EBB0 FFB0
Type X: All segments shifted down by size of HBIOS Proxy (1K)
Type X: All segments shifted down by size of HBIOS Proxy (1024 bytes)
Type T: Segments rearranged to allow space for HBIOS Proxy
FC00-FFFF --> EA00-EBFF
Environment, Cmd Line, Named Dirs, Ext Path, Shell Stack, Msg Buffer, Ext FCB, Ext Stack
Type N: Frees up HBIOS interface area at FFE0-FFFF by shrinking Cmd Line and shifting
Ext Stack down by 32 bytes
If built with INTPXY=NO, then LDSYS BP34T, BP34TBNK, or BP41T
If built with INTPXY=YES, then LDSYS BP33N, BP33NBNK, BP34N, BP34NBNK, or BP41N

68
Source/BPBIOS/Build.cmd
View File

@ -12,15 +12,15 @@ rem
rem Z33 + ZSDOS11 w/ Non-banked BPBIOS
rem
copy def-z33.lib def-dx.lib
copy icfg-z33.z80 icfg-dx.z80
zx ZMAC -BPBIO-DX -/P
echo ErrorLevel: %ERRORLEVEL%
copy def-ww-z33.lib def-ww.lib
zx ZMAC -BPBIO-WW -/P
if exist bp33.prn del bp33.prn
ren bpbio-ww.prn bp33.prn
pause
if exist bp33.rel del bp33.rel
ren bpbio-dx.rel bp33.rel
ren bpbio-ww.rel bp33.rel
if exist bpsys.img del bpsys.img
zx bpbuild -bp33.dat <bpbld1.rsp
@ -58,18 +58,19 @@ if exist bpsys.$$$ del bpsys.$$$
if exist bp33n.img del bp33n.img
if exist bpsys.img ren bpsys.img bp33n.img
REM goto :startup
rem goto :startup
rem
rem Z33 + ZSDOS11 w/ Banked BPBIOS
rem
copy def-z33bnk.lib def-dx.lib
copy icfg-z33.z80 icfg-dx.z80
zx ZMAC -BPBIO-DX -/P
copy def-ww-z33bnk.lib def-ww.lib
zx ZMAC -BPBIO-WW -/P
if exist bp33bnk.prn del bp33bnk.prn
ren bpbio-ww.prn bp33bnk.prn
if exist bp33bnk.rel del bp33bnk.rel
ren bpbio-dx.rel bp33bnk.rel
ren bpbio-ww.rel bp33bnk.rel
if exist bpsys.img del bpsys.img
zx bpbuild -bp33bnk.dat <bpbld1.rsp
@ -111,12 +112,13 @@ rem
rem Z34 + ZSDOS11 w/ Non-banked BPBIOS
rem
copy def-z34.lib def-dx.lib
copy icfg-z34.z80 icfg-dx.z80
zx ZMAC -BPBIO-DX -/P
copy def-ww-z34.lib def-ww.lib
zx ZMAC -BPBIO-WW -/P
if exist bp34.prn del bp34.prn
ren bpbio-ww.prn bp34.prn
if exist bp34.rel del bp34.rel
ren bpbio-dx.rel bp34.rel
ren bpbio-ww.rel bp34.rel
if exist bpsys.img del bpsys.img
zx bpbuild -bp34.dat <bpbld1.rsp
@ -154,16 +156,19 @@ if exist bpsys.$$$ del bpsys.$$$
if exist bp34n.img del bp34n.img
if exist bpsys.img ren bpsys.img bp34n.img
rem goto :startup
rem
rem Z34 + ZSDOS11 w/ Banked BPBIOS
rem
copy def-z34bnk.lib def-dx.lib
copy icfg-z34.z80 icfg-dx.z80
zx ZMAC -BPBIO-DX -/P
copy def-ww-z34bnk.lib def-ww.lib
zx ZMAC -BPBIO-WW -/P
if exist bp34bnk.prn del bp34bnk.prn
ren bpbio-ww.prn bp34bnk.prn
if exist bp34bnk.rel del bp34bnk.rel
ren bpbio-dx.rel bp34bnk.rel
ren bpbio-ww.rel bp34bnk.rel
if exist bpsys.img del bpsys.img
zx bpbuild -bp34bnk.dat <bpbld1.rsp
@ -205,12 +210,13 @@ rem
rem Z41 + ZSDOS2 w/ Banked BPBIOS
rem
copy def-z41.lib def-dx.lib
copy icfg-z41.z80 icfg-dx.z80
zx ZMAC -BPBIO-DX -/P
copy def-ww-z41.lib def-ww.lib
zx ZMAC -BPBIO-WW -/P
if exist bp41.prn del bp41.prn
ren bpbio-ww.prn bp41.prn
if exist bp41.rel del bp41.rel
ren bpbio-dx.rel bp41.rel
ren bpbio-ww.rel bp41.rel
if exist bpsys.img del bpsys.img
zx bpbuild -bp41.dat <bpbld1.rsp
@ -252,16 +258,16 @@ if exist bpsys.img ren bpsys.img bp41n.img
pause
cpmrm.exe -f wbw_hd0 ../../hd0.img 0:ws*.*
cpmrm.exe -f wbw_hd0 ../../Output/hd0.img 0:ws*.*
cpmrm.exe -f wbw_hd0 ../../hd0.img 0:*.img
cpmcp.exe -f wbw_hd0 ../../hd0.img *.img 0:
cpmrm.exe -f wbw_hd0 ../../Output/hd0.img 0:*.img
cpmcp.exe -f wbw_hd0 ../../Output/hd0.img *.img 0:
cpmrm.exe -f wbw_hd0 ../../hd0.img 0:*.rel
cpmcp.exe -f wbw_hd0 ../../hd0.img *.rel 0:
cpmrm.exe -f wbw_hd0 ../../Output/hd0.img 0:*.rel
cpmcp.exe -f wbw_hd0 ../../Output/hd0.img *.rel 0:
cpmrm.exe -f wbw_hd0 ../../hd0.img 0:*.zex
cpmcp.exe -f wbw_hd0 ../../hd0.img *.zex 0:
cpmrm.exe -f wbw_hd0 ../../Output/hd0.img 0:*.zex
cpmcp.exe -f wbw_hd0 ../../Output/hd0.img *.zex 0:
cpmrm.exe -f wbw_hd0 ../../hd0.img 0:myterm.z3t
cpmcp.exe -f wbw_hd0 ../../hd0.img myterm.z3t 0:myterm.z3t
cpmrm.exe -f wbw_hd0 ../../Output/hd0.img 0:myterm.z3t
cpmcp.exe -f wbw_hd0 ../../Output/hd0.img myterm.z3t 0:myterm.z3t

50
Source/BPBIOS/bpbio-dx.z80
View File

@ -74,10 +74,6 @@ YES EQU TRUE
; << Insert DEF-xxxx.LIB definition >>
INCLUDE DEF-DX.LIB ; << file for your configuration. >>
; << ****** SYSTEM SPECIFIC ****** >>
; << Insert DEF-xxxx.LIB definition >>
INCLUDE DEF-WW.LIB ; << file for your configuration. >>
CSEG
;.....
; Ascii Character Equates
@ -98,7 +94,7 @@ WRUAL EQU 2 ; DOS code for unallocated write
LOCKF EQU LOW [NOT AUTOSL] ;Lock flag for format default
ALONE EQU FALSE ; Boot code equate
IF Z3
MACLIB Z3BASE.LIB ; Include ENV definitions
MACLIB Z3BASE ; Include ENV definitions
ENDIF
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
@ -240,7 +236,7 @@ MXFALC EQU 880 ; If High Density or 8" drives can be handled,
COMMON /BANK2/
ENDIF
DPB: ; Marker for DPB start
;.XLIST ; Don't print these due to size
.XLIST ; Don't print these due to size
IF AUTOSL
INCLUDE DPB.LIB ; Default selection of common DD formats
IF FLOPYH
@ -260,13 +256,13 @@ DPB: ; Marker for DPB start
NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's
CSEG ; Hard & Ramdisk DPBs and DPHs go in Code Seg
;.xlist
.xlist
IF HARDDSK
; << ****** Hardware Specific ****** >>
; << Insert DPB Info for Hard Disk >>
INCLUDE DPBHD-WW.LIB ; << Drives as DPBHD-xx.LIB >>
INCLUDE DPBHD-DX.LIB ; << Drives as DPBHD-xx.LIB >>
ENDIF
;.list
.list
IF RAMDSK
; << ****** Hardware Specific ****** >>
; << Insert DPB Info for RAM Disk >>
@ -274,11 +270,11 @@ NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's
ENDIF
PAGE
INCLUDE DPH.LIB ; Disk parameter headers
;.xlist
.xlist
IF HARDDSK
INCLUDE DPHHD.LIB ; Insert DPH Info for Hard Disk Partitions
ENDIF
;.list
.list
IF RAMDSK
INCLUDE DPHM.LIB ; Insert DPH Info for RAM Disk
ENDIF
@ -294,9 +290,6 @@ NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
CSEG
DIRDIO:
; CALL PRINT
; DEFB '[DIRDIO',']'+80H
IF BANKED
CALL BIOSTK
CALL GOSYSB ; Bank in the system bank
@ -401,11 +394,7 @@ MAXHFN EQU [$-HDFUNC]/2
IF BANKED ; << ****** HARDWARE SPECIFIC ****** >>
; << Enter the Inter-Bank Movement >>
IF HBIOS
INCLUDE IBMV-WW.Z80 ; << routines in IBMV-xxx.Z80 >>
ELSE
INCLUDE IBMV-DX.Z80 ; << routines in IBMV-xxx.Z80 >>
ENDIF
ELSE ; If Not Banked, Use these hooks
@ -461,8 +450,6 @@ RETBIO: LD BC,BIOSJT ; Get address of bios base
; Return DPH Table Address
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
INCLUDE UTIL.Z80
DRVTBL: LD HL,DPHTBL ; Point to DPH table
RET
@ -489,22 +476,14 @@ DRVTBL: LD HL,DPHTBL ; Point to DPH table
PAGE
; << ****** Hardware Specific ****** >>
; << Enter routines for your timer >>
INCLUDE TIM-WW.Z80 ; << and clock in TIM-xxxx.Z80 >>
INCLUDE TIM-DX.Z80 ; << and clock in TIM-xxxx.Z80 >>
PAGE
IF HARDDSK ; << ****** Hardware Specific ****** >>
IF SCSI ; << Enter driver routines for your >>
INCLUDE HARD-DX.Z80 ; << Hard Disk in HARD-xxx.Z80 >>
ENDIF
IF IDE
INCLUDE HARDIDE.Z80
ENDIF
IF HDSK
IF HBIOS
INCLUDE HARDHB.Z80
ELSE
INCLUDE HARDSIM.Z80
ENDIF
IF IDE ; << Enter driver routines for your >>
INCLUDE HARDIDE.Z80 ; << Hard Disk in HARD-xxx.Z80 >>
ELSE
INCLUDE HARD-DX.Z80
ENDIF
PAGE
ENDIF
@ -513,14 +492,9 @@ DRVTBL: LD HL,DPHTBL ; Point to DPH table
INCLUDE RAMD-DX.Z80 ; << Enter driver routines for RAM >>
PAGE ; << Disk in RAMD-xxx.Z80 >>
ENDIF
; << ****** Hardware Specific ****** >>
; << Enter Warm Boot routines in >>
INCLUDE WBOOT-DX.Z80 ; << WBOOT-xx.Z80 >>
; << ****** Hardware Specific ****** >>
; << HBIOS interface routines in >>
INCLUDE HBIOS.Z80 ; << HBIOS.Z80 >>
;.....
; Status bytes of general use placed at end of Data area

599
Source/BPBIOS/bpbio-ww.z80
View File

@ -0,0 +1,599 @@
;*****************************************************************************
; BP-BIOS. Banked, Portable BIOS.
; Copyright (c) 1989-93 by Cameron W. Cotrill and Harold F. Bower
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2 of the License, or (at
; your option) any later version.
;
; This program is distributed in the hope that it will be useful, but
; WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
; General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
;
;----------------------------------------------------------------------------
; This BIOS is broken into modules that allow it to be ported across a
; wide variety of Z80 compatible systems. All hardware specific drivers
; are isolated to separate modules. All hardware independent modules (such
; as deblocking and IO redirection) are similarly broken out.
;
; The BP BIOS supports IOBYTE, but in a unique manner. Four physical devices
; are defined - COM1, COM2, PIO, and NULL. These are assigned to the CON,
; AUXIN, AUXOUT, and LST logical devices by the I/O byte. The NULL device is
; a bit bucket for output, and returns nulls for input.
;
; IOBYTE DESCRIPTION: LIST AUXOUT AUXIN CON
; D7->D0 XX XX XX XX
;
; XX: 00=COM1 01=COM2 10=PIO 11=NULL
;
;+++++++++++++++++ D-X Designs Pty Ltd P112 Version ++++++++++++++++++
;
; This configuration of the B/P Bios is for Dave Brooks' Project 112 Single
; board computer. Multifunction chips on the board provide the services
; needed by a CP/M BIOS. The primary chips and the functions provided are:
;
; Zilog Z80182 Z180 Core CPU, MMU, DMA
; ESCC #1 COM1 Serial Port w/handshake signals, RS-232
; ESCC #2 (available on header, coded as expansion)
; ASCI0, ASCI1 (Serial async, available on header, expansion)
; CTC1 Optional 'heartbeat' clock, GP timer
;
; SMC FDC37C665 Enhanced 765-derivative Floppy Disk Controller
; COM2 - 16550-compatible Serial, RS-232
; PAR1 - Centronics Parallel port (Printer)
;
; Dallas DS-1202 Primary Realtime clock
; Non-volatile battery-backed RAM (config data)
;
; 28F256 Flash ROM Boot code, device initialization
; (onboard programmable)
; 32/128/512 KB Static RAM
;
; Ver Date Revision Description
; --- --------- ------------------------
; 1.3 28 Aug 01 - Scrubbed for GPL Release. HFB
; 1.2 - 30 Aug 97 - Expanded SCSI CDB length to 12 bytes for CDROM. HFB
; 1.1 - 11 May 97 - Added IDE Hard Drive instead of Normal SCSI, updated
; files to latest version. HFB
; 1.0 - 13 Aug 96 - Initial Release for P112 from YASBEC release. HFB
;*****************************************************************************
NAME BPBIO
FALSE EQU 0
TRUE EQU NOT FALSE
NO EQU FALSE
YES EQU TRUE
; << ****** SYSTEM SPECIFIC ****** >>
; << Insert DEF-xxxx.LIB definition >>
INCLUDE DEF-WW.LIB ; << file for your configuration. >>
; << ****** SYSTEM SPECIFIC ****** >>
; << Insert DEF-xxxx.LIB definition >>
INCLUDE ROMWBW.LIB ; << file for your configuration. >>
CSEG
;.....
; Ascii Character Equates
ETX EQU 03H ; End-of-Text
ACK EQU 06H ; Acknowledge
BELL EQU 07H ; Bell Character
CR EQU 0DH
LF EQU 0AH
XON EQU 11H ; X-On (Control-Q)
XOFF EQU 13H ; X-Off (Control-S)
ESC EQU 1BH
; Miscellaneous Equates
WRUAL EQU 2 ; DOS code for unallocated write
LOCKF EQU LOW [NOT AUTOSL] ;Lock flag for format default
ALONE EQU FALSE ; Boot code equate
IF Z3
MACLIB Z3BASE.LIB ; Include ENV definitions
ENDIF
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; BIOS Entry Jump Table - This MUST be in Common Memory
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
CSEG
BIOSJT: JP CBOOT ; 00 Cold Boot
JP WBOOT ; 01 Warm Boot
JP CONST ; 02 console input status * (IOP+12)
JP CONIN ; 03 console input * (IOP+15)
JP CONOUT ; 04 console output * (IOP+18)
JP LIST ; 05 list output * (IOP+21)
JP AUXOUT ; 06 aux out (punch) * (IOP+24)
JP AUXIN ; 07 aux in (reader) * (IOP+27)
JP HOME ; 08 seek track 0
JP SELDSK ; 09 select logical drive
JP SETTRK ; 10 select track
JP SETSEC ; 11 select sector
JP SETDMA ; 12 set dma address for disk xfer
JP READ ; 13 disk read
JP WRITE ; 14 disk write
JP LISTST ; 15 list output status * (IOP+30)
JP SECTRN ; 16 logical -> physical sector xlate
; --- <<< End of CP/M 2.2 Vectors >>>
JP CONOST ; 17 Console Output Status
JP AUXIST ; 18 Aux Input Status
JP AUXOST ; 19 Aux Output Status
JP DEVTBL ; 20 CP/M 3 Device Table
JP DEVINI ; 21 Character Device Init (Near CP/M 3)
JP DRVTBL ; 22 DPH Pointer Table for A-P
JP 0 ; 23 RESERVED FOR MULTIO
JP FLUSH ; 24 Flush Deblocker
JP MOVE ; 25 Perform possible Inter-Bank Move
IF CLOCK
JP TIME ; 26 Get/Set RTC (Zsdos params)
ELSE
JP ISTRUE ; 26..return 0FFH (No Clock) if No code
ENDIF ;clock
JP SELMEM ; 27 Select Alternate Memory Bank
JP SETBNK ; 28 Select DMA Memory bank
JP XMOVE ; 29 Set Source/Destination Banks for Move
; --- <<< End of CP/M 3 Vectors >>>
JP RETBIO ; 30 Return BIOS Addresses
JP DIRDIO ; 31 Direct Disk I/O
JP STFARC ; 32 Set Bank for FRJP and FRCALL
JP FRJP ; 33 Jump to (HL) in Alternate Bank
JP FRCLR ; 34 Clear Stack switcher from Alt Bank Jumps
; (used for error exits)
JP FRGETB ; 35 Load A,(HL) from Alternate Bank
JP FRGETW ; 36 Load DE,(HL) from Alternate Bank
JP FRPUTB ; 37 Load (HL),A to Alternate Bank
JP FRPUTW ; 38 Load (HL),DE to Alternate Bank
JP RETMEM ; 39 Return Current Active Memory Bank
CPR EQU BIOSJT-800H-0E00H
DOS EQU BIOSJT-0E00H
; End of BIOS Jump Table
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; Boot / Banked Routine Linkage
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
IF BANKED
COMMON /BANK2/
ROMJT:
IF INROM
JP INSYNC
INSYNC: JP BOOTER ; Cold start loader
ELSE
JP 0 ; Reserved
JP 0
ENDIF ; Inrom
JDIRIO: JP DIRIO ; Low Level HDC/FDC Functions
JHDCIO: JP DIRIO ; Low Level HDC Functions (combined w/FDCIO)
JBREAD: JP BREAD ; BIOS Read
JBWRT: JP BWRT ; BIOS Write
JBSTRN: JP BSTRN ; BIOS Sectran
IF INROM
INCLUDE BOOTROM.Z80 ; Boot Routines
ENDIF ; Inrom
ENDIF ; Banked
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; C o n f i g u r a t i o n A r e a
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; << ****** HARDWARE SPECIFIC ****** >>
; << Insert ICFG-xxx to initialize >>
INCLUDE ICFG-WW.Z80 ; << your computer's IO system >>
PAGE
; << ****** Hardware Specific ****** >>
; << Enter Low level Byte I/O driver >>
INCLUDE IIO-WW.Z80 ; << routines in file IIO-xxxx.Z80 >>
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; Cold Start Code
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
DSEG
; << ***** Hardware Specific ***** >>
; << Insert the Cold boot routines >>
INCLUDE CBOOT-WW.Z80 ; << in file CBOOT-xx.Z80 >>
; Deblocking Buffer Allocation
IF [BANKED OR INROM]
COMMON /B2RAM/
IF INROM
HSTBUF: DEFS INITCS ; Use a 1k buffer w/below
ELSE
HSTBUF EQU CBOOT0 ; Use CBOOT0 code for part of buffer w/below
ENDIF ;inrom
ELSE
DSEG
HSTBUF EQU CBOOT
ENDIF ;not banked
DEFS 1024-(INITCS) ; Use a 1 k buffer
HSTSIZ EQU HSTBUF+1024 ; Added label for Hard Drive ext. interface
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; Disk Data Structures
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
MXFDIR EQU 255 ; Max number of dir entries-1 for floppy
MXFALC EQU 880 ; If High Density or 8" drives can be handled,
; set this for 880 (1.76 MB), otherwise the
; value can be reduced to 400 (800 KB), the
; maximum for 80 track, Double-Sided formats.
CSEG
IF BANKED
COMMON /BANK2/
ENDIF
DPB: ; Marker for DPB start
;.XLIST ; Don't print these due to size
IF AUTOSL
INCLUDE DPB.LIB ; Default selection of common DD formats
IF FLOPYH
INCLUDE DPB-H.LIB ; If "High-Density" Disk formats desired,
ENDIF
IF FLOPY8
INCLUDE DPB-8.LIB ; If 8" or HD Floppy Disks can be handled,
ENDIF ; add default Autoselect DPB's
IF MORDPB
INCLUDE DPB2.LIB ; Additional assignable DPB's (4+4 unused)
ENDIF ;mordpb
ELSE ;Not autosl
INCLUDE DPBRAM.LIB ; RAM-based DPB's, 1 per physical Format
ENDIF
NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's
CSEG ; Hard & Ramdisk DPBs and DPHs go in Code Seg
;.xlist
IF HARDDSK
; << ****** Hardware Specific ****** >>
; << Insert DPB Info for Hard Disk >>
INCLUDE DPBHD-WW.LIB ; << Drives as DPBHD-xx.LIB >>
ENDIF
;.list
IF RAMDSK
; << ****** Hardware Specific ****** >>
; << Insert DPB Info for RAM Disk >>
INCLUDE DPBM-WW.LIB ; << in file DPBM-xxx.LIB >>
ENDIF
PAGE
INCLUDE DPH.LIB ; Disk parameter headers
;.xlist
IF HARDDSK
INCLUDE DPHHD.LIB ; Insert DPH Info for Hard Disk Partitions
ENDIF
;.list
IF RAMDSK
INCLUDE DPHM.LIB ; Insert DPH Info for RAM Disk
ENDIF
.LIST
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; Disk Driver Low - Level Function Links
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Direct Disk I / O
; Call with: Function Number in C, Driver number in B,
; Args in A, DE, HL
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
CSEG
DIRDIO:
; CALL PRTSTRD
; DEFB '[DIRDIO',']$'
IF BANKED
CALL BIOSTK
CALL GOSYSB ; Bank in the system bank
JP JDIRIO ; And jump to Banked-BIOS function
COMMON /BANK2/
ENDIF
DIRIO: PUSH HL ; Save user's HL
PUSH AF ; ..and A reg for range checks
LD A,B
CP MAXDDA ; Legal Driver #?
JR NC,DIRIOX ; ..jump Error Exit if Not
PUSH BC
LD HL,DDIOTB
LD C,B ; Driver number
LD B,0
ADD HL,BC
ADD HL,BC ; Index into table
ADD HL,BC
LD A,(HL) ; Max call number
INC HL
LD C,(HL)
INC HL
LD H,(HL)
LD L,C ; Service vector table address in HL
POP BC ; Requested call
DEC A ; Correct Max Call # for Testing
JP M,DIRIOX ; ..jump Error exit if 0 --> FF (No Calls)
CP C ; Greater than Maximum Function?
JR C,DIRIOX ; ..jump Error exit if so
PUSH BC ; Else Save BC
LD B,0
ADD HL,BC
ADD HL,BC ; Add twice for Word index
LD B,(HL)
INC HL
LD H,(HL)
LD L,B ; Put vector in HL
POP BC ; Restore User's BC register
POP AF ; .Restore A and Flags
EX (SP),HL ; ..restore HL, Vector to TOS
RET ; Jump to Routine
DIRIOX: POP AF ; Clear stack
POP HL
OR 0FFH ; Set Error return
RET ; ..and quit
; Direct Disk Access Table Pointer Table
DDIOTB: DEFB 0
DEFW 00 ; No Driver 0
DEFB MAXFFN
DEFW FDFUNC ; 1 is Primary Floppy Driver
IF HARDDSK
DEFB MAXHFN
DEFW HDFUNC ; 2 is Primary Hard Disk Driver
ENDIF ;harddsk
IF [RAMDSK AND NOT HARDDSK]
DEFB 0
DEFW 00 ; (Dummy 2 if not installed)
ENDIF ;ramdsk and not harddsk
IF RAMDSK
DEFB 0
DEFW 00 ; 3 is Primary RAM Disk Driver (No Functions)
ENDIF ;ramdsk
MAXDDA EQU ($-DDIOTB)/3 ; Number of entries in pointer table
; Floppy Drive Function Table and Numbers
FDFUNC: DEFW STMODE ; 00 set mode
DEFW STSIZE ; 01 set drive size
DEFW STHDRV ; 02 set head and drive
DEFW STSECT ; 03 set sector #, size and eot
DEFW SPEC ; 04 specify srt, hlt, hut
DEFW RECAL ; 05 home the floppy
DEFW SEEK ; 06 seek track
DEFW SREAD ; 07 read
DEFW SWRITE ; 08 write
DEFW READID ; 09 read id
DEFW RETDST ; 10 return drive status & result ptr
DEFW FMTTRK ; 11 format a track
MAXFFN EQU [$-FDFUNC]/2
; Hard Disk Function Table and Numbers
IF HARDDSK
HDFUNC: DEFW HDVALS ; 00 Set Xfer Address, Return Interface Parms
DEFW HDSLCT ; 01 Select Device (& Logical Unit w/SCSI)
DEFW HD_RW ; 02 Direct Hard Disk Driver
MAXHFN EQU [$-HDFUNC]/2
ENDIF ;harddsk
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; Banked Memory Support Routines
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Bank Control Routines. Used only in Banked Systems
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
IF BANKED ; << ****** HARDWARE SPECIFIC ****** >>
; << Enter the Inter-Bank Movement >>
INCLUDE IBMV-WW.Z80 ; << routines in IBMV-xxx.Z80 >>
ELSE ; If Not Banked, Use these hooks
MOVE: LDIR
RET
SETBNK:
SELMEM:
RETMEM:
XMOVE:
GOSYSB:
FRCLR:
STFARC: RET
FRJP: JP (HL)
FRGETB: LD A,(HL)
RET
FRGETW: LD E,(HL)
INC HL
LD D,(HL)
DEC HL
RET
FRPUTB: LD (HL),A
RET
FRPUTW: LD (HL),E
INC HL
LD (HL),D
DEC HL
RET
ENDIF ;(not) banked
PAGE
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
; Core BIOS Code
;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Return BIOS Addresses
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
CSEG
RETBIO: LD BC,BIOSJT ; Get address of bios base
LD DE,CONFIG ; Point to configuration area
LD HL,DEVCFG ; Point to Char IO Device Table
LD A,VERS ; Return BIOS Version
RET
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Return DPH Table Address
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
INCLUDE UTIL.Z80
DRVTBL: LD HL,DPHTBL ; Point to DPH table
RET
PAGE
INCLUDE BYTEIO.Z80 ; Con:, aux:, lst: redirection
PAGE
INCLUDE SELRWD.Z80 ; Physical driver link for disks
PAGE
INCLUDE DEBLOCK.Z80 ; Hstbuf deblocker
PAGE
INCLUDE SECTRAN.Z80 ; Sector translation
PAGE
IF AUTOSL
INCLUDE SELFLP2.Z80 ; Floppy disk select
ELSE
INCLUDE SELFLP1.Z80
ENDIF
PAGE
INCLUDE FLOPPY.Z80 ; Hardware independent floppy routines
PAGE
; << ****** Hardware Specific ****** >>
; << This Driver is for the Standard >>
INCLUDE FDC-WW.Z80 ; << MicroSystems (SMC) FDC37C665 >>
PAGE
; << ****** Hardware Specific ****** >>
; << Enter routines for your timer >>
INCLUDE TIM-WW.Z80 ; << and clock in TIM-xxxx.Z80 >>
PAGE
IF HARDDSK ; << ****** Hardware Specific ****** >>
IF SCSI ; << Enter driver routines for your >>
INCLUDE HARD-WW.Z80 ; << Hard Disk in HARD-xxx.Z80 >>
ENDIF
IF IDE
INCLUDE HARDIDE.Z80
ENDIF
IF HDSK
IF HBIOS
INCLUDE HARDHB.Z80
ELSE
INCLUDE HARDSIM.Z80
ENDIF
ENDIF
PAGE
ENDIF
IF RAMDSK ; << ****** Hardware Specific ****** >>
INCLUDE RAMD-WW.Z80 ; << Enter driver routines for RAM >>
PAGE ; << Disk in RAMD-xxx.Z80 >>
ENDIF
; << ****** Hardware Specific ****** >>
; << Enter Warm Boot routines in >>
INCLUDE WBOOT-WW.Z80 ; << WBOOT-xx.Z80 >>
; << ****** Hardware Specific ****** >>
; << HBIOS interface routines in >>
INCLUDE HBIOS.Z80 ; << HBIOS.Z80 >>
;.....
; Status bytes of general use placed at end of Data area
DSEG
HDONE: DEFS 1 ; HDC Flag 0=Ready, 1=Busy, 0FFH=Done
ERFLAG: DEFS 1 ; Disk Operation Error Code
DEFS 3 ; Reserved
; Add Character IO buffers here to insure they are at end of DSEG
IF BUFFA0 AND MORDEV AND NOT MOVCPM
COM4Q: DEFS 1 ; Char count in Queue
DEFS QSIZE ; 1 to 255 character type-ahead buffer
ENDIF
IF BUFFA1 AND MORDEV AND NOT MOVCPM
COM5Q: DEFS 1 ; Char count in Queue
DEFS QSIZE ; 1 to 255 character type-ahead buffer
ENDIF
IF (BUFFA0 OR BUFFA1) AND MORDEV AND NOT MOVCPM
DEFS 12 ; Stack for Buffered char IO routines
INTSP: DEFS 2 ; Storage for entry Stack Ptr
ENDIF
; Flags Bytes for Com1/Com2 Flow Control
IF XONOFF
COM1WT: DEFS 1 ; B7=0 - Output Ok, B7=1 - Output Stopped
COM2WT: DEFS 1 ; B0=0 - Input Ok, B0=1 - Input Halted
IF ESCC_B AND MORDEV AND NOT MOVCPM
COM3WT: DEFS 1 ; Flags for Expansion devices
ENDIF
IF ASCI_0 AND MORDEV AND NOT MOVCPM
COM4WT: DEFS 1
ENDIF
IF ASCI_1 AND MORDEV AND NOT MOVCPM
COM5WT: DEFS 1
ENDIF
ENDIF ;XonOff
PAOR: DEFS 1 ; Parallel Output Ready Flag
IF [BANKED AND ZSDOS2]
COMMON /B2RAM/ ; Put this label in Banked Memory
ENDIF ; ..else in Dseg
BRAME: DEFS 2 ; Use as dynamic sizing label for Hard Drive
; ALV buffers, and storage area for sizing.
; ALV Buffers build up from here in memory
CSEG
; Display warning if we are assembling for MOVCPM integration and the
; combined CSEG/Initialized DSEG size exceeds 1 or 2 Boot Records
PRINTX MACRO %NN
.printx %NN
ENDM
LIMIT EQU $-BIOSJT+INITCS
IF MOVCPM AND LIMIT > 4480
.printx
.printx **** BIOS too big (>4480) for Boot Tracks! ****
PRINTX %LIMIT
.printx
ELSE
IF MOVCPM AND LIMIT > 4352
.printx
.printx ++++ BIOS exceeds (>4352) 2-Sector Boot Record ++++
PRINTX %LIMIT
.printx
ENDIF
ENDIF
NSECTS EQU ($+INITCS-BIOSJT)/128+1
IF INROM
INCLUDE BOOTRAM.Z80
ENDIF
END


6
Source/BPBIOS/byteio.z80
View File

@ -124,17 +124,13 @@ ISFALSE: XOR A
;.....
; Print routine prints to console the Null or Zero-terminated string at (SP)
PRINT:
EX (SP),HL ; Print inline 0 or Hi-bit terminated
PRINT: EX (SP),HL ; Print inline 0 or Hi-bit terminated
PSTR: LD A,(HL) ; General purpose print 0 or Hi-bit
INC HL ; Terminated string pointed to by HL
OR A
JR Z,PSTRX ; Exit if null found in string
LD C,A
PUSH BC ; WW
RES 7,C ; WW
CALL CONOUT ; Send to console device
POP BC ; WW
BIT 7,C ; Test for Hi-bit terminator
JR Z,PSTR ; ..loop if Not finished
PSTRX: EX (SP),HL ; Else swap Ptr to next instr for entry HL val

241
Source/BPBIOS/cboot-dx.z80
View File

@ -24,19 +24,20 @@
; beginning of B2RAM and DSEG.
CBOOT: DI ; Disable interrupt system
; IN0 A,(DDRA) ; Get Data Definition of Port A
; SET 4,A ; Bit 4 is Input for SCSI "Int" input
; OUT0 (DDRA),A ; and reset bits
; LD A,(HICOMM) ; Set Common Bank start to Header locn
; OUT0 (CBAR),A
IN0 A,(DDRA) ; Get Data Definition of Port A
SET 4,A ; Bit 4 is Input for SCSI "Int" input
OUT0 (DDRA),A ; and reset bits
; CALL FDRst ; Reset FDC Controller, Re-Initialize
LD A,(HICOMM) ; Set Common Bank start to Header locn
OUT0 (CBAR),A
CALL FDRst ; Reset FDC Controller, Re-Initialize
; (Needed in case ROM Timed out for HD Boot)
; CALL MOTOFF ; Turn Floppy motors Off, clear timer
CALL MOTOFF ; Turn Floppy motors Off, clear timer
; XOR A ; Get a Byte of Zeros
; OUT0 (SCR),A ; and activate ASCI0/ASCI1 vs MIMIC
XOR A ; Get a Byte of Zeros
OUT0 (SCR),A ; and activate ASCI0/ASCI1 vs MIMIC
LD HL,(IOBYT) ; Get IOBYTE, Default Drive & User
LD (3),HL ; Set values in TPA bank
@ -47,69 +48,58 @@ CBOOT: DI ; Disable interrupt system
; Since the bootable systems (MOVCPM set to YES) are not banked, the Fast Boot
; option should be OFF, and only the TPABNK will necessarily be Accurate.
; IN0 C,(CBR) ; Read Current 4k base of RAM
; RR C ; divide
; RR C ; by
; RR C ; 8 for 32k Bank base
; LD HL,TPABNK
; LD B,(HL) ; Get configured TPA Bank #
; LD (HL),C ; (Store actual)
; IF NOT MOVCPM
; DEC HL
; LD A,(HL) ; Get Any User Bank
; SUB B ; (compute difference from TPA)
; JR C,NoUsrB ; ..jump if None
; ADD A,C ; Else Compute new User Bank #
; LD (HL),A ; (save)
;NoUsrB: INC HL ; advance to System Bank #
; INC HL
; LD A,(HL) ; fetch
; SUB B ; Compute diff from System Bnk to TPA Bnk
; ADD A,C ; add new base
; LD (HL),A ; (save)
; INC HL ; Advance to RAM Drive Start Bank #
; LD A,(HL)
; SUB B ; compute difference
; ADD A,C ; Add true base
; LD (HL),A ; (save)
; ENDIF ;~Movcpm. Max Bank # Stays as configured
;
IN0 C,(CBR) ; Read Current 4k base of RAM
RR C ; divide
RR C ; by
RR C ; 8 for 32k Bank base
LD HL,TPABNK
LD B,(HL) ; Get configured TPA Bank #
LD (HL),C ; (Store actual)
IF NOT MOVCPM
DEC HL
LD A,(HL) ; Get Any User Bank
SUB B ; (compute difference from TPA)
JR C,NoUsrB ; ..jump if None
ADD A,C ; Else Compute new User Bank #
LD (HL),A ; (save)
NoUsrB: INC HL ; advance to System Bank #
INC HL
LD A,(HL) ; fetch
SUB B ; Compute diff from System Bnk to TPA Bnk
ADD A,C ; add new base
LD (HL),A ; (save)
INC HL ; Advance to RAM Drive Start Bank #
LD A,(HL)
SUB B ; compute difference
ADD A,C ; Add true base
LD (HL),A ; (save)
ENDIF ;~Movcpm. Max Bank # Stays as configured
IF BANKED
LD SP,USP ; Set to User Stack in High memory
CALL HBX_INIT ; WW
CALL GOSYSB ; Turn on the System bank
XOR A
LD (BIOSTK),A ; Init bank switcher
LD (3),HL ; Set IOBYTE and Default DU in System bank
CALL CBOOT0 ; Execute main part of Cold Setup
LD A,(TPABNK)
CALL SELBNK ; Insure TPA is in context
ELSE
LD SP,80H ; Set stack in Low memory
CALL HBX_INIT ; WW
CALL CBOOT0 ; Execute main part of Cold Setup
ENDIF
IF NOT MOVCPM
LD HL,003CH ; Point to ZMP Flag
LD (HL),0E5H ; say this is first time run
ENDIF
IF FASTWB
; Grab a copy of command processor from TPA and
; cache it in (SYSBNK):100H. We assume that the
; original copy of command processor is in high memory.
LD A,(TPABNK) ; Source bank is TPABNK
LD C,A ; Put it in C
LD A,(SYSBNK) ; Destination bank is SYSBNK
LD B,A ; Put it in B
CALL HBX_XCOPY ; Set banks for extended copy
LD HL,(CPADR) ; Copy from start of command processor
LD DE,100H ; .. to $100 in system bank
LD BC,(CPLEN) ; Length of command processor
CALL HBX_COPY ; Do it
LD HL,BTTBL ; Point to DMA block moving to Alt Bank
JP WBOOTV ; move it and commence execution
ELSE
JP GOZSYS ; Otherwise just go to Command Processor
@ -182,9 +172,7 @@ DVRAME: SRL D ; Divide by 2
POP HL ; Restore DPH ptr
POP BC ; and loop ctr
DYNCHK: DJNZ DYNLP ; Loop til all 16 tested
ENDIF ;harddsk
IF BANKED
LD DE,USP ; Point above critical Bios Ram storage
ELSE
@ -203,7 +191,7 @@ Clr0: LD (HL),0
LD A,D
OR E
JR NZ,Clr0 ; ..loop til all cleared
; In systems where we have enough space, we clear unused High Memory too
IF NOT MOVCPM
@ -212,7 +200,7 @@ Clr0: LD (HL),0
ADD HL,DE ; Are we already at the top of memory?
JR C,ATTOP ; ..bypass clearing if so
EX DE,HL ; Else we must calculate how much to clear
LD HL,MEMTOP ; From the TOP
LD HL,0FFFFH ; From the TOP
SBC HL,DE ; subtract the start
LD C,L
LD B,H ; and use for count
@ -285,71 +273,47 @@ BMOVE:
SRL H ; Compute Blks * 128
RR L ; to give HL = CPR length in bytes
ENDIF ;~Movcpm
; ;
; ; SETUP FOR FASTWB
; ;
; ; BTTBL IS USED TO SAVE ORIGINAL CPR
; ; SARL IS USED TO RESTORE CPR
; ;
; ; 0-2: SRC ADDRESS (LLHHB)
; ; 3-5: DEST ADDRESS (LLHHB)
; ; 6-7: LEN (LLHH)
; ;
; ; SET TRANSFER LENGTH IN BTTBL AND SARL
; LD (BTTBL+6),HL ; Save length in boot block
; LD (SARL+6),HL ; and DMA WB block
; ;
; ; L=TPA BANK, H=SYS BANK
; LD HL,(TPABNK) ; Get TPA (L) and System (H) Banks
; ;
; ; CONVERT BANK:DE -> BHHLL, SAVE AS SRC IN BTTBL AND DEST IN SARL
; LD A,L ; Load TPA Bank #
; RL D ; Move MSB of Address to Carry
; ADC A,0 ; Add Carry to Bank # (in case cross banks)
; RRA ; shift for DMA Bank #
; LD (SARL+5),A ; save in Warm Boot DMA Block
; LD (BTTBL+2),A ; and initial move to bank
; RR D ; Move Bank # LSB (Carry) to MSB of Address
; LD (SARL+3),DE ; Save CPR logical address in WB DMA block
; LD (BTTBL),DE ; and initial move to bank
; ;
; ; CONVERT BANK:$0100 -> BHHLL, SAVE AS DEST IN BTTBL AND SRC IN SARL
; LD A,H ; Load System Bank #
; LD HL,100H ; Load Bank Address of CPR Image Start
; RL H ; get rid of MSB
; ; Since we know the MSB=0, bypass adc 0
; RRA ; Shift for DMA Bank #
; LD (BTTBL+5),A ; save as initial dest bank byte
; LD (SARL+2),A ; and DMA Source Bank byte
; RR H ; Rotate Carry (Bank LSB) to MSB of Address
; LD (SARL),HL ; Save Source Addr in WB DMA block
; LD (BTTBL+3),HL ; and initial move block
LD (CPLEN),HL ; Save command processor length
LD (CPADR),DE ; Save command processor address (in TPA)
LD (BTTBL+6),HL ; Save length in boot block
LD (SARL+6),HL ; and DMA WB block
LD HL,(TPABNK) ; Get TPA (L) and System (H) Banks
LD A,L ; Load TPA Bank #
RL D ; Move MSB of Address to Carry
ADC A,0 ; Add Carry to Bank # (in case cross banks)
RRA ; shift for DMA Bank #
LD (SARL+5),A ; save in Warm Boot DMA Block
LD (BTTBL+2),A ; and initial move to bank
RR D ; Move Bank # LSB (Carry) to MSB of Address
LD (SARL+3),DE ; Save CPR logical address in WB DMA block
LD (BTTBL),DE ; and initial move to bank
LD A,H ; Load System Bank #
LD HL,100H ; Load Bank Address of CPR Image Start
RL H ; get rid of MSB
; Since we know the MSB=0, bypass adc 0
RRA ; Shift for DMA Bank #
LD (BTTBL+5),A ; save as initial dest bank byte
LD (SARL+2),A ; and DMA Source Bank byte
RR H ; Rotate Carry (Bank LSB) to MSB of Address
LD (SARL),HL ; Save Source Addr in WB DMA block
LD (BTTBL+3),HL ; and initial move block
ENDIF ;fastwb
; IF BANKED
; ;
; ; SETUP CPYVEC TO COPY IMAGE OF TPA BANK PAGE ZERO TO SYS BANK PAGE ZERO
; LD HL,0000 ; If we are banked, set to copy Page 0
; LD A,(TPABNK) ; of TPA to System Bank
; OR A
; RRA ; Shift TPA Bank #
; LD (CPYVEC+2),A ; store in DMA Block
; RR H ; adjust Address by Bank LSB (Carry)
; LD (CPYVEC),HL ; and store
; LD H,0
; LD A,(SYSBNK)
; RRA ; Shift System Bank #
; LD (CPYVEC+5),A ; store in DMA Block
; RR H ; adjust Address by Bank LSB (Carry)
; LD (CPYVEC+3),HL ; and store
; LD HL,40H ; Set length of move
; LD (CPYVEC+6),HL ; and store in DMA Block
; ENDIF ;banked
IF BANKED
LD HL,0000 ; If we are banked, set to copy Page 0
LD A,(TPABNK) ; of TPA to System Bank
OR A
RRA ; Shift TPA Bank #
LD (CPYVEC+2),A ; store in DMA Block
RR H ; adjust Address by Bank LSB (Carry)
LD (CPYVEC),HL ; and store
LD H,0
LD A,(SYSBNK)
RRA ; Shift System Bank #
LD (CPYVEC+5),A ; store in DMA Block
RR H ; adjust Address by Bank LSB (Carry)
LD (CPYVEC+3),HL ; and store
LD HL,40H ; Set length of move
LD (CPYVEC+6),HL ; and store in DMA Block
ENDIF ;banked
LD (STKSAV),SP ; Save entry stack since we alter it here
LD A,(BLOCKE-BLOCK)/6
@ -360,7 +324,7 @@ BLKMV: POP BC ; And number of bytes to move
LDIR
DEC A ; Another block moved
JR NZ,BLKMV ; Do more as required
LD SP,(STKSAV) ; Get entry Stack Pointer back so we can return
; All Buffers above BIOS have been cleared already at this point
@ -368,23 +332,15 @@ BLKMV: POP BC ; And number of bytes to move
DEC A ; 0 --> FF
LD (Z3WHL),A ; Set the Wheel Byte
; Get and save the internal HBIOS physical disk
; buffer address which is assumed to be in the
; HBIOS bank.
LD B,19H ; Set buffer function call
LD HL,0 ; ... with address 0 to get HBIOS buf adr
CALL HBX_INVOKE ; ... to return internal HBIOS buffer adr
LD (HB_DSKBUF),HL ; Record the buffer address
IF HAVIOP
LD HL,IOPRET
LD (BIOSJT+1),HL
ENDIF ;haviop
; LD HL,INTTBL ; Set the Interrupt Vector
; LD A,H ; first the page
; LD I,A ; to CPU Register
; OUT0 (IL),L ; then the segment addr
LD HL,INTTBL ; Set the Interrupt Vector
LD A,H ; first the page
LD I,A ; to CPU Register
OUT0 (IL),L ; then the segment addr
IF BANKED
CALL JDVINI ; Call directly because we are in High Stack
@ -407,8 +363,7 @@ BLKMV: POP BC ; And number of bytes to move
; Sign on the system
MEMOK:
CALL PRINT
MEMOK: CALL PRINT
IF MOVCPM ; Space is critical for boot tracks
DEFB CR,LF,'P112 - ' ; Save all bytes possible
ELSE ; Otherwise sign on with complete name
@ -448,24 +403,16 @@ MEMOK:
DEFB ' (Polled IO)'
ENDIF
IF HARDDSK
IF SCSI
DEFB CR,LF,' SCSI Hard Disk Driver'
ENDIF
IF IDE
DEFB CR,LF,' GIDE Hard Disk Driver'
ENDIF
IF HDSK
IF HBIOS
DEFB CR,LF,' HBIOS Hard Disk Driver'
ELSE
DEFB CR,LF,' SIMH Hard Disk Driver'
ENDIF
ENDIF
ELSE
DEFB CR,LF,' SCSI Hard Disk Driver'
IF HDDMA
DEFB ' (DMA-driven IO)'
ELSE
DEFB ' (Polled IO)'
ENDIF
ENDIF
ENDIF
IF FASTWB
DEFB CR,LF,' Warm Boot from RAM'
@ -479,7 +426,7 @@ MEMOK:
ENDIF ;Banked
DEFB CR,LF+80H
;WW EI ; Turn Interrupts back on
EI ; Turn Interrupts back on
RET ; ..and return
;.....

771
Source/BPBIOS/cboot-ww.z80
View File

@ -0,0 +1,771 @@
;:::::::::::::::::::::::::::::::::::::::::::::::::::***********************
; CBOOT. B/P BIOS Cold Boot Module. ** Hardware Specific **
; This MUST be the Last Module in the BIOS because ** for prompts, Env **
; it is overwritten by RAM Data. No Dflt Termcap. ** and Termcap Dflts **
; - D-X Designs Pty Ltd P112 - ***********************
;
; 1.2 - 30 Aug 01 - Cleaned up for GPL release, Set Bank Numbers on boot
; (TPABNK only if MOVCPM) by reading Regs set by ROM. HFB
; 1.1 - 8 May 97 - Added code to activate ASCI channels. HFB
; 1.0 - 13 Aug 96 - Initial Release for P112. HFB
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
DSEG
;.....
; Cold boot entry. This code is executed only once and so may be
; overwritten subsequently by the BIOS. In Non-banked systems, this code
; is placed in the Host Buffer, HSTBUF, allowing up to 1024 bytes in the
; section, although much less will fit on the boot tracks. In Banked
; systems, a small resident part (up to 128 bytes) occupies the Directory
; Sector Buffer, DIRBUF, while the remainder is placed in the banked
; HSTBUF, allowing both sectors to be overwritten without penalty.
; To insure minimum disruption in assembling and linking the BIOS, this
; module must be one of the first linked to place HSTBUF/DIRBUF at the
; beginning of B2RAM and DSEG.
CBOOT: DI ; Disable interrupt system
; IN0 A,(DDRA) ; Get Data Definition of Port A
; SET 4,A ; Bit 4 is Input for SCSI "Int" input
; OUT0 (DDRA),A ; and reset bits
; LD A,(HICOMM) ; Set Common Bank start to Header locn
; OUT0 (CBAR),A
; CALL FDRst ; Reset FDC Controller, Re-Initialize
; (Needed in case ROM Timed out for HD Boot)
; CALL MOTOFF ; Turn Floppy motors Off, clear timer
; XOR A ; Get a Byte of Zeros
; OUT0 (SCR),A ; and activate ASCI0/ASCI1 vs MIMIC
LD HL,(IOBYT) ; Get IOBYTE, Default Drive & User
LD (3),HL ; Set values in TPA bank
; Set BIOS Bank Numbers to the RAM base Number as set by Boot ROM. In-context
; RAM will be reflected in CBR which is base. We adjust other bank numbers
; based on configured differences, except for MaxBnk which remains as config'd.
; Since the bootable systems (MOVCPM set to YES) are not banked, the Fast Boot
; option should be OFF, and only the TPABNK will necessarily be Accurate.
; IN0 C,(CBR) ; Read Current 4k base of RAM
; RR C ; divide
; RR C ; by
; RR C ; 8 for 32k Bank base
; LD HL,TPABNK
; LD B,(HL) ; Get configured TPA Bank #
; LD (HL),C ; (Store actual)
; IF NOT MOVCPM
; DEC HL
; LD A,(HL) ; Get Any User Bank
; SUB B ; (compute difference from TPA)
; JR C,NoUsrB ; ..jump if None
; ADD A,C ; Else Compute new User Bank #
; LD (HL),A ; (save)
;NoUsrB: INC HL ; advance to System Bank #
; INC HL
; LD A,(HL) ; fetch
; SUB B ; Compute diff from System Bnk to TPA Bnk
; ADD A,C ; add new base
; LD (HL),A ; (save)
; INC HL ; Advance to RAM Drive Start Bank #
; LD A,(HL)
; SUB B ; compute difference
; ADD A,C ; Add true base
; LD (HL),A ; (save)
; ENDIF ;~Movcpm. Max Bank # Stays as configured
;
IF BANKED
LD SP,USP ; Set to User Stack in High memory
CALL HBX_INIT ; WW
CALL GOSYSB ; Turn on the System bank
XOR A
LD (BIOSTK),A ; Init bank switcher
LD (3),HL ; Set IOBYTE and Default DU in System bank
CALL CBOOT0 ; Execute main part of Cold Setup
LD A,(TPABNK)
CALL SELBNK ; Insure TPA is in context
ELSE
LD SP,80H ; Set stack in Low memory
CALL HBX_INIT ; WW
CALL CBOOT0 ; Execute main part of Cold Setup
ENDIF
IF NOT MOVCPM
LD HL,003CH ; Point to ZMP Flag
LD (HL),0E5H ; say this is first time run
ENDIF
IF FASTWB
; Grab a copy of command processor from TPA and
; cache it in (SYSBNK):100H. We assume that the
; original copy of command processor is in high memory.
LD A,(TPABNK) ; Source bank is TPABNK
LD C,A ; Put it in C
LD A,(SYSBNK) ; Destination bank is SYSBNK
LD B,A ; Put it in B
CALL HBX_XCOPY ; Set banks for extended copy
LD HL,(CPADR) ; Copy from start of command processor
LD DE,100H ; .. to $100 in system bank
LD BC,(CPLEN) ; Length of command processor
CALL HBX_COPY ; Do it
JP WBOOTV ; move it and commence execution
ELSE
JP GOZSYS ; Otherwise just go to Command Processor
ENDIF
IF BANKED
COMMON /B2RAM/
ENDIF
;.....
; If this system is Banked and set for Zsdos2, then ALV Buffers are in the
; system bank and will be dynamically sized during Cold Boot. This permits
; BPCNFG to configure a generic IMG file for specific Hard Drive Partitions.
CBOOT0: LD HL,BRAME ; Get end of banked RAM
LD (HISAV),HL ; and save for later use
IF HARDDSK
LD HL,DPHTBL ; Point to start of DPH Table
LD B,16 ; do all DPHs
DYNLP: LD E,(HL)
INC HL
LD D,(HL) ; Get the pointer for this one
INC HL ; advance to next
LD A,D ; Anything there?
OR E
JR Z,DYNCHK ; jump to end if Nothing
DEC DE ; Else back up Ptr to Driver
DEC DE
LD A,(DE) ; Get driver #
IF RAMDSK
DEC A
DEC A ; Hard Disk (Driver 2)?
JR Z,ADDSIZ ; ..jump if so
DEC A ; RAM Disk (Driver 3)?
ELSE
CP 2 ; Hard Disk (Driver 2)?
ENDIF ; Ramdsk
JR NZ,DYNCHK ; ..jump to end if Not
ADDSIZ: PUSH BC ; Save loop counter
PUSH HL ; and ptr to DPH
EX DE,HL
LD DE,12 ; Offset to DPB Ptr (+2 for Decs)
ADD HL,DE
LD E,(HL)
INC HL
LD D,(HL) ; Get Addr of this DPB
INC HL
INC HL
INC HL ; Advance to ALV Addr location
LD BC,(HISAV) ; get end of used RAM
LD (HL),C ; and save
INC HL
LD (HL),B ; in DPH
LD HL,5
ADD HL,DE ; Advance to Size in DPB
LD E,(HL)
INC HL
LD D,(HL) ; and fetch Size-1
INC DE ; Make = Size in Block
PUSH BC ; (save End Addr in BC)
LD B,3
DVRAME: SRL D ; Divide by 2
RR E
DJNZ DVRAME ; *3 = Div 8
INC DE ; +1
EX DE,HL
POP BC ; Restore Ram End
ADD HL,BC ; Add size to Starting Location
LD (HISAV),HL ; save for next drive/overflow check
POP HL ; Restore DPH ptr
POP BC ; and loop ctr
DYNCHK: DJNZ DYNLP ; Loop til all 16 tested
ENDIF ;harddsk
IF BANKED
LD DE,USP ; Point above critical Bios Ram storage
ELSE
LD DE,DIRBUF
ENDIF
IF Z3
LD HL,(ENVADR) ; And top of memory
ELSE
LD HL,0FFFFH
ENDIF
SBC HL,DE ; Calculate # bytes to clear (CF already clr)
EX DE,HL ; Ptr to HL, Cnt to DE
Clr0: LD (HL),0
INC HL
DEC DE
LD A,D
OR E
JR NZ,Clr0 ; ..loop til all cleared
; In systems where we have enough space, we clear unused High Memory too
IF NOT MOVCPM
LD HL,(ENVADR) ; Clear above the ENV as well
LD DE,100H ; Assuming a 2-record ENV
ADD HL,DE ; Are we already at the top of memory?
JR C,ATTOP ; ..bypass clearing if so
EX DE,HL ; Else we must calculate how much to clear
LD HL,MEMTOP ; From the TOP
SBC HL,DE ; subtract the start
LD C,L
LD B,H ; and use for count
LD L,E ; Copy Start to Source
LD H,D
INC DE ; dest is same + 1
LD (HL),0 ; we fill with Zeros
LDIR ; Do it!
ATTOP:
ENDIF ; ~Movcpm
; Initialize the ZCPR3 buffers
IF NOT MOVCPM
LD HL,(ENVADR) ; Should we move our local ENV block?
LD A,H
OR L
JR NZ,BMOVE ; ..jump if we already have one
ENDIF ; (Always move Env if using MOVCPM type load)
LD HL,Z3ENV ; Else set up pointers
LD (ENVADR),HL
LD DE,ENV
EX DE,HL
LD BC,ENVEND-ENV ; count
LDIR ; and move
IF MOVCPM ; Instead of storing Termcap bytes, Zeroize
LD H,D
LD L,E ; Dupe dest addr
LD (HL),0 ; Clear current byte
LD BC,37-1 ; Set count to remaining Termcap area
INC DE ; Dest is next byte
LDIR ; move Zero along
ENDIF ;Movcpm
BMOVE:
IF NOT MOVCPM ; No need to set values on Boot Track System
LD DE,(ENVADR) ; Get pointer to ENV
IF HAVIOP
LD HL,0FH ; Set offset to IOP Addr in ENV
CALL CALCOF ; get the addr and size
LD (IOPPTR),HL ; and set addr
ENDIF ;haviop
LD HL,18H ; Set offset to Mult Comnd Line in ENV
CALL CALCOF ; get addr and size
LD (CLPTR),HL ; set addr
INC HL
INC HL
INC HL ; Advance to CL+3
LD (CL3PTR),HL ; and set
INC HL ; Advance to CL+4
LD (CMDSET),HL ; set addr in Command Line ptr
LD (CMDSET+2),A ; and CL Size byte
LD HL,09H ; Set offset to Path addr in ENV
CALL CALCOF ; get addr
LD (PTHPTR),HL ; and set
ENDIF ;Movcpm
IF FASTWB ; Do we restore CPR from Bank?
IF MOVCPM
LD DE,BIOSJT-1600H ; Get CPR Starting Addr
LD HL,0800H ; and Default Length
ELSE
LD HL,(ENVADR) ; Get pointer to ENV start
LD DE,3FH ; offset to CPR start
ADD HL,DE
LD E,(HL) ; and get CPR starting address
INC HL
LD D,(HL)
INC HL ; (advance to length)
LD H,(HL) ; Get length in blocks (*2 at this point)
LD L,0 ; convert to Word
SRL H ; Compute Blks * 128
RR L ; to give HL = CPR length in bytes
ENDIF ;~Movcpm
; ;
; ; SETUP FOR FASTWB
; ;
; ; BTTBL IS USED TO SAVE ORIGINAL CPR
; ; SARL IS USED TO RESTORE CPR
; ;
; ; 0-2: SRC ADDRESS (LLHHB)
; ; 3-5: DEST ADDRESS (LLHHB)
; ; 6-7: LEN (LLHH)
; ;
; ; SET TRANSFER LENGTH IN BTTBL AND SARL
; LD (BTTBL+6),HL ; Save length in boot block
; LD (SARL+6),HL ; and DMA WB block
; ;
; ; L=TPA BANK, H=SYS BANK
; LD HL,(TPABNK) ; Get TPA (L) and System (H) Banks
; ;
; ; CONVERT BANK:DE -> BHHLL, SAVE AS SRC IN BTTBL AND DEST IN SARL
; LD A,L ; Load TPA Bank #
; RL D ; Move MSB of Address to Carry
; ADC A,0 ; Add Carry to Bank # (in case cross banks)
; RRA ; shift for DMA Bank #
; LD (SARL+5),A ; save in Warm Boot DMA Block
; LD (BTTBL+2),A ; and initial move to bank
; RR D ; Move Bank # LSB (Carry) to MSB of Address
; LD (SARL+3),DE ; Save CPR logical address in WB DMA block
; LD (BTTBL),DE ; and initial move to bank
; ;
; ; CONVERT BANK:$0100 -> BHHLL, SAVE AS DEST IN BTTBL AND SRC IN SARL
; LD A,H ; Load System Bank #
; LD HL,100H ; Load Bank Address of CPR Image Start
; RL H ; get rid of MSB
; ; Since we know the MSB=0, bypass adc 0
; RRA ; Shift for DMA Bank #
; LD (BTTBL+5),A ; save as initial dest bank byte
; LD (SARL+2),A ; and DMA Source Bank byte
; RR H ; Rotate Carry (Bank LSB) to MSB of Address
; LD (SARL),HL ; Save Source Addr in WB DMA block
; LD (BTTBL+3),HL ; and initial move block
LD (CPLEN),HL ; Save command processor length
LD (CPADR),DE ; Save command processor address (in TPA)
ENDIF ;fastwb
; IF BANKED
; ;
; ; SETUP CPYVEC TO COPY IMAGE OF TPA BANK PAGE ZERO TO SYS BANK PAGE ZERO
; LD HL,0000 ; If we are banked, set to copy Page 0
; LD A,(TPABNK) ; of TPA to System Bank
; OR A
; RRA ; Shift TPA Bank #
; LD (CPYVEC+2),A ; store in DMA Block
; RR H ; adjust Address by Bank LSB (Carry)
; LD (CPYVEC),HL ; and store
; LD H,0
; LD A,(SYSBNK)
; RRA ; Shift System Bank #
; LD (CPYVEC+5),A ; store in DMA Block
; RR H ; adjust Address by Bank LSB (Carry)
; LD (CPYVEC+3),HL ; and store
; LD HL,40H ; Set length of move
; LD (CPYVEC+6),HL ; and store in DMA Block
; ENDIF ;banked
LD (STKSAV),SP ; Save entry stack since we alter it here
LD A,(BLOCKE-BLOCK)/6
LD SP,BLOCK
BLKMV: POP BC ; And number of bytes to move
POP HL ; Source
POP DE ; Get destination
LDIR
DEC A ; Another block moved
JR NZ,BLKMV ; Do more as required
LD SP,(STKSAV) ; Get entry Stack Pointer back so we can return
; All Buffers above BIOS have been cleared already at this point
DEC A ; 0 --> FF
LD (Z3WHL),A ; Set the Wheel Byte
; Get and save the internal HBIOS physical disk
; buffer address which is assumed to be in the
; HBIOS bank.
LD B,19H ; Set buffer function call
LD HL,0 ; ... with address 0 to get HBIOS buf adr
CALL HBX_INVOKE ; ... to return internal HBIOS buffer adr
LD (HB_DSKBUF),HL ; Record the buffer address
IF HAVIOP
LD HL,IOPRET
LD (BIOSJT+1),HL
ENDIF ;haviop
; LD HL,INTTBL ; Set the Interrupt Vector
; LD A,H ; first the page
; LD I,A ; to CPU Register
; OUT0 (IL),L ; then the segment addr
IF BANKED
CALL JDVINI ; Call directly because we are in High Stack
ELSE
CALL DEVINI ; Initialize the I/O system
ENDIF ; And any device specific ram
IF [BANKED AND ZSDOS2]
LD DE,8000H ; If ALVs in Bank, size against Bank2 Top
ELSE
LD DE,(USRSP) ; else against base of User Space
ENDIF
LD HL,(HISAV) ; Load Highest RAM Address used
OR A
SBC HL,DE ; Is Needed Space > Limit?
JR C,MEMOK ; ..jump if So
CALL PRINT ; Else Warn user
DEFB CR,LF,7,'++ Mem Ovfl +','+'+80H
; Sign on the system
MEMOK:
CALL PRINT
IF MOVCPM ; Space is critical for boot tracks
DEFB CR,LF,'P112 - ' ; Save all bytes possible
ELSE ; Otherwise sign on with complete name
DEFB CR,LF,'D-X Designs P112 - '
ENDIF
DEFB 'B/P 50.00k Bios' ;**** Do NOT alter this string ****
DEFB ' V',VERS/16+'0','.',VERS MOD 16+'0',' ' ; Vers in BCD
DATE
IF BANKED
DEFB ' (Banked) '
ELSE
IF NOT MOVCPM
DEFB ' (Non-Banked) ' ; Nothing for boot track system
ENDIF
ENDIF
IF BANKED
DEFB ' with:',CR,LF,LF
DEFB ' ZCPR3+ Env'
IF CLOCK
IF DS1202
DEFB CR,LF,' Dallas DS-1202 Clock, '
IF CLKSET
DEFB 'with '
ELSE
DEFB 'NO '
ENDIF
DEFB 'Set'
ELSE
DEFB CR,LF,' ZSDOS Interrupt Clock'
ENDIF
ENDIF
DEFB CR,LF,' High-Density Floppy'
IF FDDMA
DEFB ' (DMA-driven IO)'
ELSE
DEFB ' (Polled IO)'
ENDIF
IF HARDDSK
IF SCSI
DEFB CR,LF,' SCSI Hard Disk Driver'
ENDIF
IF IDE
DEFB CR,LF,' GIDE Hard Disk Driver'
ENDIF
IF HDSK
IF HBIOS
DEFB CR,LF,' HBIOS Hard Disk Driver'
ELSE
DEFB CR,LF,' SIMH Hard Disk Driver'
ENDIF
ENDIF
IF HDDMA
DEFB ' (DMA-driven IO)'
ELSE
DEFB ' (Polled IO)'
ENDIF
ENDIF
IF FASTWB
DEFB CR,LF,' Warm Boot from RAM'
ENDIF
IF RAMDSK
DEFB CR,LF,' RAM Disk (M:)'
ENDIF
IF BIOERM
DEFB CR,LF,' Full Error Messages'
ENDIF
ENDIF ;Banked
DEFB CR,LF+80H
;WW EI ; Turn Interrupts back on
RET ; ..and return
;.....
; Offset to and get ENV Address and respective element size
CALCOF: ADD HL,DE ; Add offset to Base ENV Addr
LD C,(HL) ; get low byte
INC HL
INC HL ; advance to size byte
LD A,(HL) ; get size
DEC HL ; Back down to Addr hi byte
LD H,(HL) ; and grab
LD L,C ; Ptr to Segment now in HL
RET ; return to caller
; Block Move Parameters
BLOCK: DEFW PATH-CMDSET ; # to move
DEFW CMDSET ; Source
CLPTR: DEFW Z3CL ; Destination
DEFW 10
DEFW AUTOCMD
CL3PTR: DEFW Z3CL+3
DEFW PATHE-PATH
DEFW PATH
PTHPTR: DEFW EXPATH
IF HAVIOP
DEFW IOPLEN+2
DEFW IOPENT
IOPPTR: DEFW IOP
ENDIF
IF HARDDSK AND HDDMA AND (NOT IDE)
DEFW DMALEN
DEFW DMADAT
DEFW DMATBL
ENDIF
BLOCKE EQU $
;.....
; Initial HD DMA Control Block data
IF HARDDSK AND HDDMA
DMADAT: DEFW HSTBUF ; Physical sector address
DEFB 00 ; BNK2 SHR 1 if banked, BNK0 SHR 1 If not
DEFW DMAACK ; Dack port address
DEFB 0
DEFW 400H ; Number of bytes to transfer (1Sct+slop=2Scts)
DMALEN EQU $-DMADAT
ENDIF
CMDSET: DEFW Z3CL+4 ; Point to first character in command buffer
DEFB Z3CLS ; Command buffer size
DEFW 0 ; Clear the command line
PATH: DEFB '$','$',1,15 ; Current, A15:
DEFB 0 ; End of initial path
PATHE EQU $
; Environment Descriptor for ZCPR34
ENV: JP 0 ; Leading jump (address is CBIOS when NZCOM)
ENV1: ; ZCPR3 enviornment descriptor ...
DEFB 'Z3ENV' ; Environment id
DEFB 90H ; Env type (=>80H means extended ENV). YASBEC
; uses 90H to show User Area instead of Prt2
DEFW EXPATH ; External path (path)
DEFB EXPATHS ;
DEFW RCP ; Resident command package (rcp)
DEFB RCPS ;
DEFW IOP ; Input/output package (iop)
DEFB IOPS ;
DEFW FCP ; Flow command package (fcp)
DEFB FCPS ;
DEFW Z3NDIR ; Named directories (ndr)
DEFB Z3NDIRS ;
DEFW Z3CL ; Command line (cl)
DEFB Z3CLS ;
DEFW Z3ENV ; Environment (env)
DEFB Z3ENVS ;
DEFW SHSTK ; Shell stack (sh)
DEFB SHSTKS ;
DEFB SHSIZE ;
DEFW Z3MSG ; Message buffer (msg)
DEFW EXTFCB ; External fcb (fcb)
DEFW EXTSTK ; External stack (stk)
DEFB 0 ; Quiet flag (1=quiet, 0=not quiet)
DEFW Z3WHL ; Wheel byte (whl)
DEFB 16 ; Processor speed (mhz)
DEFB 'P'-'@' ; Max disk letter
DEFB 31 ; Max user number
DEFB 1 ; 1 = Ok to accept DU:, 0 = Not Ok
DEFB 0 ; Crt selection ()
DEFB 0 ; Printer selection ()
DEFB 80 ; Crt 0: width
DEFB 24 ; # of lines
DEFB 22 ; # of text lines
; In Extended ENV, CRT 1 is replaced by System Info
;; DEFB 132 ; . CRT 1: Width
;; DEFB 24 ; # of lines
;; DEFB 22 ; # of text lines
; The Drive Vector is a 16-bit word in which a "1" bit indicates that a drive
; is active in the system. The bits are arranged as: PONMLKJIHGFEDCBA. When
; stored in memory, it is in normal form with the Low byte stored first.
E_DRVL DEFL [DRV_A & 1] + [DRV_B & 2] + [DRV_C & 4] + [DRV_D & 8]
E_DRVL DEFL E_DRVL + [DRV_E & 16] + [DRV_F & 32] + [DRV_G & 64]
E_DRVL DEFL E_DRVL + [DRV_H & 128] ; Low Byte Formed
E_DRVH DEFL [DRV_I & 1] + [DRV_J & 2] + [DRV_K & 4] + [DRV_L & 8]
E_DRVH DEFL E_DRVH + [DRV_M & 16] + [DRV_N & 32] + [DRV_O & 64]
E_DRVH DEFL E_DRVH + [DRV_P & 128] ; High Byte Formed
DEFW E_DRVH * 256 + E_DRVL
DEFB 0 ; (Reserved)
DEFB 80 ; Prt 0: width
DEFB 66 ; # of lines
DEFB 58 ; # of text lines
DEFB 1 ; Ff flag (1=can form feed)
;========= Usurped Prt1 storage for Resident User Space Vectors =========
;; DEFB 96 ; Prt 1: width
;; DEFB 66 ; # of lines
;; DEFB 58 ; # of text lines
;; DEFB 1 ; Ff flag (1=can form feed)
DEFB USPCS ; Remaining Free User Space (recs)
USRSP: DEFW USPC ; Res. User Space base Address (xx00h/xx80h)
DEFB USPCS ; Size of Res. User Space in 128-byte recs
;========================================================================
; In Extended ENV, Printers 2 and 3 are gone, replaced by System Info
;; DEFB 132 ; . PRT 2: Width
;; DEFB 66 ; # of lines
;; DEFB 58 ; # of text lines
;; DEFB 1 ; FF flag (1=can form feed)
;; DEFB 132 ; . PRT 3: Width
;; DEFB 88 ; # of lines
;; DEFB 82 ; # of text lines
;; DEFB 1 ; FF flag (1=can form feed)
DEFW CPR ; Ccp base address
DEFB [DOS-CPR]/128 ; Size of ccp in 128 byte records
DEFW DOS ; Bdos base address (xx00h or xx80h)
DEFB [BIOSJT-DOS]/128 ; Bdos buffer size in 128 byte records
DEFW BIOSJT ; Bios base address (nzbio if nzcom running)
DEFB 'SH ' ; Shell variable filename
DEFB 'VAR' ; Shell variable filetype
DEFB ' ' ; File 1
DEFB ' ' ;
DEFB ' ' ; File 2
DEFB ' ' ;
DEFB ' ' ; File 3
DEFB ' ' ;
DEFB ' ' ; File 4
DEFB ' ' ;
DEFB 0 ; Public drive area (zrdos +)
DEFB 0 ; Public user area (zrdos +)
; Env 128 bytes long
;***************************************************************************
; This TermCap Data for the New Z-System complies with VLIB4D specs and more
; fully describes the terminal and its capabilities. Edit the fields with
; values for your terminal characteristics, or use it as a template for an
; outboard definition loaded from the Startup file.
ENV2: DEFB ' ' ; Terminal Name (13 bytes, space terminated)
IF MOVCPM ; Dummies for boot track systems
B13: DEFB 0
B14: DEFB 0 ; Bit 7 = Normal TCAP
ELSE
B13: DEFB GOELD-ENV2 ; Offset to GOELD in graphics section
B14: DEFB 10000000B ; Bit 7 = Extended TCAP, remainder undefined
ENDIF ;~Movcpm
; B15 b0 Standout 0 = Half-Intensity, 1 = Reverse Video
; B15 b1 Power Up Delay 0 = None, 1 = 10-second delay
; B15 b2 No Wrap 0 = Line Wrap, 1 = No Wrap if char written
; to last character in line
; B15 b3 No Scroll 0 = Scroll, 1 = No Scroll if char written
; to last char in last line of diplay
; B15 b4 ANSI 0 = ASCII, 1 = ANSI
B15: DEFB 00000000B ; Reverse Vid, Wrap, Scroll, ASCII
; Additional single character cursor motion bytes
DEFB 'E'-'@' ; Cursor Up
DEFB 'X'-'@' ; Cursor Down
DEFB 'D'-'@' ; Cursor Right
DEFB 'S'-'@' ; Cursor Left
IF NOT MOVCPM ; Omit in boot systems to save space
; Instead, we simply zero remainder.
DEFB 0 ; CL Delay for Screen Clear
DEFB 0 ; CM Delay for Cursor Motion
DEFB 0 ; CE Delay for Clear to End-of-Line
; Strings start here
DEFB 0 ; (CL) Home Cursor and Clear Screen
DEFB 0 ; (CM) Cursor Motion
DEFB 0 ; (CE) Clear to End-of-Line
DEFB 0 ; (SO) Reverse On
DEFB 0 ; (SE) Reverse Off
DEFB 0 ; (TO) Terminal Init
DEFB 0 ; (TE) Terminal De-init
; Extensions to Standard Z3TCAP
DEFB 0 ; (LD) Delete Line
DEFB 0 ; (LI) Insert Line
DEFB 0 ; (CD) Clear from Cursor to End-of-Scr
; Attributes setting parameters
DEFB 0 ; Set Attributes
DEFB 0 ; Attributes String
; Read items from screen
DEFB 0 ; Report Cursor Pos'n (ESC Y Pn Pn)
DEFB 0 ; Read Line Under Cursor
GOELD: DEFB 0 ; On/Off Delay
; Graphics strings offset from Delay value.
DEFB 0 ; Graphics On
DEFB 0 ; Graphics Off
DEFB 0 ; Cursor Off
DEFB 0 ; Cursor On
; Graphics Characters
DEFB '*' ; Upper-Left corner [*]
DEFB '*' ; Upper-right corner [*]
DEFB '*' ; Lower-Left corner [*]
DEFB '*' ; Lower-right corner [*]
DEFB '-' ; Horizontal Line [-]
DEFB '|' ; Vertical Line [|]
DEFB '#' ; Full Block (hashed block) [*]
DEFB 'X' ; Hashed Block (big X) [#]
DEFB '+' ; Upper Intersect (Upside down "T") [+]
DEFB '+' ; Lower Intersect ("T") [+]
DEFB '+' ; Mid Intersect (Crossing Lines) [+]
DEFB '+' ; Right Intersect ("T" rotated left) [+]
DEFB '+' ; Left Intersect ("T" rotated right) [+]
DEFB 0
DEFB 0
ENDIF ;~Movcpm
ENVEND:
; IOP initial data
IF HAVIOP
IOPENT: JP IOPEND
JP IOPEND
JP IOPEND
JP IOPEND
JP CONST
JP CONIN
JP CONOUT
JP LIST
JP AUXOUT
JP AUXIN
JP LISTST
JP IOPEND
JP IOPEND
JP IOPEND
JP IOPEND
JP IOPEND
DEFB 'Z3IOP'
DEFB 'DUMMY '
IOPLEN EQU $-IOPENT
IOPEND EQU IOP+IOPLEN
XOR A
RET
ENDIF ;haviop
BCODEE EQU $
IF BANKED
INITCS EQU BCODEE-CBOOT0 ; Size of Banked (B2RAM) part of Init Code
ELSE
INITCS EQU BCODEE-CBOOT ; Size of Complete Init Code in DSEG
ENDIF
STKSAV: DEFS 2 ; Storage for Pointer while moving
HISAV: DEFS 2 ; Storage for Hi-ALV address
IF FASTWB
DSEG
BTTBL: DEFS 8 ; Initial WB DMA Block
ENDIF
;======================== End of CBOOT =============================


16
Source/BPBIOS/deblock.z80
View File

@ -11,8 +11,8 @@
SETDMA:
LD (DMAADR),BC ; Save the address
; CALL PRINT
; DEFB '[SETDMA',']'+80H
; CALL PRTSTRD
; DEFB '[SETDMA',']$'
RET
;.....
@ -92,8 +92,14 @@ BREAD: LD A,1 ; Non-zero
CSEG
WRITE:
; PUSH AF
; LD A,C
; CALL PRTSTRD
; DEFB '[WRITE($'
; CALL PRTHEXBYTE
; CALL PRTSTRD
; DEFB '[WRITE]$'
; DEFB ')]$'
; POP AF
IF BANKED
CALL BIOSTK
@ -238,10 +244,6 @@ FILHST: CALL FLUSH ; Empty hstbuf if write pending
INC HL ; Skip over logical sector
LD C,4 ; B=0 from above
LDIR ; Set Host DPH and DPB, physical sector
; LD A,(SEKPDN) ; WW
; LD (HSTPDN),A ; WW
LD A,(RSFLAG) ; Pre-read necessary?
OR A
CALL NZ,READHST ; Read a sector if so.

317
Source/BPBIOS/deblock.z80.sav
View File

@ -0,0 +1,317 @@
;**************************************************************************
; DEBLOCK - Disk Deblocking Buffer Routines. (Based on CP/M Example code)
;
; 1.0 - 3 Jul 92 - First General Release. HFB
; 0.0 - 8 Jul 91 - Initial Test Release. HFB
;**************************************************************************
CSEG
;.....
; Set DMA address given by registers B and C
SETDMA: LD (DMAADR),BC ; Save the address
RET
;.....
; Set track given by BC. While the entire word is saved here, only the
; lower byte is used in Floppy, SCSI and RAM Drivers.
SETTRK: LD (SEKTRK),BC
RET
;.....
; Set sector given by register C. This Sector number is the physical number
; of the desired sector and assumes that SECTRAN has been called. This value
; should reflect the Sector Number returned from SECTRAN. While the entire
; word is saved here, only the lower byte is used in Floppy, SCSI and RAM.
SETSEC: LD (SEKSEC),BC
;..fall thru to Return..
;.....
; Home the selected drive
HOME: RET ; Done by SELDSK
;.....
; Flush the host buffer to disk if any writes pending
FLUSH: LD A,(HSTWRT) ; Write pending?
OR A
RET Z ; ..quit if nothing pending
IF BANKED
CALL BIOSTK
CALL GOSYSB
ENDIF
JP WRITEHST ; Write host buffer to disk if so
;.....
; Sector blocking and de-blocking routines. Drive numbers used in these
; routines are logical drives.
READ:
IF BANKED
CALL BIOSTK
CALL GOSYSB
JP JBREAD
COMMON /BANK2/
ENDIF
BREAD: LD A,1 ; Non-zero
LD (READOP),A ; Read operation
INC A ; Treat as un-allocated (=wrual)
LD (WRTYPE),A ; Save it
JR ALLOC ; Go to common code
CSEG
WRITE:
IF BANKED
CALL BIOSTK
CALL GOSYSB
JP JBWRT
COMMON /BANK2/
ENDIF
BWRT: XOR A
LD (READOP),A ; Write operation
LD A,C ; Get write type from dos
LD (WRTYPE),A ; Save it
CP WRUAL ; Unallocated write?
JR NZ,CHKUNA ; ..jump if Not. check for unallocated sector
; Write to un-allocated sector, set parameters
LD A,(UCOUNT) ; Records/allocation group
LD (UNACNT),A ; Unallocated count
LD HL,SEKDSK ; Selcted disk, track & sector for us
LD DE,UNADSK ; (unadsk=sekdsk)
LD BC,4 ; (unatrk=sektrk)
LDIR ; (unasec=cpmsec)
CHKUNA: LD A,(UNACNT) ; Any unallocated records remaining?
OR A
JR Z,ALLOC ; ..jump if none remain
; More unallocated records remain. Check for any change.
DEC A ; Decrement unallocated count
LD (UNACNT),A ; And save it
LD B,4 ; Compare four bytes
LD HL,UNADSK ; Compare Old Disk, Track & Sector
LD DE,SEKDSK ; .to New Disk, Track & Sector
SLP0: LD A,(DE)
CP (HL) ; Same?
JR NZ,ALLOC ; ..jump if not
INC HL ; Else advance to next
INC DE
DJNZ SLP0 ; ..and loop til done
; Everything matches, anticipate the next sector
INC (HL) ; Unasec+1
LD A,(CPMSPT) ; Max sectors per track
CP (HL) ; Compare them
JR NZ,NOOVF ; ..jump if not ready for new track yet
; Overflow to next track
LD (HL),0 ; Unasec = 0
LD HL,(UNATRK)
INC HL
LD (UNATRK),HL ; Unatrk+1
; Match found. Pre-read not necessary.
NOOVF: XOR A ; Indicate no pre-read required
JR ALLOC1 ; ..and jump to common code
; Not an unallocated record. Requires pre-read
ALLOC: XOR A ; Clear acc
LD (UNACNT),A ; Start over
INC A
ALLOC1: LD (RSFLAG),A ; Force pre-read if a=1
; Read/Write common code
XOR A ; Clear acc
LD (ERFLAG),A ; Start with no errors
LD A,(SEKSEC) ; Get logical sector number
CALL PHYSEC ; Get physical sector
LD (SEKHST),A ; Physical sector (rel 0)
; Check host active
LD HL,HSTACT ; Host active flag
LD A,(HL) ; Get it
LD (HL),1 ; Set it in any case
OR A ; Set flags
JR Z,FILHST ; Flush Host Buffer if needed, then Read
; Host buffer is active. Same as seek buffer?
LD B,3 ; Loop compare of Disk and Track
LD HL,HSTDSK ; Compare Old Logical Disk & Trk
LD DE,SEKDSK ; .to New Logical Disk & Trk
SLP1: LD A,(DE)
CP (HL) ; Same?
JR NZ,FILHST ; ..jump if not same
INC HL ; Else advance to next
INC DE
DJNZ SLP1 ; ..loop til done
; Same track. Same host sector?
LD A,(SEKHST) ; New physical sector
CP (HL)
JR Z,MATCH ; The same
; Not a match.
FILHST: CALL FLUSH ; Empty hstbuf if write pending
; Fill the host buffer if necessary.
LD HL,SEKDSK ; Hstdsk=sekdsk
LD DE,HSTDSK ; Hsttrk=sektrk
LD BC,3
LDIR ; Move it
LD A,(SEKHST) ; Move the Sector too
LD (DE),A
INC DE
INC HL
INC HL ; Skip over logical sector
LD C,4 ; B=0 from above
LDIR ; Set Host DPH and DPB, physical sector
LD A,(RSFLAG) ; Pre-read necessary?
OR A
CALL NZ,READHST ; Read a sector if so.
XOR A ; Clear acc
LD (HSTWRT),A ; Clear write pending flag
; We have a match.
MATCH: LD A,(SECMSK) ; Get the sector mask
LD B,A ; Save it
LD A,(SEKSEC) ; Get new sector
AND B ; Mask off the high bits
RRA
LD H,A ; *128 MSB
LD L,0
RR L ; And LSB
; HL now has relative host buffer address of seksec
IF BANKED
IF INROM
LD A,(TPABNK) ; If bank in ROM, HSTBUF is in TPA
LD C,A
ELSE
LD A,(SYSBNK) ; If bank in RAM, HSTBUF is in System Bank
LD C,A
ENDIF
LD A,(DMABNK) ; Set Read Destination Bank
LD B,A
LD A,(READOP) ; Direction?
OR A
JR NZ,OKBNKS ; ..jump if read
LD A,B ; Else reverse banks
LD B,C
LD C,A
OKBNKS: CALL XMOVE ; Set source & destination banks
ENDIF
LD DE,HSTBUF ; Host buffer address
ADD HL,DE ; Point to the sector
LD DE,(DMAADR) ; User's buffer
LD BC,128 ; Number of bytes to transfer
LD A,(READOP) ; Direction?
OR A ; Set flags
JR NZ,RWMOVE ; ..jump if Read
; Must be Write. Mark and change direction.
INC A ; A = 1
LD (HSTWRT),A ; Set write pending flag
EX DE,HL ; Swap source and destination
; Move the data
RWMOVE: CALL MOVE ; Handle possible inter-bank move
; Data has been moved
LD A,(WRTYPE)
DEC A ; Directory write? set zero flag
LD A,(ERFLAG) ; In case of error
RET NZ ; ..go home if not a directory write
; This was a Directory Write. Write it now!
OR A ; Check error flag
RET NZ ; ..exit here if any error
LD (HSTWRT),A ; Clear write pending flag
CALL WRITEHST ; Write to disk
LD A,(ERFLAG) ; .Load resulting status
RET ; ..return it to caller
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Blocking/De-blocking variables
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
DSEG ; These variables must ALWAYS be visable, so put here
;.....
; Parameters relating to what we need in the Buffer Next
SEKSEC: DEFS 2 ; New skewed logical sector to seek
; --- The Following Variables MUST be kept in this order ---
SEKDSK: DEFS 1 ; New disk
SEKTRK: DEFS 2 ; New track
CPMSEC: DEFS 2 ; New logical sector
SEKDPB: DEFS 2 ; DPB for host
SEKDPH: DEFS 2 ; DPH for host
SEKHST: DEFS 1 ; New host physical sector to seek
;-----------------------------------------------------------
; Parameters relating to what's in the Buffer Now
; --- The Following Variables MUST be kept in this order ---
HSTDSK: DEFS 1 ; Current disk
HSTTRK: DEFS 2 ; Current track
HSTSEC: DEFS 1 ; Current physical sector
HSTDPB: DEFS 2 ; DPB for host
HSTDPH: DEFS 2 ; DPH for host
HSTACT: DEFS 1 ; Host buffer active flag
HSTWRT: DEFS 1 ; Host buffer write pending flag
;-----------------------------------------------------------
UCOUNT: DEFS 1 ; Number of logical records per alloc block
CPMSPT: DEFS 2 ; Logical sectors per track (byte)
SECSHF: DEFS 1 ; Sector shift factor
SECMSK: DEFS 1 ; Sector mask
DMAADR: DEFS 2 ; User's DMA buffer
IF BANKED AND NOT INROM
COMMON /B2RAM/ ; These values only used internally, bank them!
ENDIF
RSFLAG: DEFS 1 ; Read sector flag 0=skip, 1=read
READOP: DEFS 1 ; Read operation flag 1=read, 0=write
WRTYPE: DEFS 1 ; Write type 0=allocated, 1=dir, 2=unallocated
;.....
; Parameters to track Pre-Read Requirements
; --- The Following Variables MUST be kept in this order ---
UNADSK: DEFS 1 ; Current disk
UNATRK: DEFS 2 ; Current track
UNASEC: DEFS 1 ; Current record
;-----------------------------------------------------------
UNACNT: DEFS 1 ; Unallocated record count
;========================= End of DEBLOCK =================================


100
Source/BPBIOS/def-dx.lib
View File

@ -11,7 +11,7 @@
; BIOS Configuration Equates and Macros
DATE MACRO
DEFB '17 Jan 14' ; Date of this version
DEFB '30 Aug 01' ; Date of this version
ENDM
;--- Basic System and Z-System Section ---
@ -22,24 +22,25 @@ VERS EQU 13H ; Version number in BCD (Hex) (Major/Minor)
ELSE
VERS EQU 21H ; Version number w/Device Swapping permitted
ENDIF
BANKED EQU YES ; Is this a banked BIOS?
ZSDOS2 EQU YES ; Yes = Banked Dos, No = CP/M 2.2 Compatible
BANKED EQU NO ; Is this a banked BIOS?
ZSDOS2 EQU yes ; Yes = Banked Dos, No = CP/M 2.2 Compatible
INROM EQU NO ; Alternate bank in ROM?
MHZ EQU 18 ; Set to Speed in MHZ (6/9/12/16/18/24)
FASTWB EQU YES ; Yes if restoring CPR from banked RAM
FASTWB EQU yes ; Yes if restoring CPR from banked RAM
; ..No if restoring from Drive A
Z3 EQU YES ; Include ZCPR init code?
HAVIOP EQU no ; Include IOP code into Jump table?
HAVIOP EQU yes ; Include IOP code into Jump table?
;--- Memory configuration Section --- (Expansion Memory configured here)
IBMOVS EQU NO ; Yes = Inter-bank Moves allowed (Z180/64180)
IBMOVS EQU YES ; Yes = Inter-bank Moves allowed (Z180/64180)
; No = Include Common RAM transfer buffer
;--- Character Device Section ---
MORDEV EQU NO ; YES = Include any extra Char Device Drivers
MORDEV EQU yes ; YES = Include any extra Char Device Drivers
; NO = Only use the 4 defined Char Devices
ESCC_B EQU no ; Include ESCC Channel B Driver?
ESCC_B EQU true ; Include ESCC Channel B Driver?
; The following two devices result in non-standard data rates
; with the standard 16.00 MHz crystal in the P112. If a more
; "standard" crystal is used (12.288, 18.432, 24.576 MHz etc)
@ -48,65 +49,62 @@ ESCC_B EQU no ; Include ESCC Channel B Driver?
; assembling Polled or Interrupt-driven buffered input.
; Select the desired option for ASCI0 with the BUFFA0 flag,
; and BUFFA1 for ASCI1.
ASCI_0 EQU false ; Include ASCI0 Driver?
ASCI_0 EQU true ; Include ASCI0 Driver?
BUFFA0 EQU false ; Use buffered ASCI0 Input Driver?
ASCI_1 EQU false ; Include ASCI1 Driver?
BUFFA1 EQU false ; Use buffered ASCI1 Input Driver?
ASCI_1 EQU true ; Include ASCI1 Driver?
BUFFA1 EQU true ; Use buffered ASCI1 Input Driver?
QSIZE EQU 32 ; size of interrupt typeahead buffers (if used)
; ..must be 2^n with n<8
RTSCTS EQU no ; Include RTS/CTS code on Serial Outputs?
RTSCTS EQU yes ; Include RTS/CTS code on Serial Outputs?
XONOFF EQU no ; Include Xon/Xoff handshaking in Serial lines?
;--- Clock and Time Section ---
CLOCK EQU YES ; Include ZSDOS Clock Driver Code?
DS1202 EQU YES ; Use Dallas DS-1202 instead of Interrupt RTC?
CLKSET EQU YES ; Allow DS-1202 Clock Sets? (Error if No)
DS1202 EQU yes ; Use Dallas DS-1202 instead of Interrupt RTC?
CLKSET EQU no ; Allow DS-1202 Clock Sets? (Error if No)
TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
;--- Floppy Diskette Section ---
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU NO ; Auto select floppy formats?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
FLOPYH EQU yes ; Include "Hi-Density" Floppy Formats?
FLOPY8 EQU no ; Include 8" Floppy Formats?
MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made
RAMDSK EQU yes ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
HARDDSK EQU YES ; YES = Add Hard-disk Code, NO = Floppy Only
; (Pick 1 of 3 options below)
SCSI EQU NO ; YES = Use SCSI Driver
IDE EQU NO ; YES = Use IDE Driver
HDSK EQU YES ; YES = Use SIMH HDSK Driver
HDDMA EQU NO ; Use DMA-Controlled Hard Disk Data Transfers?
IDE EQU no ; YES = Use IDE Driver, NO = Use SCSI
HDDMA EQU yes ; Use DMA-Controlled Hard Disk Data Transfers?
; (DMA not implemented for GIDE)
UNIT_0 EQU YES ; Hard Disk Physical Unit 1
UNIT_1 EQU YES ; Hard Disk Physical Unit 2
UNIT_2 EQU YES ; Hard Disk Physical Unit 3
UNIT_1 EQU yes ; Hard Disk Physical Unit 2
UNIT_2 EQU NO ; Hard Disk Physical Unit 3
;--- Logical Drive Section ---
DRV_A EQU no ; Set each of these equates for the drive and
DRV_B EQU no ; partition complement of your system. Assume
DRV_A EQU yes ; Set each of these equates for the drive and
DRV_B EQU yes ; partition complement of your system. Assume
DRV_C EQU no ; that A-D are Floppies.
DRV_D EQU no
DRV_D EQU yes
DRV_E EQU yes ; Assume that E-L and N-P are Hard Disk
DRV_F EQU yes ; Partitions
DRV_G EQU yes
DRV_H EQU yes
DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
DRV_I EQU no
DRV_J EQU no
DRV_K EQU no
DRV_L EQU no
IF RAMDSK
DRV_M EQU yes ; This is Yes for RAM drive
ELSE
@ -114,7 +112,7 @@ DRV_M EQU no ; This is for drive if No RAM Drive present
ENDIF
DRV_N EQU yes
DRV_O EQU yes
DRV_P EQU no
DRV_P EQU yes
;========== Configuration Unique Equates (P112) ===========
;>>>>>>>>>>>>>>>>>>>>>>>>>>> W A R N I N G <<<<<<<<<<<<<<<<<<<<<<<<<<<<<
@ -123,7 +121,7 @@ DRV_P EQU no
REFRSH EQU NO ; Set to NO for only Static RAM, needed for
; systems with dynamic RAMs.
NOWAIT EQU NO ; Set to NO to use configured Wait States in
NOWAIT EQU no ; Set to NO to use configured Wait States in
; Hard Disk Driver. Yes to eliminate Waits.
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
@ -132,13 +130,13 @@ NOWAIT EQU NO ; Set to NO to use configured Wait States in
; increment and is ambiguously addressed occupying 0-1FFFFH. The upper
; memory bounds (BNKU, BNK3 and BNKM) should be set for your configuration.
BNK0 EQU BID_USR ; First TPA Bank (switched in/out) 40000H
BNK1 EQU BID_HB ; Second TPA Bank (Common Bank) 48000H
BNK2 EQU BID_SYS ; System Bank (BIOS, DOS, CPR) 50000H
BNKU EQU 00H ; User Area Bank 58000H
BNK0 EQU 08H ; First TPA Bank (switched in/out) 40000H
BNK1 EQU 09H ; Second TPA Bank (Common Bank) 48000H
BNK2 EQU 0AH ; System Bank (BIOS, DOS, CPR) 50000H
BNKU EQU 0BH ; User Area Bank 58000H
; (set to 0 to disable)
BNK3 EQU BID_RAMD ; First Bank for RAM disk 60000H
BNKM EQU BID_RAMM ; Maximum Bank # F8000H
BNK3 EQU 0CH ; First Bank for RAM disk 60000H
BNKM EQU 1FH ; Maximum Bank # F8000H
; With both on-board RAMs only (MEM1 or MEM2),
; the maximum Bank number is 11 (0BH).
@ -282,18 +280,18 @@ _DMA EQU 0A0H ; Diskette DMA Address
; FDC37C665/6 Serial Port (National 16550 compatible)
_RBR EQU 68H ;R Receiver Buffer
_THR EQU 68H ;W Transmit Holding Reg
_IER EQU 69H ;RW Interrupt-Enable Reg
_IIR EQU 6AH ;R Interrupt Ident. Reg
_FCR EQU 6AH ;W FIFO Control Reg
_LCR EQU 6BH ;RW Line Control Reg
_MCR EQU 6CH ;RW Modem Control Reg
_LSR EQU 6DH ;RW Line Status Reg
_MMSR EQU 6EH ;RW Modem Status Reg
_SCR EQU 6FH ;N/A Scratch Reg. (not avail in XT)
_DDL EQU 68H ;RW Divisor LSB | wih DLAB
_DLM EQU 69H ;RW Divisor MSB | set High
_RBR EQU 98H ;R Receiver Buffer
_THR EQU 98H ;W Transmit Holding Reg
_IER EQU 99H ;RW Interrupt-Enable Reg
_IIR EQU 9AH ;R Interrupt Ident. Reg
_FCR EQU 9AH ;W FIFO Control Reg
_LCR EQU 9BH ;RW Line Control Reg
_MCR EQU 9CH ;RW Modem Control Reg
_LSR EQU 9DH ;RW Line Status Reg
_MMSR EQU 9EH ;RW Modem Status Reg
_SCR EQU 9FH ;N/A Scratch Reg. (not avail in XT)
_DDL EQU 98H ;RW Divisor LSB | wih DLAB
_DLM EQU 99H ;RW Divisor MSB | set High
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Equates for the National DP8490/NCR 5380 Prototype SCSI controller

16
Source/BPBIOS/def-z33.lib → Source/BPBIOS/def-ww-z33.lib
View File

@ -14,6 +14,10 @@ DATE MACRO
DEFB '17 Jan 14' ; Date of this version
ENDM
AUTOCL MACRO
DEFB 8,'ZEX Z33 ',0 ; Autostart command line
ENDM
;--- Basic System and Z-System Section ---
MOVCPM EQU no ; Integrate into MOVCPM "type" loader?
@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU NO ; Auto select floppy formats?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made
RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
@ -108,13 +112,9 @@ DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
IF RAMDSK
DRV_M EQU yes ; This is Yes for RAM drive
ELSE
DRV_M EQU no ; This is for drive if No RAM Drive present
ENDIF
DRV_M EQU RAMDSK ; This is Yes for RAM drive
DRV_N EQU yes
DRV_O EQU yes
DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled
DRV_P EQU no
;========== Configuration Unique Equates (P112) ===========

16
Source/BPBIOS/def-z34bnk.lib → Source/BPBIOS/def-ww-z33bnk.lib
View File

@ -14,6 +14,10 @@ DATE MACRO
DEFB '17 Jan 14' ; Date of this version
ENDM
AUTOCL MACRO
DEFB 8,'ZEX Z33 ',0 ; Autostart command line
ENDM
;--- Basic System and Z-System Section ---
MOVCPM EQU no ; Integrate into MOVCPM "type" loader?
@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU NO ; Auto select floppy formats?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made
RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
@ -108,13 +112,9 @@ DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
IF RAMDSK
DRV_M EQU yes ; This is Yes for RAM drive
ELSE
DRV_M EQU no ; This is for drive if No RAM Drive present
ENDIF
DRV_M EQU RAMDSK ; This is Yes for RAM drive
DRV_N EQU yes
DRV_O EQU yes
DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled
DRV_P EQU no
;========== Configuration Unique Equates (P112) ===========

16
Source/BPBIOS/def-z34.lib → Source/BPBIOS/def-ww-z34.lib
View File

@ -14,6 +14,10 @@ DATE MACRO
DEFB '17 Jan 14' ; Date of this version
ENDM
AUTOCL MACRO
DEFB 8,'ZEX Z34 ',0 ; Autostart command line
ENDM
;--- Basic System and Z-System Section ---
MOVCPM EQU no ; Integrate into MOVCPM "type" loader?
@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU NO ; Auto select floppy formats?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made
RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
@ -108,13 +112,9 @@ DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
IF RAMDSK
DRV_M EQU yes ; This is Yes for RAM drive
ELSE
DRV_M EQU no ; This is for drive if No RAM Drive present
ENDIF
DRV_M EQU RAMDSK ; This is Yes for RAM drive
DRV_N EQU yes
DRV_O EQU yes
DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled
DRV_P EQU no
;========== Configuration Unique Equates (P112) ===========

16
Source/BPBIOS/def-z33bnk.lib → Source/BPBIOS/def-ww-z34bnk.lib
View File

@ -14,6 +14,10 @@ DATE MACRO
DEFB '17 Jan 14' ; Date of this version
ENDM
AUTOCL MACRO
DEFB 8,'ZEX Z34 ',0 ; Autostart command line
ENDM
;--- Basic System and Z-System Section ---
MOVCPM EQU no ; Integrate into MOVCPM "type" loader?
@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU NO ; Auto select floppy formats?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made
RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
@ -108,13 +112,9 @@ DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
IF RAMDSK
DRV_M EQU yes ; This is Yes for RAM drive
ELSE
DRV_M EQU no ; This is for drive if No RAM Drive present
ENDIF
DRV_M EQU RAMDSK ; This is Yes for RAM drive
DRV_N EQU yes
DRV_O EQU yes
DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled
DRV_P EQU no
;========== Configuration Unique Equates (P112) ===========

16
Source/BPBIOS/def-z41.lib → Source/BPBIOS/def-ww-z41.lib
View File

@ -14,6 +14,10 @@ DATE MACRO
DEFB '17 Jan 14' ; Date of this version
ENDM
AUTOCL MACRO
DEFB 8,'ZEX Z41 ',0 ; Autostart command line
ENDM
;--- Basic System and Z-System Section ---
MOVCPM EQU no ; Integrate into MOVCPM "type" loader?
@ -69,7 +73,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU NO ; Auto select floppy formats?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
@ -78,7 +82,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made
RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
@ -107,13 +111,9 @@ DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
IF RAMDSK
DRV_M EQU yes ; This is Yes for RAM drive
ELSE
DRV_M EQU no ; This is for drive if No RAM Drive present
ENDIF
DRV_M EQU RAMDSK ; This is Yes for RAM drive
DRV_N EQU yes
DRV_O EQU yes
DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled
DRV_P EQU no
;========== Configuration Unique Equates (P112) ===========

439
Source/BPBIOS/def-ww.lib
View File

@ -1,80 +1,369 @@
;:::::::::::::::::::::::::::::::::::::::::::::::**********************
; B/P BIOS Configuration and Equate File. ** System Dependant **
; - D-X Designs Pty Ltd P112 CPU Board - **********************
; HBIOS specific customizations
; Tailor your system here.
;
; 30 Aug 01 - Cleaned up for GPL release. HFB
; 11 May 97 - Added GIDE and adjusted HD equates. HFB
; 5 Jan 97 - Reformatted to Standard. HFB
; 10 Jun 96 - Initial Test Release. HFB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; BIOS Configuration Equates and Macros
;
; NOTE: Must make sure settings below match hardware and
; HBIOS configuration.
;
HBIOS EQU YES ; Use HBIOS functions
INTPXY EQU YES ; Internal HBIOS Proxy
HBLOC EQU 0FE00H ; Location of HBIOS proxy (if used)
;
; Set exactly one of the following to YES to specify platform
;
N8VEM EQU YES
ZETA EQU NO
N8 EQU NO
MK4 EQU NO
;
; Set either the following to YES (or both to NO for no clock code)
;
SIMHCLK EQU NO ; Direct SIMH clock access
HBCLK EQU YES ; HBIOS clock driver
;
; Set HB_HDDEV to appropriate hard disk driver
;
HB_HDDEV EQU HBDEV_HDSK ; SIMH HDSK Driver
;HB_HDDEV EQU HBDEV_IDE ; IDE Driver
;HB_HDDEV EQU HBDEV_SD ; SD Card Driver
;
; Set HB_MDDEV to appropriate memory disk driver
;
HB_MDDEV EQU HBDEV_MD ; Memory Disk Driver
;
; RAM/ROM disk sizes expressed as count of 2K blocks
;
HB_RAMBLKS EQU 192 ; 512K - 128K reserved / 2K per block
HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block
;HB_ROMBLKS EQU 448 ; 1024K - 128K reserved / 2K per block
;
; Layout of RAM banks
;
IF N8VEM OR ZETA
BID_RAMD EQU 80H
BID_RAMM EQU 8BH
BID_SYS EQU 8CH
BID_HB EQU 8DH
BID_USR EQU 8EH
BID_COM EQU 8FH
ENDIF
IF N8
BID_RAMD EQU 80H
BID_RAMM EQU 9BH
BID_SYS EQU 9CH
BID_HB EQU 9DH
BID_USR EQU 9EH
BID_COM EQU 9FH
ENDIF
IF MK4
BID_RAMD EQU 10H
BID_RAMM EQU 1BH
BID_SYS EQU 1CH
BID_HB EQU 1DH
BID_USR EQU 1EH
BID_COM EQU 1FH
ENDIF
;
IF N8 OR MK4
HB_IODEV EQU HBCIO_ASCI
ELSE
HB_IODEV EQU HBCIO_UART
ENDIF
;
IF INTPXY
MEMTOP EQU 0FFDFH ; Reserve memory above this for HBIOS
ELSE
MEMTOP EQU HBLOC - 1 ; Reserve memory above this for HBIOS
ENDIF
DATE MACRO
DEFB '17 Jan 14' ; Date of this version
ENDM
AUTOCL MACRO
DEFB 8,'ZEX Z41 ',0 ; Autostart command line
ENDM
;--- Basic System and Z-System Section ---
MOVCPM EQU no ; Integrate into MOVCPM "type" loader?
IF MOVCPM
VERS EQU 13H ; Version number in BCD (Hex) (Major/Minor)
ELSE
VERS EQU 21H ; Version number w/Device Swapping permitted
ENDIF
BANKED EQU YES ; Is this a banked BIOS?
ZSDOS2 EQU YES ; Yes = Banked Dos, No = CP/M 2.2 Compatible
INROM EQU NO ; Alternate bank in ROM?
MHZ EQU 18 ; Set to Speed in MHZ (6/9/12/16/18/24)
FASTWB EQU YES ; Yes if restoring CPR from banked RAM
; ..No if restoring from Drive A
Z3 EQU YES ; Include ZCPR init code?
HAVIOP EQU no ; Include IOP code into Jump table?
;--- Memory configuration Section --- (Expansion Memory configured here)
IBMOVS EQU NO ; Yes = Inter-bank Moves allowed (Z180/64180)
; No = Include Common RAM transfer buffer
;--- Character Device Section ---
MORDEV EQU NO ; YES = Include any extra Char Device Drivers
; NO = Only use the 4 defined Char Devices
ESCC_B EQU no ; Include ESCC Channel B Driver?
; The following two devices result in non-standard data rates
; with the standard 16.00 MHz crystal in the P112. If a more
; "standard" crystal is used (12.288, 18.432, 24.576 MHz etc)
; is used, the ports become usable.
; Driver code for ASCI0 and ASCI1 includes an option for
; assembling Polled or Interrupt-driven buffered input.
; Select the desired option for ASCI0 with the BUFFA0 flag,
; and BUFFA1 for ASCI1.
ASCI_0 EQU false ; Include ASCI0 Driver?
BUFFA0 EQU false ; Use buffered ASCI0 Input Driver?
ASCI_1 EQU false ; Include ASCI1 Driver?
BUFFA1 EQU false ; Use buffered ASCI1 Input Driver?
QSIZE EQU 32 ; size of interrupt typeahead buffers (if used)
; ..must be 2^n with n<8
RTSCTS EQU no ; Include RTS/CTS code on Serial Outputs?
XONOFF EQU no ; Include Xon/Xoff handshaking in Serial lines?
;--- Clock and Time Section ---
CLOCK EQU YES ; Include ZSDOS Clock Driver Code?
DS1202 EQU YES ; Use Dallas DS-1202 instead of Interrupt RTC?
CLKSET EQU YES ; Allow DS-1202 Clock Sets? (Error if No)
TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count)
;--- Floppy Diskette Section ---
BIOERM EQU yes ; Print BIOS error messages?
CALCSK EQU YES ; Calculate skew table?
AUTOSL EQU YES ; Auto select floppy formats?
; If AUTOSL=True, the next two are active...
FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers?
FLOPYH EQU no ; Include "Hi-Density" Floppy Formats?
FLOPY8 EQU no ; Include 8" Floppy Formats?
MORDPB EQU NO ; Include additional Floppy DPB Formats?
;--- RAM Disk Section ---
RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made
;--- Hard Disk Section ---
HARDDSK EQU YES ; YES = Add Hard-disk Code, NO = Floppy Only
; (Pick 1 of 3 options below)
SCSI EQU NO ; YES = Use SCSI Driver
IDE EQU NO ; YES = Use IDE Driver
HDSK EQU YES ; YES = Use SIMH HDSK Driver
HDDMA EQU NO ; Use DMA-Controlled Hard Disk Data Transfers?
; (DMA not implemented for GIDE)
UNIT_0 EQU YES ; Hard Disk Physical Unit 1
UNIT_1 EQU YES ; Hard Disk Physical Unit 2
UNIT_2 EQU YES ; Hard Disk Physical Unit 3
;--- Logical Drive Section ---
DRV_A EQU no ; Set each of these equates for the drive and
DRV_B EQU no ; partition complement of your system. Assume
DRV_C EQU no ; that A-D are Floppies.
DRV_D EQU no
DRV_E EQU yes ; Assume that E-L and N-P are Hard Disk
DRV_F EQU yes ; Partitions
DRV_G EQU yes
DRV_H EQU yes
DRV_I EQU yes
DRV_J EQU yes
DRV_K EQU yes
DRV_L EQU yes
DRV_M EQU RAMDSK ; This is Yes for RAM drive
DRV_N EQU yes
DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled
DRV_P EQU no
;========== Configuration Unique Equates (P112) ===========
;>>>>>>>>>>>>>>>>>>>>>>>>>>> W A R N I N G <<<<<<<<<<<<<<<<<<<<<<<<<<<<<
;>>> Do NOT Alter these unless you KNOW what you're doing <<<
;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
REFRSH EQU NO ; Set to NO for only Static RAM, needed for
; systems with dynamic RAMs.
NOWAIT EQU NO ; Set to NO to use configured Wait States in
; Hard Disk Driver. Yes to eliminate Waits.
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; For Z-180/HD64180 systems, The Bank numbers should reflect Physical
; memory in 32k increments. In P112, the ROM occupies the first 32k
; increment and is ambiguously addressed occupying 0-1FFFFH. The upper
; memory bounds (BNKU, BNK3 and BNKM) should be set for your configuration.
BNK0 EQU BID_USR ; First TPA Bank (switched in/out) 40000H
BNK1 EQU BID_HB ; Second TPA Bank (Common Bank) 48000H
BNK2 EQU BID_SYS ; System Bank (BIOS, DOS, CPR) 50000H
BNKU EQU 00H ; User Area Bank 58000H
; (set to 0 to disable)
BNK3 EQU BID_RAMD ; First Bank for RAM disk 60000H
BNKM EQU BID_RAMM ; Maximum Bank # F8000H
; With both on-board RAMs only (MEM1 or MEM2),
; the maximum Bank number is 11 (0BH).
;=========== CPU-dependent Equates, Zilog Z-180/Hitachi HD64180 ==========
CNTLA0 EQU 00H ; Control Port ASCI 0
CNTLA1 EQU 01H ; Control Port ASCI 1
STAT0 EQU 04H ; Serial port 0 Status
STAT1 EQU 05H ; Serial port 1 Status
TDR0 EQU 06H ; Serial port 0 Output Data
TDR1 EQU 07H ; Serial port 1 Output Data
RDR0 EQU 08H ; Serial port 0 Input Data
RDR1 EQU 09H ; Serial Port 1 Input Data
CNTR EQU 0AH ; HD64180 Counter port
TMDR0L EQU 0CH ; HD64180 DMA channel reg (low)
TMDR0H EQU 0DH ; HD64180 DMA channel reg (hi)
RLDR0L EQU 0EH ; CTC0 Reload Count, Low
RLDR0H EQU 0FH ; CTC0 Reload Count, High
TCR EQU 10H ; Interrupt Control Register
TMDR1L EQU 14H ; Timer Data Reg Ch1 (Low)
TMDR1H EQU 15H ; Timer Data Reg Ch1 (High)
RLDR1L EQU 16H ; Timer Reload Reg Ch1 (Low)
RLDR1H EQU 17H ; Timer Reload Reg Ch1 (High)
FRC EQU 18H ; Free-Running Counter
CCR EQU 1FH ; CPU Control Register (ZS8180/Z80182)
SAR0L EQU 20H ; DMA Channel 0 Register start (8 ports)
MAR1L EQU 28H ; DMA Channel 1 Register start (8 ports)
DSTAT EQU 30H ; DMA Status/Control port
DMODE EQU 31H ; DMA Mode Control port
DCNTL EQU 32H ; DMA/WAIT Control Register
IL EQU 33H ; Interrupt Segment Register
ITC EQU 34H ; Interrupt/Trap Control Register
RCR EQU 36H ; HD64180 Refresh Control register
CBR EQU 38H ; MMU Common Base Register
BBR EQU 39H ; MMU Bank Base Register
CBAR EQU 3AH ; MMU Common/Bank Area Register
OMCR EQU 3EH ; Operation Mode Control Reg
ICR EQU 3FH ; I/O Control Register
; Some bit definitions used with the Z-180 on-chip peripherals:
TDRE EQU 02H ; ACSI Transmitter Buffer Empty
RDRF EQU 80H ; ACSI Received Character available
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Extended Features of Z80182 for P112
WSGCS EQU 0D8H ; Wait-State Generator CS
ENH182 EQU 0D9H ; Z80182 Enhancements Register
PINMUX EQU 0DFH ; Interrupt Edge/Pin Mux Register
RAMUBR EQU 0E6H ; RAM End Boundary
RAMLBR EQU 0E7H ; RAM Start Boundary
ROMBR EQU 0E8H ; ROM Boundary
FIFOCTL EQU 0E9H ; FIFO Control Register
RTOTC EQU 0EAH ; RX Time-Out Time Constant
TTOTC EQU 0EBH ; TX Time-Out Time Constant
FCR EQU 0ECH ; FIFO Register
SCR EQU 0EFH ; System Pin Control
RBR EQU 0F0H ; MIMIC RX Buffer Register (R)
THR EQU 0F0H ; MIMIN TX Holding Register (W)
IER EQU 0F1H ; Interrupt Enable Register
LCR EQU 0F3H ; Line Control Register
MCR EQU 0F4H ; Modem Control Register
LSR EQU 0F5H ; Line Status Register
MDMSR EQU 0F6H ; Modem Status Register
MSCR EQU 0F7H ; MIMIC Scratch Register
DLATL EQU 0F8H ; Divisor Latch (Low)
DLATM EQU 0F9H ; Divisor Latch (High)
TTCR EQU 0FAH ; TX Time Constant
RTCR EQU 0FBH ; RX Time Constant
IVEC EQU 0FCH ; MIMIC Interrupt Vector
MIMIE EQU 0FDH ; MIMIC Interrupt Enable Register
IUSIP EQU 0FEH ; MIMIC Interrupt Under-Service Register
MMCR EQU 0FFH ; MIMIC Master Control Register
; Z80182 PIO Registers
DDRA EQU 0EDH ; Data Direction Register A
DRA EQU 0EEH ; Port A Data
DDRB EQU 0E4H ; Data Direction Register B
DRB EQU 0E5H ; Data B Data
DDRC EQU 0DDH ; Data Direction Register C
DRC EQU 0DEH ; Data C Data
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; ESCC Registers on Z80182
SCCACNT EQU 0E0H ; ESCC Control Channel A
SCCAD EQU 0E1H ; ESCC Data Channel A
SCCBCNT EQU 0E2H ; ESCC Control Channel B
SCCBD EQU 0E3H ; ESCC Data Channel B
; [E]SCC Internal Register Definitions
RR0 EQU 00H
RR1 EQU 01H
RR2 EQU 02H
RR3 EQU 03H
RR6 EQU 06H
RR7 EQU 07H
RR10 EQU 0AH
RR12 EQU 0CH
RR13 EQU 0DH
RR15 EQU 0FH
WR0 EQU 00H
WR1 EQU 01H
WR2 EQU 02H
WR3 EQU 03H
WR4 EQU 04H
WR5 EQU 05H
WR6 EQU 06H
WR7 EQU 07H
WR9 EQU 09H
WR10 EQU 0AH
WR11 EQU 0BH
WR12 EQU 0CH
WR13 EQU 0DH
WR14 EQU 0EH
WR15 EQU 0FH
; FDC37C665/6 Parallel Port in Standard AT Mode
DPORT EQU 8CH ; Data Port
SPORT EQU 8DH ; Status Port
CPORT EQU 8EH ; Control Port
; FDC37C665/6 Configuration Control (access internal registers)
CFCNTL EQU 90H ; Configuration control port
CFDATA EQU 91H ; Configuration data port
; FDC37C665/6 Floppy Controller on P112 (Intel 80277 compatible)
DCR EQU 92H ; Drive Control Register (Digital Output)
MSR EQU 94H ; Main Status Register
DR EQU 95H ; Data/Command Register
DRR EQU 97H ; Data Rate Register/Disk Changed Bit in B7
_DMA EQU 0A0H ; Diskette DMA Address
; FDC37C665/6 Serial Port (National 16550 compatible)
_RBR EQU 68H ;R Receiver Buffer
_THR EQU 68H ;W Transmit Holding Reg
_IER EQU 69H ;RW Interrupt-Enable Reg
_IIR EQU 6AH ;R Interrupt Ident. Reg
_FCR EQU 6AH ;W FIFO Control Reg
_LCR EQU 6BH ;RW Line Control Reg
_MCR EQU 6CH ;RW Modem Control Reg
_LSR EQU 6DH ;RW Line Status Reg
_MMSR EQU 6EH ;RW Modem Status Reg
_SCR EQU 6FH ;N/A Scratch Reg. (not avail in XT)
_DDL EQU 68H ;RW Divisor LSB | wih DLAB
_DLM EQU 69H ;RW Divisor MSB | set High
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Equates for the National DP8490/NCR 5380 Prototype SCSI controller
IF HARDDSK
NCR EQU 40H ; Base of NCR 5380
; 5380 Chip Registers
NCRDAT EQU NCR ; Current SCSI Data (Read)
; Output Data Register (Write)
NCRCMD EQU NCR+1 ; Initiator Command Register (Read/Write)
NCRMOD EQU NCR+2 ; Mode Register (Read/Write)
NCRTGT EQU NCR+3 ; Target Command Register (Read/Write)
NCRBUS EQU NCR+4 ; Current SCSI Bus Status (Read)
NCRST EQU NCR+5 ; Bus & Status Register (Read)
; Start DMA Send (Write)
NCRINT EQU NCR+7 ; Reset Parity/Interrupt (Read)
; Start DMA Initiator Receive (Write)
DMAACK EQU NCR+8 ; SCSI Dack IO Port (Read/Write)
; Bit Assignments for NCR 5380 Ports as indicated
B_ARST EQU 10000000B ; Assert *RST (NCRCMD)
B_AACK EQU 00010000B ; Assert *ACK (NCRCMD)
B_ASEL EQU 00000100B ; Assert *SEL (NCRCMD)
B_ABUS EQU 00000001B ; Assert *Data Bus (NCRCMD)
B_BSY EQU 01000000B ; *Busy (NCRBUS)
B_REQ EQU 00100000B ; *Request (NCRBUS)
B_MSG EQU 00010000B ; *Message (NCRBUS)
B_CD EQU 00001000B ; *Command/Data (NCRBUS)
B_IO EQU 00000100B ; *I/O (NCRBUS)
B_SEL EQU 00000010B ; *Select (NCRBUS)
B_PHAS EQU 00001000B ; Phase Match (NCRST)
B_BBSY EQU 00000100B ; Bus Busy (NCRST)
B_MBSY EQU 00000100B ; Monitor Busy Flag (NCRMOD)
B_DMA EQU 00000010B ; DMA Mode of transfer (NCRMOD)
ENDIF ;harddsk
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Equates reflecting GIDE Base address from Address Jumpers (if GIDE added)
; Set the base GIDE equate to the jumper setting on the GIDE board.
IF IDE
GIDE EQU 50H ; Set base of 16 byte address range
IDEDOR EQU GIDE+6 ; Digital Output Register
IDEDat EQU GIDE+8 ; IDE Data Register (16-bit wide)
IDEErr EQU GIDE+9 ; IDE Error Register
IDESCnt EQU GIDE+0AH ; IDE Sector Count Register
IDESNum EQU GIDE+0BH ; IDE Sector Number Register
IDECLo EQU GIDE+0CH ; IDE Cylinder Number (Low)
IDECHi EQU GIDE+0DH ; IDE Cylinter Number (High)
IDESDH EQU GIDE+0EH ; IDE S-Drive-Head Register
IDECmd EQU GIDE+0FH ; IDE Command/Status Register
CMDHOM EQU 10H ; Home Drive Heads
CMDRD EQU 20H ; Read Sector Command (w/retry)
CMDWR EQU 30H ; Write Sector Command (w/retry)
CMDVER EQU 40H ; Verify Sector(s) Command (w/retry)
CMDFMT EQU 50H ; Format Track Command
CMDDIAG EQU 90H ; Execute Diagnostics Command
CMDINIT EQU 91H ; Initialize Drive Params Command
CMDPW0 EQU 0E0H ; Low Range of Power Control Commands
CMDPW3 EQU 0E3H ; High Range of Power Control Commands
CMDPWQ EQU 0E5H ; Power Status Query Command
CMDID EQU 0ECH ; Read Drive Ident Data Command
ENDIF ;ide
;=================== End Unique Equates =======================


8
Source/BPBIOS/dpbhd-dx.lib
View File

@ -59,7 +59,7 @@
; sectors per track
DEFB 0 ; Physical tracks/side (No Meaning in HD)
HSIZ0 EQU 2048 ; # of blocks in first Partition (498 trks)
HSIZ0 EQU 996 ; # of blocks in first Partition (498 trks)
; SQ-312 SQ312A SQ-306 ST-225 ST125N
; ------ ------ ------ ------ ------
@ -68,10 +68,10 @@ DPB50: DEFW 64 ; Sctrs/Trk 64 64 64 64 64
DEFB 31 ; Block Mask 31 31 31 31 31
DEFB 1 ; Extent Mask 1 1 1 1 1
DEFW HSIZ0-1 ; Disk Size-1 683 995 495 995 995
DEFW 511 ; Dir Max 767 767 767 767 767
DEFB 0F0H,0 ; Alloc 0,1 0FC 0FC 0FC 0FC 0FC
DEFW 1023 ; Dir Max 767 767 767 767 767
DEFB 0FFH,0 ; Alloc 0,1 0FC 0FC 0FC 0FC 0FC
DEFW 0 ; Check Size 0 0 0 0 0
DEFW 2096 ; Trk Offset 2 2 2 2 2
DEFW 2 ; Trk Offset 2 2 2 2 2
ENDIF
;.....

40
Source/BPBIOS/dpbm-ww.lib
View File

@ -0,0 +1,40 @@
;=========== RAM Disk Parameter Block =============************************
; - D-X Designs Pty Ltd P112 - ** Hardware Dependent **
; ************************
; 1.1 - 28 Aug 01 - Cleaned up for GPL release. HFB
; 1.0 - 10 Jun 96 - Initial Release for P112 derived from YASBEC. HFB
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; The B/P BIOS DPB's contain prefix information that provide data on the
; logical format. This table contains only DPB Data on a RAM Disk.
; Format Type Bytes 0 and 1 are configured in the same way as Hard Disks.
; See DPBHD-xx.LIB and DPB.LIB files for descriptions of these two bytes.
; NOTE: No Skew Table needed since RAM Disk Format is locked and not needed
;.....
; P112 RAM Disk Format assuming 32k for a single System bank
DEFB 'D-X Desig','n'+80H ; Id - 10 bytes
DEFB FIXDSK ; Format type byte 0
DEFB SPEED8+SEC128+ALC2K ; Format type byte 1
DEFB -1 ; Skew factor (== Only the +/- sign used)
DEFB 0 ; Starting sector number
DEFB 32 ; Physical # sectors/trk (32=4k per 'track')
DEFB 0 ; Physical tracks/side (No Meaning in HD)
MSIZ EQU HB_RAMBLKS ; # of blocks in Drive (by Memory/Block size)
; 2x128k = 80 (160k) - 64 (128k) w/User Bank
; 1x512k = 192 (384k) - 176 (352k) w/User Bank
; 2x512k = 448 (896k) - 432 (864k) w/User Bank
DPBRAM: DEFW 32 ; Sectors/Track
DEFB 4 ; Block Shift Factor (2k per block)
DEFB 0FH ; Block Mask
DEFB 1 ; Extent Mask
DEFW MSIZ-1 ; Disk Size-1 256 kB 512 kB 1024 kB
DEFW 128 - 1 ; Dir Max -or- 64 128 256
DEFB 0C0H, 00 ; Alloc 0, 1 80H,0 0C0H,0 0F0H,0
DEFW 0000 ; Check Size
DEFW 0000 ; Trk Offset from beginning of Ram Bank base
;==================== End of RAM Disk DPB ====================

2
Source/BPBIOS/dpbram.lib
View File

@ -68,7 +68,7 @@ SPEED8 EQU 10000000B
; When calculating Skew for Read/Write, a Negative Number indicates the
; Sectors are to be Read without Skew Translation.
;WW CSEG
CSEG
;.....
; DS/QD AMPRO/SB180/ON

274
Source/BPBIOS/dph.sav
View File

@ -0,0 +1,274 @@
;:::::::::::::::::::::::::::::::::::::::::::::::*****************************
; DPH Pointer Table ** Configuration Dependant **
; (This table may be in Banked Memory) *****************************
;
; All access to DPH's are done through this table. A Zero in this table
; indicates the logical drive does Not exist. The table is indexed by logical
; drive (e.g. A-P). To swap logical drives, exchange entries in this table.
;
; 1.0 - 31 Aug 92 - General Release. HFB
; 0.1 - 3 Jan 92 - Initial Release. HFB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
CSEG
DPHTBL:
IF DRV_A
DEFW DPH$00 ; Dph for drive A (Floppy)
ELSE
DEFW 00
ENDIF
IF DRV_B
DEFW DPH$01 ; Dph for drive B (Floppy)
ELSE
DEFW 00
ENDIF
IF DRV_C
DEFW DPH$02 ; Dph for drive C (Floppy)
ELSE
DEFW 00
ENDIF
IF DRV_D
DEFW DPH$03 ; Dph for drive D (Floppy)
ELSE
DEFW 0 ; Dph for drive D
ENDIF
IF DRV_E AND HARDDSK
DEFW DPH$50 ; Dph for Hard drive Partition E
ELSE
DEFW 00
ENDIF
IF DRV_F AND HARDDSK
DEFW DPH$51 ; Dph for Hard drive Partition F
ELSE
DEFW 00
ENDIF
IF DRV_G AND HARDDSK
DEFW DPH$52 ; Dph for Hard drive Partition G
ELSE
DEFW 00
ENDIF
IF DRV_H AND HARDDSK
DEFW DPH$53 ; Dph for Hard drive Partition H
ELSE
DEFW 00
ENDIF
IF DRV_I AND HARDDSK
DEFW DPH$54 ; Dph for Hard drive Partition I
ELSE
DEFW 00
ENDIF
IF DRV_J AND HARDDSK
DEFW DPH$55 ; Dph for Hard drive Partition J
ELSE
DEFW 00
ENDIF
IF DRV_K AND HARDDSK
DEFW DPH$56 ; Dph for Hard drive Partition K
ELSE
DEFW 00
ENDIF
IF DRV_L AND HARDDSK
DEFW DPH$57 ; Dph for Hard drive Partition L
ELSE
DEFW 00
ENDIF
IF DRV_M AND RAMDSK
DEFW DPH$90 ; Dph for RAM Drive M in DPHM-xx.Z80
ELSE
DEFW 00 ; Dph for drive M
ENDIF ;ramdsk
IF DRV_N AND HARDDSK
DEFW DPH$58 ; Dph for Hard drive Partition N
ELSE
DEFW 00
ENDIF
IF DRV_O AND HARDDSK
DEFW DPH$59 ; Dph for Hard drive Partition O
ELSE
DEFW 00
ENDIF
IF DRV_P AND HARDDSK
DEFW DPH$60 ; Dph for Hard drive Partition P
ELSE
DEFW 00
ENDIF
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Disk Parameter Headers (DPH) for Drives MUST be in Common Memory
;
; The DPH's used have a two byte prefix which indicates the Physical
; Unit # and the Driver Number for the Drive. The Physical Unit Number
; is Controller specific, while the driver number is used to select
; which service routines are to be called to satisfy service requests.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Drive Type Byte
; ---------------
; D D D D D D D D
; 7 6 5 4 3 2 1 0
; | | | | | +-+-+--- Disk Size: 000=Fixed Disk, 001=8", 010=5.25", 011=3.5"
; | | | | +--------- 0 = Single Sided, 1 = Double Sided
; | | | +----------- 0 = Normal Step, 1 = Double-Step Drive
; | | +------------- 0 = Motor Always On, 1 = Drive Motor Control needed
; | +--------------- 0 = Max Speed is Normal 5.25" (300rpm)
; | 1 = 8" and Hi-Density 5.25" Max Speed (360rpm)
; +----------------- 0 = Double-Density, 1 = Single-Density
FIXDSK EQU 00000000B
DSK8 EQU 00000001B
DSK5 EQU 00000010B
DSK3 EQU 00000011B
SS EQU 00000000B
DS EQU 00001000B
DD EQU 00000000B
SD EQU 10000000B
DVSPDH EQU 01000000B
DVSPDL EQU 00000000B
MTR EQU 00100000B
NOMTR EQU 00000000B
DBLSTP EQU 00010000B
NODBLS EQU 00000000B
CSEG
IF DRV_A
XDPH00: DB LOCKF ; Format lock flag
DB DSK5+DS+DD+DVSPDL+MTR ; Disk drive type
DB 1 ; Driver id
DB 0 ; Physical drive number
DPH$00: DW 0 ; Skew table pointer
DW 0,0,0 ; Scratch area
DW DIRBUF ; Directory buffer pointer
IF AUTOSL ; For autoselection, we need RAM Space
DEFW DPB$00+DPHDSZ ; Ram area for DPB #0
ELSE
DW DPBRA ; Pointer to current DPB for Drive 0
ENDIF
DW CHK$00 ; Wacd for drive 00
DW ALV$00 ; Alloc vector for 00
XDPHSZ EQU $-XDPH00 ; Calc for xdph size
XDPHOF EQU DPH$00-XDPH00 ; Offset from xdph to dph
ENDIF ;Drv_a
IF DRV_B
XDPH01: DB LOCKF ; Format lock flag
DB DSK5+DS+DD+DVSPDL+MTR ; Disk drive type
DB 1 ; Driver id
DB 1 ; Physical drive number
DPH$01: DW 0 ; Skew table pointer
DW 0,0,0 ; Scratch area
DW DIRBUF ; Directory buffer pointer
IF AUTOSL
DEFW DPB$01+DPHDSZ ; Ram space for DPB #1
ELSE
DW DPBRB ; Pointer to current DPB for Drive 1
ENDIF
DW CHK$01 ; Wacd for drive 01
DW ALV$01 ; Alloc vector for 01
ENDIF ;Drv_b
IF DRV_C
XDPH02: DB LOCKF ; Format lock flag
DB DSK5+DS+DD+DVSPDL+MTR ; Disk drive type
DB 1 ; Driver id
DB 2 ; Physical drive number
DPH$02: DW 0 ; Skew table pointer
DW 0,0,0 ; Scratch area
DW DIRBUF ; Directory buffer pointer
IF AUTOSL
DEFW DPB$02+DPHDSZ ; Ram space for DPB #2
ELSE
DW DPBRA ; Pointer to current DPB for Drive #2
ENDIF
DW CHK$02 ; Wacd for drive 02
DW ALV$02 ; Alloc vector for 02
ENDIF
IF DRV_D
XDPH03: DB LOCKF ; Format lock flag
DB DSK3+sS+DD+DVSPDl+MTR ; Disk drive type
DB 1 ; Driver id
DB 3 ; Physical drive number
DPH$03: DW 0 ; Skew table pointer
DW 0,0,0 ; Scratch area
DW DIRBUF ; Directory buffer pointer
IF AUTOSL
DEFW DPB$03+DPHDSZ ; Ram space for DPB #3
ELSE
DW DPBRA ; Pointer to current DPB for Drive #3
ENDIF
DW CHK$03 ; Wacd for drive 03
DW ALV$03 ; Alloc vector for 03
ENDIF ;Drv_d
; Directory Buffer Allocation. Only One Directory Buffer is required. Since
; we want it to be the first item in DSEG, it must be placed here.
DSEG
IF BANKED
DIRBUF EQU CBOOT ; Resident Init code in here
ELSE
DIRBUF EQU $
ENDIF
ORG DIRBUF+128 ; Directory buffer
; If we are using autoselection of drives, we copy the XDPB/DPB structure
; for the identified format to RAM thereby allowing emulation of formats by
; installing data for the desired format and locking the DPH. For Non-auto-
; select, we simply point to the read-only structure defined in DPB.LIB.
IF AUTOSL
IF DRV_A
DPB$00: DEFS DPBSIZ ; Size of XDPB+DPB
ENDIF
IF DRV_B
DPB$01: DEFS DPBSIZ
ENDIF
IF DRV_C
DPB$02: DEFS DPBSIZ
ENDIF
IF DRV_D
DPB$03: DEFS DPBSIZ
ENDIF
ENDIF ;autosel
IF [BANKED AND ZSDOS2]
COMMON /B2RAM/
ELSE
DSEG
ENDIF
; Directory Check Buffers. Each Buffer MUST be NDE/4 Bytes long at minimum.
; Each Logical Drive with removable media MUST have its own check buffer.
IF DRV_A
CHK$00: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries
ENDIF
IF DRV_B
CHK$01: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries
ENDIF
IF DRV_C
CHK$02: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries
ENDIF
IF DRV_D
CHK$03: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries
ENDIF
; Allocation BitMap Buffers. Each MUST be NAB/8 Bytes at Minimum.
; Each Logical Floppy Drive MUST have an Allocation BitMap Buffer.
IF DRV_A
ALV$00: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives
ENDIF
IF DRV_B
ALV$01: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives
ENDIF
IF DRV_C
ALV$02: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives
ENDIF
IF DRV_D
ALV$03: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives
ENDIF
;======================= End of DPH.LIB =======================


3
Source/BPBIOS/dphhd.lib
View File

@ -188,8 +188,5 @@ ALV$59: DEFS HSIZ9/8+1
IF DRV_P
ALV$60: DEFS HSIZ10/8+1
ENDIF
DEFS 1024 ; WW
;======================= End of DPHHD.LIB =========================


193
Source/BPBIOS/dphhd.lib.sav
View File

@ -0,0 +1,193 @@
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Additional Disk Parameter Headers (DPH) for Hard Drives Generic File
; (MUST be in Common Memory)
; This data must match information contained in the DPB table for Hard Drives.
;
; 1.1 - 28 Aug 01 - Made generic module for GPL release. HFB
; 1.0 - 31 Aug 92 - General Release. HFB
; 0.1 - 3 Jan 92 - Initial release. HFB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; The Physical Drive Number byte (XDPH+3) is simply an index to the Physical
; Drive as specified in the ICFG-xx.Z80 file. Up to three physical drives
; may be defined in that section, the first byte of which defines the
; Physical/Logical Unit Address (Device & LUN for SCSI, Master/Slave for IDE),
; and a flag bit to specify whether or not the drive is physically present.
; See ICFG-xx.Z80 for a definition of the data.
CSEG
IF DRV_E
XDPH50: DEFB TRUE ; Format lock flag (Lock First Hard Drive)
DEFB FIXDSK ; Disk drive type
DEFB 2 ; Driver ID
DEFB 0 ; Physical drive [0..2] for this Partition
DPH$50: DEFW 0 ; Skew table pointer
DEFW 0,0,0 ; Scratch area
DEFW DIRBUF ; Directory buffer pointer
DEFW DPB50 ; Pointer to DPB for first partition/drive
DEFW 0 ; No Wacd for hard drive
DEFW ALV$50 ; Alloc vector for first Partition
ENDIF
IF DRV_F
XDPH51: DEFB TRUE ; --- Second Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 0
DPH$51: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB51 ; Pointer to DPB for second Partition/Drive
DEFW 0
DEFW ALV$51 ; Alloc vector for second Partition/Drive
ENDIF
IF DRV_G
XDPH52: DEFB TRUE ; --- Third Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 0
DPH$52: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB52 ; Pointer to DPB for third Partition/Drive
DEFW 0
DEFW ALV$52 ; Alloc vector for third Partition/Drive
ENDIF
IF DRV_H
XDPH53: DEFB TRUE ; --- Fourth Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 0
DPH$53: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB53 ; Pointer to DPB for fourth Partition/Drive
DEFW 0
DEFW ALV$53 ; Alloc vector for fourth Partition/Drive
ENDIF
IF DRV_I
XDPH54: DEFB TRUE ; --- Fifth Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$54: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB54 ; Pointer to DPB for fifth Partition/Drive
DEFW 0
DEFW ALV$54 ; Alloc vector for fifth Partition/Drive
ENDIF
IF DRV_J
XDPH55: DEFB TRUE ; --- Sixth Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$55: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB55 ; Pointer to DPB for sixth Partition/Drive
DEFW 0
DEFW ALV$55 ; Alloc vector for sixth Partition/Drive
ENDIF
IF DRV_K
XDPH56: DEFB TRUE ; --- Seventh Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$56: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB56 ; Pointer to DPB for seventh Partition/Drive
DEFW 0
DEFW ALV$56 ; Alloc vector for seventh Partition/Drive
ENDIF
IF DRV_L
XDPH57: DEFB TRUE ; --- Eighth Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$57: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB57 ; Pointer to DPB for eighth Partition/Drive
DEFW 0
DEFW ALV$57 ; Alloc vector for eighth Partition/Drive
ENDIF
;<<< --- Drive M is for RAM Drive --- >>>
IF DRV_N
XDPH58: DEFB TRUE ; --- Ninth Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$58: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB58 ; Pointer to DPB for ninth Partition/Drive
DEFW 0
DEFW ALV$58 ; Alloc vector for ninth Partition/Drive
ENDIF
IF DRV_O
XDPH59: DEFB TRUE ; --- Tenth Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$59: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB59 ; Pointer to DPB for tenth Partition/Drive
DEFW 0
DEFW ALV$59 ; Alloc vector for tenth Partition/Drive
ENDIF
IF DRV_P
XDPH60: DEFB TRUE ; --- Eleventh Hard Drive/Partition
DEFB FIXDSK
DEFB 2
DEFB 1
DPH$60: DEFW 0
DEFW 0,0,0
DEFW DIRBUF
DEFW DPB60 ; Pointer to DPB for eleventh Partition/Drive
DEFW 0
DEFW ALV$60 ; Alloc vector for eleventh Partition/Drive
ENDIF
; Allocation BitMap Buffers. Each MUST be # Alloc Blks/8 Bytes at Minimum.
; Each Logical Drive MUST have an Allocation BitMap Buffer.
COMMON /RESVD/ ; Reserve space for BPBUILD
IF DRV_E
ALV$50: DEFS HSIZ0/8+1 ; Space for First Logical Drive Alloc Blocks
ENDIF
IF DRV_F
ALV$51: DEFS HSIZ1/8+1 ; Space for Second Logical Drive Alloc Blocks
ENDIF
IF DRV_G
ALV$52: DEFS HSIZ2/8+1 ; Space for Third Logical Drive Alloc Blocks
ENDIF
IF DRV_H
ALV$53: DEFS HSIZ3/8+1 ; Space for Fourth Logical Drive Alloc Blocks
ENDIF
IF DRV_I
ALV$54: DEFS HSIZ4/8+1
ENDIF
IF DRV_J
ALV$55: DEFS HSIZ5/8+1
ENDIF
IF DRV_K
ALV$56: DEFS HSIZ6/8+1
ENDIF
IF DRV_L
ALV$57: DEFS HSIZ7/8+1
ENDIF
;<<< --- Drive M is RAM --- >>>
IF DRV_N
ALV$58: DEFS HSIZ8/8+1
ENDIF
IF DRV_O
ALV$59: DEFS HSIZ9/8+1
ENDIF
IF DRV_P
ALV$60: DEFS HSIZ10/8+1
ENDIF
;======================= End of DPHHD.LIB =========================


16
Source/BPBIOS/fdc-dx.z80
View File

@ -299,12 +299,7 @@ SPEC3: OR B ; Add in Step Rate
; Assumes STHDRV, SPEC, STSIZE and STMODE called first.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
RECAL:
CALL PRINT
DEFB '[RECAL',']'+80H
LD A,3 ; Give this 3 chances to Home
RECAL: LD A,3 ; Give this 3 chances to Home
RECAL1: LD (RETRYS),A
PUSH BC ; Save needed regs
LD BC,2*256+7 ; Two bytes, Recalibrate = 7
@ -651,8 +646,7 @@ FDCI2: INI ; Read a byte from (C) to (HL)
; Enter the Result Phase of the Command. Gather returned bytes
FDCRES:
;WW EI ; Interrupts Ok now if in Result Phase
FDCRES: EI ; Interrupts Ok now if in Result Phase
LD HL,ST0 ; Point to Status Result area
ISGO: CALL WRDY
BIT 4,A ; End of Status/Result?
@ -667,7 +661,7 @@ ISGO: CALL WRDY
; executing a Check Interrupt Command returning ST0 in A.
FDCDN: PUSH HL ; Don't alter regs
;WW EI ; (Ints Ok Now)
EI ; (Ints Ok Now)
FDCDN0: CALL WRDY ; Ready? (leave Ints alone)
LD A,08H ; Else Issue Sense Interrupt Status Comnd
OUT0 (DR),A
@ -704,7 +698,7 @@ MOTOR: PUSH AF ; Save Reg
OR A ; Already On?
LD A,(MONTIM) ; (get Default On Time)
LD (MOTIM),A ; always reset
;WW EI ; Insure Ints are Active
EI ; Insure Ints are Active
JR NZ,MOTORX ; ..exit if Motors On..they will stay On
LD A,(HDR) ; Get current Drive
@ -1138,7 +1132,7 @@ Int0X: POP HL ; Restore Regs
POP DE
POP BC
; Restore Stack if Needed
;WW EI ; Insure Interrupts are Enabled
EI ; Insure Interrupts are Enabled
RET
;.....

305
Source/BPBIOS/fdc-ww.z80
View File

@ -0,0 +1,305 @@
;::::::::::::::::::::::::::::::::::::::::::::******************************
; Floppy Disk Routines ***** Hardware Dependent *****
; - D-X Designs Pty Ltd P112 - ******************************
;
; 1.3 - 26 Aug 01 - Cleaned up for GPL Release. HFB
; 1.2c- 12 May 97 - Cleaned up source, modified STSIZE Code (again). HFB
; 1.2b- 22 Apr 97 - Changed 5.25" Hi/Lo Speed controls. HFB
; 1.0a- 23 Mar 97 - (test) fixes. HFB
; 1.0 - 13 Aug 96 - Initial Release for P112 from YASMIO. HFB
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;
IF BANKED
COMMON /BANK2/
ELSE
CSEG
ENDIF
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; STMODE (Function 0) - Set the FDC mode for Read/Write operations.
;
; Enter : A = Single-Density Flag (0 = Double Dens, 0FFH = Single Dens)
; Return: Nothing
; Uses : AF All other Registers Preserved/Not Affected
;
; Assumes STSIZE and STSECT called first
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
STMODE: CALL PANIC
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; STSIZE (Function 1) - Set Drive Size (3.5", 5.25", 8"), Drive Speed
; (High/Low) Capability, and a Boolean flag for whether Motor Control is
; needed by the Drive.
;
; Enter : A = Hi Speed Flag ( 0 = Normal, 0FFH = High Speed Capable)
; D = Motor Flag (0 = No Motor Control, 0FFH = Motor needed)
; E = Drive Size (0 = Hard, 001 = 8", 010 = 5.25", 011 = 3.5")
; Return: Nothing
; Uses : AF All other Registers Preserved/Not Affected
;
; Assumes STHDRV Called Previously. Call before calling STMODE.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
STSIZE: CALL PANIC
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; STHDRV (Function 2) - Set Head and Drive for Disk Operations.
;
; Enter : A = Unit # in D0-D1, Head in D2
; Return: Nothing
; Uses : AF All other Registers Preserved/Not Affected
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
STHDRV: CALL PANIC
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; STSECT (Function 3) - Set Sector Number, Sector Size and Last Sector #
;
; Enter : A = Physical Sector Number
; D = Sector Size (0=128, 1=256, 2=512, 3=1024)
; E = Last Physical Sector # on Side
; Return: Nothing
; Uses : AF All other Registers Preserved/Not Affected
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
STSECT: CALL PANIC
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; SPEC (Function 4) - Do a Specify Command, setting Step Rate and Head
; Load/Unload Time. Values are rounded up if not even increments.
;
; Enter : A = Step Rate (in mS; Bit 7 = 1 for 8" drive
; D = Head Unload Time (in mS)
; E = Head Load Time (in mS)
; Return: Nothing
; Uses : AF All other Registers Preserved/Not Affected
;
; Assumes STSIZE called previously to set DRVSPD variable.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
SPEC: CALL PANIC
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; RECAL (Function 5) - Recalibrate Drive (moves heads to track 0).
;
; Enter : Nothing
; Return: A = 0 if Ok, NZ if Error. Flags reflect A
; Uses : AF All other Registers Preserved/Not Affected
;
; NOTE: BC Must be preserved by this routine.
; Assumes STHDRV, SPEC, STSIZE and STMODE called first.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
RECAL: CALL PANIC
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; SEEK (Function 6) - Set the Track for disk operations and seek to it.
;
; Enter : A = Desired Track Number
; D = Verify flag (0=No, FF=Yes)
; E = Double-step Flag (E <> 0 for Double-step)
; Return: A = 0, Zero Flag Set (Z) if Ok, A <> 0 Zero Clear (NZ) if Error
; Uses : AF All other Registers Preserved/Not Affected
;
; Assumes STHDRV, SPEC, STSIZE and STMODE are called first.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
SEEK: CALL PANIC
XOR A
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; SREAD (Function 7) - Read a Sector from the Floppy Disk. The Mode,
; Head/Drive, Track, and Sector must have already been set.
;
; Enter : HL --> Read Buffer
; Return: A = 0, Zero Set (Z) if Ok, A <> 0, Zero Clear (NZ) if Error.
; Uses : AF,HL. All other Registers Preserved/Not Affected
;
; Assumes STMODE, STHDRV, STSECT, SPEC and SEEK Called First.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
SREAD: CALL PANIC
XOR A
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; SWRITE (Function 8) - Write a Sector to the Floppy Disk. The Mode,
; Head/Drive, Track, and Sector must have already been set.
;
; Enter : HL --> Write Buffer
; Return: A = 0, Zero Flag Set (Z) if Ok, A <> 0 Zero Clear (NZ) if Errors
; Uses : AF,HL. All other registers Preserved/Not Affected.
; Assumes STMODE, STHDRV, STSECT, SPEC and SEEK Called First.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
SWRITE: CALL PANIC
XOR A
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; READID (Function 9) - Read the first Valid Address Mark on a track.
;
; Enter : Nothing
; Return: A = 0 if Ok, NZ if Error. Flags reflect A
; Uses : AF All other Registers Preserved/Not Affected
;
; Assumes STHDRV, SPEC, STSIZE and STMODE called first.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
READID: CALL PANIC
XOR A
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; RETDST (Function 10) - Return the status of a drive.
; This routine reports a "765" Controller type instead of actual number.
;
; Enter : Nothing
; Return: A = Status byte
; BC = 765 (FDC Controller Type)
; HL = Address of Status Byte
; Uses : AF,BC,HL All other Registers Preserved/Not Affected
;
; Assumes STHDRV called first
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
RETDST: CALL PANIC
LD HL,ST0 ; Point to Status Byte (Reg 3 contents)
LD A,(HL) ; fetch it
LD BC,765 ; load Controller ID
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; FMTTRK (Function 11) - Format a complete track on one side of a Floppy
; Disk. The Mode, Head/Drive, Track, and Sector must have been set.
;
; NOTE: The contents of the Format Data Block varies between controllers,
; so RETDST should be called to determine the controller type before
; setting up data structures.
;
; Enter : D = Formatting Sctrs/Track value
; E = Formatting Gap 3 Byte Count
; HL = Pointer to Controller-dependent Format Data block
; Return: A = 0, Zero Flag Set (Z) if Ok, A <> 0 Zero Clear (NZ) if Errors
; Uses : All Primary Registers
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
FMTTRK: CALL PANIC
XOR A
RET
;=============================================================================
; FDCMD - Send Command to FDC
; Enter: B = # of Bytes in Command, C = Command Byte
; HL -> Buffer for Read/Write Data (If Needed)
; Exit : AF = Status byte
; Uses : AF,BC
FDCMD: CALL PANIC
LD A,(ST0) ; Else get first byte of Status
AND 0C0H ; check for Normal termination
RET ; ..return w/Error Flags set
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; MOTOR CONTROL. This routine performs final selection of the drive control
; latch and determines if the Motors are already spinning. If they are off
; and Motor control is needed, then the Motors are activated and the spinup
; delay time in tenths-of-seconds is performed before returning.
;
; Enter : Command byte in A
; Return: Head Delay bit set in Command in A if needed
; Uses : None. All Registers Preserved/Not Affected
;MOTOR: CALL PANIC
XOR A
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Hardware-Dependent Host Read/Write Routine linked to from FLOPPY module.
; This routine Reads/Writes data from HSTBUF trying up to MXRTRY times
; before giving up. If an error occurs after the next-to-last try, the
; heads are homed to force a re-seek.
;
; Enter: (RDOP Set for desired operation)
; Exit : A = 0, Zero Set if Ok, A <> 0, Zero Reset if Errors
; Uses : AF,HL
;
; RDOP is set to 1 for Read, 0 for Write, TTRK set with desired Track
; number, STHDRV, STSECT, STMODE, SPEC all called previously.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
FHDRW: CALL PANIC
XOR A
RET
;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
CSEG ;*** Remainder of Code MUST be in Main Memory ***
;========================================================================
; Reset the Floppy Disk Controller. Called from CBOOT in case of Hard
; Disk Boot which leaves the controller in a "hung" state, and locally
; if the Controller times out (often due to changing diskettes).
FDRst: CALL PANIC
RET
;========================================================================
; Motor Off routine. Called from TIM-DX and SELFLP2 which forces
; Motors/Timer to be Off state so spinup delay is forced on next selection.
MOTOFF: CALL PANIC
ChgSpd: RET
;======================== RAM Storage Area ==============================
IF BANKED
COMMON /B2RAM/ ; If banked, Local stack in Bank
ELSE
DSEG ; ..otherwise in Data Segment
ENDIF ;
DSEG ; Place in Common memory
; NOTE: Variables listed as (** Global **) are accessed by other modules and
; MUST exist as defined.
HDR: DEFS 1 ; Head (B2), Drive (B0,1) (** Global **)
; FDC Operation Result Storage Area
ST0: DEFS 1 ; Status Byte 0
ST1: DEFS 1 ; Status Byte 1 (can also be PCN)
ST2: DEFS 1 ; Status Byte 2
RC: DEFS 1 ; Track # (** Global **)
RH: DEFS 1 ; Head # (0/1)
RR: DEFS 1 ; Sector # (** Global **)
RN: DEFS 1 ; Sector Size (** Global **)
;-->>> Do NOT re-order the following two bytes !! <<<--
MTM: DEFS 1 ; Floppy Time down-counter
MOTIM: DEFS 1 ; Motor On Time Counter
; DISK Subsystem Variable Storage
FDMOT: DEFS 1 ; Motor on required flag
RDOP: DEFS 1 ; Read/write flag
RETRYS: DEFS 1 ; Number of times to try Opns
RWRTRY: DEFS 1 ; Number of read/write tries
DRVSPD: DEFS 1 ; Drive Speed
DRVSIZ: DEFS 1 ; Drive Size
STEP2: DEFS 1 ; <> 0 for Double Step (** Global **)
MODE: DEFS 1 ; Bit 6 = 1 if MFM, 0 = FM
ACTIVE: DEFS 1 ; Current bits written to Dev Contr Reg (DCR)
DLYCNT: DEFS 1 ; Delay value reading Main Status Reg
FSPT: DEFS 1 ; Format Sectors/Track value
TSBSCF: DEFS 1 ; 0=Hd always 0 (TSBSC) (** Global **)
TTRK: DEFS 1 ; Storage for Track (** Global **)
TRKARY: DEFS 4 ; Track storage locations for four drives
;=========================== End of FDC-DX ==============================

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Source/BPBIOS/forlib.lib
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Source/BPBIOS/hard-ww.z80
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;::::::::::::::::::::::::::::::::::::::::::::::::**************************
; Hard disk routines as implemented for the ** Hardware Dependent **
; D-X Designs Pty Ltd P112 via an external ** for exact interface **
; NCR/National 5380 Controller. These routines **************************
; may be assembled to use Polled or DMA (no Interrupt) transfers without
; Arbitration depending on an equate in the DEF-DX.LIB assembly definition
; file. Direct driver IO routines to Select (SELHD), Read (HDREAD) and
; Write (HDWRIT) are all included here. Thanks to Terry Hazen for
; debugging the polled code while working on the YASBEC and Ampro versions.
;--------------------------------------------------------------------------
; 1.3 - 22 Aug 01 - Cleaned source for GPL Release. HFB
; 1.2a- 15 Sep 97 - Corrected Data saves for Direct Device IO when
; flushing to/from other SCSI units, added Busy tests. HFB
; 1.2 - 17 Jul 96 - Initial P112 integration, deleted Xebec 1410/Shugart
; 1610-3 driver, selectable Polled/DMA modes. HFB
; 1.1 - 28 May 93 - Fixed Access to fast drives. JTH
; 0.0 - 9 Jul 91 - Initial Test Release HFB
;***************************************************************************
IF BANKED
COMMON /BANK2/
ELSE
CSEG
ENDIF
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Function 0 - Set User Data Area Adress for Direct SCSI IO, Return
; Number of Bytes in the SCSI driver Command Block
; Enter: DE = Address of User Data Area
; Exit : A = Number of bytes available in the SCSI Command Block
; Uses : A,HL
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
HDVALS: LD (DATADR),DE ; Save the Users Data Area
LD A,CMDSIZ
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Function 1 - Set Physical Device bit and Logical Unit Number in SCSI
; Command Block (Byte 1, bits 7-5) from byte in A
; Enter: A = Device Byte (See ICFG-xx.Z80)
; Exit : A = Physical Device Bit of selected drive
; Uses : AF
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
HDSlct: LD (xUnit),A ; Save Dev/LUN byte for later
RET
HDSlc0: PUSH BC ; Save regs
LD C,A ; and entry byte
AND 0E0H ; Mask off all but Logical Unit Number
LD (LUNSAV),A ; and save for execution
LD A,C ; Get byte back
AND 07H ; keeping only Physical Device bits
LD B,A ; Prepare for bit rotation
INC B ; by bumping count for initial value
XOR A ; Start with 0 byte
SCF ; and 1 bit in Carry
HDSLCZ: RLA ; Rotate bit around thru Carry
DJNZ HDSLCZ ; ..until properly positioned
LD (HDEVIC),A ; Save for future operations
POP BC ; Restore regs
RET
;=========================================================================
; Select Hard Disk (SCSI Device and Unit) < Internal Bios routine >
SELHD: LD A,(SEKPDN) ; Load Device and Unit # to select
SELHDA: LD C,A ; position for calculations
LD B,HDRV1-HDRV0 ; with size
MLT BC ; Calculate offset into table
LD HL,HDRV0 ; from first Physical drive
ADD HL,BC
LD A,(HL) ; Fetch Device/LUN byte
ld (iUnit),a ; save as internal unit #
CALL HDSlc0 ; setting variables for Device and LUN
CALL HDINIT ; Do the actual initialization
JP NZ,SELERR ; ..return Error if Bad
JP SETPARMS ; Else set parameters for DPH/DPB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Initialize Xebec 1410/Shugart 1610-3 Controller for appropriate
; Drive Specs. Does Nothing if Owl, Adaptec or SCSI.
; <<-- Returns Error for Xebec/Shugart...deleted in 1.2. -->>
; Enter: HL -> Configuration block for desired drive (see ICFG-xx)
; Exit : A = 0, Zero Set (Z) if Ok, A <> 0, Zero Clear (NZ) if Error
; Uses : AF,BC,DE,HL
; NOTE : This routine uses the Physical drive parameters contained
; in ICFG-xx to determine some of the parameters.
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
HDINIT: LD A,(CNTRLR) ; Set Controller type
CP 2 ; Is it Xebec 1410/Shugart 1610-3?
JR NZ,HDINIS ; ..jump if Not to return Ok
DEFB 0F6H ; Fall thru w/"OR 0AFH" and return Error
HDINIS: XOR A ; Else signify this was done Ok
RET ; ..and quit
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Write to SCSI Hard Disk Drive < Internal BIOS Routine >
; Writes from HSTBUF using HSTTRK and HSTSEC to build Block Number.
; NOTE: This routine uses physical drive characteristics from ICFG-xx.
HDWRIT: XOR A
LD (HSTWRT),A ; Show No pending Write
LD A,0AH ; Set the SCSI Write Command
DEFB 11H ; ..trash DE, fall thru to save
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Read from SCSI Hard Disk Drive < Internal BIOS Routine >
; Reads to HSTBUF using HSTTRK and HSTSEC to build Block Number.
; NOTE: This routine uses physical drive characteristics from ICFG-xx.
HDREAD: LD A,08H ; Set the SCSI Read Command
LD (HDCOMD),A ; save command in CDB
LD HL,(HSTDPH) ; Get pointer to desired DPH
DEC HL ; back up to Device #
LD A,(HL) ; and fetch
CALL SELHDA ; Select this device from A-Reg
LD DE,HDCOMD+1 ; Point to second byte of Command Block
LD BC,4*256+0 ; Count = 4, MSB of Block # = 0
LD HL,(HSTTRK) ; Get requested track
MUL16: ADD HL,HL ; Multiply C,H,L by 16 for 21-bit block #
RL C ; shifting overflow bit to C
DJNZ MUL16 ; ..and looping til * 16
LD A,(DE) ; Get LUN/High Address
AND 11100000B ; keep only LUN
OR C ; and add in High 5 bits of Block #
LD (DE),A ; Store back in LUN/High Address
INC DE ; Pt to next
LD A,H ; Get middle Block #
LD (DE),A ; and save
INC DE ; Pt to next
LD A,(HSTSEC) ; Get Logical Host Sector # (4-bits)
ADD A,L ; add in Hi 4-bits of low Block #
LD (DE),A ; save lowest 8 bits of Block #
INC DE ; Pt to next
LD A,1
LD (DE),A ; Set HDSIZ for 1 block
INC DE ; Pt to next
; NOTE: Support for Xebec 1410/Shugart 1610-3 removed. They required a
; step rate byte to be stored at this point.
XOR A ; Get a Zero
LD (DE),A ; Set in Command Block
; Set Physical/Logical Unit numbers just prior to accessing the Drive
LD A,(iUnit) ; Get internal unit data
CALL HDSlc0 ; set variables for Device and LUN
; Try the Command specified. If errors returned (e.g. Attn assertion),
; read the SCSI Sense status and try the command again.
RWSCSI: CALL HDRW0 ; Try a Normal Data Access
RET Z ; ..exitting if Ok
LD HL,sense ; Set Ptr to Sense Command Block
LD DE,snsDat ; and Sense Data Poiner
CALL HDRW1 ; Try a Sense Read, following thru to Dat Rd
HDRW0: LD DE,HSTBUF ; and Data Pointer for Normal Accesses
STSCSI: LD HL,HDCOMD ; Set Command Block Address
HDRW1: LD (HDCMDV),HL ; Save Command Block Address
LD (HDDATV),DE ; and Data Area Pointer
IF NOWAIT ; If Wait States not desired..
IN0 A,(DCNTL) ; Get current settings
LD (WTSAVE),A ; save for exit
AND 11001111B ; Keep everything but IO Waits
OUT0 (DCNTL),A ; and set to No IO Wait States
ENDIF ;nowait
;..fall thru to change phases on the SCSI bus
CALL SCSI ; Do the Work
AND 00000010B ; Any errors?
LD (ERFLAG),A ; save resulting status here
RET
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Function 2 - Direct SCSI driver. This routine performs the function
; described by the command in the HD Command Block with Data area
; addressed by DE. At the end of the function, 512 bytes of data are
; transferred from the Bios IO Buffer to the Users Space set by Fcn 0.
;
; Enter: DE = Pointer to User Command Descriptor Block
; HDCOMD contains pre-filled SCSI Command Block
; A = 0 if No Data to be Written, FF if User-supplied data to write
; Exit : H = Message Byte value
; L = Status Byte value
; A = Status byte, Flags set accordingly.
; Uses : AF,BC,DE,HL
; NOTE : Routine assumes the Command Block is properly configured for the
; desired function and device. Errors in phasing result in program
; exit and Warm Boot function, while Timeout returns 0FFH.
; For external access, It assumes the user has used Functions 0 and 1 to
; set the data transfer source/dest address and logical & physical drive.
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
HD_RW: PUSH AF ; Save User Data Flag
PUSH DE ; and ptr to User's CDB
CALL FLUSH ; Insure Host Buffer is Free
POP HL ; restore User CDB ptr to HL for move
IF BANKED
CALL SHDBNK ; Load Banks for transfer to System fm User
CALL XMOVE ; and Set
ENDIF ;Banked
LD DE,HDCOMD
LD BC,CMDSIZ ; Move Command Descriptor Block
CALL MOVE ; into SCSI Command area (6-12 bytes)
POP AF ; Restore Flag
OR A ; Any User data to write?
JR Z,DOSCS0 ; ..bypass move if not
IF BANKED
CALL SHDBNK ; Load for move from User's to System Banks
CALL XMOVE ; and Set
ENDIF ;Banked
CALL HDDMOV ; Set to move 512 bytes from User to Hstbuf
CALL MOVE ; Do It!
DOSCS0: LD A,(xUnit) ; Get External Device data
CALL HDSlc0 ; set variables for Device & LUN
CALL RWSCSI ; Set Data Addr and do the operation
IF BANKED
CALL SHDBNK ; Load Bank Numbers
LD A,B ; Swap
LD B,C ; Source
LD C,A ; and Destination Banks
CALL XMOVE ; Set Source/Dest
ENDIF ;Banked
PUSH HL ; Save Status and Message bytes
CALL HDDMOV ; set Addresses and Length
EX DE,HL ; write back to User's area
CALL MOVE ; move without affecting status in A
POP HL ; Restore Status and Message bytes
LD A,L ; Load Status byte for checks
AND 1010B ; keeping only Check (3) and Busy (1) Bits
RET ; ..and quit
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Raw SCSI Driver
SCSI:
IF HDDMA
LD (DATPTR),DE ; Save Pointer to Data Area
ENDIF
LD HL,LUNSAV ; Address LUN storage location
LD A,(HDUNIT) ; Get LUN/HiBlock byte from Command Blk
AND 1FH ; Strip off old LUN
OR (HL) ; add in New LUN
LD (HDUNIT),A ; save new byte
XOR A
OUT0 (NCRCMD),A ;1.1 Clear any previous Controller status
OUT0 (NCRMOD),A ;1.1 no Mode settings
OUT0 (NCRTGT),A ;1.1 nothing asserted
IF HDDMA
DEC A ; 0 --> FF
LD (STATUS),A ; Set Initial timeout status
IN0 A,(NCRINT) ; Clear interrupts & Error Bits
ENDIF
LD A,(HDEVIC) ; Get the Target Device address bit
OR 10000000B ; add Host initiator address bit
OUT0 (NCRDAT),A
IN0 A,(NCRCMD) ; Get Initiator Comnd Reg
OR B_ABUS ; Assert the Data Bus
OUT0 (NCRCMD),A
LD A,B_ASEL+B_ABUS ; Now Assert both Select and Data Bus bits
OUT0 (NCRCMD),A
; Wait for 200-300 mS for Target to become Busy. The SCSI spec says 250 mS,
; but we don't know when the triggering will occur with our 100ms counter.
; We therefore set it for 300 mS which results in 200-300 mS w/250 on average.
LD L,0FFH ; Preset Timeout Error Status
LD A,3 ; 3-100mS ticks
LD (MTM),A ; from Now!
BSYWT: LD A,(MTM) ; Get Current Count
OR A ; Have we timed out?
JR Z,TIMOUT ; ..exit to Error if So
IN0 A,(NCRBUS) ; Get the Current Bus Status
AND B_BSY ; Is it BSY?
JR Z,BSYWT ; ..loop if Not
;..else fall thru..
LD A,B_ABUS
OUT0 (NCRCMD),A ; Assert Bus w/o Select Command (or free)
XOR A ; get a Zero
OUT0 (NCRCMD),A ; then free the Data Bus
IF HDDMA
LD (HDONE),A ; Start by showing Not Done
;..fall thru to wait for a Request on the SCSI bus
RQWAIT: IN0 A,(NCRBUS) ; Get Bus status
AND B_REQ ; Bus Request yet?
JR Z,RQWAIT ; ..jump if Not and wait
WtCall: CALL NZ,SCSINT ; Call the Interrupt to start transfer
LD A,(HDONE) ; Get Hard Drive Done flag
OR A ; Finished?
JR NZ,WtDonX ; ..exit if So
IN0 A,(DRA) ; Else fetch Status (from Z182 Port A)
BIT 4,A ; Interrupt?
JR WtCall ; ..check & Read/Write SCSI if So
WtDonX: LD HL,(STATUS) ; Else get Status and Message bytes
TIMOUT:
IF NOWAIT
LD A,(WTSAVE) ; Get entry Wait state settings
OUT0 (DCNTL),A ; and restore
ENDIF
LD A,L ; get Status Byte
OR A ; set flags
RET ; and return
ELSE ;Not hddma
LD (STATUS),A ; Assume Status is Ok
;..fall thru to check SCSI Bus phase changes..
ENDIF ;Not hddma
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; SCSINT - Interrupt routine for the NCR 5380/DP 8490 chip.
;
; This routine handles Interrupts generated by the SCSI controller on phase
; changes or loss of BSY signal meaning that the operation is complete.
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
IF HDDMA
; CSEG ;<-- NOTE: If "True" Interrupts are used,this Vector
; MUST be in Common Memory (CSEG) in case an
; interrupt hits unexpectedly. Also, insert
; code to save registers and set Local Stack.
SCSINT: DI ; ..disable interrupts here for local calls
XOR A
OUT0 (NCRCMD),A ; Release the SCSI Bus
IN0 A,(NCRST) ; Get status
AND B_BBSY+B_PHAS ; Phase Match or Bus Busy?
JR Z,SCSIN0 ; ..jump if Not to continue
;..else fall thru to Exit..
; Exit here when we are done to set the Completed flag
DISCSI: XOR A ; Turn off any SCSI operations
OUT0 (NCRMOD),A
OUT0 (NCRTGT),A
DEC A ; 0 --> FF
LD (HDONE),A ; Indicate Hard Disk Operation Complete
IN0 A,(NCRINT) ; Discard any pending 5380 Interrupts
IN0 A,(DSTAT)
AND 5FH ; Disable DMA1 Interrupts
OUT0 (DSTAT),A
EI
RET
; Continue with Transaction
SCSIN0: XOR A
OUT0 (NCRMOD),A ; Clear DMA mode
IN0 A,(NCRINT) ; Clear SCSI Interrupts
IN0 A,(DSTAT)
AND 5FH ; and Stop Z-180 DMA Ch #1
OUT0 (DSTAT),A
LD A,B_MBSY+B_DMA ; Monitor Busy and Set DMA Mode
OUT0 (NCRMOD),A
ENDIF ;hddma
;.....
; Come here when phases change (Main Handler for Polled IO Mode)
PHASE: IN0 A,(NCRBUS) ; Read the Bus Status
AND B_MSG+B_CD+B_IO ; keep the three phases we are interested in
RRCA ; Rotate Phase status bits
RRCA ; into B0-2 position for testing
OUT0 (NCRTGT),A ; Check for phase match
IF NOT HDDMA ; (only need this with Polled IO)
LD BC,NCRDAT ; with data going to/from this port (B=0)
ENDIF
LD HL,MESSAGE ; (Ph 7 input goes here)
CP 7 ; Are we in Phase 7 ?
JR Z,HDIN ; ..jump if so to Message In Phase
LD HL,(HDDATV) ; (Ph 0/1 IO From/To here)
OR A ; Are we in Phase 0 ?
JR Z,HDOUT ; ..jump to if so to Data Out Phase
DEC A ; Are we in Phase 1 ?
JR Z,HDIN ; ..jump to if so to Data In Phase
LD HL,(HDCMDV) ; (Ph 2 output from here)
DEC A ; Are we in Phase 2 ?
JR Z,HDOUT ; ..jump to if so to Command Out Phase
LD HL,STATUS ; (Ph 3 Input to here)
DEC A ; Are we in Phase 3 ?
JR Z,HDIN ; ..jump to if so to Status In Phase
;..else fall thru
; Phases 4, 5 and 6 wind up here in an Error
IF NOWAIT
LD A,(WTSAVE) ; Get entry Wait state settings
OUT0 (DCNTL),A ; and restore
ENDIF
CALL PRINT
DEFB CR,LF,' Phase Err',CR,LF+80H
IF HDDMA
CALL DISCSI ; Disable any ongoing DMA/SCSI operation
ENDIF ;..else fall thru to abort. Stack is reset so don't
; worry about popping and restoring anything
IF BANKED
JP ABORT ; Use this error exit if banked
ELSE
RST 0 ; ..this exit if Non-banked
ENDIF ;banked
;.....
; SCSI Input Routine (Polled IO)
; Enter with HL pointing to buffer, C addressing 5380 Data Port
IF NOT HDDMA
HDIN: IN0 A,(NCRBUS) ; Check the Bus
BIT 5,A ; Do we have a REQuest?
JR NZ,HDIN1 ; ..jump if so to read it
AND B_BSY ; Is the Bus Busy?
JR NZ,HDIN ; ..loop if so
HDEXIT: XOR A ; Else we are finished. Clean up & Quit
OUT0 (NCRCMD),A ; Clear Initiator Command Register
OUT0 (NCRTGT),A ; and Target Command Register
LD HL,(STATUS) ; Get Message (H) and Status (L) bytes
TIMOUT:
IF NOWAIT
LD A,(WTSAVE) ; Get entry Wait state settings
OUT0 (DCNTL),A ; and restore
ENDIF
LD A,L ; Get Status byte
OR A ; Set Return Status Ok if Status Byte = 0
RET
HDIN1: IN0 A,(NCRST) ; Get SCSI Status
AND B_PHAS ; Do the Phases Match?
JR Z,PHASE ; ..quit here if Not and clear
INI ; Get a byte from Port (C) to Memory at (HL)
INC B ; (correct B for decrement in INI)
LD A,B_AACK
OUT0 (NCRCMD),A ; ACKnowledge the byte
XOR A
OUT0 (NCRCMD),A ; clear *ACK bit
JR HDIN ; and back for more
;.....
; SCSI Output Routine (Polled IO)
; Enter with HL pointing to buffer, C addressing 5380 Data Port
HDOUT: LD A,B_ABUS ; Assert Data Bus
OUT0 (NCRCMD),A
IN0 A,(NCRBUS) ; Check the SCSI Bus
BIT 5,A ; Do we have a REQuest?
JR NZ,HDOUT1 ; ..jump if So to Send a byte
AND B_BSY ; Else is the Bus Busy?
JR NZ,HDOUT ; ..loop if so because we have more to go
JR HDEXIT ; Quit
HDOUT1: IN0 A,(NCRST) ; Get current Status
AND B_PHAS ; Do we have a Phase Match?
JP Z,PHASE ; ..quit here if Not and clear
OUTI ; Send a byte from (HL) to Port (C)
INC B ; (Correct B for decrement in OUTI)
LD A,B_AACK+B_ABUS
OUT0 (NCRCMD),A ; Set ACKnowledge and BUS bits
XOR A
OUT0 (NCRCMD),A ; clear *ACK and *BUS
JR HDOUT ; and back for more
ENDIF ;Not hddma
;.....
; SCSI Input routine (DMA Controlled)
; Enter: HL = Address of Receive Buffer start
IF HDDMA
HDIN: LD C,1010B ; Set for Edge Triggering and Read mode
CALL STDMA ; Set up Transfer and DMA Data
OUT0 (NCRINT),A ; Start DMA Initiator Rcv (bits don't care)
;<-- NOTE: If using true Interrupts, restore local Stack Ptr
; and preserved registers here
EI ; Interrupts Ok Now
RET
;.....
; SCSI Output Routine (DMA Controlled)
; Enter: HL = Address of Send Buffer start
HDOUT: LD C,1000B ; Set for Edge Triggering bit and Write mode
CALL STDMA ; Set up Transfer and DMA Data
LD A,B_ABUS ; Assert the Data Bus
OUT0 (NCRCMD),A
OUT0 (NCRST),A ; Start DMA Send (bits irrelevant)
;<-- NOTE: If using true Interrupts, restore local Stack Ptr
; and preserved registers here
EI ; Interrupts Ok Now
RET
;.....
; STDMA - Set up DMA Channel 1 for a SCSI Read or Write operation.
; Enter: HL = Start Address of Buffer to Read/Write from/to
; C = Write (1x00B) or Read (1x10B) DMA1 Control bits
; ||++- Mem->IO ||++- IO->Mem
; |+--- DMA0-Sns |+--- DMA0-Sns
; +---- DMA1-Edge +---- DMA1-Edge
STDMA: IN0 A,(DCNTL) ; Get DMA1 Control bits
AND 0F4H ; mask pertinent bits assuming a Write
OR C ; Add Edge Triggering bit and R/W mode
OUT0 (DCNTL),A ; and Command DMA Chan 1
IF BANKED
LD A,(SYSBNK) ; Get system Bank #
ELSE
LD A,(TPABNK) ; If Not Banked, load TPA Bank #
ENDIF ;banked
RL H ; Place Address MSB in Carry
ADC A,0 ; offset Bank # by 32k banks
RRA ; shift Bank LSB to Carry
RR H ; Move Bank # LSB (Carry) to Address MSB
LD (DMATBL+2),A ; Store Bank byte in DMA Block
LD (DMATBL),HL ; save Actual DMA Addr in Ctl Block
LD HL,DMATBL ; Point to DMA Control Block
LD BC,8*256+MAR1L ; Set for 8 bytes to DMA Channel 1
OTIMR ; and output 8 bytes to 8 ports
IN0 A,(DSTAT) ; Get DMA Chan 1 Status
AND 57H ; set for No Terminating Interrupt
OR 81H ; enable DMA operation
OUT0 (DSTAT),A ; and Start the action!
RET
ENDIF ;hddma
;.....
; Set registers for Whole Block Move
HDDMOV: LD HL,(DATADR) ; Get ptr to User's Area
LD DE,HSTBUF ; Pt to local Host Buffer
LD BC,512 ; set length
RET ; ..and return
;.....
; Set banks for Interbank move
IF BANKED
SHDBNK: LD A,(USP-1) ; Get Source Bank Byte
RRA ; shift to
RRA ;
RRA ; Bank #
AND 1FH ; Mask off any Junk
LD C,A ; position
LD A,(SYSBNK) ; Get System Bank
LD B,A ; position it too
RET ; and return
ENDIF ;banked
;.....
; SCSI Read Sense Command Data Block
sense: DEFB 03H ; SCSI Sense Command
DEFB 0,0,0,SNSLEN,0 ; remainder of Sense Command Block
; (data length set to available space)
IF BANKED
COMMON /B2RAM/
ELSE
DSEG
ENDIF
HDCMDV: DEFS 2 ; Storage for Current Command Data Block
HDDATV: DEFS 2 ; Storage for current Data Transfer Area
snsDat: DEFS 18 ; Storage for extended Sense Data Received
SNSLEN EQU $-snsDat
; SCSI Controller Command Block
HDCOMD: DEFS 1 ; Command Byte
HDUNIT: DEFS 1 ; B7-5 = Unit #, remainder is Hi-Addr
HIBLK: DEFS 1 ; Mid-Addr Byte
LOBLK: DEFS 1 ; Lo-Addr Byte
HDSIZ: DEFS 1 ; Block Size to Read/Write (1=512 byte blk)
HDCTL DEFS 1 ; Control/Step Byte
DEFS 6 ; (pad for 12-byte Command Block)
CMDSIZ EQU $-HDCOMD ; Size of Command Block
IF HDDMA
DATPTR: DEFS 2 ; Pointer to Data Area
ENDIF
DATADR: DEFS 2 ; Pointer to User Buffer Space (user bank)
HDEVIC: DEFS 1 ; Target Device address bit
LUNSAV: DEFS 1 ; Storage for LUN
HDSTEP: DEFS 1 ; Step Rate Byte for Xebec/Shugart
INIBUF: DEFS 9 ; Buffer for Xebec/Shugart 1610-3 Init.
; Z-180 DMA Control Block for SCSI Data Transfers
IF HDDMA
DMATBL: DEFS 2 ; MAR1L, MAR1H
DEFS 1 ; MAR1B (Bank)
DEFS 2 ; DMAACK Output Port
DEFS 1 ; (unused)
NBYTES: DEFS 2 ; BCR1L, BCR1H
ENDIF ;hddma
;<<--- WARNING! --- Do not re-order the following Two Bytes --->>
STATUS: DEFS 1 ; Ending Status Byte
MESSAGE: DEFS 1 ; Ending Message Byte
; IF HDDMA ;<-- If using True Interrupts, uncomment this
; Section and add code to Interrupt Handler
; to save registers here.
; DEFS 12 ; ..fill bytes and stack space
;INTSTK: DEFS 2 ; Storage for Stack Pointer
; ENDIF ;hddma
IF NOWAIT
WTSAVE: DEFS 1 ; Entry Wait State Setting
ENDIF
iUnit: DEFS 1 ; Bios Select Unit/LUN byte
xUnit: DEFS 1 ; Direct Access Unit/LUN byte
;======================= End of HARD-DX ===========================


2
Source/BPBIOS/hbios.z80
View File

@ -35,7 +35,7 @@ HB_DEFBNK EQU BID_USR ; Default bank number
;
; LOCATION OF DISPATCH ENTRY IN HBIOS BANK
;
HB_DISPATCH EQU 0203H
HB_DISPATCH EQU 0403H
;
; PLATFORM SPECIFIC CONSTANTS
;

235
Source/BPBIOS/ibmv-dx.z80
View File

@ -18,81 +18,34 @@
; Uses : AF,BC,DE,HL
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
MOVE:
BNKCPY:
; Save current stack & bank
LD (BCSSAV),SP ; Save current stack
LD SP,BCSTK ; Activate our private stack
IF BANKED
LD A,(CURBNK) ; Get the current bank
ELSE
LD A,(TPABNK) ; If not banked, assume TPA bank is active
ENDIF
PUSH AF ; Put on stack
; Setup for copy loop
LD (XBCSRC),HL ; Init working soruce adr
LD (XBCDST),DE ; Init working dest adr
LD H,B ; Move bytes to copy from BC...
LD L,C ; to HL to use as byte counter
; Copy loop
BNKCPY1:
INC L ; Set ZF to indicate...
DEC L ; if a partial page copy is needed
LD BC,100H ; Assume a full page copy, 100H bytes
JR Z,BNKCPY2 ; If full page copy, go do it
DEC B ; Otherwise, setup for partial page copy
LD C,L ; by making BC := 0L
BNKCPY2:
PUSH HL ; Save bytes left to copy
CALL BNKCPY3 ; Do it
POP HL ; Recover bytes left to copy
XOR A ; Clear CF
SBC HL,BC ; Reflect bytes copied in HL
JR NZ,BNKCPY1 ; If any left, then loop
; Restore entry bank & stack
POP AF ; Recover original bank
OUT (MPCL_RAM),A ; Set it
LD SP,(BCSSAV) ; Back to original stack
; Put source and dest bank back to default
MOVE: LD (ICNT),BC ; Save length of move
LD BC,(SRCBNK) ; Get Source (C) and Dest (B) Banks
RL H ; Move MSB of Source Addr to Carry
LD A,C ; .get Source Bank
JR NC,MOVB0 ; ..jump if Source < 8000H (Not Common Bank)
LD A,(TPABNK) ; Else Set to TPA Bank for Common Access
MOVB0: ADC A,0 ; ..add Carry to Bank #
RRA ; ...shift Bank # in position for Z-180 DMA
RR H ; .move Carry to Address Bit 7
LD (ISRC+2),A ; Save Source Bank physical byte
LD (ISRC),HL ; ..and Save Source Address
RL D ; Move MSB of Dest Addr to Carry
LD A,B ; .Get Destination Bank
JR NC,MOVB1 ; ..jump if Source < 8000H (Not Common Bank)
LD A,(TPABNK) ; Else Set to TPA Bank for Common Access
MOVB1: ADC A,0 ; ..add Carry to Bank #
RRA ; ...shift into position for Z-180 DMA
RR D ; .move Carry to Address Bit 7
LD (IDST+2),A ; Save Destination Bank byte
LD (IDST),DE ; ..and Save Destination Address
LD HL,ISRC ; Point to DMA Initialization block
CALL DMAMOV ; ..and use the Z-180 DMA
LD HL,(TPABNK) ; Get TPA Bank #
LD H,L ; .to both H and L
LD (SRCBNK),HL ; ..set Source & Destination Bank # to TPA
RET ; Done
BNKCPY3:
; Switch to source bank
LD A,(SRCBNK) ; Get source bank
OUT (MPCL_RAM),A ; Set it
; Copy BC bytes from HL -> BUF
; Allow HL to increment
PUSH BC ; Save copy length
LD HL,(XBCSRC) ; Point to source adr
LD DE,IBMVBF ; Setup buffer as interim destination
LDIR ; Copy BC bytes: src -> buffer
LD (XBCSRC),HL ; Update source adr
POP BC ; Recover copy length
; Switch to dest bank
LD A,(DSTBNK) ; Get destination bank
OUT (MPCL_RAM),A ; Set it
; Copy BC bytes from BUF -> HL
; Allow DE to increment
PUSH BC ; Save copy length
LD HL,IBMVBF ; Use the buffer as source now
LD DE,(XBCDST) ; Setup final destination for copy
LDIR ; Copy BC bytes: buffer -> dest
LD (XBCDST),DE ; Update dest adr
POP BC ; Recover copy length
RET ; Done
RET
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Routine to Switch to Local Stack for Banked Operations
@ -109,7 +62,7 @@ BIOSTK: DEFB 0 ; NOP if not currently in bank,
LD (USP),SP ; Save User's Stack Pointer
LD SP,USP-1 ; ..and point locally, saving 1 byte for Bank
PUSH AF ; Save entry A and Flags
LD A,(CURBNK) ; Get current bank
IN0 A,(BBR) ; Get current bank address
LD (USP-1),A ; ..and save for exitting
LD A,0C9H ; Disable other calls here
LD (BIOSTK),A ; ..by poking a RETurn at entry
@ -125,8 +78,7 @@ BIOSTK: DEFB 0 ; NOP if not currently in bank,
USRSTK: PUSH AF
LD A,(USP-1) ; Get bank control byte from entry
LD (CURBNK),A ; WW: I ADDED THIS, IS IT RIGHT???
OUT (MPCL_RAM),A ; ..and make it current
OUT0 (BBR),A ; ..and make it current
XOR A
LD (BIOSTK),A ; Patch NOP back in at start of code
POP AF
@ -139,7 +91,7 @@ USRSTK: PUSH AF
FRCLR: PUSH AF ; Save any entry in AF
LD A,(USP-1) ; Get bank control byte
OUT (MPCL_RAM),A ; .and make current
OUT0 (BBR),A ; ..and make current
XOR A
LD (BIOSTK),A ; Patch NOP to enable stack switcher
POP AF
@ -164,8 +116,12 @@ ABORT: LD SP,USP ; Insure stack is in Common Memory
; Uses : AF
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
RETMEM: LD A,(CURBNK)
RET
RETMEM: IN0 A,(BBR) ; Read Bank Base Register
RRA ; Shift
RRA ; .to right
RRA ; ..to give Bank #
AND 1FH ; Mask off junk
RET ; ..and return it to caller
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Set Bank into context. Save all Registers.
@ -182,7 +138,10 @@ SELMEM: LD (USRBNK),A ; Update user bank
SELBNK: PUSH AF ; Save regs
SELBN0: LD (CURBNK),A ; Save as current bank #
OUT (MPCL_RAM),A
ADD A,A ; Shift into position for Z-180 DMA regs
ADD A,A
ADD A,A
OUT0 (BBR),A ; ..and Set the bank offset
POP AF ; restore regs
RET
@ -232,78 +191,84 @@ FRJP: CALL BIOSTK ; Insure we are in a common stack
; Load A,(HL) from Alternate Bank (in Reg C)
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
FRGETB:
PUSH BC
LD A,C
DI
OUT (MPCL_RAM),A
LD C,(HL)
LD A,(CURBNK)
OUT (MPCL_RAM),A
FRGETB: IN0 A,(BBR) ; Get current bank control byte
PUSH BC ; Save regs
LD B,A ; ..and entry bank
LD A,C ; Get source bank
ADD A,A ; Shift into position for Z-180 DMA regs
ADD A,A
ADD A,A
DI ; .no Ints here
OUT0 (BBR),A ; ..and Set the bank offset
LD C,(HL) ; Get the byte
LD A,B ; .entry bank
OUT0 (BBR),A ; ..and restore entry bank
EI
LD A,C
POP BC
LD A,C ; Get the byte
POP BC ; ..and restore regs
RET
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Load DE,(HL) from Alternate Bank
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
FRGETW:
LD A,C
DI
OUT (MPCL_RAM),A
LD E,(HL)
FRGETW: PUSH BC ; Save regs
LD B,A ; ..and entry bank
IN0 A,(BBR) ; Get current Bank Byte
LD (ASAVE),A ; ..saving locally
LD A,C ; Get source bank
ADD A,A ; Shift into position for Z-180 DMA regs
ADD A,A
ADD A,A
DI ; .no ints allowed here
OUT0 (BBR),A ; ..and Set the bank offset
LD E,(HL) ; Get Low byte
INC HL
LD D,(HL)
DEC HL
LD A,(CURBNK)
OUT (MPCL_RAM),A
EI
RET
LD D,(HL) ; ..and High byte
DEC HL ; Retain addr pointer
JR GPEX ; ..and exit
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Load (HL),A to Alternate Bank (in Reg C)
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
FRPUTB:
PUSH BC
LD B,A
LD A,C
DI
OUT (MPCL_RAM),A
LD (HL),B
LD A,(CURBNK)
OUT (MPCL_RAM),A
EI
POP BC
FRPUTB: PUSH BC ; Save all regs
LD B,A ; Store byte temporarily
IN0 A,(BBR) ; Get current bank byte
LD (ASAVE),A ; ..saving in Common Memory
LD A,C ; Get destination bank
ADD A,A ; Shift into position for Z-180 DMA regs
ADD A,A
ADD A,A
DI ; .allowing no interrupts
OUT0 (BBR),A ; ..and Set the bank offset
LD (HL),B ; ..and stuff the byte
GPEX: LD A,(ASAVE) ; Retrieve Entry Bank byte
OUT0 (BBR),A ; ..and restore to active
EI ; Interrupts Ok now
LD A,B ; Restore byte
POP BC ; ..and rest of regs
RET
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Load (HL),DE to Alternate Bank
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
FRPUTW:
LD A,C
DI
OUT (MPCL_RAM),A
LD (HL),E
FRPUTW: PUSH BC ; Save regs
LD B,A ; ..and entry bank
IN0 A,(BBR) ; Get current Bank Byte
LD (ASAVE),A ; ..saving locally
LD A,C ; Get source bank
ADD A,A ; Shift into position for Z-180 DMA regs
ADD A,A
ADD A,A
DI ; .no Ints allowed
OUT0 (BBR),A ; ..and Set the bank offset
LD (HL),E ; Save Low byte
INC HL
LD (HL),D
DEC HL
LD A,(CURBNK)
OUT (MPCL_RAM),A
EI
RET
;;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;; Copy BC bytes from (SRCBNK):HL -> (DSTBNK):DE
;; through buffer to allow for inter-bank copies
;;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;
;XBNKCPY:
; LD (SRCBNK),BC
; RET
LD (HL),D ; ..and High byte
DEC HL ; Retain addr pointer
JR GPEX ; ..and exit
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
DSEG
@ -326,14 +291,6 @@ IDST: DEFS 2 ; Destination Segment address
DEFS 1 ; ..Destination Bank in physical RAM
ICNT: DEFS 2 ; Number of bytes to move
; Working storage for BNKCPY
XBCSRC: DEFS 2
XBCDST: DEFS 2
DEFS 32
BCSTK: ; Temp stack for BNKCPY
BCSSAV: DEFW 2 ; To save original stack
; The P112 does not need this buffer, but other versions might
IF INROM OR [NOT IBMOVS]

16
Source/BPBIOS/ibmv-ww.z80
View File

@ -191,21 +191,5 @@ CURBNK: DEFS 1 ; Current bank #
DMABNK: DEFS 1 ; Target bank # for disk xfers
DEFS 64 ; 32 level stack
USP: DEFS 2 ; User stack pointer
ASAVE: DEFS 1 ; Temp storage for User's A-Register
;; Z-180 DMA transfer block for inter-bank moves
;
;ISRC: DEFS 2 ; Source Segment address
; DEFS 1 ; ..Source Bank in physical RAM
;IDST: DEFS 2 ; Destination Segment address
; DEFS 1 ; ..Destination Bank in physical RAM
;ICNT: DEFS 2 ; Number of bytes to move
; The P112 does not need this buffer, but other versions might
IF INROM OR [NOT IBMOVS]
DSEG
IBMVBF: DEFS 256 ; Inter-bank move buffer
ENDIF
;======================= End of IBMV-DX ===========================

2
Source/BPBIOS/icfg-dx.z80
View File

@ -56,7 +56,7 @@ DPBADR:
DEFW 0 ; Pointer to first XDPB in Alternate Bank
ENDIF
AUTOCMD: DEFB 8,'ZEX Z41 ',0 ; Startup command for Z3
AUTOCMD: DEFB 8,'STARTUP ',0 ; Startup command for Z3
ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor

4
Source/BPBIOS/icfg-z33.z80 → Source/BPBIOS/icfg-ww.z80
View File

@ -23,7 +23,7 @@ OPT1 DEFL OPT1+[BANKED AND ZSDOS2 AND 8] ; Bit 3 = ALV/CSV in Banked RAM
; If set to 1, LDSYS will not load a
; new system over the running one.
DEFB 'B/P-DX' ; Six-char string for Text ID Matching
DEFB 'B/P-WW' ; Six-char string for Text ID Matching
CONFIG:
IOBYT: DEFB 10010100B ; LST:=PIO, AUX:=COM2, CON:=COM1
@ -56,7 +56,7 @@ DPBADR:
DEFW 0 ; Pointer to first XDPB in Alternate Bank
ENDIF
AUTOCMD: DEFB 8,'ZEX Z33 ',0 ; Startup command for Z3
AUTOCMD: AUTOCL ; Startup command for Z3
ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor

187
Source/BPBIOS/icfg-z34.z80
View File

@ -1,187 +0,0 @@
;::::::::::::::::::::::::::::::::::::::::::********************************
; I/O Configuration Area ****** Hardware Specific ******
; - D-X Designs Pty Ltd P112 - ********************************
;
; 1.2 - 22 Aug 01 - Cleaned up for GPL release. HFB
; 1.1 - 18 Apr 97 - Modified to Add GIDE Definitions. HFB
; 1.0 - 27 Jan 97 - Initial Release for P112. HFB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;*** * * * * * * * * * * W A R N I N G ! ! ! * * * * * * * * * * * * ***
;*** Do NOT alter any of the ordering or sizing of the following data ***
;*** locations or utilities will probably NOT function correctly! ***
;*** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ***
CSEG
; Form Option Byte 1
OPT1 DEFL [BANKED AND 1] ; Bit 0 = unbanked/banked
OPT1 DEFL OPT1+[INROM AND 2] ; Bit 1 = Bank in RAM/Bank in ROM
OPT1 DEFL OPT1+[AUTOSL AND 4] ; Bit 2 = DPB Fixed/DPB Assignable
OPT1 DEFL OPT1+[BANKED AND ZSDOS2 AND 8] ; Bit 3 = ALV/CSV in Banked RAM
; Bit 7 is "Lock" flag for system loads
; If set to 1, LDSYS will not load a
; new system over the running one.
DEFB 'B/P-DX' ; Six-char string for Text ID Matching
CONFIG:
IOBYT: DEFB 10010100B ; LST:=PIO, AUX:=COM2, CON:=COM1
SYSDRV: DEFB 0 ; System drive (a=0, b=1...)
OPTF1: DEFB OPT1 ; Option flags
UABNK: DEFB BNKU ; Beginning of User Bank(s) if Banked System
; (Ending Bank denoted by SYSBNK-1)
TPABNK: DEFB BNK0 ; TPA Bank Number if Banked System
SYSBNK: DEFB BNK2 ; Beginning of System Bank(s) if Banked System
; (Ending Bank denoted by RAMBNK-1)
RAMBNK: DEFB BNK3 ; Base Bank Number for Ram Disk
MAXBNK: DEFB BNKM ; Highest permissible Bank Number
HICOMM: DEFB 80H ; Page address of start of high Common Memory
DPBSZ: DEFB DPBSIZ ; Size of DPB
NUMDPB:
IF BANKED
DEFB 0 ; Number of DPBs in Common RAM
DEFB NRDPB ; Number of Banked DPBs
ELSE
DEFB NRDPB ; Number of DPBs in Common RAM
DEFB 0 ; Number of Banked DPBs
ENDIF
DPBADR:
IF BANKED
DEFW 0 ; Pointer to dirst Common RAM XDPB
DEFW DPB ; Pointer to first XDPB in Alternate Bank
ELSE
DEFW DPB ; Pointer to first Common RAM XDPB
DEFW 0 ; Pointer to first XDPB in Alternate Bank
ENDIF
AUTOCMD: DEFB 8,'ZEX Z34 ',0 ; Startup command for Z3
ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor
;------------ Banked User Area Control Information ---------------
; An existing User Area cannot exist in Bank 0 by decree. The User Area
; can therefore be used as a flag to determine whether such an area exists.
; The Bank Number is set in DEF-xx.LIB. To keep Page 0 equivalent free in
; the user bank, we offset values to 80H (it's just a good number). The
; top of each User Bank is 7FFFH as with all of the switched banks in
; a B/P Bios System. Banked applications should chain themselves together
; sequentially so that the end can be determined and space managed.
UADAT: DEFB BNKU ; Flag for Banked User Area (0 if None)
DEFW 0080H ; Pointer to Start of User area in Bank
;---------------- CPU Configuration Information ------------------
SPEED: DEFB MHZ ; Set to processor speed value in Configuration
WAITS: DEFB 00010010B ; Number of additional Memory & IO Wait states
; ||||++++--- # of IO Wait States (bits 3-0, only 1 & 0 used)
; ++++------- # of Memory Wait States (bits 7-4, only 5 & 4 used)
RELOD0: DEFW 2560*MHZ ; 16-bit constant for counter/timer refresh
; based on 50 mS Interrupts to Down Timer.
; Use 2560 for 12.288/18.432MHz etc. Crystals,
; 2500 for 16.000MHz Crystals.
;-------- Physical Floppy Disk Configuration Information ---------
; The Physical Drive table consists of 5 bytes for each of 4 Floppy Drives
; thereby providing all necessary data to all types of controllers.
;
; 1 - Drive Characteristics Bits. The Bits have the following meanings:
; D D D D D D D D
; 7 6 5 4 3 2 1 0
; | | | | | +-+-+---- Disk Size 000=Fixed; 001=8"; 010=5.25"; 011=3.5" (*)
; | | | | +---------- Single-Sided (0); Double-Sided (1)
; | | | +------------ (Reserved for Double-Step(1) in XDPH)
; | | +-------------- Drive Motor Control (1); Motor Always On (0)
; | +---------------- Max Speed is 5.25" (0); 8" & Hard Disk & Hi-Dens (1)
; +------------------ (Reserved for Single(1)/Double(0) Density in XDPH)
; (*) - 3.5" and 5.25" drives are treated the same for many formats with
; the drive bits being reduced to 010B in the BIOS code.
; 2 - Drive Step Rate (1 to 16 in increments of 1) in milliseconds
; 3 - Head Load Time (2 to 254 in increments of 2) in milliseconds
; 4 - Head Unload Time (16 to 240 in increments of 16) in milliseconds
; 5 - Number of Physical Tracks on Drive
FDCSPEC: DEFB 6BH,3, 4,240,80 ; #1 (3"DSHD,3 mS Step,4mS HLT,255 mS HUT,80t)
DEFB 2AH,6,24,240,40 ; #2 (5"DS,6 mS Step,24mS HLT,255 mS HUT,40t)
DEFB 2AH,4,24,240,80 ; #3 (5"DS,4 mS Step,24mS HLT,255 mS HUT,80t)
DEFB 6AH,3, 4,240,80 ; #4 (5"DS,3 mS Step, 4mS HLT,255 mS HUT,80t)
MONTIM: DEFB 100 ; Motor On Time (1 to 255) in tenths-of-seconds
SPINUP: DEFB 8 ; Spinup delay (1 to 255) in tenths-of-seconds
MXRTRY: DEFB 4 ; Maximum Number of retries on Floppy Opns
IVCT: DEFW INTTBL ; Pointer to interrupt vectors
;-------- Physical Hard Drive Configuration Information ----------
; Hard Disk data begins w/Controller Type, followed by data for 3 drives.
; The first byte for each drive consists of a byte containing bit codes
; for SCSI Device, Logical Unit, and a bit indicating whether or not the
; drive is physically connected to the system. The configuration should
; match that contained in DPHHD-xx.LIB for Hard Drive partitions.
; Bit 7 6 5 4 3 2 1 0
; | | | | | | | |
; | | | | | +-+-+-- Physical Device Number (0..6, 7 = Host)
; | | | | +-------- (reserved)
; | | | +---------- 1 = Drive Active, 0 = No Drive
; +-+-+------------ Logical Unit Number (usually 0 or 1)
;.....
; The Controller Type Byte contains information needed to dictate the specific
; bytes to be used to communicate to a SASI/SCSI-connected Hard Drive.
; Additional bytes will be defined as needed, so please coordinate any
; extensions with the Authors to insure the generality of tools.
CNTRLR: DEFB 80H ; Controller Types recognized are:
; 0- Owl 5- Conner SCSI
; 1- Adaptec ACB-4000A 6- Quantum SCSI
; 2- Xebec 1410A/Shugart 1610-3 7- Maxtor SCSI
; 3- Seagate SCSI 8- Syquest SCSI
; 4- Shugart 1610-4 Minimal SCSI 80H- GIDE (IDE/ATA)
; First drive (Parameters for Toshiba MK-1544 IDE)
BITS DEFL 00000000B ; SCSI - Physical Device 0, Logical Unit 0
; IDE - Drive 0 = Master
BITS DEFL BITS+[UNIT_0 AND 10H] ; If active, set Bit 4
HDRV0: DEFB BITS ; Set Device, Unit, and Active bits
DEFW 581 ; Number of Cylinders
DEFB 2 ; Number of Heads
DEFW 36 ; SCSI - Cylinder # to start reduced write
; IDE - Number of Sectors Per Track
DEFW 0000 ; Cylinder # to start precompensation
DEFB 0 ; Step Rate (0=3ms, 1=28us, 2=12us)
; Second drive (Parameters for Seagate ST-125N SCSI)
BITS DEFL 00000001B ; SCSI - Physical Device 1, Logical Unit 0
; IDE - Drive 1 = Slave
BITS DEFL BITS+[UNIT_1 AND 10H] ; If active, set Bit 4
HDRV1: DEFB BITS ; Set Device, Unit, and Active bits
DEFW 615 ; Syquest ST-125N
DEFB 4
DEFW 0000
DEFW 0000
DEFB 0
; Third drive (Parameters for Miniscribe 8425 SCSI)
BITS DEFL 00000010B ; Physical Device 2, Logical Unit 0
; IDE - (undefined)
BITS DEFL BITS+[UNIT_2 AND 10H] ; If active, set Bit 4
DEFB BITS ; Set Device, Unit, and Active bits
DEFW 615
DEFB 4
DEFW 615
DEFW 300
DEFB 2
DEFB 0,0,0,0,0 ; (Reserved)
;======= End of Fixed Config ======== Device Config follows ========


187
Source/BPBIOS/icfg-z41.z80
View File

@ -1,187 +0,0 @@
;::::::::::::::::::::::::::::::::::::::::::********************************
; I/O Configuration Area ****** Hardware Specific ******
; - D-X Designs Pty Ltd P112 - ********************************
;
; 1.2 - 22 Aug 01 - Cleaned up for GPL release. HFB
; 1.1 - 18 Apr 97 - Modified to Add GIDE Definitions. HFB
; 1.0 - 27 Jan 97 - Initial Release for P112. HFB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;*** * * * * * * * * * * W A R N I N G ! ! ! * * * * * * * * * * * * ***
;*** Do NOT alter any of the ordering or sizing of the following data ***
;*** locations or utilities will probably NOT function correctly! ***
;*** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ***
CSEG
; Form Option Byte 1
OPT1 DEFL [BANKED AND 1] ; Bit 0 = unbanked/banked
OPT1 DEFL OPT1+[INROM AND 2] ; Bit 1 = Bank in RAM/Bank in ROM
OPT1 DEFL OPT1+[AUTOSL AND 4] ; Bit 2 = DPB Fixed/DPB Assignable
OPT1 DEFL OPT1+[BANKED AND ZSDOS2 AND 8] ; Bit 3 = ALV/CSV in Banked RAM
; Bit 7 is "Lock" flag for system loads
; If set to 1, LDSYS will not load a
; new system over the running one.
DEFB 'B/P-DX' ; Six-char string for Text ID Matching
CONFIG:
IOBYT: DEFB 10010100B ; LST:=PIO, AUX:=COM2, CON:=COM1
SYSDRV: DEFB 0 ; System drive (a=0, b=1...)
OPTF1: DEFB OPT1 ; Option flags
UABNK: DEFB BNKU ; Beginning of User Bank(s) if Banked System
; (Ending Bank denoted by SYSBNK-1)
TPABNK: DEFB BNK0 ; TPA Bank Number if Banked System
SYSBNK: DEFB BNK2 ; Beginning of System Bank(s) if Banked System
; (Ending Bank denoted by RAMBNK-1)
RAMBNK: DEFB BNK3 ; Base Bank Number for Ram Disk
MAXBNK: DEFB BNKM ; Highest permissible Bank Number
HICOMM: DEFB 80H ; Page address of start of high Common Memory
DPBSZ: DEFB DPBSIZ ; Size of DPB
NUMDPB:
IF BANKED
DEFB 0 ; Number of DPBs in Common RAM
DEFB NRDPB ; Number of Banked DPBs
ELSE
DEFB NRDPB ; Number of DPBs in Common RAM
DEFB 0 ; Number of Banked DPBs
ENDIF
DPBADR:
IF BANKED
DEFW 0 ; Pointer to dirst Common RAM XDPB
DEFW DPB ; Pointer to first XDPB in Alternate Bank
ELSE
DEFW DPB ; Pointer to first Common RAM XDPB
DEFW 0 ; Pointer to first XDPB in Alternate Bank
ENDIF
AUTOCMD: DEFB 8,'ZEX Z41 ',0 ; Startup command for Z3
ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor
;------------ Banked User Area Control Information ---------------
; An existing User Area cannot exist in Bank 0 by decree. The User Area
; can therefore be used as a flag to determine whether such an area exists.
; The Bank Number is set in DEF-xx.LIB. To keep Page 0 equivalent free in
; the user bank, we offset values to 80H (it's just a good number). The
; top of each User Bank is 7FFFH as with all of the switched banks in
; a B/P Bios System. Banked applications should chain themselves together
; sequentially so that the end can be determined and space managed.
UADAT: DEFB BNKU ; Flag for Banked User Area (0 if None)
DEFW 0080H ; Pointer to Start of User area in Bank
;---------------- CPU Configuration Information ------------------
SPEED: DEFB MHZ ; Set to processor speed value in Configuration
WAITS: DEFB 00010010B ; Number of additional Memory & IO Wait states
; ||||++++--- # of IO Wait States (bits 3-0, only 1 & 0 used)
; ++++------- # of Memory Wait States (bits 7-4, only 5 & 4 used)
RELOD0: DEFW 2560*MHZ ; 16-bit constant for counter/timer refresh
; based on 50 mS Interrupts to Down Timer.
; Use 2560 for 12.288/18.432MHz etc. Crystals,
; 2500 for 16.000MHz Crystals.
;-------- Physical Floppy Disk Configuration Information ---------
; The Physical Drive table consists of 5 bytes for each of 4 Floppy Drives
; thereby providing all necessary data to all types of controllers.
;
; 1 - Drive Characteristics Bits. The Bits have the following meanings:
; D D D D D D D D
; 7 6 5 4 3 2 1 0
; | | | | | +-+-+---- Disk Size 000=Fixed; 001=8"; 010=5.25"; 011=3.5" (*)
; | | | | +---------- Single-Sided (0); Double-Sided (1)
; | | | +------------ (Reserved for Double-Step(1) in XDPH)
; | | +-------------- Drive Motor Control (1); Motor Always On (0)
; | +---------------- Max Speed is 5.25" (0); 8" & Hard Disk & Hi-Dens (1)
; +------------------ (Reserved for Single(1)/Double(0) Density in XDPH)
; (*) - 3.5" and 5.25" drives are treated the same for many formats with
; the drive bits being reduced to 010B in the BIOS code.
; 2 - Drive Step Rate (1 to 16 in increments of 1) in milliseconds
; 3 - Head Load Time (2 to 254 in increments of 2) in milliseconds
; 4 - Head Unload Time (16 to 240 in increments of 16) in milliseconds
; 5 - Number of Physical Tracks on Drive
FDCSPEC: DEFB 6BH,3, 4,240,80 ; #1 (3"DSHD,3 mS Step,4mS HLT,255 mS HUT,80t)
DEFB 2AH,6,24,240,40 ; #2 (5"DS,6 mS Step,24mS HLT,255 mS HUT,40t)
DEFB 2AH,4,24,240,80 ; #3 (5"DS,4 mS Step,24mS HLT,255 mS HUT,80t)
DEFB 6AH,3, 4,240,80 ; #4 (5"DS,3 mS Step, 4mS HLT,255 mS HUT,80t)
MONTIM: DEFB 100 ; Motor On Time (1 to 255) in tenths-of-seconds
SPINUP: DEFB 8 ; Spinup delay (1 to 255) in tenths-of-seconds
MXRTRY: DEFB 4 ; Maximum Number of retries on Floppy Opns
IVCT: DEFW INTTBL ; Pointer to interrupt vectors
;-------- Physical Hard Drive Configuration Information ----------
; Hard Disk data begins w/Controller Type, followed by data for 3 drives.
; The first byte for each drive consists of a byte containing bit codes
; for SCSI Device, Logical Unit, and a bit indicating whether or not the
; drive is physically connected to the system. The configuration should
; match that contained in DPHHD-xx.LIB for Hard Drive partitions.
; Bit 7 6 5 4 3 2 1 0
; | | | | | | | |
; | | | | | +-+-+-- Physical Device Number (0..6, 7 = Host)
; | | | | +-------- (reserved)
; | | | +---------- 1 = Drive Active, 0 = No Drive
; +-+-+------------ Logical Unit Number (usually 0 or 1)
;.....
; The Controller Type Byte contains information needed to dictate the specific
; bytes to be used to communicate to a SASI/SCSI-connected Hard Drive.
; Additional bytes will be defined as needed, so please coordinate any
; extensions with the Authors to insure the generality of tools.
CNTRLR: DEFB 80H ; Controller Types recognized are:
; 0- Owl 5- Conner SCSI
; 1- Adaptec ACB-4000A 6- Quantum SCSI
; 2- Xebec 1410A/Shugart 1610-3 7- Maxtor SCSI
; 3- Seagate SCSI 8- Syquest SCSI
; 4- Shugart 1610-4 Minimal SCSI 80H- GIDE (IDE/ATA)
; First drive (Parameters for Toshiba MK-1544 IDE)
BITS DEFL 00000000B ; SCSI - Physical Device 0, Logical Unit 0
; IDE - Drive 0 = Master
BITS DEFL BITS+[UNIT_0 AND 10H] ; If active, set Bit 4
HDRV0: DEFB BITS ; Set Device, Unit, and Active bits
DEFW 581 ; Number of Cylinders
DEFB 2 ; Number of Heads
DEFW 36 ; SCSI - Cylinder # to start reduced write
; IDE - Number of Sectors Per Track
DEFW 0000 ; Cylinder # to start precompensation
DEFB 0 ; Step Rate (0=3ms, 1=28us, 2=12us)
; Second drive (Parameters for Seagate ST-125N SCSI)
BITS DEFL 00000001B ; SCSI - Physical Device 1, Logical Unit 0
; IDE - Drive 1 = Slave
BITS DEFL BITS+[UNIT_1 AND 10H] ; If active, set Bit 4
HDRV1: DEFB BITS ; Set Device, Unit, and Active bits
DEFW 615 ; Syquest ST-125N
DEFB 4
DEFW 0000
DEFW 0000
DEFB 0
; Third drive (Parameters for Miniscribe 8425 SCSI)
BITS DEFL 00000010B ; Physical Device 2, Logical Unit 0
; IDE - (undefined)
BITS DEFL BITS+[UNIT_2 AND 10H] ; If active, set Bit 4
DEFB BITS ; Set Device, Unit, and Active bits
DEFW 615
DEFB 4
DEFW 615
DEFW 300
DEFB 2
DEFB 0,0,0,0,0 ; (Reserved)
;======= End of Fixed Config ======== Device Config follows ========


1138
Source/BPBIOS/iio-dx.z80
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334
Source/BPBIOS/iio-ww.z80
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@ -0,0 +1,334 @@
;:::::::::::::::::::::::::::::::::::::::::::::::::*************************
; Byte I/O Routines *** Hardware Specific ***
; - D-X Designs Pty Ltd P112 - *************************
;
; Several serial and parallel options exist on the P112, with two serial
; ports available at RS-232 signalling levels. The primary port defined here
; as COM1 uses SCC Channel A of the Z80182. A 16550-compatible serial port
; on the SMC FDC37C665 is used as COM2. Three other serial ports (the two
; ACSI ports in the Z180 core, and SCC Channel B) are available at TTL
; voltage levels on a single header and may be defined as COM3-5 if the pins
; from the Z182 are not otherwise used.
; This code supports the additional serial channels if the MORDEV equate
; is set to YES. If any of the three additional serial ports are defined
; (ESCC_B, ASCI_0, ASCI_1), then the System Configuration Register is set to
; Zero activating the additional signals in the conditions specified herein
; as activated by options in DEF-DX.LIB.
; A full Parallel port on the SMC FDC37C655 (in Normal Centronics mode) is
; used as the primary List (Printer) Device.
;
; NOTE: At the present time, it appears that port 0D9H (ENH182) cannot be set
; so ESCC operation at 24 MHz will occur at the full clock rate instead
; of being divided by Two as specified in Zilog documentation. Code
; managing ENH182 is commented out with ";;--" markers (HFB).
;
; 1.2 - 28 Aug 01 - Final scrub for GPL release. HFB
; 1.1a- 11 May 97 - Cleaned code, fixed added port accesses. HFB
; 1.1 - 25 Jan 97 - Revised ESCC Baud rate calcs, added COM3-5. HFB
; 1.0 - 19 Jun 96 - Initial Release for the P112 from YASBEC. HFB
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Place constants for Expansions here
CSEG
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Byte Device Control Tables
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
DEVCFG:
; The Clock Rate for the SCC channels on the Z80182 is based on a divider
; constant loaded in extended registers, the Processor Crystal frequency,
; and the setting of the divider in the SCC Register (1FH).
;
; NOTE: Divisor values are computed based on a compromise between the Crystal
; rates considered "standard" (6.144, 9.216, 12.288 MHz, etc) and the
; 16.000 MHz initially placed on the P112. Higher data rates (38.4 kbps
; and higher) may be out of tolerance, particularly at low CPU speeds.
;
; Clock rates for the serial port on the SMC 37C655 are based on a software
; programmable divider from the 24 MHz crystal driving the chip.
COM1: DEFB 'COM1' ; 4-Char ID
DEFB 11101011B ; Baud Rate
; ||||++++--- Baud Rate setting (19.2 kbps)
; ++++------- Maximum Baud Rate (115.2 kbps)
; Rates are as:
; 0000 = None 0001 = 134.5 0011 = 50 0011 = 75
; 0100 = 150 0101 = 300 0110 = 600 0111 = 1200
; 1000 = 2400 1001 = 4800 1010 = 9600 1011 = 19200
; 1100 = 38400 1101 = 76800 1110 = 115200 1111 = Fixed
DEFB 11100001B ; Config Byte (In,Out,CTS/RTS control,1 Stop)
; |||||||+---------- Stop Bits 1 (1), 2 (0)
; ||||||+----------- Parity Enable (1), Disable (0)
; |||||+------------ Parity Even (1), Odd (0)
; ||||+------------- Data Bits 8 (0), 7 (1)
; |||+-------------- Xon-Xoff Handshake
; ||+--------------- CTS/RTS Handshake
; |+---------------- Input Device No (0), Yes (1)
; +----------------- Output Device No (0), Yes (1)
DEFB 0FFH ; Input Data Mask
DEFB 0FFH ; Output Data Mask
DEFW COM1OT ; COM 1 Byte Output
DEFW COM1OS ; COM 1 Output Status
DEFW COM1IN ; COM 1 Byte Input
DEFW COM1IS ; COM 1 Input Status
COM2: DEFB 'COM2' ; 4-Char ID
DEFB 11101010B ; Baud Rate (115.2k Max, 9600 Set)
DEFB 11100001B ; Config Byte (In,Out,CTS/RTS control,1 Stop)
DEFB 0FFH ; Input Data Mask
DEFB 0FFH ; Output Data Mask
DEFW COM2OT ; COM 2 Byte Output
DEFW COM2OS ; COM 2 Output Status
DEFW COM2IN ; COM 2 Byte Input
DEFW COM2IS ; COM 2 Input Status
PIO1: DEFB 'PIO1' ; 4-Char ID
DEFB 00000000B ; Baud Rate (None)
DEFB 10000000B ; Config Byte (Output Only)
DEFB 0FFH ; Input Data Mask
DEFB 07FH ; Output Data Mask
DEFW PIO1OT ; PIO Byte Output
DEFW PIO1OS ; PIO Output Status
DEFW PIO1IN ; PIO Byte Input
DEFW PIO1IS ; PIO Input Status
IF MOVCPM OR [MORDEV AND NOT [ESCC_B OR ASCI_0 OR ASCI_1]]
DEFB 'NULL' ; 4-Char ID
DEFB 00000000B ; Baud Rate (None)
DEFB 11000000B ; Config Byte
DEFB 0FFH ; Input Data Mask
DEFB 0FFH ; Output Data Mask
DEFW ISFALSE ; Null Output
DEFW ISTRUE ; Null Output Status
DEFW ISFALSE ; Null Input
DEFW ISTRUE ; Null Input Status
ENDIF
DEFB 0 ; - End-of-Table marker
MAXBDV EQU [$-DEVCFG-1]/[COM2-COM1] ; Number of Character Devices Defined
DEVTBL: LD HL,DEVCFG ; BYTE device table
RET ; CP/M-3 device init
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; COM1 Drivers
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
IF HBIOS
; Uses HBIOS
;.....
; COM1 Input Status Test
COM1IS:
PUSH BC
PUSH DE
PUSH HL
LD BC,0200H + HB_IODEV ; Func=$02 (IS), Device/Unit=HB_IODEV
CALL HBX_INVOKE
POP HL
POP DE
POP BC
RET
;.....
; COM1 Input Routine
; Remain in Loop until Char ready, then Return Char in A
COM1IN:
PUSH BC
PUSH DE
PUSH HL
LD BC,0000H + HB_IODEV ; Func=$00 (IN), Device/Unit=HB_IODEV
CALL HBX_INVOKE
LD A,E
POP HL
POP DE
POP BC
RET
;.....
; COM1 Output Status Test
COM1OS:
PUSH BC
PUSH DE
PUSH HL
LD BC,0300H + HB_IODEV ; Func=$03 (OS), Device/Unit=HB_IODEV
CALL HBX_INVOKE
POP HL
POP DE
POP BC
RET
;.....
; COM1 Output Routine (Byte to Send in C)
COM1OT:
PUSH BC
PUSH DE
PUSH HL
LD E,C ; Character to E
LD BC,0100H + HB_IODEV ; Func=$01 (OT), Device/Unit=HB_IODEV
CALL HBX_INVOKE
POP HL
POP DE
POP BC
RET
ELSE
;.....
; COM1 Input Status Test
COM1IS: IN A,(_LSR) ; Input Status Reg Byte
RRA ; Rcv Rdy Bit[0] -> Carry
SBC A,A ; A=00 if Not Ready, FF if Char received
RET
;.....
; COM1 Input Routine
COM1IN: CALL COM1IS ; Char Ready?
JR Z,COM1IN ; ..loop if Not
IN A,(_RBR) ; Else Read Receive Buffer
LD C,A ; Save byte
LD A,(COM1+6) ; .get mask
AND C ; ..apply it
RET
;.....
; COM1 Output Status Test
COM1OS:
IN A,(_LSR) ; Read Status Reg
AND 20H ; Mask Bit of interest
RET Z ; ..return if nothing valid
OR 0FFH ; Else set flags for Ready
RET
;.....
; COM1 Output Routine
COM1OT: CALL COM1OS ; Test if ready
JR Z,COM1OT ; ..loop if not
LD A,(COM1+7) ; Get output mask
AND C ; apply
OUT (_THR),A ; and send char to Xmt Holding Reg
RET
ENDIF
PAGE
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; COM2 Drivers
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Uses generic 16550 UART
;.....
; COM2 Input Status Test
COM2IS: IN A,(_LSR) ; Input Status Reg Byte
RRA ; Rcv Rdy Bit[0] -> Carry
SBC A,A ; A=00 if Not Ready, FF if Char received
RET
;.....
; COM2 Input Routine
COM2IN: CALL COM2IS ; Char Ready?
JR Z,COM2IN ; ..loop if Not
IN A,(_RBR) ; Else Read Receive Buffer
LD C,A ; Save byte
LD A,(COM2+6) ; .get mask
AND C ; ..apply it
RET
;.....
; COM2 Output Status Test
COM2OS:
IN A,(_LSR) ; Read Status Reg
SOSTV: AND 20H ; Mask Bit of interest
RETST: RET Z ; ..return if nothing valid
ISTRUE: OR 0FFH ; Else set flags for Ready
RET
;.....
; COM2 Output Routine
COM2OT: CALL COM2OS ; Test if ready
JR Z,COM2OT ; ..loop if not
LD A,(COM2+7) ; Get output mask
AND C ; apply
OUT (_THR),A ; and send char to Xmt Holding Reg
RET
PAGE
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Parallel I/O Drivers
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Uses "Standard" Parallel Centronics mode of SMC37C655 (output only)
;.....
; Parallel Input Status Test
PIO1IS: JR ISTRUE ; Not implemented
;.....
; Parallel Input Data fetch
PIO1IN: JP ISFALSE ; Not implemented
;.....
; Parallel Output Status Test
PIO1OS: JP ISTRUE ; Not implemented
;.....
; Parallel Output Routine
PIO1OT: JP ISFALSE ; Not implemented
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;:: I n t e r r u p t T a b l e ::
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; The Z80182 Interrupt Vector table is placed here on a 32-byte
; boundary for internal peripherals.
DEFS 32-[$-BIOSJT AND 31] ; Align
INTTBL:
DEFW BADINT ; FDC Controller w/Ints (FDCINT if Real Ints)
DEFW BADINT ; Parallel output port (INTPIO if Real Ints)
DEFW TIMER ; Timer0
DEFW BADINT ; Timer1
DEFW BADINT ; DMA Channel 0
DEFW BADINT ; DMA Channel 1
DEFW BADINT ; Clocked Serial IO
DEFW BADINT ; ASCI 0 if Not Interrupt/Mordev
DEFW BADINT ; ASCI 1 if Not Interrupt/Mordev
; Error trap for unimplemented Interrupts
BADINT: CALL PRINT
DEFC CR,LF,'Bad Int.'
JP WBOOT
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
;:: D e v i c e I n i t i a l i z a t i o n ::
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
CSEG
DEVINI:
IF BANKED
CALL BIOSTK
CALL GOSYSB
JP JDVINI
COMMON /BANK2/
JDVINI:
ENDIF
RET ; WW

89
Source/BPBIOS/ramd-ww.z80
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@ -0,0 +1,89 @@
;===============================================************************
; RAM Disk Driver. ** Hardware Specific **
; D-X Designs Pty Ltd P112 ************************
;
; 1.1 - 28 Jul 01 - Updated to latest fix for external driver. HFB
; 1.0 - 10 Jun 96 - Initial Release for P112 from YASBEC. HFB
;=======================================================================
CSEG
IF BANKED
COMMON /BANK2/
ENDIF
; This module creates a RAM Drive using the available memory (if available)
; above the TPA and possible System banks. For a banked system, the minimum
; needed is a 64k Main TPA and a 32k System Bank.
;.....
; Select the RAM Drive. This routine performs any setup required in a select.
SELRAM: JP SETPARMS ; No action locally.
;.....
; Read a 128-byte logical sector from the RAM Drive to main memory.
; This routine uses the HSTxxx values from the base BIOS routines.
RAMRD: OR 0FFH ; Set Read flag (non-0)
JR RamRW ; ..go to common code
;.....
; Write a 128-byte logical sector from main memory to the RAM Drive.
; This routine uses the HSTxxx values from the base BIOS routines.
RAMWR: XOR A ; Set Write flag with 0, Read w/AFH
LD (HSTWRT),A ; clear pending write flag
;..fall thru to common code..
; The following performs calculations for the proper address and bank, sets
; the DMA block and executes the Move to/from the Host Buffer.
RamRW:
PUSH AF ; Save R/W flag for later
; BUILD TOTAL BYTE OFFSET INTO A:HL
XOR A,A ; A STARTS OUT ZERO
LD HL,(HSTTRK) ; HL STARTS WITH TRACK NUM
LD H,0 ; ONLY LSB IS NEEDED (INIRAMD PASSES INVALID MSB)
LD B,5 ; MULT BY 32 SECTORS PER TRACK
RAMWR1:
ADD HL,HL ; DOUBLE VALUE
ADC A,A ; ... INCLUDING A WITH CARRY
DJNZ RAMWR1 ; LOOP 5 TIMES FOR MULT BY 32
LD DE,(HSTSEC) ; SECTOR VALUE TO 3 (ONE BYTE)
LD D,0 ; CLEAR MSB SINCE HSTSEC IS JUST ONE BYTE
ADD HL,DE ; ADD TO WORKING VALUE
ADC A,0 ; HANDLE POSSIBLE CARRY
LD B,7 ; MULT BY 128 BYTES PER SECTOR
RAMWR2:
ADD HL,HL ; DOUBLE VALUE
ADC A,A ; ... INCLUDING A WITH CARRY
DJNZ RAMWR2 ; LOOP 7 TIME FOR MULT BY 128
; CONVERT BYTE OFFSET IN A:HL TO BANK(A):OFFSET(HL)
SLA H ; ROTATE HIGH BIT OF H INTO CF
RL A ; ROTATE CF INTO LOW BIT OF A
SRL H ; FIX H (ROTATE BACK W/ ZERO INTO HIGH BIT)
; ADJUST FOR STARTING RAM BANK
LD C,A ; BANK TO C
LD A,(RAMBNK) ; GET STARTING RAM BANK NUM
ADD A,C ; COMBINE TO GET ACTUAL SOURCE BANK NUM
; SETUP FOR INTERBANK COPY
LD C,A ; SOURCE BANK TO C
LD B,BID_HB ; DEST BANK TO B (HSTBUF IN HBIOS)
LD DE,(HB_DSKBUF) ; DEST ADDRESS TO DE; HL ALREADY HAS SOURCE ADDRESS
; REVERSE VALUES IF WRITE
POP AF ; Read or Write?
JR NZ,RAMWR3 ; ..jump if Read
EX DE,HL ; Else swap things around
LD A,C
LD C,B
LD B,A
RAMWR3:
; PERFORM THE COPY
CALL HBX_XCOPY ; SET BANKS FOR COPY
LD BC,128 ; SET LENGTH OF COPY (ONE SECTOR)
CALL HBX_COPY ; DO THE COPY
; CLEAN UP AND RETURN
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;================== End of RAM Disk Code ====================

16
Source/BPBIOS/def-ww-mk4.lib → Source/BPBIOS/romwbw-mk4.lib
View File

@ -10,7 +10,7 @@
;
HBIOS EQU YES ; Use HBIOS functions
INTPXY EQU YES ; Internal HBIOS Proxy
HBLOC EQU 0FE00H ; Location of HBIOS proxy (if used)
HBLOC EQU 0FE00H ; Location of HBIOS proxy (used if not INTPXY)
;
; Set exactly one of the following to YES to specify platform
;
@ -42,7 +42,7 @@ HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block
;
; Layout of RAM banks
;
IF N8VEM OR ZETA
IF N8VEM OR ZETA OR MK4
BID_RAMD EQU 80H
BID_RAMM EQU 8BH
BID_SYS EQU 8CH
@ -58,14 +58,6 @@ BID_HB EQU 9DH
BID_USR EQU 9EH
BID_COM EQU 9FH
ENDIF
IF MK4
BID_RAMD EQU 10H
BID_RAMM EQU 1BH
BID_SYS EQU 1CH
BID_HB EQU 1DH
BID_USR EQU 1EH
BID_COM EQU 1FH
ENDIF
;
IF N8 OR MK4
HB_IODEV EQU HBCIO_ASCI
@ -74,7 +66,7 @@ HB_IODEV EQU HBCIO_UART
ENDIF
;
IF INTPXY
MEMTOP EQU 0FFDFH ; Reserve memory above this for HBIOS
MEMTOP EQU 0FFE0H - 1 ; Start of HBIOS 32 byte control block
ELSE
MEMTOP EQU HBLOC - 1 ; Reserve memory above this for HBIOS
MEMTOP EQU HBLOC - 1 ; Start of HBIOS 512 byte proxy
ENDIF

16
Source/BPBIOS/def-ww-sim.lib → Source/BPBIOS/romwbw-sim.lib
View File

@ -10,7 +10,7 @@
;
HBIOS EQU YES ; Use HBIOS functions
INTPXY EQU YES ; Internal HBIOS Proxy
HBLOC EQU 0FE00H ; Location of HBIOS proxy (if used)
HBLOC EQU 0FE00H ; Location of HBIOS proxy (used if not INTPXY)
;
; Set exactly one of the following to YES to specify platform
;
@ -42,7 +42,7 @@ HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block
;
; Layout of RAM banks
;
IF N8VEM OR ZETA
IF N8VEM OR ZETA OR MK4
BID_RAMD EQU 80H
BID_RAMM EQU 8BH
BID_SYS EQU 8CH
@ -58,14 +58,6 @@ BID_HB EQU 9DH
BID_USR EQU 9EH
BID_COM EQU 9FH
ENDIF
IF MK4
BID_RAMD EQU 10H
BID_RAMM EQU 1BH
BID_SYS EQU 1CH
BID_HB EQU 1DH
BID_USR EQU 1EH
BID_COM EQU 1FH
ENDIF
;
IF N8 OR MK4
HB_IODEV EQU HBCIO_ASCI
@ -74,7 +66,7 @@ HB_IODEV EQU HBCIO_UART
ENDIF
;
IF INTPXY
MEMTOP EQU 0FFDFH ; Reserve memory above this for HBIOS
MEMTOP EQU 0FFE0H - 1 ; Start of HBIOS 32 byte control block
ELSE
MEMTOP EQU HBLOC - 1 ; Reserve memory above this for HBIOS
MEMTOP EQU HBLOC - 1 ; Start of HBIOS 512 byte proxy
ENDIF

72
Source/BPBIOS/romwbw.lib
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@ -0,0 +1,72 @@
;:::::::::::::::::::::::::::::::::::::::::::::::**********************
; B/P BIOS Configuration and Equate File. ** System Dependant **
; - D-X Designs Pty Ltd P112 CPU Board - **********************
; HBIOS specific customizations
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; BIOS Configuration Equates and Macros
;
; NOTE: Must make sure settings below match hardware and
; HBIOS configuration.
;
HBIOS EQU YES ; Use HBIOS functions
INTPXY EQU YES ; Internal HBIOS Proxy
HBLOC EQU 0FE00H ; Location of HBIOS proxy (used if not INTPXY)
;
; Set exactly one of the following to YES to specify platform
;
N8VEM EQU YES
ZETA EQU NO
N8 EQU NO
MK4 EQU NO
;
; Set either the following to YES (or both to NO for no clock code)
;
SIMHCLK EQU NO ; Direct SIMH clock access
HBCLK EQU YES ; HBIOS clock driver
;
; Set HB_HDDEV to appropriate hard disk driver
;
HB_HDDEV EQU HBDEV_HDSK ; SIMH HDSK Driver
;HB_HDDEV EQU HBDEV_IDE ; IDE Driver
;HB_HDDEV EQU HBDEV_SD ; SD Card Driver
;
; Set HB_MDDEV to appropriate memory disk driver
;
HB_MDDEV EQU HBDEV_MD ; Memory Disk Driver
;
; RAM/ROM disk sizes expressed as count of 2K blocks
;
HB_RAMBLKS EQU 192 ; 512K - 128K reserved / 2K per block
HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block
;HB_ROMBLKS EQU 448 ; 1024K - 128K reserved / 2K per block
;
; Layout of RAM banks
;
IF N8VEM OR ZETA OR MK4
BID_RAMD EQU 80H
BID_RAMM EQU 8BH
BID_SYS EQU 8CH
BID_HB EQU 8DH
BID_USR EQU 8EH
BID_COM EQU 8FH
ENDIF
IF N8
BID_RAMD EQU 80H
BID_RAMM EQU 9BH
BID_SYS EQU 9CH
BID_HB EQU 9DH
BID_USR EQU 9EH
BID_COM EQU 9FH
ENDIF
;
IF N8 OR MK4
HB_IODEV EQU HBCIO_ASCI
ELSE
HB_IODEV EQU HBCIO_UART
ENDIF
;
IF INTPXY
MEMTOP EQU 0FFE0H - 1 ; Start of HBIOS 32 byte control block
ELSE
MEMTOP EQU HBLOC - 1 ; Start of HBIOS 512 byte proxy
ENDIF

12
Source/BPBIOS/sectran.z80
View File

@ -15,17 +15,6 @@
; associated with each DPB.
SECTRN:
; PUSH AF
; PUSH BC
; PUSH DE
; PUSH HL
; CALL PRINT
; DEFB '[SECTRN',']'+80H
; POP HL
; POP DE
; POP BC
; POP AF
IF BANKED
CALL BIOSTK
CALL GOSYSB
@ -40,7 +29,6 @@ BSTRN: LD (CPMSEC),BC ; Save logical record from Dos for deblocker
LD H,B
LD L,C ; Sector number to hl
RET Z ; Return if no translation
; RET ; Return if no translation
LD A,C ; Logical record number
CALL PHYSEC ; Convert to logical host sector

19
Source/BPBIOS/selrwd.z80
View File

@ -12,11 +12,6 @@
CSEG
SELDSK:
; CALL PRTSTRD
; DEFB '[SELDSK]$'
; LD A,C
; CALL PRTHEXBYTE
IF BANKED
CALL BIOSTK
CALL GOSYSB
@ -60,8 +55,6 @@ SELDKV:
LD (HL),A ; Save back in DPH
SELDK0: LD (SEKDVT),A ; Save Drive Type Byte locally
POP DE ; Restore new mount flag
BIT 0,E ; New mount?
JR NZ,SETPARMS ; Set params if old mount
@ -120,22 +113,19 @@ DVRVCT: DEFW SELERR ; Driver 0 Select
DEFW SELHD ; Driver 2 Select (Hard Drive)
DEFW HDREAD ; Driver 2 Read
DEFW HDWRIT ; Driver 2 Write
ELSE
ENDIF ; harddsk
IF [RAMDSK AND NOT HARDDSK]
DEFW SELERR ; Driver 2 Select (Dummy if No Hard Drive)
DEFW ISTRUE ; Driver 2 Read
DEFW ISTRUE ; Driver 2 Write
ENDIF ;harddsk
ENDIF ;ramdsk & not harddsk
IF RAMDSK
DEFW SELRAM ; Driver 3 Select (RAM Drive)
DEFW RAMRD ; Driver 3 Read
DEFW RAMWR ; Driver 3 Write
ELSE
DEFW SELERR ; Driver 3 Select (Dummy if No RAM Drive)
DEFW ISTRUE ; Driver 3 Read
DEFW ISTRUE ; Driver 3 Write
ENDIF ;ramdsk
SELERR: LD HL,0 ; Send null DPH pointer back to caller
RET
@ -243,7 +233,6 @@ GETDPH: ADD A,A ; Form table index value
; RAM Storage
SEKPDN: DEFS 1 ; Physical drive number to use
HSTPDN: DEFS 1 ; WW
SEKDVT: DEFS 1 ; Drive type byte for selected drive
;============================= End of SELRWD ==============================

2
Source/BPBIOS/util.z80
View File

@ -312,7 +312,7 @@ COUT:
POP AF
RET
;
STR_PANIC DB "\r\n\r\n>>> FATAL ERROR:$"
STR_PANIC DB CR,LF,CR,LF,">>> FATAL ERROR:$"
STR_AF DB " AF=$"
STR_BC DB " BC=$"
STR_DE DB " DE=$"

60
Source/BPBIOS/wboot-dx.z80
View File

@ -15,22 +15,9 @@ WBOOT:
ELSE
LD SP,80H ; Use space below default buffer
ENDIF
IF FASTWB
; Restore command processor from
; cache in (SYSBNK):100H. We assume that the
; command processor lives in high memory.
LD A,(SYSBNK) ; Source bank is SYSBNK
LD C,A ; Put it in C
LD A,(TPABNK) ; Destination bank is TPABNK
LD B,A ; Put it in B
CALL HBX_XCOPY ; Set banks for extended copy
LD HL,100H ; Copy from start of cache in SYS
LD DE,(CPADR) ; .. to location of command processor in TPA
LD BC,(CPLEN) ; Length of command processor
CALL HBX_COPY ; Do it
WBOOTV:
LD HL,SARL ; Point to DMA Initialization block
WBOOTV: CALL DMAMOV
XOR A ; Indicate "A" logged as Host Disk
LD (HSTDSK),A ; ..by showing Host Disk already logged
ELSE
@ -40,7 +27,6 @@ WBOOTV:
ELSE
LD SP,EXTSTK+32 ; Place default stack up high
ENDIF
LD A,0FFH ; Insure the default drive is logged
LD (HSTDSK),A ; ..by unlogging the Host Disk
LD A,(SYSDRV)
@ -127,29 +113,21 @@ GOZSYS: LD BC,80H ; Default DMA address is 80H
LD D,(HL) ; Get the vector
DEC HL
LD E,(HL)
PUSH DE ; Save CCP entry address
IF BANKED
; Copy vectors from TPA page zero to SYS page zero
LD BC,(TPABNK) ; C := TPABNK, B := SYSBNK
CALL XMOVE ; Set source/dest banks for copy
LD HL,0 ; Source address is zero
LD DE,0 ; Destination address is zero
LD BC,40H ; Copy 40H bytes
CALL MOVE ; Do it
LD HL,CPYVEC ; Copy Page0 Vectors and RSTs to System Bank
CALL DMAMOV
LD A,(TPABNK) ; Set all Bank regs to TPA
LD (SRCBNK),A
LD (DSTBNK),A
LD (DMABNK),A
CALL SELMEM ; Insure TPA in context (also set USRBNK)
XOR A
LD (BIOSTK),A ; Init bank switcher
ENDIF
LD A,(4) ; Get current disk number
LD C,A ; Send to the CCP
; EI ; Enable the interrupt system
; EX DE,HL ; ..put destination in HL
POP HL ; Restore CCP entry address
EI ; Enable the interrupt system
EX DE,HL ; ..put destination in HL
JP (HL) ; Go to Z-System for further processing
;.....
@ -181,11 +159,25 @@ IOPRET: JP CONST
DSEG ; Put the following areas in Data Segment
; Command processor address and length used when saving
; and restoring cached copy.
; This table in unitialized RAM is filled from the Cold Boot module.
IF FASTWB
CPADR DEFS 2 ; Command processor address
CPLEN DEFS 2 ; Command processor length
SARL: DEFS 2 ; Source Segment address
DEFS 1 ; Source Bank Number
DEFS 2 ; Destination Segment address
DEFS 1 ; Destination Bank Number (TPA)
DEFS 2 ; Number of bytes to move
ENDIF ;fastwb
; This table is used to copy Page 0 vectors from TPA to base of System bank
; on Warm Boots to insure that needed IO can vector to the correct devices.
IF BANKED
CPYVEC: DEFS 2 ; Offset of Source area
DEFS 1 ; ..Source Bank (Base of TPA) [BNK0 SHR 1]
DEFS 2 ; Offset of Destination
DEFS 1 ; ..Dest Bank (Base of System Bank) [BNK2 SHR 1]
DEFS 2 ; Length of move
ENDIF
;========================= End of WBOOT ============================


191
Source/BPBIOS/wboot-ww.z80
View File

@ -0,0 +1,191 @@
;:::::::::::::::::::::::::::::::::::::::************************************
; Warm Boot Routine *** Machine Dependant for Moves ***
; - D-X Designs Pty Ltd P112 - *** and custom load formatting ***
; ************************************
; 1.0 - 12 Jun 96 - Initial Release for P112 from YASBEC. HFB
;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
CSEG
WBOOT:
IF BANKED
LD A,(TPABNK) ; Get TPA Bank # in case currently in Bank
CALL SELMEM ; ..and make current
LD SP,USP ; Set stack in high memory
ELSE
LD SP,80H ; Use space below default buffer
ENDIF
IF FASTWB
; Restore command processor from
; cache in (SYSBNK):100H. We assume that the
; command processor lives in high memory.
LD A,(SYSBNK) ; Source bank is SYSBNK
LD C,A ; Put it in C
LD A,(TPABNK) ; Destination bank is TPABNK
LD B,A ; Put it in B
CALL HBX_XCOPY ; Set banks for extended copy
LD HL,100H ; Copy from start of cache in SYS
LD DE,(CPADR) ; .. to location of command processor in TPA
LD BC,(CPLEN) ; Length of command processor
CALL HBX_COPY ; Do it
WBOOTV:
XOR A ; Indicate "A" logged as Host Disk
LD (HSTDSK),A ; ..by showing Host Disk already logged
ELSE
IF BANKED
LD SP,USP ; If banked, use stack in high common memory
CALL GOSYSB ; Disk routines are in banked memory
ELSE
LD SP,EXTSTK+32 ; Place default stack up high
ENDIF
LD A,0FFH ; Insure the default drive is logged
LD (HSTDSK),A ; ..by unlogging the Host Disk
LD A,(SYSDRV)
LD C,A ; Select system disk
LD E,0 ; Declare new mount
CALL SELDSK ; We're going to use the system disk
LD BC,0
CALL SETTRK ; Set track 0
LD BC,10H*256+1 ; B sectors remaining, C first sector
LD DE,0 ; DE beginning track
; Note that we begin by reading track 0, sector 1 since sector 0
; contains the cold start loader, which is skipped in a warm start
LD HL,CPR ; Base of CP/M (initial load point)
LOAD1: PUSH DE ; Load a Sector, Save Current Track
PUSH BC ; Save sectors remaining and next sector
PUSH HL ; Save DMA address
LD (DMAADR),HL ; ..in deblocker
LD HL,(SEKDPH)
LD E,(HL)
INC HL
LD D,(HL) ; Get sector XLATE address
CALL SECTRN ; Skew sector as needed
LD (SEKSEC),HL ; Save Sector # directly in deblocker
; Drive = 0, track set, sector set, DMA address set
CALL READ
OR A ; Any errors?
JR NZ,WBOOT ; Retry the entire boot if an error occurs
; No error, move to next sector
POP HL ; Recall DMA address
LD DE,128 ; DMA=DMA+128
ADD HL,DE ; New DMA address is in H,L
POP BC ; Recall NSECTS and current sector
POP DE ; Recall current track
DEC B ; Sectors=sectors-1
JR Z,GOZSYS ; Go to Z-System if all have been loaded
; More sectors remain to load, check for track change
INC C ; Increment sector count
LD A,(CPMSPT) ; Max sector +1
CP C ; Have we reached the end?
JR NZ,LOAD1 ; If not
; End of current track, go to next track
INC DE ; Track=track+1
LD C,0 ; First sector on next track
; Save register state, and set new track
LD (SEKTRK),DE ; Save track directly
JR LOAD1 ; For another sector
ENDIF ;fastwb
; End load operation, set parameters & go to Z-System
GOZSYS: LD BC,80H ; Default DMA address is 80H
CALL SETDMA
LD A,0C3H ; C3 is a JMP instruction
LD (0),A ; For JMP to WBOOT
LD (5),A ; For JMP to BDOS
LD HL,BIOSJT+3 ; Wboot entry point
LD (1),HL ; Set address field for JMP at 0
LD HL,(ENVADR) ; Get the pointer to the ENV
LD DE,43H ; Offset to high byte of Dos Start
ADD HL,DE
LD D,(HL) ; Load Dos start
DEC HL
LD E,(HL)
EX DE,HL ; Put Dos in HL
LD BC,6 ; .offset to Entry
ADD HL,BC
LD (6),HL ; ..and set Address field of jump at 5 to BDOS
EX DE,HL
DEC HL ; Back down to CCP entry
DEC HL
LD D,(HL) ; Get the vector
DEC HL
LD E,(HL)
PUSH DE ; Save CCP entry address
IF BANKED
; Copy vectors from TPA page zero to SYS page zero
LD BC,(TPABNK) ; C := TPABNK, B := SYSBNK
CALL XMOVE ; Set source/dest banks for copy
LD HL,0 ; Source address is zero
LD DE,0 ; Destination address is zero
LD BC,40H ; Copy 40H bytes
CALL MOVE ; Do it
LD A,(TPABNK) ; Set all Bank regs to TPA
LD (DMABNK),A
CALL SELMEM ; Insure TPA in context (also set USRBNK)
XOR A
LD (BIOSTK),A ; Init bank switcher
ENDIF
LD A,(4) ; Get current disk number
LD C,A ; Send to the CCP
; EI ; Enable the interrupt system
; EX DE,HL ; ..put destination in HL
POP HL ; Restore CCP entry address
JP (HL) ; Go to Z-System for further processing
;.....
; Common DMA move sequence placed here in CSEG for Common access
; Enter with HL pointing to a DMA definition block
IF [BANKED OR FASTWB OR RAMDSK]
DMAMOV: LD BC,8*256+SAR0L ; Send 8 bytes to Ports SAR0L
OTIMR
LD A,00000010B ; Set DMA Mode control to Burst Mode
OUT0 (DMODE),A
LD A,40H ; Enable DMA0
OUT0 (DSTAT),A ; ..and move the block
RET
ENDIF
IF [Z3 AND HAVIOP]
; Aux Jump Table so IOP's can find routines. After Cold Boot, the
; address of this table is placed in BIOSJT+1.
IOPRET: JP CONST
JP CONIN
JP CONOUT
JP LIST
JP AUXOUT
JP AUXIN
JP LISTST
ENDIF
DSEG ; Put the following areas in Data Segment
; Command processor address and length used when saving
; and restoring cached copy.
IF FASTWB
CPADR DEFS 2 ; Command processor address
CPLEN DEFS 2 ; Command processor length
ENDIF ;fastwb
;========================= End of WBOOT ============================


3
Source/BPBIOS/z33.zex
View File

@ -1,2 +1,3 @@
IOPINIT
LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T
LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T


3
Source/BPBIOS/z34.zex
View File

@ -1,2 +1,3 @@
IOPINIT
LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T
LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T


125
Source/BPBIOS/z3base.lib.sav
View File

@ -0,0 +1,125 @@
; B/P Bios System Z3 Definition File.
; This file is adapted from the basic Z3BASE.LIB configuration file used for
; most ZCPR33 systems. It has added the new definitions for the Resident
; User Space defined in B/P Bios descriptions.
;=========================================================================
;== NOTE: The Starting Address of the User Space marks the lower ==
;== base of memory and MUST be entered. B/P Bios Utilities use ==
;== this address to locate many portions of the operating system. ==
;=========================================================================
; To change your systems definition, first sketch out the memory map in the
; comment table, then set the equates to reflect the memory map, doing any
; required calculations for element sizes and required spaces. As an
; alternative, just leave this file alone and configure everything with
; the utilities provided.
; FFD0 - FFFF 48 Bytes ZCPR3 External Stack
; FF00 - FFCF 208 Bytes Multiple Command Line Buffer
; FE00 - FEFF 256 Bytes Environment Descriptor
; Bytes 00H-7FH: Z3 Parameters
; Bytes 80H-FFH: Z3 TCAP
; FDFF 1 Byte Wheel byte
; FDF4 - FDFE 11 Bytes Path (5 elements)
; FDD0 - FDF3 36 Bytes ZCPR3 External FCB
; FD80 - FDCF 80 Bytes ZCPR3 Message Buffers
; FD00 - FD7F 128 Bytes ZCPR3 Shell Stack
; FC00 - FCFF 256 Bytes Named Directory Buffer
; FA00 - FBFF 512 Bytes Flow Command Package
; F200 - F9FF 2.0 KBytes Resident Command Package
; EC00 - F1FF 1.5 KBytes IO Package
; E900 - EBFF .75 KBytes Resident User Space
; The remainder is for the Operating System. Exact sizes vary depending
; primarily on the Number and sizes of Hard Drive Partitions, but may be:
; D100 - EBFF 5.0 KBytes B/P BIOS (unbanked version)
; C300 - D0FF 3.5 KBytes ZSDOS 1.0 BDOS
; BB00 - C2FF 2 KBytes ZCPR 3.3 Command Processor
; 0100 - BAFF ~46 KBytes Transient Program Area
; 0000 - 00FF 256 Bytes Standard CP/M Buffers
;========================================================================
FALSE EQU 0
TRUE EQU NOT FALSE
YES EQU TRUE
NO EQU FALSE
; The External Stack is placed in the very top position in memory. It is
; mandatory for B/P Bios and ZCPR 3.3.
EXTSTK EQU 0FFD0H ; ZCPR3 External Stack
EXTSTKS EQU YES
; The Multiple Command Line Buffer is placed in the Top Page of Memory to
; place it above the Environment. It is mandatory for ZCPR 3.3.
Z3CL EQU 0FF00H ; ZCPR3 Command Line Buffer
Z3CLS EQU 208-5 ; Size of Command Line Buffer-5
; The ZCPR3 External Environment Descriptor is mandatory B/P Bios & ZCPR 3.3.
; The Environment Descriptor MUST begin on an even Page Boundary (xx00H).
Z3ENV EQU 0FE00H ; Environment Descriptors
Z3ENVS EQU 2 ; Size of Env Descriptor in 128-Byte Blks
; The ZCPR3 Wheel Byte is mandatory for ZCPR 3.3.
Z3WHL EQU 0FDFFH ; Wheel Byte Address
Z3WHLS EQU YES
; The Path is mandatory for ZCPR 3.3.
EXPATH EQU 0FDF4H ; External Path starting Address
EXPATHS EQU 5 ; (Path Size = EXPATHS*2 + 1 = 11 bytes)
; This defines 5 2-byte Path Elements
; The ZCPR3 External FCB is mandatory for ZCPR 3.3.
EXTFCB EQU 0FDD0H ; 36-Byte ZCPR3 External FCB
EXTFCBS EQU YES
; The ZCPR3 Message Buffers are mandatory for ZCPR 3.3.
Z3MSG EQU 0FD80H ; 80-Byte ZCPR3 Message Buffer
Z3MSGS EQU YES
; Shell Stack definition. Set SHSTKS to 0 to eliminate Shell Stack
SHSTK EQU 0FD00H ; Shell Stack Starting Address
SHSTKS EQU 4 ; Number of SHSIZE-Byte Shell Stack entries
SHSIZE EQU 32 ; (Stack Size = SHSTKS * SHSIZE = 128 Bytes)
; ZCPR3 Named Directory Buffer definition. Set Z3NDIRS to 0 to eliminate
; the named directory buffer.
Z3NDIR EQU 0FC00H ; Start of Named Directory Buffer
Z3NDIRS EQU 14 ; Number of Named Directory Elements
; (NDIR Size = Z3NDIRS * 18 + 1 = 253 Bytes)
; Flow Command Package definition. Set FCPS to 0 to eliminate FCP
FCP EQU 0FA00H ; Start of Flow Command Package
FCPS EQU 4 ; (FCP Size = 128 * FCPS = 512 Bytes)
; Resident Command Processor Definition. Set RCPS to 0 to eliminate RCP
RCP EQU 0F200H ; Start of Resident Command Processor
RCPS EQU 16 ; (RCP Size = 128 * RCPS = 2 kBytes)
; IO Package definition. Set IOPS to 0 to eliminate IOP
IOP EQU 0EC00H ; Start of IO Package
IOPS DEFL 12 ; (IOP Size = 128 * IOPS = 1.5 kBytes)
;=========================================================================
; Resident User Space Definition. Set USPCS to 0 to eliminate USPC.
; The USPC Value marks the Lower Limit of Reserved Common High Memory and
; MUST BE PRESENT!
USPC EQU 0E900H ; Start of Resident User Space (MANDATORY)
USPCS EQU 6 ; (USPC Size = 128 * USPCS = 0.75 kBytes)
;--- End of Z3BASE.LIB ---


4
Source/BPBIOS/z41.zex
View File

@ -1,2 +1,4 @@
IOPINIT
LDR SYS.NDR,SYS.FCP,WW.Z3T
LDR SYS.NDR,SYS.FCP,WW.Z3T
ZSCFG2 CB


BIN
Source/BPBIOS/zcpr33.bin
View File

Binary file not shown.

2
Source/Build.cmd
View File

@ -1,4 +1,4 @@
@echo off
setlocal
pushd BIOS && Powershell .\Build.ps1 %* && popd
pushd HBIOS && Powershell .\Build.ps1 %* && popd

1
Source/BuildCommon.cmd
View File

@ -6,3 +6,4 @@ pushd CPM22 && call Build && popd
pushd ZCPR && call Build && popd
pushd ZCPR-DJ && call Build && popd
pushd ZSDOS && call Build && popd
pushd CBIOS && call Build && popd

16
Source/CBIOS/Build.cmd
View File

@ -11,12 +11,14 @@ set ZXBINDIR=%TOOLS%/cpm/bin/
set ZXLIBDIR=%TOOLS%/cpm/lib/
set ZXINCDIR=%TOOLS%/cpm/include/
call :asm cbios || goto :eof
goto :eof
echo.
echo Building CBIOS for RomWBW...
echo.
tasm -t80 -b -g3 -fFF -dPLTWBW cbios.asm cbios_wbw.bin cbios_wbw.lst
if errorlevel 1 goto :eof
:asm
echo.
echo Building %1...
tasm -t80 -b -g3 -fFF %1.asm %1.bin %1.lst
goto :eof
echo Building CBIOS for UNA...
echo.
tasm -t80 -b -g3 -fFF -dPLTUNA cbios.asm cbios_una.bin cbios_una.lst
if errorlevel 1 goto :eof

13
Source/CBIOS/build.inc
View File

@ -1,13 +0,0 @@
; RomWBW Configured for N8VEM simh, 2015-02-14T09:50:52
;
#DEFINE TIMESTAMP "14-Feb-2015"
;
PLATFORM .EQU PLT_N8VEM ; HARDWARE PLATFORM
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB
;
; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS
;
#INCLUDE "std-n8vem.inc"
;
#INCLUDE "config.asm"
;

1044
Source/CBIOS/cbios.asm
View File

File diff suppressed because it is too large

BIN
Source/CBIOS/cbios.bin
View File

Binary file not shown.

4381
Source/CBIOS/cbios.lst
View File

File diff suppressed because it is too large

26
Source/CBIOS/config.asm
View File

@ -1,20 +1,18 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR SIMH EMULATOR
;==================================================================================================
; CBIOS BUILD CONFIGURATION OPTIONS
;
; BUILD CONFIGURATION OPTIONS
;
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
;DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
CPM_LOC .EQU $D000 ; LOCATION OF START OF CCP
;
#IFDEF PLTWBW
CPM_END .EQU $FE00 ; ROMWBW HBIOS PROXY OCCUPIES TOP 2 PAGES OF MEMORY
#ENDIF
;
#IFDEF PLTUNA
CPM_END .EQU $FF00 ; UNA UBIOS PROXY OCCUPIES TOP 1 PAGE OF MEMORY
#ENDIF

25
Source/CBIOS/n8vem.inc
View File

@ -1,25 +0,0 @@
;
; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
;
RTC .EQU $70 ; ADDRESS OF RTC LATCH AND INPUT PORT
;
; MEMORY BANK CONFIGURATION
;
BID_ROM0 .EQU $00
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAM0 .EQU $80
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK
BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK
BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK
BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.)
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.)
BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K

36
Source/CBIOS/std-n8vem.inc
View File

@ -1,36 +0,0 @@
;
; CHARACTER DEVICES
;
CIODEV_UART .EQU $00
CIODEV_ASCI .EQU $10
CIODEV_VDU .EQU $20
CIODEV_CVDU .EQU $30
CIODEV_UPD7220 .EQU $40
CIODEV_N8V .EQU $50
CIODEV_PRPCON .EQU $60
CIODEV_PPPCON .EQU $70
CIODEV_CONSOLE .EQU $C0
CIODEV_CRT .EQU $D0
CIODEV_BAT .EQU $E0
CIODEV_NUL .EQU $F0
;
; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
;
DIODEV_MD .EQU $00
DIODEV_FD .EQU $10
DIODEV_RF .EQU $20
DIODEV_IDE .EQU $30
DIODEV_ATAPI .EQU $40
DIODEV_PPIDE .EQU $50
DIODEV_SD .EQU $60
DIODEV_PRPSD .EQU $70
DIODEV_PPPSD .EQU $80
DIODEV_HDSK .EQU $90
;
; VDA DEVICES (VIDEO DISPLAY ADAPTER)
;
VDADEV_NONE .EQU $00 ; NO VDA DEVICE
VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMP)
VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED)
VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM

308
Source/CBIOS/std.asm
View File

@ -1,308 +0,0 @@
; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg -
;
; The purpose of this file is to define generic symbols and to include
; the appropriate std-*.inc file to bring in platform specifics.
; There are four classes of systems supported by N8VEM.
; 1. N8VEM Platforms that include ECB interface
; 2. ZETA Genrally N8VEM-like, but no ECB
; 3. N8 Generally N8VEM-like bt 180 and extra embedded devices
; 4. S100 Assumes Z80 Master CPU Card
; All the classes require certain generic definitions, and these are
; defined here prior to the inclusion of platform specific .inc files.
; It is unfortunate, but all the possible config items must be defined
; here because the config gets read before the specific std-*.inc's
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
TRUE .EQU 1
FALSE .EQU 0
;
; PRIMARY HARDWARE PLATFORMS
;
PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
PLT_ZETA .EQU 2 ; ZETA Z80 SBC
PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
PLT_MK4 .EQU 4
PLT_S2I .EQU 5 ; SCSI2IDE
PLT_S100 .EQU 6 ; S100COMPUTERS Z80 based system
PLT_UNA .EQU 7 ; UNA BIOS
;
; RAM DISK INITIALIZATION OPTIONS
;
CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
;
; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
;
FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
;
; MEDIA ID VALUES
;
MID_NONE .EQU 0
MID_MDROM .EQU 1
MID_MDRAM .EQU 2
MID_RF .EQU 3
MID_HD .EQU 4
MID_FD720 .EQU 5
MID_FD144 .EQU 6
MID_FD360 .EQU 7
MID_FD120 .EQU 8
MID_FD111 .EQU 9
;
; CONSOLE TERMINAL TYPE CHOICES
;
TERM_TTY .EQU 0
TERM_ANSI .EQU 1
TERM_WYSE .EQU 2
TERM_VT52 .EQU 3
;
; EMULATION TYPES
;
EMUTYP_NONE .EQU 0
EMUTYP_TTY .EQU 1
EMUTYP_ANSI .EQU 2
;
; SYSTEM GENERATION SETTINGS
;
SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
;
DOS_BDOS .EQU 1 ; BDOS
DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
DOS_ZSDOS .EQU 3 ; ZSDOS
;
CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
;
; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
;
#IFNDEF BLD_SYS
SYS .EQU SYS_CPM
#ELSE
SYS .EQU BLD_SYS
#ENDIF
;
#IF (SYS == SYS_CPM)
DOS .EQU DOS_BDOS
CP .EQU CP_CCP
#DEFINE OSLBL "CP/M-80 2.2"
#ENDIF
;
#IF (SYS == SYS_ZSYS)
DOS .EQU DOS_ZSDOS
CP .EQU CP_ZCPR
#DEFINE OSLBL "ZSDOS 1.1"
#ENDIF
;
; INCLUDE VERSION AND BUILD SETTINGS
;
#INCLUDE "ver.inc" ; ADD BIOSVER
;
#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
;
; INCLUDE PLATFORM SPECIFIC HARDWARE DEFINITIONS
;
#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA))
#INCLUDE "n8vem.inc"
#ENDIF
;
#IF (PLATFORM == PLT_S2I)
#INCLUDE "s2i.inc"
#ENDIF
;
#IF (PLATFORM == PLT_N8)
#INCLUDE "n8.inc"
#ENDIF
;
#IF (PLATFORM == PLT_MK4)
#INCLUDE "mk4.inc"
#ENDIF
;
#IF (PLATFORM == PLT_UNA)
#INCLUDE "una.inc"
#ENDIF
;
; CHARACTER DEVICE FUNCTIONS
;
CF_INIT .EQU 0
CF_IN .EQU 1
CF_IST .EQU 2
CF_OUT .EQU 3
CF_OST .EQU 4
;
; DISK OPERATIONS
;
DOP_READ .EQU 0 ; READ OPERATION
DOP_WRITE .EQU 1 ; WRITE OPERATION
DOP_FORMAT .EQU 2 ; FORMAT OPERATION
DOP_READID .EQU 3 ; READ ID OPERATION
;
; BIOS FUNCTIONS
;
#IF (PLATFORM == PLT_UNA)
BF_CIO .EQU $10
BF_CIOIN .EQU BF_CIO + 1 ; CHARACTER INPUT
BF_CIOOUT .EQU BF_CIO + 2 ; CHARACTER OUTPUT
BF_CIOIST .EQU BF_CIO + 3 ; CHARACTER INPUT STATUS
BF_CIOOST .EQU BF_CIO + 4 ; CHARACTER OUTPUT STATUS
;
BF_DIO .EQU $40
BF_DIORD .EQU BF_DIO + 2 ; DISK READ
BF_DIOWR .EQU BF_DIO + 3 ; DISK WRITE
#ELSE
BF_CIO .EQU $00
BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT
BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT
BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS
BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS
BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG
;
BF_DIO .EQU $10
BF_DIORD .EQU BF_DIO + 0 ; DISK READ
BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE
BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS
BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA
BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY
BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR
BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR
BF_DIODEVCNT .EQU BF_DIO + 10 ; DISK DEVICE COUNT
BF_DIODEVINF .EQU BF_DIO + 11 ; DISK DEVICE INFO
;
BF_RTC .EQU $20
BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME
BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME
BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX
BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX
BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK
BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK
;
BF_EMU .EQU $30
BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT
BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT
BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS
BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS
BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG
BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION
BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS
;
BF_VDA .EQU $40
BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU
BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS
BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU
BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE
BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION
BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE
BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR
BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER
BF_VDAFIL .EQU BF_VDA + 8 ; FILL
BF_VDACPY .EQU BF_VDA + 9 ; COPY
BF_VDASCR .EQU BF_VDA + 10 ; SCROLL
BF_VDAKST .EQU BF_VDA + 11 ; GET KEYBOARD STATUS
BF_VDAKFL .EQU BF_VDA + 12 ; FLUSH KEYBOARD BUFFER
BF_VDAKRD .EQU BF_VDA + 13 ; READ KEYBOARD
;
BF_SYS .EQU $F0
BF_SYSSETBNK .EQU BF_SYS + 0 ; SET CURRENT BANK
BF_SYSGETBNK .EQU BF_SYS + 1 ; GET CURRENT BANK
BF_SYSCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK
BF_SYSXCPY .EQU BF_SYS + 3 ; EXTENDED COPY SETUP
BF_SYSATTR .EQU BF_SYS + 4 ; GET/SET SYSTEM ATTRIBUTE VALUE
;BF_SYSXXXX .EQU BF_SYS + 5 ;
BF_SYSGETVER .EQU BF_SYS + 6 ; GET VERSION OF HBIOS
#ENDIF
;
; SYSTEM ATTRIBUTE IDS
;
AID_BOOTVOL .EQU 0 ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU
AID_BOOTROM .EQU 0 ; BANK ID OF ROM PAGE BOOTED
;
; MEMORY LAYOUT
;
SYS_SIZ .EQU $3000 ; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY)
HBBUF_SIZ .EQU 1024 ; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K
HBX_SIZ .EQU $200 ; HBIOS PROXY SIZE (SUBJECT TO CHANGE)
CPM_SIZ .EQU SYS_SIZ - HBX_SIZ ; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY)
CCP_SIZ .EQU $800 ; INVARIANT SIZE OF CCP
BDOS_SIZ .EQU $E00 ; INVARIANT SIZE OF BDOS
CBIOS_SIZ .EQU CPM_SIZ - CCP_SIZ - BDOS_SIZ ; CBIOS IS THE REMAINDER
MEMTOP .EQU $10000 ; INVARIANT TOP OF Z80 ADDRESSABLE MEMORY
BNKTOP .EQU $8000 ; BANK MEMORY BARRIER
HBBUF_IMG .EQU BNKTOP - HBBUF_SIZ ; LOC OF DISK BUFFER IN HBIOS IMAGE BANK
HBX_IMG .EQU BNKTOP - HBX_SIZ ; LOC OF HBX IMAGE IN HBIOS IMAGE BANK
HBBUF_END .EQU BNKTOP ; END OF PHYSICAL DISK BUFFER IN HBIOS
HBBUF_LOC .EQU HBBUF_END - HBBUF_SIZ ; START OF PHYSICAL DISK BUFFER
HBX_END .EQU MEMTOP ; END OF HBIOS PROXY
HBX_LOC .EQU HBX_END - HBX_SIZ ; START OF HBIOS PROXY
CPM_END .EQU HBX_LOC ; END OF CPM COMPONENTS (INCLUDING CBIOS)
CPM_LOC .EQU CPM_END - CPM_SIZ ; START OF CPM COMPONENTS
CBIOS_END .EQU HBX_LOC ; END OF CBIOS
CBIOS_LOC .EQU CBIOS_END - CBIOS_SIZ ; START OF CBIOS
BDOS_END .EQU CBIOS_LOC ; END OF BDOS
BDOS_LOC .EQU BDOS_END - BDOS_SIZ ; START OF BDOS
CCP_END .EQU BDOS_LOC ; END OF CCP
CCP_LOC .EQU CCP_END - CCP_SIZ ; START OF CCP
CPM_ENT .EQU CBIOS_LOC ; CPM ENTRY POINT (IN CBIOS)
CCP_ENT .EQU CPM_LOC ; COMMAND PROCESSOR ENTRY POINT (IN CCP)
MON_LOC .EQU $C000 ; LOCATION OF MONITOR FOR RUNNING SYSTEM
MON_SIZ .EQU $1000 ; SIZE OF MONITOR BINARY IMAGE
MON_END .EQU MON_LOC + MON_SIZ ; END OF MONITOR
MON_DSKY .EQU MON_LOC + (0 * 3) ; MONITOR ENTRY (DSKY)
MON_SERIAL .EQU MON_LOC + (1 * 3) ; MONITOR ENTRY (SERIAL PORT)
CBIOS_BOOT .EQU CBIOS_LOC + (0 * 3)
CBIOS_WBOOT .EQU CBIOS_LOC + (1 * 3)
CBIOS_CONST .EQU CBIOS_LOC + (2 * 3)
CBIOS_CONIN .EQU CBIOS_LOC + (3 * 3)
CBIOS_CONOUT .EQU CBIOS_LOC + (4 * 3)
CBIOS_LIST .EQU CBIOS_LOC + (5 * 3)
CBIOS_PUNCH .EQU CBIOS_LOC + (6 * 3)
CBIOS_READER .EQU CBIOS_LOC + (7 * 3)
CBIOS_HOME .EQU CBIOS_LOC + (8 * 3)
CBIOS_SELDSK .EQU CBIOS_LOC + (9 * 3)
CBIOS_SETTRK .EQU CBIOS_LOC + (10 * 3)
CBIOS_SETSEC .EQU CBIOS_LOC + (11 * 3)
CBIOS_SETDMA .EQU CBIOS_LOC + (12 * 3)
CBIOS_READ .EQU CBIOS_LOC + (13 * 3)
CBIOS_WRITE .EQU CBIOS_LOC + (14 * 3)
CBIOS_LISTST .EQU CBIOS_LOC + (15 * 3)
CBIOS_SECTRN .EQU CBIOS_LOC + (16 * 3)
;
CDISK: .EQU 4 ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P
IOBYTE: .EQU 3 ; LOC IN PAGE 0 OF I/O DEFINITION BYTE
;
; HBIOS PROXY COMMON DATA BLOCK
; EXACTLY 32 BYTES AT $FFE0-$FFFF
;
HBX_XFC .EQU $10000 - $20 ; HBIOS PROXY INTERFACE AREA, 32 BYTES FIXED
;
HBX_XFCDAT .EQU HBX_XFC ; DATA PORTION OF HBIOX PROXY INTERFACE AREA
HB_CURBNK .EQU HBX_XFCDAT + 0 ; CURRENTLY ACTIVE LOW MEMORY BANK ID
HB_PRVBNK .EQU HBX_XFCDAT + 1 ; PREVIOUS BANK (BANK SELECTED PRIOR TO CURRENT BANK)
HB_SRCADR .EQU HBX_XFCDAT + 2 ; BNKCPY: DESTINATION BANK ID
HB_SRCBNK .EQU HBX_XFCDAT + 4 ; BNKCPY: SOURCE BANK ID
HB_DSTADR .EQU HBX_XFCDAT + 5 ; BNKCPY: DESTINATION ADDRESS
HB_DSTBNK .EQU HBX_XFCDAT + 7 ; BNKCPY: SOURCE ADDRESS
HB_CNT .EQU HBX_XFCDAT + 8 ; BNKCPY: COUNT
;
HBX_XFCFNS .EQU HBX_XFC + $10 ; JUMP TABLE PORTION OF HBIOS PROXY INTERFACE AREA
HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION
HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID
HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY
HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL
HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START
HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK

177
Source/CBIOS/util.asm
View File

@ -83,61 +83,13 @@ PC_PRTCHR:
POP AF
RET
NEWLINE2:
CALL NEWLINE
NEWLINE:
CALL PC_CR
CALL PC_LF
RET
;
; PRINT THE HEX BYTE VALUE IN A
;
PRTHEXBYTE:
PUSH AF
PUSH DE
CALL HEXASCII
LD A,D
CALL COUT
LD A,E
CALL COUT
POP DE
POP AF
RET
;
; PRINT THE HEX WORD VALUE IN BC
;
PRTHEXWORD:
PUSH AF
LD A,B
CALL PRTHEXBYTE
LD A,C
CALL PRTHEXBYTE
POP AF
RET
;
; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE
;
HEXASCII:
LD D,A
CALL HEXCONV
LD E,A
LD A,D
RLCA
RLCA
RLCA
RLCA
CALL HEXCONV
LD D,A
RET
;
; CONVERT LOW NIBBLE OF A TO ASCII HEX
;
HEXCONV:
AND 0FH ;LOW NIBBLE ONLY
ADD A,90H
DAA
ADC A,40H
DAA
RET
;
; OUTPUT A '$' TERMINATED STRING
;
WRITESTR:
@ -207,37 +159,13 @@ COUT:
PUSH DE
PUSH HL
LD C,A
CALL CBIOS_CONOUT
CALL CONOUT
POP HL
POP DE
POP BC
POP AF
RET
;
; INPUT CHARACTER TO A
;
CIN:
PUSH BC
PUSH DE
PUSH HL
CALL CBIOS_CONIN
POP HL
POP DE
POP BC
RET
;
; RETURN INPUT STATUS IN A (0 = NO CHAR, !=0 CHAR WAITING)
;
CST:
PUSH BC
PUSH DE
PUSH HL
CALL CBIOS_CONST
POP HL
POP DE
POP BC
RET
;
STR_PANIC .DB "\r\n\r\n>>> FATAL ERROR:$"
STR_AF .DB " AF=$"
STR_BC .DB " BC=$"
@ -283,7 +211,7 @@ MULT8_NOADD:
RET
;
; FILL MEMORY AT HL WITH VALUE A, LENGTH IN BC, ALL REGS USED
; LENGTH *MSUT* BE GREATER THAN 1 FOR PROPER OPERATION!!!
; LENGTH *MUST* BE GREATER THAN 1 FOR PROPER OPERATION!!!
;
FILL:
LD D,H ; SET DE TO HL
@ -294,51 +222,6 @@ FILL:
LDIR ; DO THE REST
RET ; RETURN
;
; SET A BIT IN BYTE ARRAY AT HL, INDEX IN A
;
BITSET:
CALL BITLOC ; LOCATE THE BIT
OR (HL) ; SET THE SPECIFIED BIT
LD (HL),A ; SAVE IT
RET ; RETURN
;
; CLEAR A BIT IN BYTE ARRAY AT HL, INDEX IN A
;
BITCLR:
CALL BITLOC ; LOCATE THE BIT
CPL ; INVERT ALL BITS
AND (HL) ; CLEAR SPECIFIED BIT
LD (HL),A ; SAVE IT
RET ; RETURN
;
; GET VALUE OF A BIT IN BYTE ARRAY AT HL, INDEX IN A
;
BITTST:
CALL BITLOC ; LOCATE THE BIT
AND (HL) ; SET Z FLAG BASED ON BIT
RET ; RETURN
;
; LOCATE A BIT IN BYTE ARRAY AT HL, INDEX IN A
; RETURN WITH HL POINTING TO BYTE AND A WITH MASK FOR SPECIFIC BIT
;
BITLOC:
PUSH AF ; SAVE BIT INDEX
SRL A ; DIVIDE BY 8 TO GET BYTE INDEX
SRL A ; "
SRL A ; "
LD C,A ; MOVE TO BC
LD B,0 ; "
ADD HL,BC ; HL NOW POINTS TO BYTE CONTAINING BIT
POP AF ; RECOVER A (INDEX)
AND $07 ; ISOLATE REMAINDER, Z SET IF ZERO
LD B,A ; SETUP SHIFT COUNTER
LD A,1 ; SETUP A WITH MASK
RET Z ; DONE IF ZERO
BITLOC1:
SLA A ; SHIFT
DJNZ BITLOC1 ; LOOP AS NEEDED
RET ; DONE
;
; PRINT VALUE OF A IN DECIMAL WITH LEADING ZERO SUPPRESSION
;
PRTDECB:
@ -387,8 +270,52 @@ PRTDEC2:
PRTDEC3:
RET
;
;==================================================================================================
; DATA
;==================================================================================================
; PRINT THE HEX BYTE VALUE IN A
;
PRTHEXBYTE:
PUSH AF
PUSH DE
CALL HEXASCII
LD A,D
CALL COUT
LD A,E
CALL COUT
POP DE
POP AF
RET
;
; PRINT THE HEX WORD VALUE IN BC
;
PRTHEXWORD:
PUSH AF
LD A,B
CALL PRTHEXBYTE
LD A,C
CALL PRTHEXBYTE
POP AF
RET
;
; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE
;
HEXASCII:
LD D,A
CALL HEXCONV
LD E,A
LD A,D
RLCA
RLCA
RLCA
RLCA
CALL HEXCONV
LD D,A
RET
;
; CONVERT LOW NIBBLE OF A TO ASCII HEX
;
STR_EMPTY .TEXT "<EMPTY>$"
HEXCONV:
AND 0FH ;LOW NIBBLE ONLY
ADD A,90H
DAA
ADC A,40H
DAA
RET

6
Source/CBIOS/ver.inc
View File

@ -1,7 +1,5 @@
#DEFINE RMJ 2
#DEFINE RMN 7
#DEFINE RUP 0
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "2.7.0"
#DEFINE BIOSBLD "Build 0 Developmental"
#DEFINE REVISION 500
#DEFINE BIOSVER "2.7.1"

3
Source/Clean.cmd
View File

@ -6,7 +6,8 @@ pushd CPM22 && call Clean.cmd && popd
pushd ZCPR && call Clean.cmd && popd
pushd ZCPR-DJ && call Clean.cmd && popd
pushd ZSDOS && call Clean.cmd && popd
pushd CBIOS && call Clean.cmd && popd
pushd BPBIOS && call Clean.cmd && popd
pushd BIOS && call Clean.cmd && popd
pushd HBIOS && call Clean.cmd && popd

0
Source/BIOS/Build.cmd → Source/HBIOS/Build.cmd
View File

17
Source/BIOS/Build.ps1 → Source/HBIOS/Build.ps1
View File

@ -3,8 +3,8 @@ param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "512", [s
$Platform = $Platform.ToUpper()
while ($true)
{
if (($Platform -eq "N8VEM") -or ($Platform -eq "ZETA") -or ($Platform -eq "ZETA2") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "UNA") -or ($Platform -eq "S2I") -or ($Platform -eq "S100")) {break}
$Platform = (Read-Host -prompt "Platform [N8VEM|ZETA|ZETA2|N8|MK4|UNA|S2I|S100]").Trim().ToUpper()
if (($Platform -eq "SBC") -or ($Platform -eq "ZETA") -or ($Platform -eq "ZETA2") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "UNA")) {break}
$Platform = (Read-Host -prompt "Platform [SBC|ZETA|ZETA2|N8|MK4|UNA]").Trim().ToUpper()
}
while ($true)
@ -48,6 +48,7 @@ $RomDiskFile = "RomDisk.tmp"
$RomFile = "${OutDir}/${RomName}.rom"
$ComFile = "${OutDir}/${RomName}.com"
$ImgFile = "${OutDir}/${RomName}.img"
if ($Platform -eq "UNA") {$CBiosFile = '../CBIOS/cbios_una.bin'} else {$CBiosFile = '../CBIOS/cbios_wbw.bin'}
""
"Building ${RomName}: ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..."
@ -82,10 +83,6 @@ Function Concat($InputFileList, $OutputFile)
PLATFORM .EQU PLT_${Platform} ; HARDWARE PLATFORM
ROMSIZE .EQU ${ROMSize} ; SIZE OF ROM IN KB
;
; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS
;
#INCLUDE "std-n8vem.inc"
;
#INCLUDE "${ConfigFile}"
;
"@ | Out-File "build.inc" -Encoding ASCII
@ -96,8 +93,6 @@ Copy-Item '..\cpm22\os3bdos.bin' 'bdos.bin'
Copy-Item '..\zcpr-dj\zcpr.bin' 'zcpr.bin'
Copy-Item '..\zsdos\zsdos.bin' 'zsdos.bin'
Asm 'cbios' "-dBLD_SYS=SYS_CPM" -Output "cbios_cpm.bin"
Asm 'cbios' "-dBLD_SYS=SYS_ZSYS" -Output "cbios_zsys.bin"
Asm 'dbgmon'
Asm 'prefix'
Asm 'romldr'
@ -115,8 +110,8 @@ if ($Platform -ne "UNA")
"Building ${RomName} output files..."
Concat 'ccp.bin','bdos.bin','cbios_cpm.bin' 'cpm.bin'
Concat 'zcpr.bin','zsdos.bin','cbios_zsys.bin' 'zsys.bin'
Concat 'ccp.bin','bdos.bin',$CBiosFile 'cpm.bin'
Concat 'zcpr.bin','zsdos.bin',$CBiosFile 'zsys.bin'
Concat 'prefix.bin','cpm.bin' 'cpm.sys'
Concat 'prefix.bin','zsys.bin' 'zsys.sys'
@ -138,7 +133,7 @@ if ($Platform -eq "UNA")
Copy-Item 'osimg.bin' ${OutDir}\UNA_WBW_SYS.bin
Copy-Item $RomDiskFile ${OutDir}\UNA_WBW_ROM${ROMSize}.bin
Concat 'UNA\UNA-BIOS.BIN','osimg.bin','UNA\FSFAT.BIN',$RomDiskFile $RomFile
Concat '..\UBIOS\UNA-BIOS.BIN','osimg.bin','..\UBIOS\FSFAT.BIN',$RomDiskFile $RomFile
}
else
{

0
Source/BIOS/Clean.cmd → Source/HBIOS/Clean.cmd
View File

113
Source/HBIOS/Config/mk4_cvdu.asm
View File

@ -0,0 +1,113 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR MARK IV
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_N8 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU TRUE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_MK4 ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU TRUE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU TRUE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
; 18.432MHz OSC @ FULL SPEED, 38.4Kbps
;
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 3 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;
; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps
;
;Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

41
Source/BIOS/Config/mk4_diskio3.asm → Source/HBIOS/Config/mk4_diskio3.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $20 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -101,20 +96,18 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE
BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
; 18.432MHz OSC @ FULL SPEED, 38.4Kbps
;
;Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;
; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps
;
Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

41
Source/BIOS/Config/mk4_propio.asm → Source/HBIOS/Config/mk4_propio.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_PRPCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_PRPCON ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $01 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -101,20 +96,18 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
; 18.432MHz OSC @ FULL SPEED, 38.4Kbps
;
;Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;
; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps
;
Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

61
Source/BIOS/Config/mk4_std.asm → Source/HBIOS/Config/mk4_std.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -90,31 +85,29 @@ HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDENABLE .EQU TRUE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
; 18.432MHz OSC @ FULL SPEED, 38.4Kbps
;
;Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 3 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;
; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps
;
Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

39
Source/BIOS/Config/n8_2312.asm → Source/HBIOS/Config/n8_2312.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_N8V ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $80 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -101,10 +96,8 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC/1
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

39
Source/BIOS/Config/n8_2511.asm → Source/HBIOS/Config/n8_2511.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_N8V ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $80 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -101,10 +96,8 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC/1
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

33
Source/BIOS/Config/n8vem_ci.asm → Source/HBIOS/Config/sbc_ci.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,12 +23,12 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 2 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
UART1IOB .EQU $80 ; UART1 IOBASE IS $80 FOR CASSETTE INTERFACE
UART1OSC .EQU 1843200 ; UART 1 OSC FREQUENCY
UART1OSC .EQU 1843200 ; UART1 OSC FREQUENCY
UART1BAUD .EQU 300 ; UART1 BAUDRATE IS 300 FOR CASSETTE INTERFACE
UART1FIFO .EQU TRUE ; UART1 FIFO ENABLED FOR CASSETTE INTERFACE
UART1AFC .EQU FALSE ; UART1 AUTO FLOW CONTROL DISABLED FOR CASSETTE INTERFACE
@ -45,11 +42,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -61,15 +53,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -110,5 +105,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

33
Source/BIOS/Config/n8vem_cvdu.asm → Source/HBIOS/Config/sbc_cvdu.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_CVDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU TRUE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -83,7 +78,7 @@ PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENA
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPENABLE .EQU FALSE ; TRUE FOR OP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_dide.asm → Source/HBIOS/Config/sbc_dide.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIDE ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_diskio.asm → Source/HBIOS/Config/sbc_diskio.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_diskio3+cvdu.asm → Source/HBIOS/Config/sbc_diskio3+cvdu.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_CVDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $20 ; PPIDE IOBASE IS $20 FOR DISKIO V3
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_diskio3.asm → Source/HBIOS/Config/sbc_diskio3.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $20 ; PPIDE IOBASE IS $20 FOR DISKIO V3
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_dsd.asm → Source/HBIOS/Config/sbc_dsd.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

39
Source/BIOS/Config/n8vem_mfp.asm → Source/HBIOS/Config/sbc_mfp.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,15 +23,15 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 2 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
UART1IOB .EQU $88 ; UART1 IOBASE AT $88 FOR MFPIC
UART1OSC .EQU 1843200 ; UART 1 OSC FREQUENCY
UART1BAUD .EQU 38400 ; UART1 BAUDRATE IS 38400 FOR MFPIC
UART1FIFO .EQU TRUE ; UART1 FIFO ENABLED FOR MFPIC
UART1AFC .EQU FALSE ; UART1 AUTO FLOW CONTROL DISABLED FOR MFPIC (ENABLE IF DESIRED)
UART1OSC .EQU 1843200 ; UART1 OSC FREQUENCY
UART1BAUD .EQU CONBAUD ; UART1 BAUDRATE
UART1FIFO .EQU TRUE ; UART1 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART1AFC .EQU FALSE ; UART1 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
@ -45,11 +42,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -61,15 +53,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $84 ; PPIDE IOBASE IS $84 FOR MFPIC (PRELIMINARY ADDRESS)
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -110,5 +105,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_ppide.asm → Source/HBIOS/Config/sbc_ppide.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_ppisd.asm → Source/HBIOS/Config/sbc_ppisd.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_propio.asm → Source/HBIOS/Config/sbc_propio.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_PRPCON ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_PRPCON ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_rf.asm → Source/HBIOS/Config/sbc_rf.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU TRUE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

32
Source/BIOS/Config/n8vem_simh.asm → Source/HBIOS/Config/sbc_simh.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 115200 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 115200 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU FALSE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -90,6 +85,7 @@ PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU TRUE ; TRUE FOR HDSK SUPPORT
HDSKCNT .EQU 2 ; NUMBER OF HDSK UNITS
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
@ -105,5 +101,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_std.asm → Source/HBIOS/Config/sbc_std.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/n8vem_vdu.asm → Source/HBIOS/Config/sbc_vdu.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_VDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_VDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

10
Source/BIOS/Config/una_std.asm → Source/HBIOS/Config/una_std.asm
View File

@ -5,19 +5,11 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/zeta2_ppide.asm → Source/HBIOS/Config/zeta2_ppide.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 20000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

31
Source/BIOS/Config/zeta2_ppisd.asm → Source/HBIOS/Config/zeta2_ppisd.asm
View File

@ -5,18 +5,15 @@
;
; BUILD CONFIGURATION OPTIONS
;
CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
CPUOSC .EQU 20000000 ; CPU OSC FREQ
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW
;
SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI)
CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY
UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDECNT .EQU 1 ; NUMBER OF IDE UNITS
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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