Browse Source

Driver Init Processing Refactor

- Driver INIT call lists remvoed
- Added driver init phase dispatching
pull/646/head v3.6.0-dev.49
Wayne Warthen 3 weeks ago
parent
commit
e488aec54d
No known key found for this signature in database GPG Key ID: 8B34ED29C07EEB0A
  1. 2
      Doc/ChangeLog.txt
  2. 29
      Source/HBIOS/acia.asm
  3. 28
      Source/HBIOS/asci.asm
  4. 28
      Source/HBIOS/ay38910.asm
  5. 28
      Source/HBIOS/bqrtc.asm
  6. 28
      Source/HBIOS/ch.asm
  7. 28
      Source/HBIOS/ch376.asm
  8. 28
      Source/HBIOS/ch376kyb.asm
  9. 28
      Source/HBIOS/ch376scsi.asm
  10. 30
      Source/HBIOS/ch376ufi.asm
  11. 28
      Source/HBIOS/ctc.asm
  12. 28
      Source/HBIOS/cvdu.asm
  13. 30
      Source/HBIOS/dlpser.asm
  14. 30
      Source/HBIOS/dma.asm
  15. 28
      Source/HBIOS/ds12rtc.asm
  16. 34
      Source/HBIOS/ds1501rtc.asm
  17. 28
      Source/HBIOS/ds5rtc.asm
  18. 28
      Source/HBIOS/ds7rtc.asm
  19. 28
      Source/HBIOS/dsrtc.asm
  20. 28
      Source/HBIOS/duart.asm
  21. 28
      Source/HBIOS/ef.asm
  22. 28
      Source/HBIOS/esp.asm
  23. 28
      Source/HBIOS/espsd.asm
  24. 30
      Source/HBIOS/ez80cpu.asm
  25. 29
      Source/HBIOS/ez80rtc.asm
  26. 29
      Source/HBIOS/ez80tmr.asm
  27. 29
      Source/HBIOS/ez80uart.asm
  28. 28
      Source/HBIOS/fd.asm
  29. 28
      Source/HBIOS/gdc.asm
  30. 28
      Source/HBIOS/gm7303.asm
  31. 28
      Source/HBIOS/h8p.asm
  32. 1948
      Source/HBIOS/hbios.asm
  33. 28
      Source/HBIOS/hdsk.asm
  34. 28
      Source/HBIOS/icm.asm
  35. 28
      Source/HBIOS/ide.asm
  36. 28
      Source/HBIOS/imm.asm
  37. 28
      Source/HBIOS/intrtc.asm
  38. 28
      Source/HBIOS/kbd.asm
  39. 28
      Source/HBIOS/kio.asm
  40. 29
      Source/HBIOS/lcd.asm
  41. 28
      Source/HBIOS/lpt.asm
  42. 30
      Source/HBIOS/m6242rtc.asm
  43. 32
      Source/HBIOS/md.asm
  44. 29
      Source/HBIOS/mky.asm
  45. 28
      Source/HBIOS/mmrtc.asm
  46. 28
      Source/HBIOS/nabu.asm
  47. 28
      Source/HBIOS/nabukb.asm
  48. 31
      Source/HBIOS/pcf.asm
  49. 32
      Source/HBIOS/pcrtc.asm
  50. 28
      Source/HBIOS/pio.asm
  51. 28
      Source/HBIOS/pkd.asm
  52. 28
      Source/HBIOS/ppa.asm
  53. 28
      Source/HBIOS/ppide.asm
  54. 28
      Source/HBIOS/ppk.asm
  55. 28
      Source/HBIOS/ppp.asm
  56. 28
      Source/HBIOS/prp.asm
  57. 28
      Source/HBIOS/rf.asm
  58. 29
      Source/HBIOS/rp5rtc.asm
  59. 28
      Source/HBIOS/scc.asm
  60. 28
      Source/HBIOS/scon.asm
  61. 28
      Source/HBIOS/scsi.asm
  62. 28
      Source/HBIOS/sd.asm
  63. 30
      Source/HBIOS/simrtc.asm
  64. 28
      Source/HBIOS/sio.asm
  65. 28
      Source/HBIOS/sn76489.asm
  66. 29
      Source/HBIOS/spk.asm
  67. 29
      Source/HBIOS/sser.asm
  68. 7
      Source/HBIOS/std.asm
  69. 28
      Source/HBIOS/syq.asm
  70. 28
      Source/HBIOS/term.asm
  71. 28
      Source/HBIOS/tms.asm
  72. 28
      Source/HBIOS/tser.asm
  73. 28
      Source/HBIOS/tvga.asm
  74. 29
      Source/HBIOS/uart.asm
  75. 29
      Source/HBIOS/uf.asm
  76. 28
      Source/HBIOS/vdu.asm
  77. 28
      Source/HBIOS/vga.asm
  78. 28
      Source/HBIOS/vrc.asm
  79. 28
      Source/HBIOS/xosera.asm
  80. 29
      Source/HBIOS/ym2612.asm
  81. 28
      Source/HBIOS/z2u.asm
  82. 2
      Source/ver.inc
  83. 2
      Source/ver.lib

2
Doc/ChangeLog.txt

@ -38,6 +38,8 @@ Version 3.6
- JMD: Added VGMINFO application - JMD: Added VGMINFO application
- WBW: Created SCSI Driver derived from code from Jay Cotton - WBW: Created SCSI Driver derived from code from Jay Cotton
- WBW: Add official RC2014 platform (derived from RCZ80) - WBW: Add official RC2014 platform (derived from RCZ80)
- D?N: Added improved TMS Driver hardware/configuration detection and reporting
- WBW: Removed driver module INIT lists, replaced with init phase system
Version 3.5.1 Version 3.5.1
------------- -------------

29
Source/HBIOS/acia.asm

@ -56,6 +56,24 @@ ACIA_ACIA .EQU 1
; ;
ACIA_RTSON .EQU %10111111 ; BIT MASK TO ASSERT RTS ACIA_RTSON .EQU %10111111 ; BIT MASK TO ASSERT RTS
ACIA_RTSOFF .EQU %01000000 ; BIT MASK TO DEASSERT RTS ACIA_RTSOFF .EQU %01000000 ; BIT MASK TO DEASSERT RTS
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_ACIA .EQU $
;
.DW SIZ_ACIA ; MODULE SIZE
.DW ACIA_INITPHASE ; ADR OF INIT PHASE HANDLER
;
ACIA_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,ACIA_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,ACIA_INIT ; DO INIT
RET ; DONE
; ;
; ;
; ;
@ -743,3 +761,14 @@ ACIA1_CFG:
#ENDIF #ENDIF
; ;
ACIA_CFGCNT .EQU ($ - ACIA_CFG) / ACIA_CFGSIZ ACIA_CFGCNT .EQU ($ - ACIA_CFG) / ACIA_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_ACIA .EQU $
SIZ_ACIA .EQU END_ACIA - ORG_ACIA
;
MEMECHO "ACIA occupies "
MEMECHO SIZ_ACIA
MEMECHO " bytes.\n"

28
Source/HBIOS/asci.asm

@ -90,6 +90,23 @@ ASCI1_IVT .EQU IVT(INT_SER1)
; ;
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_ASCI .EQU $
;
.DW SIZ_ASCI ; MODULE SIZE
.DW ASCI_INITPHASE ; ADR OF INIT PHASE HANDLER
;
ASCI_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,ASCI_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,ASCI_INIT ; DO INIT
RET ; DONE
;
; ;
; ;
ASCI_PREINIT: ASCI_PREINIT:
@ -899,3 +916,14 @@ ASCI1_CFG:
#ENDIF #ENDIF
; ;
ASCI_CFGCNT .EQU ($ - ASCI_CFG) / ASCI_CFGSIZ ASCI_CFGCNT .EQU ($ - ASCI_CFG) / ASCI_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_ASCI .EQU $
SIZ_ASCI .EQU END_ASCI - ORG_ASCI
;
MEMECHO "ASCI occupies "
MEMECHO SIZ_ASCI
MEMECHO " bytes.\n"

28
Source/HBIOS/ay38910.asm

@ -122,6 +122,23 @@ AY_R3CHBP .EQU $03
AY_R7ENAB .EQU $07 AY_R7ENAB .EQU $07
AY_R8AVOL .EQU $08 AY_R8AVOL .EQU $08
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_AY .EQU $
;
.DW SIZ_AY ; MODULE SIZE
.DW AY_INITPHASE ; ADR OF INIT PHASE HANDLER
;
AY_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,AY38910_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,AY38910_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; ;
; DRIVER FUNCTION TABLE AND INSTANCE DATA ; DRIVER FUNCTION TABLE AND INSTANCE DATA
@ -647,3 +664,14 @@ AY3NOTETBL:
.DW AY_RATIO / 5579 ; .DW AY_RATIO / 5579 ;
.DW AY_RATIO / 5661 ; .DW AY_RATIO / 5661 ;
.DW AY_RATIO / 5743 ; .DW AY_RATIO / 5743 ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_AY .EQU $
SIZ_AY .EQU END_AY - ORG_AY
;
MEMECHO "AY occupies "
MEMECHO SIZ_AY
MEMECHO " bytes.\n"

28
Source/HBIOS/bqrtc.asm

@ -94,6 +94,23 @@ BQRTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS)
DEVECHO "BQRTC: IO=" DEVECHO "BQRTC: IO="
DEVECHO BQRTC_BASE DEVECHO BQRTC_BASE
DEVECHO "\n" DEVECHO "\n"
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_BQRTC .EQU $
;
.DW SIZ_BQRTC ; MODULE SIZE
.DW BQRTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
BQRTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,BQRTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,BQRTC_INIT ; DO INIT
RET ; DONE
; RTC Device Initialization Entry ; RTC Device Initialization Entry
@ -395,3 +412,14 @@ BQRTC_BUF_DAY: .DB 0 ; Day
BQRTC_BUF_HOUR: .DB 0 ; Hour BQRTC_BUF_HOUR: .DB 0 ; Hour
BQRTC_BUF_MIN: .DB 0 ; Minute BQRTC_BUF_MIN: .DB 0 ; Minute
BQRTC_BUF_SEC: .DB 0 ; Second BQRTC_BUF_SEC: .DB 0 ; Second
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_BQRTC .EQU $
SIZ_BQRTC .EQU END_BQRTC - ORG_BQRTC
;
MEMECHO "BQRTC occupies "
MEMECHO SIZ_BQRTC
MEMECHO " bytes.\n"

28
Source/HBIOS/ch.asm

@ -79,6 +79,23 @@ CHSD_CFG0 .EQU 0 ; DUMMY ENTRY
CHSD_CFG1 .EQU 0 ; DUMMY ENTRY CHSD_CFG1 .EQU 0 ; DUMMY ENTRY
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CH .EQU $
;
.DW SIZ_CH ; MODULE SIZE
.DW CH_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CH_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,CH_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CH_INIT ; DO INIT
RET ; DONE
;
; CH DEVICE CONFIGURATION ; CH DEVICE CONFIGURATION
; ;
CH_CFGSIZ .EQU 9 ; SIZE OF CFG TBL ENTRIES CH_CFGSIZ .EQU 9 ; SIZE OF CFG TBL ENTRIES
@ -470,3 +487,14 @@ CH_STR_376 .TEXT "CH376$"
#INCLUDE "chsd.asm" #INCLUDE "chsd.asm"
#ENDIF #ENDIF
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CH .EQU $
SIZ_CH .EQU END_CH - ORG_CH
;
MEMECHO "CH occupies "
MEMECHO SIZ_CH
MEMECHO " bytes.\n"

28
Source/HBIOS/ch376.asm

@ -3,6 +3,23 @@
; CH376 NATIVE USB DRIVER ; CH376 NATIVE USB DRIVER
;================================================================================================== ;==================================================================================================
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CHNATIVE .EQU $
;
.DW SIZ_CHNATIVE ; MODULE SIZE
.DW CHNATIVE_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CHNATIVE_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,CHNATIVE_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CHNATIVE_INIT ; DO INIT
RET ; DONE
#DEFINE DEFM .DB #DEFINE DEFM .DB
#DEFINE DEFB .DB #DEFINE DEFB .DB
@ -63,3 +80,14 @@ _delay_medium .EQU LDELAY
CHNATIVE_INIT .EQU _chnative_init CHNATIVE_INIT .EQU _chnative_init
CHNATIVE_INITF .EQU _chnative_init_force CHNATIVE_INITF .EQU _chnative_init_force
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CHNATIVE .EQU $
SIZ_CHNATIVE .EQU END_CHNATIVE - ORG_CHNATIVE
;
MEMECHO "CHNATIVE occupies "
MEMECHO SIZ_CHNATIVE
MEMECHO " bytes.\n"

28
Source/HBIOS/ch376kyb.asm

@ -5,6 +5,23 @@
; ;
; This driver is designed to work within the TMS video driver for a CRT solution. ; This driver is designed to work within the TMS video driver for a CRT solution.
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CHUKB .EQU $
;
.DW SIZ_CHUKB ; MODULE SIZE
.DW CHUKB_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CHUKB_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,CHUKB_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CHUKB_INIT ; DO INIT
RET ; DONE
#IF (!CHNATIVEENABLE) #IF (!CHNATIVEENABLE)
.ECHO "*** TMSMODE: TMSMODE_MSXUKY REQUIRES CHNATIVEENABLE***\n" .ECHO "*** TMSMODE: TMSMODE_MSXUKY REQUIRES CHNATIVEENABLE***\n"
@ -149,3 +166,14 @@ UKY_READ:
LD E, L LD E, L
XOR A XOR A
RET RET
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CHUKB .EQU $
SIZ_CHUKB .EQU END_CHUKB - ORG_CHUKB
;
MEMECHO "CHUKB occupies "
MEMECHO SIZ_CHUKB
MEMECHO " bytes.\n"

28
Source/HBIOS/ch376scsi.asm

@ -3,6 +3,23 @@
; CH376 NATIVE MASS STORAGE DRIVER ; CH376 NATIVE MASS STORAGE DRIVER
;================================================================================================== ;==================================================================================================
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CHSCSI .EQU $
;
.DW SIZ_CHSCSI ; MODULE SIZE
.DW CHSCSI_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CHSCSI_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,CHSCSI_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CHSCSI_INIT ; DO INIT
RET ; DONE
#include "./ch376-native/scsi-drv.s" #include "./ch376-native/scsi-drv.s"
@ -316,3 +333,14 @@ CH_SCSI_GEOM:
LD D,16 | $80 ; HEADS / CYL = 16, SET LBA CAPABILITY BIT LD D,16 | $80 ; HEADS / CYL = 16, SET LBA CAPABILITY BIT
LD E,16 ; SECTORS / TRACK = 16 LD E,16 ; SECTORS / TRACK = 16
RET ; DONE, A STILL HAS CHUSB_CAP STATUS RET ; DONE, A STILL HAS CHUSB_CAP STATUS
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CHSCSI .EQU $
SIZ_CHSCSI .EQU END_CHSCSI - ORG_CHSCSI
;
MEMECHO "CHSCSI occupies "
MEMECHO SIZ_CHSCSI
MEMECHO " bytes.\n"

30
Source/HBIOS/ch376ufi.asm

@ -4,6 +4,25 @@
;================================================================================================== ;==================================================================================================
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CHUFI .EQU $
;
.DW SIZ_CHUFI ; MODULE SIZE
.DW CHUFI_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CHUFI_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,CHUFI_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CHUFI_INIT ; DO INIT
RET ; DONE
#include "./ch376-native/ufi-drv.s" #include "./ch376-native/ufi-drv.s"
_ufi_seek .EQU _usb_scsi_seek _ufi_seek .EQU _usb_scsi_seek
@ -321,3 +340,14 @@ CH_UFI_GEOM:
LD A, $FF LD A, $FF
OR A OR A
RET RET
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CHUFI .EQU $
SIZ_CHUFI .EQU END_CHUFI - ORG_CHUFI
;
MEMECHO "CHUFI occupies "
MEMECHO SIZ_CHUFI
MEMECHO " bytes.\n"

28
Source/HBIOS/ctc.asm

@ -150,6 +150,23 @@ CTCTIVT .EQU INT_CTC0A + CTCTIMCH
; ;
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CTC .EQU $
;
.DW SIZ_CTC ; MODULE SIZE
.DW CTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,CTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CTC_INIT ; DO INIT
RET ; DONE
;
;================================================================================================== ;==================================================================================================
; CTC PRE-INITIALIZATION ; CTC PRE-INITIALIZATION
; ;
@ -303,3 +320,14 @@ CTC_NO:
; CTC DRIVER DATA STORAGE ; CTC DRIVER DATA STORAGE
; ;
CTC_EXIST .DB $FF ; SET TO ZERO IF EXISTS CTC_EXIST .DB $FF ; SET TO ZERO IF EXISTS
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CTC .EQU $
SIZ_CTC .EQU END_CTC - ORG_CTC
;
MEMECHO "CTC occupies "
MEMECHO SIZ_CTC
MEMECHO " bytes.\n"

28
Source/HBIOS/cvdu.asm

@ -62,6 +62,23 @@ CVDU_FONTID .EQU FONTID_8X16
TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER
KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_CVDU .EQU $
;
.DW SIZ_CVDU ; MODULE SIZE
.DW CVDU_INITPHASE ; ADR OF INIT PHASE HANDLER
;
CVDU_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,CVDU_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,CVDU_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; CVDU DRIVER - INITIALIZATION ; CVDU DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -987,3 +1004,14 @@ CVDU_IDAT:
.DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER .DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER
.DB CVDU_KBDST .DB CVDU_KBDST
.DB CVDU_KBDDATA .DB CVDU_KBDDATA
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_CVDU .EQU $
SIZ_CVDU .EQU END_CVDU - ORG_CVDU
;
MEMECHO "CVDU occupies "
MEMECHO SIZ_CVDU
MEMECHO " bytes.\n"

30
Source/HBIOS/dlpser.asm

@ -24,6 +24,25 @@ DLPSERCFG .EQU SER_9600_8N1 ; DLPSER: SERIAL LINE CONFIG
; ;
DLPSER_PPICTL .EQU $AB DLPSER_PPICTL .EQU $AB
DLPSER_PPICFG .EQU %10011000 DLPSER_PPICFG .EQU %10011000
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DLPSER .EQU $
;
.DW SIZ_DLPSER ; MODULE SIZE
.DW DLPSER_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DLPSER_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,DLPSER_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DLPSER_INIT ; DO INIT
RET ; DONE
; ;
DLPSER_PREINIT: DLPSER_PREINIT:
; ;
@ -273,3 +292,14 @@ DLPSER1_CFG:
; WORKING VARIABLES ; WORKING VARIABLES
; ;
DLPSER_DEV .DB 0 ; DEVICE NUM USED DURING INIT DLPSER_DEV .DB 0 ; DEVICE NUM USED DURING INIT
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DLPSER .EQU $
SIZ_DLPSER .EQU END_DLPSER - ORG_DLPSER
;
MEMECHO "DLPSER occupies "
MEMECHO SIZ_DLPSER
MEMECHO " bytes.\n"

30
Source/HBIOS/dma.asm

@ -23,7 +23,7 @@ DMA_CTL .EQU DMABASE + 3
DMA_USEHALF .EQU FALSE DMA_USEHALF .EQU FALSE
DEVECHO "DUO" DEVECHO "DUO"
#ENDIF #ENDIF
;S
;
DEVECHO ", IO=" DEVECHO ", IO="
DEVECHO DMA_IO DEVECHO DMA_IO
DEVECHO "\n" DEVECHO "\n"
@ -70,6 +70,23 @@ DMA_FORCE .EQU 0
#DEFINE DMAIOFULL \; #DEFINE DMAIOFULL \;
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DMA .EQU $
;
.DW SIZ_DMA ; MODULE SIZE
.DW DMA_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DMA_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,DMA_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DMA_INIT ; DO INIT
RET ; DONE
;
;================================================================================================== ;==================================================================================================
; DMA INITIALIZATION CODE ; DMA INITIALIZATION CODE
;================================================================================================== ;==================================================================================================
@ -360,3 +377,14 @@ DMARegDump:
call NEWLINE call NEWLINE
ret ret
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DMA .EQU $
SIZ_DMA .EQU END_DMA - ORG_DMA
;
MEMECHO "DMA occupies "
MEMECHO SIZ_DMA
MEMECHO " bytes.\n"

28
Source/HBIOS/ds12rtc.asm

@ -60,6 +60,23 @@ DS12RTC_NVSIZE .EQU $30
DEVECHO DS12RTC_BASE DEVECHO DS12RTC_BASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DS12RTC .EQU $
;
.DW SIZ_DS12RTC ; MODULE SIZE
.DW DS12RTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DS12RTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,DS12RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DS12RTC_INIT ; DO INIT
RET ; DONE
;
; RTC DEVICE PRE-INITIALIZATION ENTRY ; RTC DEVICE PRE-INITIALIZATION ENTRY
; ;
DS12RTC_PREINIT: DS12RTC_PREINIT:
@ -408,3 +425,14 @@ DS12RTC_UIP:
; ;
DS12RTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM, YYMMDDHHMMSS DS12RTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM, YYMMDDHHMMSS
DS12RTC_TIMDEF .DB $00,$01,$01,$00,$00,$00 ; DEFAULT DATE/TIME DS12RTC_TIMDEF .DB $00,$01,$01,$00,$00,$00 ; DEFAULT DATE/TIME
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DS12RTC .EQU $
SIZ_DS12RTC .EQU END_DS12RTC - ORG_DS12RTC
;
MEMECHO "DS12RTC occupies "
MEMECHO SIZ_DS12RTC
MEMECHO " bytes.\n"

34
Source/HBIOS/ds1501rtc.asm

@ -117,16 +117,35 @@ DS1501RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS)
DEVECHO DS1501NVM_BASE DEVECHO DS1501NVM_BASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DS1501RTC .EQU $
;
.DW SIZ_DS1501RTC ; MODULE SIZE
.DW DS1501RTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DS1501RTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,DS1501RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DS1501RTC_INIT ; DO INIT
RET ; DONE
;
; RTC Device Initialization Entry ; RTC Device Initialization Entry
; ;
DS1501RTC_INIT: DS1501RTC_INIT:
CALL NEWLINE ; Formatting CALL NEWLINE ; Formatting
PRTS("DS1501RTC: IO=0x$")
PRTS("DS1501RTC: $")
PRTS("IO=0x$")
LD A, DS1501RTC_BASE LD A, DS1501RTC_BASE
CALL PRTHEXBYTE CALL PRTHEXBYTE
; ;
CALL NEWLINE ; Formatting CALL NEWLINE ; Formatting
PRTS("DS1501NVM: IO=0x$")
PRTS("DS1501NVM: $")
PRTS("IO=0x$")
LD A, DS1501NVM_BASE LD A, DS1501NVM_BASE
CALL PRTHEXBYTE CALL PRTHEXBYTE
; ;
@ -491,3 +510,14 @@ DS1501RTC_BUF_DAY: .DB 0 ; Day
DS1501RTC_BUF_HOUR: .DB 0 ; Hour DS1501RTC_BUF_HOUR: .DB 0 ; Hour
DS1501RTC_BUF_MIN: .DB 0 ; Minute DS1501RTC_BUF_MIN: .DB 0 ; Minute
DS1501RTC_BUF_SEC: .DB 0 ; Second DS1501RTC_BUF_SEC: .DB 0 ; Second
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DS1501RTC .EQU $
SIZ_DS1501RTC .EQU END_DS1501RTC - ORG_DS1501RTC
;
MEMECHO "DS1501RTC occupies "
MEMECHO SIZ_DS1501RTC
MEMECHO " bytes.\n"

28
Source/HBIOS/ds5rtc.asm

@ -116,6 +116,23 @@ DS5RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS)
DEVECHO DS5RTC_BASE DEVECHO DS5RTC_BASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DS5RTC .EQU $
;
.DW SIZ_DS5RTC ; MODULE SIZE
.DW DS5RTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DS5RTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,DS5RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DS5RTC_INIT ; DO INIT
RET ; DONE
;
; RTC DEVICE INITIALIZATION ENTRY ; RTC DEVICE INITIALIZATION ENTRY
; ;
DS5RTC_INIT: DS5RTC_INIT:
@ -564,3 +581,14 @@ DS5RTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM
DS5RTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK DS5RTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK
.DB $00,$01,$01 ; 2000-01-01 .DB $00,$01,$01 ; 2000-01-01
.DB $00,$00,$00 ; 00:00:00 .DB $00,$00,$00 ; 00:00:00
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DS5RTC .EQU $
SIZ_DS5RTC .EQU END_DS5RTC - ORG_DS5RTC
;
MEMECHO "DS5RTC occupies "
MEMECHO SIZ_DS5RTC
MEMECHO " bytes.\n"

28
Source/HBIOS/ds7rtc.asm

@ -25,6 +25,23 @@ DS7_CTL .EQU (DS7_OUT | DS7_SQWE | DS7_RATE)
; ;
DEVECHO "DS1307: ENABLED\n" DEVECHO "DS1307: ENABLED\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DS7 .EQU $
;
.DW SIZ_DS7 ; MODULE SIZE
.DW DS7_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DS7_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,DS7RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DS7RTC_INIT ; DO INIT
RET ; DONE
;
;----------------------------------------------------------------------------- ;-----------------------------------------------------------------------------
; DS1307 INITIALIZATION ; DS1307 INITIALIZATION
; ;
@ -447,3 +464,14 @@ DS7_BCD:PUSH HL
DS7_BUF: .FILL 8,0 ; BUFFER FOR TIME, DATE AND CONTROL DS7_BUF: .FILL 8,0 ; BUFFER FOR TIME, DATE AND CONTROL
;DS7_COLD .DB $80,$00,$00,$01,$01,$01,$00 ; COLD START RTC SETTINGS ;DS7_COLD .DB $80,$00,$00,$01,$01,$01,$00 ; COLD START RTC SETTINGS
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DS7 .EQU $
SIZ_DS7 .EQU END_DS7 - ORG_DS7
;
MEMECHO "DS7 occupies "
MEMECHO SIZ_DS7
MEMECHO " bytes.\n"

28
Source/HBIOS/dsrtc.asm

@ -162,6 +162,23 @@ DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
; ;
DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW) DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DSRTC .EQU $
;
.DW SIZ_DSRTC ; MODULE SIZE
.DW DSRTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DSRTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,DSRTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DSRTC_INIT ; DO INIT
RET ; DONE
;
; RTC DEVICE PRE-INITIALIZATION ENTRY ; RTC DEVICE PRE-INITIALIZATION ENTRY
; ;
DSRTC_PREINIT: DSRTC_PREINIT:
@ -765,3 +782,14 @@ DSRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM
DSRTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK DSRTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK
.DB $00,$01,$01 ; 2000-01-01 .DB $00,$01,$01 ; 2000-01-01
.DB $00,$00,$00 ; 00:00:00 .DB $00,$00,$00 ; 00:00:00
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DSRTC .EQU $
SIZ_DSRTC .EQU END_DSRTC - ORG_DSRTC
;
MEMECHO "DSRTC occupies "
MEMECHO SIZ_DSRTC
MEMECHO " bytes.\n"

28
Source/HBIOS/duart.asm

@ -169,6 +169,23 @@ DUART_MR2_STOP2 .EQU %00001111 ; 2 STOP BITS (2.5 IF 5 BITS/CHAR)
#DEFINE DUART_INP(RID) CALL DUART_INP_IMP \ .DB RID #DEFINE DUART_INP(RID) CALL DUART_INP_IMP \ .DB RID
#DEFINE DUART_OUTP(RID) CALL DUART_OUTP_IMP \ .DB RID #DEFINE DUART_OUTP(RID) CALL DUART_OUTP_IMP \ .DB RID
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_DUART .EQU $
;
.DW SIZ_DUART ; MODULE SIZE
.DW DUART_INITPHASE ; ADR OF INIT PHASE HANDLER
;
DUART_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,DUART_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,DUART_INIT ; DO INIT
RET ; DONE
;
; ;
; ;
DUART_PREINIT: DUART_PREINIT:
@ -879,3 +896,14 @@ DUART1B_CFG:
#ENDIF #ENDIF
; ;
DUART_CFGCNT .EQU ($ - DUART_CFG) / DUART_CFGSIZ DUART_CFGCNT .EQU ($ - DUART_CFG) / DUART_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_DUART .EQU $
SIZ_DUART .EQU END_DUART - ORG_DUART
;
MEMECHO "DUART occupies "
MEMECHO SIZ_DUART
MEMECHO " bytes.\n"

28
Source/HBIOS/ef.asm

@ -158,6 +158,23 @@ EF_SCREENSIZE .EQU EF_DROWS * EF_DLINES
DEVECHO EF_BASE DEVECHO EF_BASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_EF .EQU $
;
.DW SIZ_EF ; MODULE SIZE
.DW EF_INITPHASE ; ADR OF INIT PHASE HANDLER
;
EF_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,EF_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,EF_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; VDU DRIVER - INITIALIZATION ; VDU DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -1087,3 +1104,14 @@ EF_BUF:
#IF (EF_SIZE = V40X24) #IF (EF_SIZE = V40X24)
.FILL 2*EF_DLINES*EF_DROWS ;512,0 .FILL 2*EF_DLINES*EF_DROWS ;512,0
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_EF .EQU $
SIZ_EF .EQU END_EF - ORG_EF
;
MEMECHO "EF occupies "
MEMECHO SIZ_EF
MEMECHO " bytes.\n"

28
Source/HBIOS/esp.asm

@ -58,6 +58,23 @@ ESP_CFG_BSYMSK .EQU 4 ; ESP BUSY MASK
DEVECHO ESP_IOBASE DEVECHO ESP_IOBASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_ESP .EQU $
;
.DW SIZ_ESP ; MODULE SIZE
.DW ESP_INITPHASE ; ADR OF INIT PHASE HANDLER
;
ESP_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,ESP_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,ESP_INIT ; DO INIT
RET ; DONE
;
; GLOBAL ESP INITIALIZATION ; GLOBAL ESP INITIALIZATION
; ;
ESP_INIT: ESP_INIT:
@ -708,3 +725,14 @@ ESPSER1_CFG:
; ;
; ;
ESPSER_DEVCNT .DB 0 ; ESPSER DEVICES COUNT ESPSER_DEVCNT .DB 0 ; ESPSER DEVICES COUNT
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_ESP .EQU $
SIZ_ESP .EQU END_ESP - ORG_ESP
;
MEMECHO "ESP occupies "
MEMECHO SIZ_ESP
MEMECHO " bytes.\n"

28
Source/HBIOS/espsd.asm

@ -124,6 +124,23 @@ ESPSD_STAT .EQU 3 ; LAST STATUS (BYTE)
ESPSD_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) ESPSD_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
ESPSD_LBA .EQU 8 ; OFFSET OF LBA (DWORD) ESPSD_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_ESPSD .EQU $
;
.DW SIZ_ESPSD ; MODULE SIZE
.DW ESPSD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
ESPSD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,ESPSD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,ESPSD_INIT ; DO INIT
RET ; DONE
;
ESPSD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES ESPSD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES
; ;
ESPSD_CFGTBL: ESPSD_CFGTBL:
@ -1030,3 +1047,14 @@ ESPSD_CMDVAL .DB 0 ; PENDING COMMAND FOR IO FUCNTIONS
ESPSD_DSKBUF .DW 0 ; ACTIVE DISK BUFFER ESPSD_DSKBUF .DW 0 ; ACTIVE DISK BUFFER
; ;
ESPSD_DEVNUM .DB 0 ; TEMP DEVICE NUM USED DURING INIT ESPSD_DEVNUM .DB 0 ; TEMP DEVICE NUM USED DURING INIT
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_ESPSD .EQU $
SIZ_ESPSD .EQU END_ESPSD - ORG_ESPSD
;
MEMECHO "ESPSD occupies "
MEMECHO SIZ_ESPSD
MEMECHO " bytes.\n"

30
Source/HBIOS/ez80cpudrv.asm → Source/HBIOS/ez80cpu.asm

@ -25,6 +25,24 @@
; 4. Set Timer Tick Frequency ; 4. Set Timer Tick Frequency
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_EZ80CPU .EQU $
;
.DW SIZ_EZ80CPU ; MODULE SIZE
.DW EZ80CPU_INITPHASE ; ADR OF INIT PHASE HANDLER
;
EZ80CPU_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,EZ80_PREINIT ; DO PREINIT
;CP HB_PHASE_INIT ; INIT PHASE?
;JP Z,EZ80_INIT ; DO INIT
RET ; DONE
EZ80_PREINIT: EZ80_PREINIT:
EZ80_TMR_INT_DISABLE() EZ80_TMR_INT_DISABLE()
@ -330,3 +348,15 @@ _EZ80_EXTN_IY_TO_MB_IY:
.DB $5B, $FD, $77, $02 ; LD.LIL (IY+2), A .DB $5B, $FD, $77, $02 ; LD.LIL (IY+2), A
.DB $49, $FD, $E1 ; POP.L IY .DB $49, $FD, $E1 ; POP.L IY
RET RET
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_EZ80CPU .EQU $
SIZ_EZ80CPU .EQU END_EZ80CPU - ORG_EZ80CPU
;
MEMECHO "EZ80CPU occupies "
MEMECHO SIZ_EZ80CPU
MEMECHO " bytes.\n"

29
Source/HBIOS/ez80rtc.asm

@ -7,6 +7,24 @@ EZ80RTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
; ;
; RTC DEVICE INITIALIZATION ENTRY ; RTC DEVICE INITIALIZATION ENTRY
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_EZ80RTC .EQU $
;
.DW SIZ_EZ80RTC ; MODULE SIZE
.DW EZ80RTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
EZ80RTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,EZ80RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,EZ80RTC_INIT ; DO INIT
RET ; DONE
EZ80RTC_INIT: EZ80RTC_INIT:
; display driver install message ; display driver install message
; delegate init function to firmware ; delegate init function to firmware
@ -171,3 +189,14 @@ EZ80RTC_DT .DB 01
EZ80RTC_HH .DB 00 EZ80RTC_HH .DB 00
EZ80RTC_MM .DB 00 EZ80RTC_MM .DB 00
EZ80RTC_SS .DB 00 EZ80RTC_SS .DB 00
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_EZ80RTC .EQU $
SIZ_EZ80RTC .EQU END_EZ80RTC - ORG_EZ80RTC
;
MEMECHO "EZ80RTC occupies "
MEMECHO SIZ_EZ80RTC
MEMECHO " bytes.\n"

29
Source/HBIOS/ez80systmr.asm → Source/HBIOS/ez80tmr.asm

@ -11,6 +11,24 @@
; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented within HBIOS ; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented within HBIOS
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_EZ80TMR .EQU $
;
.DW SIZ_EZ80TMR ; MODULE SIZE
.DW EZ80TMR_INITPHASE ; ADR OF INIT PHASE HANDLER
;
EZ80TMR_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,EZ80_TMR_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,EZ80_TMR_INIT ; DO INIT
RET ; DONE
#IF (EZ80TIMER == EZ80TMR_INT) #IF (EZ80TIMER == EZ80TMR_INT)
EZ80_TMR_INIT: EZ80_TMR_INIT:
CALL NEWLINE ; FORMATTING CALL NEWLINE ; FORMATTING
@ -86,3 +104,14 @@ SYS_SETSECS:
EZ80_TMR_INIT: EZ80_TMR_INIT:
RET RET
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_EZ80TMR .EQU $
SIZ_EZ80TMR .EQU END_EZ80TMR - ORG_EZ80TMR
;
MEMECHO "EZ80TMR occupies "
MEMECHO SIZ_EZ80TMR
MEMECHO " bytes.\n"

29
Source/HBIOS/ez80uart.asm

@ -34,6 +34,24 @@ UART0_RBR .EQU $C0
LSR_THRE .EQU $20 LSR_THRE .EQU $20
LSR_DR .EQU $01 LSR_DR .EQU $01
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_EZ80UART .EQU $
;
.DW SIZ_EZ80UART ; MODULE SIZE
.DW EZ80UART_INITPHASE ; ADR OF INIT PHASE HANDLER
;
EZ80UART_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,EZUART_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,EZUART_INIT ; DO INIT
RET ; DONE
EZUART_PREINIT: EZUART_PREINIT:
LD BC, EZUART_FNTBL LD BC, EZUART_FNTBL
LD DE, EZUART_CFG LD DE, EZUART_CFG
@ -322,3 +340,14 @@ EZUART_FNTBL:
#IF (($ - EZUART_FNTBL) != (CIO_FNCNT * 2)) #IF (($ - EZUART_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID EZUART FUNCTION TABLE ***\n" .ECHO "*** INVALID EZUART FUNCTION TABLE ***\n"
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_EZ80UART .EQU $
SIZ_EZ80UART .EQU END_EZ80UART - ORG_EZ80UART
;
MEMECHO "EZ80UART occupies "
MEMECHO SIZ_EZ80UART
MEMECHO " bytes.\n"

28
Source/HBIOS/fd.asm

@ -124,6 +124,23 @@ FRC_TOGETRES .EQU -13H ; ED
FRC_TOEXEC .EQU -14H ; EC FRC_TOEXEC .EQU -14H ; EC
FRC_TOSEEKWT .EQU -15H ; EB FRC_TOSEEKWT .EQU -15H ; EB
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_FD .EQU $
;
.DW SIZ_FD ; MODULE SIZE
.DW FD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
FD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,FD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,FD_INIT ; DO INIT
RET ; DONE
;
; FD DEVICE CONFIGURATION ; FD DEVICE CONFIGURATION
; ;
FD_DEVCNT .EQU FDCNT ; 2 DEVICES SUPPORTED FD_DEVCNT .EQU FDCNT ; 2 DEVICES SUPPORTED
@ -2224,3 +2241,14 @@ FD_DSKBUF .DW 0
FD_CURGEOM .EQU $ ; TWO BYTES BELOW FD_CURGEOM .EQU $ ; TWO BYTES BELOW
FD_CURSPT .DB 0 ; CURRENT SECTORS PER TRACK FD_CURSPT .DB 0 ; CURRENT SECTORS PER TRACK
FD_CURHDS .DB 0 ; CURRENT HEADS FD_CURHDS .DB 0 ; CURRENT HEADS
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_FD .EQU $
SIZ_FD .EQU END_FD - ORG_FD
;
MEMECHO "FD occupies "
MEMECHO SIZ_FD
MEMECHO " bytes.\n"

28
Source/HBIOS/gdc.asm

@ -67,6 +67,23 @@ GDC_COLS .EQU 80
TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER
KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_GDC .EQU $
;
.DW SIZ_GDC ; MODULE SIZE
.DW GDC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
GDC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,GDC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,GDC_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; GDC DRIVER - INITIALIZATION ; GDC DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -355,3 +372,14 @@ GDC_IDAT:
.DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER .DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER
.DB GDC_KBDST .DB GDC_KBDST
.DB GDC_KBDDATA .DB GDC_KBDDATA
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_GDC .EQU $
SIZ_GDC .EQU END_GDC - ORG_GDC
;
MEMECHO "GDC occupies "
MEMECHO SIZ_GDC
MEMECHO " bytes.\n"

28
Source/HBIOS/gm7303.asm

@ -58,6 +58,23 @@ GM7303_FUNC_DDADR .EQU $80 ; SET DDRAM ADDRESS
DEVECHO GM7303BASE DEVECHO GM7303BASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_GM7303 .EQU $
;
.DW SIZ_GM7303 ; MODULE SIZE
.DW GM7303_INITPHASE ; ADR OF INIT PHASE HANDLER
;
GM7303_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,GM7303_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,GM7303_INIT ; DO INIT
RET ; DONE
;
; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
; ;
GM7303_PREINIT: GM7303_PREINIT:
@ -639,3 +656,14 @@ GM7303_MSG_LDR_LOAD .DB "Load...",0
GM7303_MSG_LDR_GO .DB "Go...",0 GM7303_MSG_LDR_GO .DB "Go...",0
GM7303_MSG_MON_RDY .DB "-CPU UP-",0 GM7303_MSG_MON_RDY .DB "-CPU UP-",0
GM7303_MSG_MON_BOOT .DB "Boot!",0 GM7303_MSG_MON_BOOT .DB "Boot!",0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_GM7303 .EQU $
SIZ_GM7303 .EQU END_GM7303 - ORG_GM7303
;
MEMECHO "GM7303 occupies "
MEMECHO SIZ_GM7303
MEMECHO " bytes.\n"

28
Source/HBIOS/h8p.asm

@ -39,6 +39,23 @@ H8FPIO .EQU $F0
DEVECHO H8FPIO DEVECHO H8FPIO
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_H8P .EQU $
;
.DW SIZ_H8P ; MODULE SIZE
.DW H8P_INITPHASE ; ADR OF INIT PHASE HANDLER
;
H8P_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,H8P_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,H8P_INIT ; DO INIT
RET ; DONE
;
;__H8P_PREINIT_______________________________________________________________________________________ ;__H8P_PREINIT_______________________________________________________________________________________
; ;
; CONFIGURE AND RESET PANEL ; CONFIGURE AND RESET PANEL
@ -972,3 +989,14 @@ H8P_UPTIME:
.DW 0 .DW 0
H8P_UPTDIG: H8P_UPTDIG:
.DB 0,0,0,0,0,0,0,0,0 .DB 0,0,0,0,0,0,0,0,0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_H8P .EQU $
SIZ_H8P .EQU END_H8P - ORG_H8P
;
MEMECHO "H8P occupies "
MEMECHO SIZ_H8P
MEMECHO " bytes.\n"

1948
Source/HBIOS/hbios.asm

File diff suppressed because it is too large

28
Source/HBIOS/hdsk.asm

@ -28,6 +28,23 @@ HDSK_LBA .EQU 2 ; OFFSET OF LBA (DWORD)
DEVECHO HDSK_DEVCNT DEVECHO HDSK_DEVCNT
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_HDSK .EQU $
;
.DW SIZ_HDSK ; MODULE SIZE
.DW HDSK_INITPHASE ; ADR OF INIT PHASE HANDLER
;
HDSK_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,HDSK_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,HDSK_INIT ; DO INIT
RET ; DONE
;
HDSK_CFGTBL: HDSK_CFGTBL:
; DEVICE 0 ; DEVICE 0
.DB 0 ; DRIVER DEVICE NUMBER .DB 0 ; DRIVER DEVICE NUMBER
@ -431,3 +448,14 @@ HDSK_DRV .DB 0 ; 0..7, HDSK DRIVE NUMBER
HDSK_SEC .DB 0 ; 0..255 SECTOR HDSK_SEC .DB 0 ; 0..255 SECTOR
HDSK_TRK .DW 0 ; 0..2047 TRACK HDSK_TRK .DW 0 ; 0..2047 TRACK
HDSK_DMA .DW 0 ; ADDRESS FOR SECTOR DATA EXCHANGE HDSK_DMA .DW 0 ; ADDRESS FOR SECTOR DATA EXCHANGE
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_HDSK .EQU $
SIZ_HDSK .EQU END_HDSK - ORG_HDSK
;
MEMECHO "HDSK occupies "
MEMECHO SIZ_HDSK
MEMECHO " bytes.\n"

28
Source/HBIOS/icm.asm

@ -43,6 +43,23 @@ ICM_COLS .EQU 8 ; DISPLAY COLUMNS
DEVECHO ICM_ROWS DEVECHO ICM_ROWS
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_ICM .EQU $
;
.DW SIZ_ICM ; MODULE SIZE
.DW ICM_INITPHASE ; ADR OF INIT PHASE HANDLER
;
ICM_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,ICM_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,ICM_INIT ; DO INIT
RET ; DONE
;
;__ICM_INIT________________________________________________________________________________________ ;__ICM_INIT________________________________________________________________________________________
; ;
; CONFIGURE PARALLEL PORT AND CLEAR KEYPAD BUFFER ; CONFIGURE PARALLEL PORT AND CLEAR KEYPAD BUFFER
@ -542,3 +559,14 @@ ICM_MSG_LDR_LOAD .DB $0B,$1D,$7E,$3D,$80,$80,$80,$00 ; "Load... "
ICM_MSG_LDR_GO .DB $5F,$1D,$80,$80,$80,$00,$00,$00 ; "Go... " ICM_MSG_LDR_GO .DB $5F,$1D,$80,$80,$80,$00,$00,$00 ; "Go... "
ICM_MSG_MON_RDY .DB $04,$4B,$6E,$3B,$00,$3B,$6E,$04 ; "-CPU UP-" ICM_MSG_MON_RDY .DB $04,$4B,$6E,$3B,$00,$3B,$6E,$04 ; "-CPU UP-"
ICM_MSG_MON_BOOT .DB $7F,$1D,$1D,$0F,$B0,$00,$00,$00 ; "Boot! " ICM_MSG_MON_BOOT .DB $7F,$1D,$1D,$0F,$B0,$00,$00,$00 ; "Boot! "
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_ICM .EQU $
SIZ_ICM .EQU END_ICM - ORG_ICM
;
MEMECHO "ICM occupies "
MEMECHO SIZ_ICM
MEMECHO " bytes.\n"

28
Source/HBIOS/ide.asm

@ -170,6 +170,23 @@ IDE_STNOTRDY .EQU -9
IDE_DRVMASTER .EQU %11100000 ; LBA, MASTER DEVICE IDE_DRVMASTER .EQU %11100000 ; LBA, MASTER DEVICE
IDE_DRVSLAVE .EQU %11110000 ; LBA, SLAVE DEVICE IDE_DRVSLAVE .EQU %11110000 ; LBA, SLAVE DEVICE
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_IDE .EQU $
;
.DW SIZ_IDE ; MODULE SIZE
.DW IDE_INITPHASE ; ADR OF INIT PHASE HANDLER
;
IDE_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,IDE_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,IDE_INIT ; DO INIT
RET ; DONE
;
; IDE DEVICE CONFIGURATION ; IDE DEVICE CONFIGURATION
; ;
IDE_CFGSIZ .EQU 19 ; SIZE OF CFG TBL ENTRIES IDE_CFGSIZ .EQU 19 ; SIZE OF CFG TBL ENTRIES
@ -2279,3 +2296,14 @@ IDE_PKTCMD_SENSE .DB $03, $00, $00, $00, $FF, $00, $00, $00, $00, $00, $00, $00
IDE_PKTCMD_RDCAP .DB $25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; READ CAPACITY IDE_PKTCMD_RDCAP .DB $25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; READ CAPACITY
IDE_PKTCMD_RW10 .DB $28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00 ; READ/WRITE SECTOR IDE_PKTCMD_RW10 .DB $28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00 ; READ/WRITE SECTOR
IDE_PKTCMD_TSTRDY .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; TEST UNIT READY IDE_PKTCMD_TSTRDY .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; TEST UNIT READY
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_IDE .EQU $
SIZ_IDE .EQU END_IDE - ORG_IDE
;
MEMECHO "IDE occupies "
MEMECHO SIZ_IDE
MEMECHO " bytes.\n"

28
Source/HBIOS/imm.asm

@ -140,6 +140,23 @@ IMM_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
#DEFINE MG014_MAP #DEFINE MG014_MAP
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_IMM .EQU $
;
.DW SIZ_IMM ; MODULE SIZE
.DW IMM_INITPHASE ; ADR OF INIT PHASE HANDLER
;
IMM_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,IMM_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,IMM_INIT ; DO INIT
RET ; DONE
;
;============================================================================= ;=============================================================================
; INITIALIZATION ENTRY POINT ; INITIALIZATION ENTRY POINT
;============================================================================= ;=============================================================================
@ -1577,3 +1594,14 @@ IMM1_CFG: ; DEVICE 1
#ENDIF #ENDIF
; ;
.DB $FF ; END MARKER .DB $FF ; END MARKER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_IMM .EQU $
SIZ_IMM .EQU END_IMM - ORG_IMM
;
MEMECHO "IMM occupies "
MEMECHO SIZ_IMM

28
Source/HBIOS/intrtc.asm

@ -7,6 +7,23 @@ INTRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
; ;
DEVECHO "INTRTC: ENABLED\n" DEVECHO "INTRTC: ENABLED\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_INTRTC .EQU $
;
.DW SIZ_INTRTC ; MODULE SIZE
.DW INTRTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
INTRTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,INTRTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,INTRTC_INIT ; DO INIT
RET ; DONE
;
; RTC DEVICE INITIALIZATION ENTRY ; RTC DEVICE INITIALIZATION ENTRY
; ;
INTRTC_INIT: INTRTC_INIT:
@ -257,3 +274,14 @@ INTRTC_MONTBL: ; DAYS IN MONTH + 1
.DB 32 ; OCTOBER .DB 32 ; OCTOBER
.DB 31 ; NOVEMBER .DB 31 ; NOVEMBER
.DB 32 ; DECEMBER .DB 32 ; DECEMBER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_INTRTC .EQU $
SIZ_INTRTC .EQU END_INTRTC - ORG_INTRTC
;
MEMECHO "INTRTC occupies "
MEMECHO SIZ_INTRTC
MEMECHO " bytes.\n"

28
Source/HBIOS/kbd.asm

@ -49,6 +49,23 @@ KBD_KEYRDY .EQU 80H ; BIT 7, INDICATES A DECODED KEYCODE IS READY
KBD_DEFRPT .EQU $40 ; DEFAULT REPEAT RATE (.5 SEC DELAY, 30CPS) KBD_DEFRPT .EQU $40 ; DEFAULT REPEAT RATE (.5 SEC DELAY, 30CPS)
KBD_DEFSTATE .EQU KBD_NUMLCK ; DEFAULT STATE (NUM LOCK ON) KBD_DEFSTATE .EQU KBD_NUMLCK ; DEFAULT STATE (NUM LOCK ON)
KBD_ACK .EQU $FA ; CMD ACKNOWLEDGE KBD_ACK .EQU $FA ; CMD ACKNOWLEDGE
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_KBD .EQU $
;
.DW SIZ_KBD ; MODULE SIZE
.DW KBD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
KBD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,KBD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,KBD_INIT ; DO INIT
RET ; DONE
;__________________________________________________________________________________________________ ;__________________________________________________________________________________________________
; DATA ; DATA
;__________________________________________________________________________________________________ ;__________________________________________________________________________________________________
@ -939,3 +956,14 @@ KBD_MAPNUMPAD: ; KEYCODE TRANSLATION FROM NUMPAD RANGE TO STD ASCII/KEYCODES
; SLEEP $FB ; SLEEP $FB
; WAKE $FC ; WAKE $FC
; BREAK $FD ; BREAK $FD
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_KBD .EQU $
SIZ_KBD .EQU END_KBD - ORG_KBD
;
MEMECHO "KBD occupies "
MEMECHO SIZ_KBD
MEMECHO " bytes.\n"

28
Source/HBIOS/kio.asm

@ -30,6 +30,23 @@ KIO_KIOCMDB .EQU KIOBASE + $0F
DEVECHO KIOBASE DEVECHO KIOBASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_KIO .EQU $
;
.DW SIZ_KIO ; MODULE SIZE
.DW KIO_INITPHASE ; ADR OF INIT PHASE HANDLER
;
KIO_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,KIO_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,KIO_INIT ; DO INIT
RET ; DONE
;
KIO_PREINIT: KIO_PREINIT:
CALL KIO_DETECT CALL KIO_DETECT
RET NZ RET NZ
@ -99,3 +116,14 @@ KIO_DETECT:
; ;
; ;
KIO_EXISTS .DB 0 KIO_EXISTS .DB 0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_KIO .EQU $
SIZ_KIO .EQU END_KIO - ORG_KIO
;
MEMECHO "KIO occupies "
MEMECHO SIZ_KIO
MEMECHO " bytes.\n"

29
Source/HBIOS/lcd.asm

@ -35,6 +35,24 @@ LCD_FUNC_DDADR .EQU $80 ; SET DDRAM ADDRESS
DEVECHO LCD_ROWS DEVECHO LCD_ROWS
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_LCD .EQU $
;
.DW SIZ_LCD ; MODULE SIZE
.DW LCD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
LCD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,LCD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,LCD_INIT ; DO INIT
RET ; DONE
;
; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
; ;
LCD_PREINIT: LCD_PREINIT:
@ -528,3 +546,14 @@ LCD_MSG_LDR_LOAD .DB "Load...",0
LCD_MSG_LDR_GO .DB "Go...",0 LCD_MSG_LDR_GO .DB "Go...",0
LCD_MSG_MON_RDY .DB "-CPU UP-",0 LCD_MSG_MON_RDY .DB "-CPU UP-",0
LCD_MSG_MON_BOOT .DB "Boot!",0 LCD_MSG_MON_BOOT .DB "Boot!",0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_LCD .EQU $
SIZ_LCD .EQU END_LCD - ORG_LCD
;
MEMECHO "LCD occupies "
MEMECHO SIZ_LCD
MEMECHO " bytes.\n"

28
Source/HBIOS/lpt.asm

@ -88,6 +88,23 @@
; ;
;================================================================================================== ;==================================================================================================
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_LPT .EQU $
;
.DW SIZ_LPT ; MODULE SIZE
.DW LPT_INITPHASE ; ADR OF INIT PHASE HANDLER
;
LPT_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,LPT_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,LPT_INIT ; DO INIT
RET ; DONE
;
LPT_INIT: LPT_INIT:
LD B,LPT_CFGCNT ; LOOP CONTROL LD B,LPT_CFGCNT ; LOOP CONTROL
XOR A ; ZERO TO ACCUM XOR A ; ZERO TO ACCUM
@ -515,3 +532,14 @@ LPT1_CFG:
#ENDIF #ENDIF
; ;
LPT_CFGCNT .EQU ($ - LPT_CFG) / LPT_CFGSIZ LPT_CFGCNT .EQU ($ - LPT_CFG) / LPT_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_LPT .EQU $
SIZ_LPT .EQU END_LPT - ORG_LPT
;
MEMECHO "LPT occupies "
MEMECHO SIZ_LPT
MEMECHO " bytes.\n"

30
Source/HBIOS/m6242rtc.asm

@ -40,7 +40,24 @@ M6242RTC_REG_CONTROL3 .EQU $0F
DEVECHO "M6242RTC: IO=" DEVECHO "M6242RTC: IO="
DEVECHO M6242RTC_BASE DEVECHO M6242RTC_BASE
DEVECHO "\n" DEVECHO "\n"
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_M6242RTC .EQU $
;
.DW SIZ_M6242RTC ; MODULE SIZE
.DW M6242RTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
M6242RTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,M6242RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,M6242RTC_INIT ; DO INIT
RET ; DONE
;
M6242RTC_INIT: M6242RTC_INIT:
LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS OR A ; SET FLAGS
@ -324,3 +341,14 @@ RP5RTC_DT .DB 01
RP5RTC_HH .DB 00 RP5RTC_HH .DB 00
RP5RTC_MM .DB 00 RP5RTC_MM .DB 00
RP5RTC_SS .DB 00 RP5RTC_SS .DB 00
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_M6242RTC .EQU $
SIZ_M6242RTC .EQU END_M6242RTC - ORG_M6242RTC
;
MEMECHO "M6242RTC occupies "
MEMECHO SIZ_M6242RTC
MEMECHO " bytes.\n"

32
Source/HBIOS/md.asm

@ -29,6 +29,23 @@ MD_FDBG .EQU 0 ; FLASH DEBUG CODE
MD_FVBS .EQU 1 ; FLASH VERBOSE OUTPUT MD_FVBS .EQU 1 ; FLASH VERBOSE OUTPUT
MD_FVAR .EQU 1 ; FLASH VERIFY AFTER WRITE MD_FVAR .EQU 1 ; FLASH VERIFY AFTER WRITE
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_MD .EQU $
;
.DW SIZ_MD ; MODULE SIZE
.DW MD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
MD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,MD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,MD_INIT ; DO INIT
RET ; DONE
;
; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE) ; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE)
; ;
MD_CFGTBL: MD_CFGTBL:
@ -1063,3 +1080,18 @@ MD_DSTBNK .DB 0
MD_SRC .DW 0 MD_SRC .DW 0
MD_DST .DW 0 MD_DST .DW 0
MD_LEN .DW 0 MD_LEN .DW 0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_MD .EQU $
SIZ_MD .EQU END_MD - ORG_MD
;
MEMECHO "MD occupies "
MEMECHO SIZ_MD
MEMECHO " bytes.\n"

29
Source/HBIOS/mky.asm

@ -155,6 +155,24 @@ S_INSERT .EQU $00 ; E0 70 --- E0 F0 70
S_HOME .EQU $00 ; E0 6C --- E0 F0 6C S_HOME .EQU $00 ; E0 6C --- E0 F0 6C
S_SPACE .EQU $29 S_SPACE .EQU $29
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_MKY .EQU $
;
.DW SIZ_MKY ; MODULE SIZE
.DW MKY_INITPHASE ; ADR OF INIT PHASE HANDLER
;
MKY_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,MKY_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,MKY_INIT ; DO INIT
RET ; DONE
SCANCODE_TBL: SCANCODE_TBL:
.DB S_7, S_6, S_5, S_4, S_3, S_2, S_1, S_0 ; 00 .DB S_7, S_6, S_5, S_4, S_3, S_2, S_1, S_0 ; 00
.DB S_SEMICOLON, S_RBRACKET, S_LBRACKET, S_BSLASH, S_EQUALS, S_MINUS, S_9, S_8 ; 01 .DB S_SEMICOLON, S_RBRACKET, S_LBRACKET, S_BSLASH, S_EQUALS, S_MINUS, S_9, S_8 ; 01
@ -1170,3 +1188,14 @@ MKY_MAPEXT: ; PAIRS ARE [SCANCODE,KEYCODE] FOR EXTENDED SCANCODES
; SLEEP $FB ; SLEEP $FB
; WAKE $FC ; WAKE $FC
; BREAK $FD ; BREAK $FD
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_MKY .EQU $
SIZ_MKY .EQU END_MKY - ORG_MKY
;
MEMECHO "MKY occupies "
MEMECHO SIZ_MKY
MEMECHO " bytes.\n"

28
Source/HBIOS/mmrtc.asm

@ -53,6 +53,23 @@ MMRTC_DATA .EQU MMRTC_IO + 1
DEVECHO MMRTC_IO DEVECHO MMRTC_IO
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_MMRTC .EQU $
;
.DW SIZ_MMRTC ; MODULE SIZE
.DW MMRTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
MMRTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,MMRTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,MMRTC_INIT ; DO INIT
RET ; DONE
;
; RTC DEVICE PRE-INITIALIZATION ENTRY ; RTC DEVICE PRE-INITIALIZATION ENTRY
; ;
MMRTC_PREINIT: MMRTC_PREINIT:
@ -295,3 +312,14 @@ MMRTC_WRREG:
; MMRTC_TIMBUF IS DRIVER'S INTERNAL CLOCK DATA BUFFER ; MMRTC_TIMBUF IS DRIVER'S INTERNAL CLOCK DATA BUFFER
; ;
MMRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM, YYMMDDHHMMSS MMRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM, YYMMDDHHMMSS
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_MMRTC .EQU $
SIZ_MMRTC .EQU END_MMRTC - ORG_MMRTC
;
MEMECHO "MMRTC occupies "
MEMECHO SIZ_MMRTC
MEMECHO " bytes.\n"

28
Source/HBIOS/nabu.asm

@ -45,6 +45,23 @@ NABU_RIN .EQU NABU_BASE + 0 ; READ FROM SELECTED REGISTER
DEVECHO NABU_BASE DEVECHO NABU_BASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_NABU .EQU $
;
.DW SIZ_NABU ; MODULE SIZE
.DW NABU_INITPHASE ; ADR OF INIT PHASE HANDLER
;
NABU_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,NABU_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,NABU_INIT ; DO INIT
RET ; DONE
;
; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
; ;
NABU_PREINIT: NABU_PREINIT:
@ -87,3 +104,14 @@ NABU_INIT:
; DATA STORAGE ; DATA STORAGE
; ;
NABU_CTLVAL .DB 0 ; SHADOW VAL FOR NABU CONTROL REGISTER NABU_CTLVAL .DB 0 ; SHADOW VAL FOR NABU CONTROL REGISTER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_NABU .EQU $
SIZ_NABU .EQU END_NABU - ORG_NABU
;
MEMECHO "NABU occupies "
MEMECHO SIZ_NABU
MEMECHO " bytes.\n"

28
Source/HBIOS/nabukb.asm

@ -31,6 +31,23 @@ NABUKB_BUFSZ .EQU 16 ; RECEIVE RING BUFFER SIZE
DEVECHO NABUKB_IODAT DEVECHO NABUKB_IODAT
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_NABUKB .EQU $
;
.DW SIZ_NABUKB ; MODULE SIZE
.DW NABUKB_INITPHASE ; ADR OF INIT PHASE HANDLER
;
NABUKB_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,NABUKB_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,NABUKB_INIT ; DO INIT
RET ; DONE
;
; INITIALZIZE THE KEYBOARD CONTROLLER. ; INITIALZIZE THE KEYBOARD CONTROLLER.
; ;
NABUKB_INIT: NABUKB_INIT:
@ -354,3 +371,14 @@ NABUKB_XTBL:
.DB $00 ; $FD, N/A .DB $00 ; $FD, N/A
.DB $00 ; $FE, N/A .DB $00 ; $FE, N/A
.DB $00 ; $FF, N/A .DB $00 ; $FF, N/A
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_NABUKB .EQU $
SIZ_NABUKB .EQU END_NABUKB - ORG_NABUKB
;
MEMECHO "NABUKB occupies "
MEMECHO SIZ_NABUKB
MEMECHO " bytes.\n"

31
Source/HBIOS/pcf.asm

@ -84,6 +84,26 @@ PCF_LABDLY .EQU 65000
; ;
; DATA PORT REGISTERS ; DATA PORT REGISTERS
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PCF .EQU $
;
.DW SIZ_PCF ; MODULE SIZE
.DW PCF_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PCF_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PCF_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PCF_INIT ; DO INIT
RET ; DONE
;
;
;
PCF_INIT: PCF_INIT:
CALL NEWLINE ; Formatting CALL NEWLINE ; Formatting
PRTS("PCF: IO=0x$") PRTS("PCF: IO=0x$")
@ -494,3 +514,14 @@ PCF_TOFAIL .DB "TIMEOUT ERROR$"
PCF_ARBFAIL .DB "LOST ARBITRATION$" PCF_ARBFAIL .DB "LOST ARBITRATION$"
PCF_PINFAIL .DB "PIN FAIL$" PCF_PINFAIL .DB "PIN FAIL$"
PCF_BBFAIL .DB "BUS BUSY$" PCF_BBFAIL .DB "BUS BUSY$"
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PCF .EQU $
SIZ_PCF .EQU END_PCF - ORG_PCF
;
MEMECHO "PCF occupies "
MEMECHO SIZ_PCF
MEMECHO " bytes.\n"

32
Source/HBIOS/pcrtc.asm

@ -37,6 +37,24 @@ PCRTC_NVSIZE .EQU $30 ; 64 bytes in total is what DS1285 and MC146818 had
DEVECHO PCRTC_BASE DEVECHO PCRTC_BASE
DEVECHO "\n" DEVECHO "\n"
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PCRTC .EQU $
;
.DW SIZ_PCRTC ; MODULE SIZE
.DW PCRTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PCRTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PCRTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PCRTC_INIT ; DO INIT
RET ; DONE
;
PCRTC_INIT: PCRTC_INIT:
LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS OR A ; SET FLAGS
@ -232,7 +250,7 @@ PCRTC_SETTIM:
LD A, PCRTC_REG_CTLB ; Set Ctl Reg B LD A, PCRTC_REG_CTLB ; Set Ctl Reg B
EZ80_IO EZ80_IO
OUT (PCRTC_REG), A OUT (PCRTC_REG), A
LD A, PCRTC_CTLB_VAL|0x80 ; Set the SET bit to stop updates
LD A, PCRTC_CTLB_VAL|$80 ; Set the SET bit to stop updates
EZ80_IO EZ80_IO
OUT (PCRTC_DAT), A OUT (PCRTC_DAT), A
@ -365,4 +383,14 @@ PCRTC_DT .DB $01
PCRTC_HH .DB $00 PCRTC_HH .DB $00
PCRTC_MM .DB $00 PCRTC_MM .DB $00
PCRTC_SS .DB $00 PCRTC_SS .DB $00
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PCRTC .EQU $
SIZ_PCRTC .EQU END_PCRTC - ORG_PCRTC
;
MEMECHO "PCRTC occupies "
MEMECHO SIZ_PCRTC
MEMECHO " bytes.\n"

28
Source/HBIOS/pio.asm

@ -31,6 +31,23 @@ PIO1B_DAT .EQU PIO1BASE + $01
; ;
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PIO .EQU $
;
.DW SIZ_PIO ; MODULE SIZE
.DW PIO_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PIO_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,PIO_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PIO_INIT ; DO INIT
RET ; DONE
;
PIO_PREINIT: PIO_PREINIT:
; ;
; SETUP THE DISPATCH TABLE ENTRIES ; SETUP THE DISPATCH TABLE ENTRIES
@ -363,3 +380,14 @@ PIO1B_CFG:
#ENDIF #ENDIF
; ;
PIO_CFGCNT .EQU ($ - PIO_CFG) / PIO_CFGSIZ PIO_CFGCNT .EQU ($ - PIO_CFG) / PIO_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PIO .EQU $
SIZ_PIO .EQU END_PIO - ORG_PIO
;
MEMECHO "PIO occupies "
MEMECHO SIZ_PIO
MEMECHO " bytes.\n"

28
Source/HBIOS/pkd.asm

@ -78,6 +78,23 @@ PKD_PRESCL .EQU PKDOSC/100000 ; PRESCALER
DEVECHO PKD_ROWS DEVECHO PKD_ROWS
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PKD .EQU $
;
.DW SIZ_PKD ; MODULE SIZE
.DW PKD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PKD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,PKD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PKD_INIT ; DO INIT
RET ; DONE
;
;__PKD_PREINIT_____________________________________________________________________________________ ;__PKD_PREINIT_____________________________________________________________________________________
; ;
; CONFIGURE PARALLEL PORT AND INITIALIZE 8279 ; CONFIGURE PARALLEL PORT AND INITIALIZE 8279
@ -879,3 +896,14 @@ PKD_MSG_LDR_LOAD .DB $38,$5C,$5F,$5E,$80,$80,$80,$00 ; "Load... "
PKD_MSG_LDR_GO .DB $3D,$5C,$80,$80,$80,$00,$00,$00 ; "Go... " PKD_MSG_LDR_GO .DB $3D,$5C,$80,$80,$80,$00,$00,$00 ; "Go... "
PKD_MSG_MON_RDY .DB $40,$39,$73,$3E,$00,$3E,$73,$40 ; "-CPU UP-" PKD_MSG_MON_RDY .DB $40,$39,$73,$3E,$00,$3E,$73,$40 ; "-CPU UP-"
PKD_MSG_MON_BOOT .DB $7F,$5C,$5C,$78,$82,$00,$00,$00 ; "Boot! " PKD_MSG_MON_BOOT .DB $7F,$5C,$5C,$78,$82,$00,$00,$00 ; "Boot! "
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PKD .EQU $
SIZ_PKD .EQU END_PKD - ORG_PKD
;
MEMECHO "PKD occupies "
MEMECHO SIZ_PKD
MEMECHO " bytes.\n"

28
Source/HBIOS/ppa.asm

@ -143,6 +143,23 @@ PPA_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
#DEFINE MG014_MAP #DEFINE MG014_MAP
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PPA .EQU $
;
.DW SIZ_PPA ; MODULE SIZE
.DW PPA_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PPA_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PPA_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PPA_INIT ; DO INIT
RET ; DONE
;
;============================================================================= ;=============================================================================
; INITIALIZATION ENTRY POINT ; INITIALIZATION ENTRY POINT
;============================================================================= ;=============================================================================
@ -1437,3 +1454,14 @@ PPA1_CFG: ; DEVICE 1
#ENDIF #ENDIF
; ;
.DB $FF ; END MARKER .DB $FF ; END MARKER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PPA .EQU $
SIZ_PPA .EQU END_PPA - ORG_PPA
;
MEMECHO "PPA occupies "
MEMECHO SIZ_PPA
MEMECHO " bytes.\n"

28
Source/HBIOS/ppide.asm

@ -235,6 +235,23 @@ PPIDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT)
PPIDE_MED_CF .EQU %00000001 ; MEDIA IS CF CARD PPIDE_MED_CF .EQU %00000001 ; MEDIA IS CF CARD
PPIDE_MED_LBA .EQU %00000010 ; MEDIA HAS LBA CAPABILITY PPIDE_MED_LBA .EQU %00000010 ; MEDIA HAS LBA CAPABILITY
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PPIDE .EQU $
;
.DW SIZ_PPIDE ; MODULE SIZE
.DW PPIDE_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PPIDE_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PPIDE_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PPIDE_INIT ; DO INIT
RET ; DONE
;
PPIDE_DEVCNT .EQU PPIDECNT * 2 PPIDE_DEVCNT .EQU PPIDECNT * 2
; ;
PPIDE_CFGTBL: PPIDE_CFGTBL:
@ -2456,3 +2473,14 @@ PPIDE_PKTCMD_SENSE .DB $03, $00, $00, $00, $FF, $00, $00, $00, $00, $00, $00, $0
PPIDE_PKTCMD_RDCAP .DB $25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; READ CAPACITY PPIDE_PKTCMD_RDCAP .DB $25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; READ CAPACITY
PPIDE_PKTCMD_RW10 .DB $28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00 ; READ/WRITE SECTOR PPIDE_PKTCMD_RW10 .DB $28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00 ; READ/WRITE SECTOR
PPIDE_PKTCMD_TSTRDY .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; TEST UNIT READY PPIDE_PKTCMD_TSTRDY .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; TEST UNIT READY
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PPIDE .EQU $
SIZ_PPIDE .EQU END_PPIDE - ORG_PPIDE
;
MEMECHO "PPIDE occupies "
MEMECHO SIZ_PPIDE
MEMECHO " bytes.\n"

28
Source/HBIOS/ppk.asm

@ -35,6 +35,23 @@ PPK_KEYRDY .EQU 80H ; BIT 7, INDICATES A DECODED KEYCODE IS READY
PPK_DEFRPT .EQU $40 ; DEFAULT REPEAT RATE (.5 SEC DELAY, 30CPS) PPK_DEFRPT .EQU $40 ; DEFAULT REPEAT RATE (.5 SEC DELAY, 30CPS)
PPK_DEFSTATE .EQU KBD_NUMLCK ; DEFAULT STATE (NUM LOCK ON) PPK_DEFSTATE .EQU KBD_NUMLCK ; DEFAULT STATE (NUM LOCK ON)
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PPK .EQU $
;
.DW SIZ_PPK ; MODULE SIZE
.DW PPK_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PPK_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PPK_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PPK_INIT ; DO INIT
RET ; DONE
;
;__________________________________________________________________________________________________ ;__________________________________________________________________________________________________
; DATA ; DATA
;__________________________________________________________________________________________________ ;__________________________________________________________________________________________________
@ -903,3 +920,14 @@ PPK_MAPNUMPAD: ; KEYCODE TRANSLATION FROM NUMPAD RANGE TO STD ASCII/KEYCODES
; SLEEP $FB ; SLEEP $FB
; WAKE $FC ; WAKE $FC
; BREAK $FD ; BREAK $FD
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PPK .EQU $
SIZ_PPK .EQU END_PPK - ORG_PPK
;
MEMECHO "PPK occupies "
MEMECHO SIZ_PPK
MEMECHO " bytes.\n"

28
Source/HBIOS/ppp.asm

@ -47,6 +47,23 @@ PPP_CMDSIOTXFL .EQU $56 ; SERIAL PORT TRANSMIT BUFFER FLUSH (NOT IMPLEMENTED)
PPP_CMDRESET .EQU $F0 ; SOFT RESET PROPELLER PPP_CMDRESET .EQU $F0 ; SOFT RESET PROPELLER
PPP_CMDVER .EQU $F1 ; SEND FIRMWARE VERSION PPP_CMDVER .EQU $F1 ; SEND FIRMWARE VERSION
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PPP .EQU $
;
.DW SIZ_PPP ; MODULE SIZE
.DW PPP_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PPP_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PPP_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PPP_INIT ; DO INIT
RET ; DONE
;
; GLOBAL PARPORTPROP INITIALIZATION ; GLOBAL PARPORTPROP INITIALIZATION
; ;
PPP_INIT: PPP_INIT:
@ -1154,3 +1171,14 @@ PPPSD_DSKBUF .DW 0
PPPSD_DSKSTAT .DB 0 PPPSD_DSKSTAT .DB 0
PPPSD_ERRCODE .DW 0,0 PPPSD_ERRCODE .DW 0,0
PPPSD_CSDBUF .FILL 16,0 PPPSD_CSDBUF .FILL 16,0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PPP .EQU $
SIZ_PPP .EQU END_PPP - ORG_PPP
;
MEMECHO "PPP occupies "
MEMECHO SIZ_PPP
MEMECHO " bytes.\n"

28
Source/HBIOS/prp.asm

@ -11,6 +11,23 @@ PRP_IOBASE .EQU $A8
DEVECHO PRP_IOBASE DEVECHO PRP_IOBASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_PRP .EQU $
;
.DW SIZ_PRP ; MODULE SIZE
.DW PRP_INITPHASE ; ADR OF INIT PHASE HANDLER
;
PRP_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,PRP_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,PRP_INIT ; DO INIT
RET ; DONE
;
; GLOBAL PROPIO INITIALIZATION ; GLOBAL PROPIO INITIALIZATION
; ;
PRP_INIT: PRP_INIT:
@ -1091,3 +1108,14 @@ PRPSD_CSDBUF .FILL 16,0
PRPSD_CMD .DB 0 PRPSD_CMD .DB 0
; ;
PRPSD_TIMEOUT .DW $0000 ; FIX: MAKE THIS CPU SPEED RELATIVE PRPSD_TIMEOUT .DW $0000 ; FIX: MAKE THIS CPU SPEED RELATIVE
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_PRP .EQU $
SIZ_PRP .EQU END_PRP - ORG_PRP
;
MEMECHO "PRP occupies "
MEMECHO SIZ_PRP
MEMECHO " bytes.\n"

28
Source/HBIOS/rf.asm

@ -27,6 +27,23 @@ RF_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE)
RF_STAT .EQU 1 ; OFFSET OF STATUS (BYTE) RF_STAT .EQU 1 ; OFFSET OF STATUS (BYTE)
RF_LBA .EQU 2 ; OFFSET OF LBA (DWORD) RF_LBA .EQU 2 ; OFFSET OF LBA (DWORD)
RF_IOAD .EQU 7 ; OFFSET OF DEVICE IO ADDRESS RF_IOAD .EQU 7 ; OFFSET OF DEVICE IO ADDRESS
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_RF .EQU $
;
.DW SIZ_RF ; MODULE SIZE
.DW RF_INITPHASE ; ADR OF INIT PHASE HANDLER
;
RF_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,RF_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,RF_INIT ; DO INIT
RET ; DONE
#IF ($RF_DEVCNT > RF_MAXRF) #IF ($RF_DEVCNT > RF_MAXRF)
.ECHO "*** ONLY 4 RAM FLOPPY DEVICES SUPPORTED ***\n" .ECHO "*** ONLY 4 RAM FLOPPY DEVICES SUPPORTED ***\n"
@ -356,3 +373,14 @@ RF_IO .DB 0 ; PORT ADDRESS OF ACTIVE DEVICE
RF_RWFNADR .DW 0 RF_RWFNADR .DW 0
; ;
RF_DSKBUF .DW 0 RF_DSKBUF .DW 0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_RF .EQU $
SIZ_RF .EQU END_RF - ORG_RF
;
MEMECHO "RF occupies "
MEMECHO SIZ_RF
MEMECHO " bytes.\n"

29
Source/HBIOS/rp5rtc.asm

@ -59,6 +59,24 @@ MD_ALRM .EQU 4
DEVECHO RP5RTC_REG DEVECHO RP5RTC_REG
DEVECHO "\n" DEVECHO "\n"
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_RP5RTC .EQU $
;
.DW SIZ_RP5RTC ; MODULE SIZE
.DW RP5RTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
RP5RTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,RP5RTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,RP5RTC_INIT ; DO INIT
RET ; DONE
;
RP5RTC_INIT: RP5RTC_INIT:
LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS OR A ; SET FLAGS
@ -473,3 +491,14 @@ RP5RTC_HH .DB 00
RP5RTC_MM .DB 00 RP5RTC_MM .DB 00
RP5RTC_SS .DB 00 RP5RTC_SS .DB 00
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_RP5RTC .EQU $
SIZ_RP5RTC .EQU END_RP5RTC - ORG_RP5RTC
;
MEMECHO "RP5RTC occupies "
MEMECHO SIZ_RP5RTC
MEMECHO " bytes.\n"

28
Source/HBIOS/scc.asm

@ -77,6 +77,23 @@ SCC1B_DAT .EQU SCC1BASE + $02
; ;
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SCC .EQU $
;
.DW SIZ_SCC ; MODULE SIZE
.DW SCC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SCC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,SCC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SCC_INIT ; DO INIT
RET ; DONE
;
SCC_PREINIT: SCC_PREINIT:
; ;
; SETUP THE DISPATCH TABLE ENTRIES ; SETUP THE DISPATCH TABLE ENTRIES
@ -1074,3 +1091,14 @@ SCC1B_CFG:
#ENDIF #ENDIF
; ;
SCC_CFGCNT .EQU ($ - SCC_CFG) / SCC_CFGSIZ SCC_CFGCNT .EQU ($ - SCC_CFG) / SCC_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SCC .EQU $
SIZ_SCC .EQU END_SCC - ORG_SCC
;
MEMECHO "SCC occupies "
MEMECHO SIZ_SCC
MEMECHO " bytes.\n"

28
Source/HBIOS/scon.asm

@ -20,6 +20,23 @@ SCON_ROWS .EQU 40
DEVECHO SCON_IOBASE DEVECHO SCON_IOBASE
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SCON .EQU $
;
.DW SIZ_SCON ; MODULE SIZE
.DW SCON_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SCON_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,SCON_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SCON_INIT ; DO INIT
RET ; DONE
;
; ;
; ;
SCON_PREINIT: SCON_PREINIT:
@ -181,3 +198,14 @@ SCON_DETECT1:
; ;
; ;
SCON_UNIT .DB $FF ; OUR ASSIGNED UNIT NUMBER SCON_UNIT .DB $FF ; OUR ASSIGNED UNIT NUMBER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SCON .EQU $
SIZ_SCON .EQU END_SCON - ORG_SCON
;
MEMECHO "SCON occupies "
MEMECHO SIZ_SCON
MEMECHO " bytes.\n"

28
Source/HBIOS/scsi.asm

@ -63,6 +63,23 @@ SCSI_STAT .EQU 3 ; LAST STATUS (BYTE)
SCSI_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) SCSI_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
SCSI_LBA .EQU 8 ; OFFSET OF LBA (DWORD) SCSI_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SCSI .EQU $
;
.DW SIZ_SCSI ; MODULE SIZE
.DW SCSI_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SCSI_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,SCSI_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SCSI_INIT ; DO INIT
RET ; DONE
;
SCSI_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES SCSI_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES
; ;
SCSI_CFGTBL: SCSI_CFGTBL:
@ -931,3 +948,14 @@ SCSI_S_STAT .DW 0 ; SCSI ENDING STATUS
SCSI_S_MSG .DW 0 ; SCSI MESSAGE SCSI_S_MSG .DW 0 ; SCSI MESSAGE
; ;
SCSI_CAP_BUF .FILL 8,0 ; SCSI CAPACITY DATA BUFFER SCSI_CAP_BUF .FILL 8,0 ; SCSI CAPACITY DATA BUFFER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SCSI .EQU $
SIZ_SCSI .EQU END_SCSI - ORG_SCSI
;
MEMECHO "SCSI occupies "
MEMECHO SIZ_SCSI
MEMECHO " bytes.\n"

28
Source/HBIOS/sd.asm

@ -528,6 +528,23 @@ SD_STCRCERR .EQU -8 ; CRC ERROR ON RECEIVED DATA PACKET
SD_STNOMEDIA .EQU -9 ; NO MEDIA IN CONNECTOR SD_STNOMEDIA .EQU -9 ; NO MEDIA IN CONNECTOR
SD_STWRTPROT .EQU -10 ; ATTEMPT TO WRITE TO WRITE PROTECTED MEDIA SD_STWRTPROT .EQU -10 ; ATTEMPT TO WRITE TO WRITE PROTECTED MEDIA
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SD .EQU $
;
.DW SIZ_SD ; MODULE SIZE
.DW SD_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SD_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,SD_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SD_INIT ; DO INIT
RET ; DONE
;
; IDE DEVICE CONFIGURATION ; IDE DEVICE CONFIGURATION
; ;
SD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES SD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES
@ -2715,3 +2732,14 @@ MIRTAB .DB 00H, 80H, 40H, 0C0H, 20H, 0A0H, 60H, 0E0H, 10H, 90H, 50H, 0D0H, 30H,
.DB 0FH, 8FH, 4FH, 0CFH, 2FH, 0AFH, 6FH, 0EFH, 1FH, 9FH, 5FH, 0DFH, 3FH, 0BFH, 7FH, 0FFH .DB 0FH, 8FH, 4FH, 0CFH, 2FH, 0AFH, 6FH, 0EFH, 1FH, 9FH, 5FH, 0DFH, 3FH, 0BFH, 7FH, 0FFH
; ;
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SD .EQU $
SIZ_SD .EQU END_SD - ORG_SD
;
MEMECHO "SD occupies "
MEMECHO SIZ_SD
MEMECHO " bytes.\n"

30
Source/HBIOS/simrtc.asm

@ -12,6 +12,23 @@ SIMRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
DEVECHO SIMRTC_IO DEVECHO SIMRTC_IO
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SIMRTC .EQU $
;
.DW SIZ_SIMRTC ; MODULE SIZE
.DW SIMRTC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SIMRTC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,SIMRTC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SIMRTC_INIT ; DO INIT
RET ; DONE
;
; RTC DEVICE INITIALIZATION ENTRY ; RTC DEVICE INITIALIZATION ENTRY
; ;
SIMRTC_INIT: SIMRTC_INIT:
@ -154,3 +171,16 @@ SIMRTC_DT .DB 0
SIMRTC_HH .DB 0 SIMRTC_HH .DB 0
SIMRTC_MM .DB 0 SIMRTC_MM .DB 0
SIMRTC_SS .DB 0 SIMRTC_SS .DB 0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SIMRTC .EQU $
SIZ_SIMRTC .EQU END_SIMRTC - ORG_SIMRTC
;
MEMECHO "SIMRTC occupies "
MEMECHO SIZ_SIMRTC
MEMECHO " bytes.\n"

28
Source/HBIOS/sio.asm

@ -113,6 +113,23 @@ SIO1B_DAT .EQU SIO1BASE + $00
; ;
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SIO .EQU $
;
.DW SIZ_SIO ; MODULE SIZE
.DW SIO_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SIO_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,SIO_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SIO_INIT ; DO INIT
RET ; DONE
;
SIO_PREINIT: SIO_PREINIT:
; ;
; SETUP THE DISPATCH TABLE ENTRIES ; SETUP THE DISPATCH TABLE ENTRIES
@ -1320,3 +1337,14 @@ SIO1B_CFG:
#ENDIF #ENDIF
; ;
SIO_CFGCNT .EQU ($ - SIO_CFG) / SIO_CFGSIZ SIO_CFGCNT .EQU ($ - SIO_CFG) / SIO_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SIO .EQU $
SIZ_SIO .EQU END_SIO - ORG_SIO
;
MEMECHO "SIO occupies "
MEMECHO SIZ_SIO
MEMECHO " bytes.\n"

28
Source/HBIOS/sn76489.asm

@ -50,6 +50,23 @@ SN7_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS
SN7_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS SN7_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS
SN7_CHCNT .EQU SN7_TONECNT + SN7_NOISECNT SN7_CHCNT .EQU SN7_TONECNT + SN7_NOISECNT
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SN7 .EQU $
;
.DW SIZ_SN7 ; MODULE SIZE
.DW SN7_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SN7_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,SN76489_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SN76489_INIT ; DO INIT
RET ; DONE
;
#INCLUDE "audio.inc" #INCLUDE "audio.inc"
; ;
; BLINDLY RESET THE PSG AS SOON AS WE CAN AFTER BOOT BECAUSE IT ; BLINDLY RESET THE PSG AS SOON AS WE CAN AFTER BOOT BECAUSE IT
@ -531,3 +548,14 @@ SN7NOTETBL:
.DW SN7RATIO / 5579 ; .DW SN7RATIO / 5579 ;
.DW SN7RATIO / 5661 ; .DW SN7RATIO / 5661 ;
.DW SN7RATIO / 5743 ; .DW SN7RATIO / 5743 ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SN7 .EQU $
SIZ_SN7 .EQU END_SN7 - ORG_SN7
;
MEMECHO "SN7 occupies "
MEMECHO SIZ_SN7
MEMECHO " bytes.\n"

29
Source/HBIOS/spk.asm

@ -11,6 +11,23 @@
; NO VOLUME ADJUSTMENT DUE TO HARDWARE LIMITATION ; NO VOLUME ADJUSTMENT DUE TO HARDWARE LIMITATION
;====================================================================== ;======================================================================
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SP .EQU $
;
.DW SIZ_SP ; MODULE SIZE
.DW SP_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SP_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,SP_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SP_INIT ; DO INIT
RET ; DONE
;
; DRIVER FUNCTION TABLE AND INSTANCE DATA ; DRIVER FUNCTION TABLE AND INSTANCE DATA
; ;
SP_FNTBL: SP_FNTBL:
@ -33,7 +50,7 @@ SP_IDAT .EQU 0 ; NO INSTANCE DATA ASSOCIATED WITH THIS DEVICE
; ;
SP_TONECNT .EQU 1 ; COUNT NUMBER OF TONE CHANNELS SP_TONECNT .EQU 1 ; COUNT NUMBER OF TONE CHANNELS
SP_NOISECNT .EQU 0 ; COUNT NUMBER OF NOISE CHANNELS SP_NOISECNT .EQU 0 ; COUNT NUMBER OF NOISE CHANNELS
;
; FOR OTHER DRIVERS, THE PERIOD VALUE FOR THE TONE IS STORED AT PENDING_PERIOD ; FOR OTHER DRIVERS, THE PERIOD VALUE FOR THE TONE IS STORED AT PENDING_PERIOD
; FOR THE SPK DRIVER THE ADDRESS IN THE TONE TABLE IS STORED IN PENDING_PERIOD ; FOR THE SPK DRIVER THE ADDRESS IN THE TONE TABLE IS STORED IN PENDING_PERIOD
; ;
@ -512,3 +529,13 @@ SP_NOTE_B5:
; ;
SP_NOTCNT .EQU ($-SP_TUNTBL) / 4 SP_NOTCNT .EQU ($-SP_TUNTBL) / 4
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SP .EQU $
SIZ_SP .EQU END_SP - ORG_SP
;
MEMECHO "SP occupies "
MEMECHO SIZ_SP
MEMECHO " bytes.\n"

29
Source/HBIOS/sser.asm

@ -9,6 +9,23 @@
DEVECHO SSERSTATUS DEVECHO SSERSTATUS
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SSER .EQU $
;
.DW SIZ_SSER ; MODULE SIZE
.DW SSER_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SSER_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,SSER_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SSER_INIT ; DO INIT
RET ; DONE
;
; ;
; ;
SSER_PREINIT: SSER_PREINIT:
@ -131,7 +148,6 @@ SSER_DEVICE:
; $FF, WE ASSUME NOT PRESENT. THEN READ PORT A DIFFERENT WAY. IF ; $FF, WE ASSUME NOT PRESENT. THEN READ PORT A DIFFERENT WAY. IF
; PRESENT PORT SHOULD HAVE SAME VALUE. ; PRESENT PORT SHOULD HAVE SAME VALUE.
; ;
;
SSER_DETECT: SSER_DETECT:
IN A,(SSERSTATUS) ; GET DATA PORT VALUE DIRECTLY IN A,(SSERSTATUS) ; GET DATA PORT VALUE DIRECTLY
CP $FF ; CHECK FOR $FF CP $FF ; CHECK FOR $FF
@ -147,3 +163,14 @@ SSER_DETECT1:
; ;
; ;
SSER_PRESENT .DB 0 ; FLAG FOR HARDWARE PRESENT SSER_PRESENT .DB 0 ; FLAG FOR HARDWARE PRESENT
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SSER .EQU $
SIZ_SSER .EQU END_SSER - ORG_SSER
;
MEMECHO "SSER occupies "
MEMECHO SIZ_SSER
MEMECHO " bytes.\n"

7
Source/HBIOS/std.asm

@ -87,6 +87,13 @@ BM_IMGBOOT .EQU 3 ; IMAGE BOOT (DEPRECATED)
START_WARM .EQU 1 ; COLD START START_WARM .EQU 1 ; COLD START
START_COLD .EQU 2 ; WARM START START_COLD .EQU 2 ; WARM START
; ;
; HBIOS INIT PHASE IDS
;
; USE EQUATES, VALUES WILL CHANGE!!!
;
HB_PHASE_PREINIT .EQU 1
HB_PHASE_INIT .EQU 2
;
; MEMORY MANAGERS ; MEMORY MANAGERS
; ;
MM_NONE .EQU 0 MM_NONE .EQU 0

28
Source/HBIOS/syq.asm

@ -192,6 +192,23 @@ SYQ_TONORM .EQU 4 ; NORMAL TIMEOUT IS 1 SEC (1 / .25)
#DEFINE MG014_MAP #DEFINE MG014_MAP
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_SYQ .EQU $
;
.DW SIZ_SYQ ; MODULE SIZE
.DW SYQ_INITPHASE ; ADR OF INIT PHASE HANDLER
;
SYQ_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,SYQ_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,SYQ_INIT ; DO INIT
RET ; DONE
;
;============================================================================= ;=============================================================================
; INITIALIZATION ENTRY POINT ; INITIALIZATION ENTRY POINT
;============================================================================= ;=============================================================================
@ -1486,3 +1503,14 @@ SYQ1_CFG: ; DEVICE 1
#ENDIF #ENDIF
; ;
.DB $FF ; END MARKER .DB $FF ; END MARKER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_SYQ .EQU $
SIZ_SYQ .EQU END_SYQ - ORG_SYQ
;
MEMECHO "SYQ occupies "
MEMECHO SIZ_SYQ
MEMECHO " bytes.\n"

28
Source/HBIOS/term.asm

@ -15,6 +15,23 @@
;====================================================================== ;======================================================================
; ;
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_TERM .EQU $
;
.DW SIZ_TERM ; MODULE SIZE
.DW TERM_INITPHASE ; ADR OF INIT PHASE HANDLER
;
TERM_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,TERM_PREINIT ; DO PREINIT
;CP HB_PHASE_INIT ; INIT PHASE?
;JP Z,TERM_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; TERMINAL DRIVER - PRE-CONSOLE INITIALIZATION ; TERMINAL DRIVER - PRE-CONSOLE INITIALIZATION
;====================================================================== ;======================================================================
@ -134,3 +151,14 @@ TERM_RESET:
RET RET
; ;
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_TERM .EQU $
SIZ_TERM .EQU END_TERM - ORG_TERM
;
MEMECHO "TERM occupies "
MEMECHO SIZ_TERM
MEMECHO " bytes.\n"

28
Source/HBIOS/tms.asm

@ -236,6 +236,23 @@ USBKYBENABLE .SET TRUE ; INCLUDE USB KEYBOARD SUPPORT
#ENDIF #ENDIF
#ENDIF #ENDIF
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_TMS .EQU $
;
.DW SIZ_TMS ; MODULE SIZE
.DW TMS_INITPHASE ; ADR OF INIT PHASE HANDLER
;
TMS_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,TMS_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,TMS_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; TMS DRIVER - INITIALIZATION ; TMS DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -1605,3 +1622,14 @@ TMS_DCNTL .DB $00 ; SAVE Z180 DCNTL AS NEEDED
; F Bright White F ; F Bright White F
;=============================================================================== ;===============================================================================
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_TMS .EQU $
SIZ_TMS .EQU END_TMS - ORG_TMS
;
MEMECHO "TMS occupies "
MEMECHO SIZ_TMS
MEMECHO " bytes.\n"

28
Source/HBIOS/tser.asm

@ -14,6 +14,23 @@ TSER_DATA .EQU $35
DEVECHO TSER_DATA DEVECHO TSER_DATA
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_TSER .EQU $
;
.DW SIZ_TSER ; MODULE SIZE
.DW TSER_INITPHASE ; ADR OF INIT PHASE HANDLER
;
TSER_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,TSER_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,TSER_INIT ; DO INIT
RET ; DONE
;
; ;
; ;
TSER_PREINIT: TSER_PREINIT:
@ -114,3 +131,14 @@ TSER_DEVICE:
LD L,TSER_DATA ; L := BASE I/O ADDRESS LD L,TSER_DATA ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET RET
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_TSER .EQU $
SIZ_TSER .EQU END_TSER - ORG_TSER
;
MEMECHO "TSER occupies "
MEMECHO SIZ_TSER
MEMECHO " bytes.\n"

28
Source/HBIOS/tvga.asm

@ -52,6 +52,23 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
DEVECHO TVGA_KBDDATA DEVECHO TVGA_KBDDATA
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_TVGA .EQU $
;
.DW SIZ_TVGA ; MODULE SIZE
.DW TVGA_INITPHASE ; ADR OF INIT PHASE HANDLER
;
TVGA_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,TVGA_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,TVGA_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; TRION VGA DRIVER - INITIALIZATION ; TRION VGA DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -505,3 +522,14 @@ TVGA_IDAT:
.DB KBDMODE_T35 ; S100 T35 KEYBOARD CONTROLLER .DB KBDMODE_T35 ; S100 T35 KEYBOARD CONTROLLER
.DB TVGA_KBDST .DB TVGA_KBDST
.DB TVGA_KBDDATA .DB TVGA_KBDDATA
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_TVGA .EQU $
SIZ_TVGA .EQU END_TVGA - ORG_TVGA
;
MEMECHO "TVGA occupies "
MEMECHO SIZ_TVGA
MEMECHO " bytes.\n"

29
Source/HBIOS/uart.asm

@ -83,6 +83,24 @@ UART1_IVT .EQU IVT(INT_UART1)
; ;
#DEFINE UART_INP(RID) CALL UART_INP_IMP \ .DB RID #DEFINE UART_INP(RID) CALL UART_INP_IMP \ .DB RID
#DEFINE UART_OUTP(RID) CALL UART_OUTP_IMP \ .DB RID #DEFINE UART_OUTP(RID) CALL UART_OUTP_IMP \ .DB RID
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_UART .EQU $
;
.DW SIZ_UART ; MODULE SIZE
.DW UART_INITPHASE ; ADR OF INIT PHASE HANDLER
;
UART_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,UART_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,UART_INIT ; DO INIT
RET ; DONE
; ;
; ;
; ;
@ -1166,3 +1184,14 @@ UART1_BUF .FILL UART_BUFSZ,0 ; RECEIVE RING BUFFER
#ENDIF #ENDIF
; ;
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_UART .EQU $
SIZ_UART .EQU END_UART - ORG_UART
;
MEMECHO "UART occupies "
MEMECHO SIZ_UART
MEMECHO " bytes.\n"

29
Source/HBIOS/uf.asm

@ -17,6 +17,24 @@ FIFO_DATA .EQU (UFBASE+0) ; READ/WRITE DATA
FIFO_STATUS .EQU (UFBASE+1) ; READ/WRITE STATUS FIFO_STATUS .EQU (UFBASE+1) ; READ/WRITE STATUS
FIFO_SEND_IMM .EQU (UFBASE+2) ; WRITE PORT TO FORCE BUFFER FLUSH FIFO_SEND_IMM .EQU (UFBASE+2) ; WRITE PORT TO FORCE BUFFER FLUSH
FIFO_BUFFER .EQU FALSE ; OPTION TO BUFFER OUTPUT FOR 17ms FIFO_BUFFER .EQU FALSE ; OPTION TO BUFFER OUTPUT FOR 17ms
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_UF .EQU $
;
.DW SIZ_UF ; MODULE SIZE
.DW UF_INITPHASE ; ADR OF INIT PHASE HANDLER
;
UF_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,UF_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,UF_INIT ; DO INIT
RET ; DONE
; ;
UF_USB_ACTIVE .DB 0 ; USB CABLE CONNECTED STATUS FLAG UF_USB_ACTIVE .DB 0 ; USB CABLE CONNECTED STATUS FLAG
; ;
@ -187,3 +205,14 @@ UF_FNTBL:
.ECHO "*** INVALID USB-FIFO FUNCTION TABLE ***\n" .ECHO "*** INVALID USB-FIFO FUNCTION TABLE ***\n"
#ENDIF #ENDIF
; ;
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_UF .EQU $
SIZ_UF .EQU END_UF - ORG_UF
;
MEMECHO "UF occupies "
MEMECHO SIZ_UF
MEMECHO " bytes.\n"

28
Source/HBIOS/vdu.asm

@ -89,6 +89,23 @@ VDU_R11 .EQU DSCANL-1
DEVECHO VDU_PPIA DEVECHO VDU_PPIA
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_VDU .EQU $
;
.DW SIZ_VDU ; MODULE SIZE
.DW VDU_INITPHASE ; ADR OF INIT PHASE HANDLER
;
VDU_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,VDU_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,VDU_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; VDU DRIVER - INITIALIZATION ; VDU DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -738,3 +755,14 @@ VDU_IDAT:
.DB VDU_PPIB .DB VDU_PPIB
.DB VDU_PPIC .DB VDU_PPIC
.DB VDU_PPIX .DB VDU_PPIX
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_VDU .EQU $
SIZ_VDU .EQU END_VDU - ORG_VDU
;
MEMECHO "VDU occupies "
MEMECHO SIZ_VDU
MEMECHO " bytes.\n"

28
Source/HBIOS/vga.asm

@ -104,6 +104,23 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
; SCREEN 2 ROW DEFINES WHERE BUFFER BYTE 0 WILL BE DISPLAYED (R18) ; SCREEN 2 ROW DEFINES WHERE BUFFER BYTE 0 WILL BE DISPLAYED (R18)
; SCREEN 2 RAM ADDRESS IS ALWAYS ZERO (R19/R20) ; SCREEN 2 RAM ADDRESS IS ALWAYS ZERO (R19/R20)
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_VGA .EQU $
;
.DW SIZ_VGA ; MODULE SIZE
.DW VGA_INITPHASE ; ADR OF INIT PHASE HANDLER
;
VGA_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,VGA_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,VGA_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; VGA DRIVER - INITIALIZATION ; VGA DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -1046,3 +1063,14 @@ VGA_IDAT:
.DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER .DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER
.DB VGA_KBDST .DB VGA_KBDST
.DB VGA_KBDDATA .DB VGA_KBDDATA
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_VGA .EQU $
SIZ_VGA .EQU END_VGA - ORG_VGA
;
MEMECHO "VGA occupies "
MEMECHO SIZ_VGA
MEMECHO " bytes.\n"

28
Source/HBIOS/vrc.asm

@ -39,6 +39,23 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
DEVECHO VRC_KBDDATA DEVECHO VRC_KBDDATA
DEVECHO "\n" DEVECHO "\n"
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_VRC .EQU $
;
.DW SIZ_VRC ; MODULE SIZE
.DW VRC_INITPHASE ; ADR OF INIT PHASE HANDLER
;
VRC_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,VRC_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,VRC_INIT ; DO INIT
RET ; DONE
;
;====================================================================== ;======================================================================
; VRC DRIVER - INITIALIZATION ; VRC DRIVER - INITIALIZATION
;====================================================================== ;======================================================================
@ -636,3 +653,14 @@ VRC_IDAT:
.DB KBDMODE_VRC ; VGARC KEYBOARD CONTROLLER .DB KBDMODE_VRC ; VGARC KEYBOARD CONTROLLER
.DB VRC_KBDST .DB VRC_KBDST
.DB VRC_KBDDATA .DB VRC_KBDDATA
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_VRC .EQU $
SIZ_VRC .EQU END_VRC - ORG_VRC
;
MEMECHO "VRC occupies "
MEMECHO SIZ_VRC
MEMECHO " bytes.\n"

28
Source/HBIOS/xosera.asm

@ -131,6 +131,23 @@ TILE_CTRL_DISP_TILEMEM_F .EQU $0200
SYNC_RETRIES .EQU 250 SYNC_RETRIES .EQU 250
TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_XOS .EQU $
;
.DW SIZ_XOS ; MODULE SIZE
.DW XOS_INITPHASE ; ADR OF INIT PHASE HANDLER
;
XOS_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,XOS_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,XOS_INIT ; DO INIT
RET ; DONE
;====================================================================== ;======================================================================
; XOSERA DRIVER - INITIALIZATION ; XOSERA DRIVER - INITIALIZATION
@ -1048,3 +1065,14 @@ XOS_IDAT2:
.DB KBDMODE_NONE .DB KBDMODE_NONE
.DB 0 .DB 0
.DB 0 .DB 0
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_XOS .EQU $
SIZ_XOS .EQU END_XOS - ORG_XOS
;
MEMECHO "XOS occupies "
MEMECHO SIZ_XOS
MEMECHO " bytes.\n"

29
Source/HBIOS/ym2612.asm

@ -22,6 +22,24 @@ YMDAT .EQU VGMBASE+01H ; Primary YM2162 11000001 a1=0 a0=1
YM2SEL .EQU VGMBASE+02H ; Secondary YM2162 11000010 a1=1 a0=0 YM2SEL .EQU VGMBASE+02H ; Secondary YM2162 11000010 a1=1 a0=0
YM2DAT .EQU VGMBASE+03H ; Secondary YM2162 11000011 a1=1 a0=1 YM2DAT .EQU VGMBASE+03H ; Secondary YM2162 11000011 a1=1 a0=1
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_YM .EQU $
;
.DW SIZ_YM ; MODULE SIZE
.DW YM_INITPHASE ; ADR OF INIT PHASE HANDLER
;
YM_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
;CP HB_PHASE_PREINIT ; PREINIT PHASE?
;JP Z,YM2612_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,YM2612_INIT ; DO INIT
RET ; DONE
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; Device capabilities and configuration ; Device capabilities and configuration
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
@ -890,3 +908,14 @@ ym_cfg: .db part0, 24/2
; ;
.db $00 ; End flag .db $00 ; End flag
#ENDIF #ENDIF
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_YM .EQU $
SIZ_YM .EQU END_YM - ORG_YM
;
MEMECHO "YM occupies "
MEMECHO SIZ_YM
MEMECHO " bytes.\n"

28
Source/HBIOS/z2u.asm

@ -67,6 +67,23 @@ Z2U_BUFSZ .EQU 144 ; RECEIVE RING BUFFER SIZE
Z2U_NONE .EQU 0 ; NOT PRESENT Z2U_NONE .EQU 0 ; NOT PRESENT
Z2U_PRESENT .EQU 1 ; PRESENT Z2U_PRESENT .EQU 1 ; PRESENT
; ;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_Z2U .EQU $
;
.DW SIZ_Z2U ; MODULE SIZE
.DW Z2U_INITPHASE ; ADR OF INIT PHASE HANDLER
;
Z2U_INITPHASE:
; INIT PHASE HANDLER, A=PHASE
CP HB_PHASE_PREINIT ; PREINIT PHASE?
JP Z,Z2U_PREINIT ; DO PREINIT
CP HB_PHASE_INIT ; INIT PHASE?
JP Z,Z2U_INIT ; DO INIT
RET ; DONE
;
; ;
; ;
Z2U_PREINIT: Z2U_PREINIT:
@ -725,3 +742,14 @@ Z2U0_CFG:
Z2U_CFGSIZ .EQU $ - Z2U_CFG ; SIZE OF ONE CFG TABLE ENTRY Z2U_CFGSIZ .EQU $ - Z2U_CFG ; SIZE OF ONE CFG TABLE ENTRY
; ;
Z2U_CFGCNT .EQU ($ - Z2U_CFG) / Z2U_CFGSIZ Z2U_CFGCNT .EQU ($ - Z2U_CFG) / Z2U_CFGSIZ
;
;--------------------------------------------------------------------------------------------------
; HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_Z2U .EQU $
SIZ_Z2U .EQU END_Z2U - ORG_Z2U
;
MEMECHO "Z2U occupies "
MEMECHO SIZ_Z2U
MEMECHO " bytes.\n"

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 6 #DEFINE RMN 6
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.6.0-dev.48"
#DEFINE BIOSVER "3.6.0-dev.49"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 6
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.6.0-dev.48"
db "3.6.0-dev.49"
endm endm

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