Minor Cleanup for N8PC

Just some minor cleanup for consistency.  No functional changes.

Doc/ChangeLog.txt

@@ -1,5 +1,3 @@
-
-- DDW: Added support for the 'N8PC' platform. Includes support for the M6242 RTC chip.
 Version 3.6
 -----------
 - RDG: Added VDA driver for Xosera FPGA-based VDC
@@ -36,6 +34,7 @@ Version 3.6
 - HJB: Added IDE driver master media detect option
 - WBW: Add support for S100 Serial I/O DLP Serial connection
 - P?D: Generate compressed ROM for EaZyZ80 512
+- DDW: Added support for the 'N8PC' platform. Includes support for the M6242 RTC chip.
 
 Version 3.5.1
 -------------

ReadMe.md

@@ -7,7 +7,7 @@
 **RomWBW Introduction** \
 Version 3.6 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-25 Nov 2025
+29 Nov 2025
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW Introduction
 Wayne Warthen (wwarthen@gmail.com)
-25 Nov 2025
+29 Nov 2025
 
 
 

Source/Doc/Hardware.md

@@ -69,6 +69,7 @@ Andrew Lynch
 | [Nhyodyne Z80 MBC]                                          | MBC     | MBC_std.rom                  | 38400         |
 | [Rhyophyre Z180 SBC]                                        | -       | RPH_std.rom                  | 38400         |
 | [N8 Z180 SBC] (date >= 2312)                                | ECB     | N8_std.rom                   | 38400         |
+| [N8 PC]                                                     | ECB     | N8PC_std.rom                 | 38400         |
 
 Bill Shen
 
@@ -929,6 +930,45 @@ This configuration is for the N8-2312 and latter (4314) revisions
 
 `\clearpage`{=latex}
 
+## N8 PC
+
+This is a variant of the N8 computer.
+
+* Creator: Dan Werner
+
+#### ROM Image File:  N8PC_std.rom
+
+|                   |               |
+|-------------------|---------------|
+| Bus               | ECB           |
+| Default CPU Speed | 9.216 MHz     |
+| Interrupts        | Mode 2        |
+| System Timer      | Z180          |
+| Serial Default    | 38400 Baud    |
+| Memory Manager    | N8            |
+| ROM Size          | 512 KB        |
+| RAM Size          | 512 KB        |
+
+#### Supported Hardware
+
+- PKD: IO=132, SIZE=8X1
+- M6242RTC: IO=160
+- ASCI: IO=64, INTERRUPTS ENABLED
+- ASCI: IO=65, INTERRUPTS ENABLED
+- TMS: MODE=N8PC, IO=152, SCREEN=80X24, KEYBOARD=KBD
+- KBD: ENABLED
+- MD: TYPE=RAM
+- MD: TYPE=ROM
+- FD: MODE=N8, IO=140, DRIVE 0, TYPE=3.5" HD
+- FD: MODE=N8, IO=140, DRIVE 1, TYPE=3.5" HD
+- PPIDE: MODE=STD, IO=132, MASTER
+- PPIDE: MODE=STD, IO=132, SLAVE
+- AY38910: MODE=N8, IO=156, CLOCK=3579545 HZ
+
+#### Notes:
+
+`\clearpage`{=latex}
+
 ## RCBus Z80
 
 ### RCBus Z80 CPU Module
@@ -2494,6 +2534,7 @@ Note:
 | SIMRTC    | SIMH Simulator Real-Time Clock                         |
 | MMRTC     | NS MM58167B Real-Time Clock (no NVRAM)                 |
 | DS12RTC   | Dallas Semiconductor DS1288x Real-Time Clock w/ NVRAM  |
+| M6242     | MSM6242 Real-Time Clock (no NVRAM)                     |
 
 ## DsKy (DiSplay KeYpad)
 

Source/HBIOS/Config/ZETA2_std.asm

@@ -56,7 +56,7 @@ INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC|N8PC]
+FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;

Source/HBIOS/cfg_DUO.asm

@@ -169,10 +169,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_DYNO.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_EPITX.asm

@@ -164,10 +164,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_EZZ80.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_GMZ180.asm

@@ -163,10 +163,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_HEATH.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_MASTER.asm

@@ -204,12 +204,15 @@ DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.EQU	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.EQU	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+PCRTC_BASE	.EQU	$C0		; Default port for PCRTC, like DSRTC.
+;
 MMRTCENABLE	.EQU	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.EQU	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
-PCRTCENABLE	.EQU	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
-PCRTC_BASE	.EQU	$C0		; Default port for PCRTC, like DSRTC.
+M6242RTCENABLE	.EQU	TRUE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+M6242RTC_BASE	.EQU	$A0		; M6242RTC: I/O BASE ADDRESS
 ;
 SSERENABLE	.EQU	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.EQU	SER_9600_8N1	; SSER: SERIAL LINE CONFIG

Source/HBIOS/cfg_MBC.asm

@@ -162,10 +162,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_MK4.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_MON.asm

@@ -165,10 +165,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_MSX.asm

@@ -171,10 +171,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_N8.asm

@@ -168,12 +168,16 @@ SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
 DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
 DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
-DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
 ;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
+DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_N8PC.asm

@@ -168,6 +168,8 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)

Source/HBIOS/cfg_NABU.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_RCEZ80.asm

@@ -166,10 +166,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_RCZ180.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_RCZ280.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_RCZ80.asm

@@ -171,10 +171,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_RPH.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_SBC.asm

@@ -163,10 +163,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_SCZ180.asm

@@ -168,10 +168,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_SZ180.asm

@@ -165,10 +165,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 ;
 PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)

Source/HBIOS/cfg_SZ80.asm

@@ -158,11 +158,13 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
-MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 ;

Source/HBIOS/cfg_Z80RETRO.asm

@@ -166,10 +166,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_ZETA.asm

@@ -155,10 +155,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/cfg_ZETA2.asm

@@ -166,10 +166,14 @@ DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT

Source/HBIOS/hbios.asm

@@ -8955,11 +8955,11 @@ SIZ_INTRTC	.EQU	$ - ORG_INTRTC
 ;
 #IF (M6242RTCENABLE)
 ORG_M6242RTC	.EQU	$
-  #INCLUDE "m6242.asm"
+  #INCLUDE "m6242rtc.asm"
 SIZ_M6242RTC	.EQU	$ - ORG_M6242RTC
-		.ECHO	"M6242 occupies "
-		.ECHO	SIZ_M6242RTC
-		.ECHO	" bytes.\n"
+		MEMECHO	"M6242RTC occupies "
+		MEMECHO	SIZ_M6242RTC
+		MEMECHO	" bytes.\n"
 #ENDIF
 ;
 #IF (SSERENABLE)

Source/HBIOS/hbios.inc

@@ -438,10 +438,10 @@ RTCDEV_DS7	.EQU	$04		; DS1307 (I2C)
 RTCDEV_RP5	.EQU	$05		; RP5C01
 RTCDEV_DS5	.EQU	$06		; DS1305 (SPI)
 RTCDEV_EZ80	.EQU	$07		; EZ80 ON-CHIP RTC
-RTCDEV_PC	.EQU	$08		; PC style parallel RTC
+RTCDEV_PC	.EQU	$08		; PC STYLE PARALLEL RTC
 RTCDEV_MM	.EQU	$09		; NS MM58167B RTC (NO NVRAM)
 RTCDEV_DS12	.EQU	$0A		; DS1288X
-RTCDEV_M6242	.EQU	$0B		; DS1288X
+RTCDEV_M6242	.EQU	$0B		; OKI MSM6242 RTC (NO NVRAM)
 ;
 ; DSKY DEVICE IDS
 ;

Source/HBIOS/m6242.asm → Source/HBIOS/m6242rtc.asm

@@ -20,26 +20,26 @@ M6242RTC_BUFSIZ	.EQU	6	; SIX BYTE BUFFER (YYMMDDHHMMSS)
 ; a:filedate
 
 
-REG_1SEC	.EQU	$00
-REG_10SEC	.EQU	$01
-REG_1MIN	.EQU	$02
-REG_10MIN	.EQU	$03
-REG_1HR		.EQU	$04
-REG_10HR	.EQU	$05
-REG_1DAY	.EQU	$06
-REG_10DAY	.EQU	$07
-REG_1MNTH	.EQU	$08
-REG_10MNTH	.EQU	$09
-REG_1YEAR	.EQU	$0A
-REG_10YEAR	.EQU	$0B
-REG_DAYWEEK	.EQU	$0C		; NOT USED BY THIS DRIVER
-REG_CONTROL1	.EQU	$0D
-REG_CONTROL2	.EQU	$0E
-REG_CONTROL3	.EQU	$0F
+M6242RTC_REG_1SEC	.EQU	$00
+M6242RTC_REG_10SEC	.EQU	$01
+M6242RTC_REG_1MIN	.EQU	$02
+M6242RTC_REG_10MIN	.EQU	$03
+M6242RTC_REG_1HR	.EQU	$04
+M6242RTC_REG_10HR	.EQU	$05
+M6242RTC_REG_1DAY	.EQU	$06
+M6242RTC_REG_10DAY	.EQU	$07
+M6242RTC_REG_1MNTH	.EQU	$08
+M6242RTC_REG_10MNTH	.EQU	$09
+M6242RTC_REG_1YEAR	.EQU	$0A
+M6242RTC_REG_10YEAR	.EQU	$0B
+M6242RTC_REG_DAYWEEK	.EQU	$0C		; NOT USED BY THIS DRIVER
+M6242RTC_REG_CONTROL1	.EQU	$0D
+M6242RTC_REG_CONTROL2	.EQU	$0E
+M6242RTC_REG_CONTROL3	.EQU	$0F
 
-		.ECHO	"M6242: IO="
-		.ECHO	M6242RTC_BASE
-		.ECHO	"\n"
+		DEVECHO	"M6242RTC: IO="
+		DEVECHO	M6242RTC_BASE
+		DEVECHO	"\n"
 
 M6242RTC_INIT:
 	LD	A, (RTC_DISPACT)	; RTC DISPATCHER ALREADY SET?
@@ -65,15 +65,15 @@ M6242RTC_INIT:
 M6242RTC_INIT1:
 ;	ENSURE DEVICE IS RESET AND NOT IN TEST MODE
 	LD	A, 05h  		; TURN OFF ALL TEST MODE BITS, SET 24 HOUR
-	OUT	(REG_CONTROL3 + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_CONTROL3 + M6242RTC_BASE), A
 	LD	A, 05h  		; TURN OFF ALL TEST MODE BITS, SET 24 HOUR
-	OUT	(REG_CONTROL3 + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_CONTROL3 + M6242RTC_BASE), A
 	LD	A, 04h  		; TURN OFF ALL TEST MODE BITS, SET 24 HOUR
-	OUT	(REG_CONTROL3 + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_CONTROL3 + M6242RTC_BASE), A
 
 	LD	A, 00h  		; LET CLOCK RUN
-	OUT	(REG_CONTROL1 + M6242RTC_BASE), A
-        OUT	(REG_CONTROL2 + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_CONTROL1 + M6242RTC_BASE), A
+        OUT	(M6242RTC_REG_CONTROL2 + M6242RTC_BASE), A
 
 	; DISPLAY CURRENT TIME
 	LD	HL, M6242RTC_BCDBUF	; POINT TO BCD BUF
@@ -90,18 +90,18 @@ M6242RTC_INIT1:
 ;
 M6242RTC_DETECT:
 	LD	A, 01h  		; TURN ON REST BIT
-	OUT	(REG_CONTROL3 + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_CONTROL3 + M6242RTC_BASE), A
 	CALL	DLY64
 	CALL	DLY64
-	IN	A,(REG_CONTROL3 + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_CONTROL3 + M6242RTC_BASE)
 	AND 	01h
 	CP 	01h
 	JR	NZ, M6242RTC_DETECTERR	; IF NOT MATCH, ERROR
 	LD	A, 00h  		; TURN OFF REST BIT
-	OUT	(REG_CONTROL3 + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_CONTROL3 + M6242RTC_BASE), A
 	CALL	DLY64
 	CALL	DLY64
-	IN	A,(REG_CONTROL3 + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_CONTROL3 + M6242RTC_BASE)
 	AND 	01h
 	CP 	00h
 	JR	NZ, M6242RTC_DETECTERR	; IF NOT MATCH, ERROR
@@ -165,73 +165,73 @@ M6242RTC_SETALM:
 M6242RTC_GETTIM:
 	PUSH	HL
 	PUSH	BC
-	IN	A,(REG_10YEAR + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_10YEAR + M6242RTC_BASE)
 	RLA
 	RLA
 	RLA
 	RLA
 	LD 	C,A
-	IN 	A,(REG_1YEAR + M6242RTC_BASE)
+	IN 	A,(M6242RTC_REG_1YEAR + M6242RTC_BASE)
 	AND 	0FH
 	OR 	C
 	LD 	(HL),A
 	INC 	HL
 
-	IN	A,(REG_10MNTH + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_10MNTH + M6242RTC_BASE)
 	RLA
 	RLA
 	RLA
 	RLA
 	LD 	C,A
-	IN 	A,(REG_1MNTH + M6242RTC_BASE)
+	IN 	A,(M6242RTC_REG_1MNTH + M6242RTC_BASE)
 	AND 	0FH
 	OR 	C
 	LD 	(HL),A
 	INC 	HL
 
-	IN	A,(REG_10DAY + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_10DAY + M6242RTC_BASE)
 	RLA
 	RLA
 	RLA
 	RLA
 	LD 	C,A
-	IN 	A,(REG_1DAY + M6242RTC_BASE)
+	IN 	A,(M6242RTC_REG_1DAY + M6242RTC_BASE)
 	AND 	0FH
 	OR 	C
 	LD 	(HL),A
 	INC 	HL
 
-	IN	A,(REG_10HR + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_10HR + M6242RTC_BASE)
 	RLA
 	RLA
 	RLA
 	RLA
 	LD 	C,A
-	IN 	A,(REG_1HR + M6242RTC_BASE)
+	IN 	A,(M6242RTC_REG_1HR + M6242RTC_BASE)
 	AND 	0FH
 	OR 	C
 	LD 	(HL),A
 	INC 	HL
 
-	IN	A,(REG_10MIN + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_10MIN + M6242RTC_BASE)
 	RLA
 	RLA
 	RLA
 	RLA
 	LD 	C,A
-	IN 	A,(REG_1MIN + M6242RTC_BASE)
+	IN 	A,(M6242RTC_REG_1MIN + M6242RTC_BASE)
 	AND 	0FH
 	OR 	C
 	LD 	(HL),A
 	INC 	HL
 
-	IN	A,(REG_10SEC + M6242RTC_BASE)
+	IN	A,(M6242RTC_REG_10SEC + M6242RTC_BASE)
 	RLA
 	RLA
 	RLA
 	RLA
 	LD 	C,A
-	IN 	A,(REG_1SEC + M6242RTC_BASE)
+	IN 	A,(M6242RTC_REG_1SEC + M6242RTC_BASE)
 	AND 	0FH
 	OR 	C
 	LD 	(HL),A
@@ -252,57 +252,57 @@ M6242RTC_GETTIM:
 M6242RTC_SETTIM:
 	PUSH 	HL
 	LD	A, (HL)
-	OUT	(REG_1YEAR + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_1YEAR + M6242RTC_BASE), A
     	RRA
     	RRA
     	RRA
     	RRA
-	OUT	(REG_10YEAR + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_10YEAR + M6242RTC_BASE), A
 
 	INC 	HL
 	LD	A, (HL)
-	OUT	(REG_1MNTH + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_1MNTH + M6242RTC_BASE), A
     	RRA
     	RRA
     	RRA
     	RRA
-	OUT	(REG_10MNTH + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_10MNTH + M6242RTC_BASE), A
 
 	INC 	HL
 	LD	A, (HL)
-	OUT	(REG_1DAY+ M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_1DAY+ M6242RTC_BASE), A
     	RRA
     	RRA
     	RRA
     	RRA
-	OUT	(REG_10DAY + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_10DAY + M6242RTC_BASE), A
 
 	INC 	HL
 	LD	A, (HL)
-	OUT	(REG_1HR + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_1HR + M6242RTC_BASE), A
     	RRA
     	RRA
     	RRA
     	RRA
-	OUT	(REG_10HR + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_10HR + M6242RTC_BASE), A
 
 	INC 	HL
 	LD	A, (HL)
-	OUT	(REG_1MIN + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_1MIN + M6242RTC_BASE), A
     	RRA
     	RRA
     	RRA
     	RRA
-	OUT	(REG_10MIN + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_10MIN + M6242RTC_BASE), A
 
 	INC 	HL
 	LD	A, (HL)
-	OUT	(REG_1SEC + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_1SEC + M6242RTC_BASE), A
     	RRA
     	RRA
     	RRA
     	RRA
-	OUT	(REG_10SEC + M6242RTC_BASE), A
+	OUT	(M6242RTC_REG_10SEC + M6242RTC_BASE), A
 	POP 	HL
 	XOR	A			; SIGNAL SUCCESS
 	RET				; AND RETURN

Source/HBIOS/std.asm

@@ -29,7 +29,6 @@
 ; 25. MSX	MSX Computers
 ; 26. N8PC	MSX-ish Z180 ATX SBC w/ onboard video and sound
 ;
-;
 ; INCLUDE BUILD VERSION
 ;
 #INCLUDE "../ver.inc"			; ADD BIOSVER