Commit Graph

6 Commits

Author SHA1 Message Date
Wayne Warthen
60c4f58fb4 SCC Tweaks for Interrupt Mode 2 2026-01-16 13:56:17 -08:00
Wayne Warthen
68dc9dc872 Fix and Improve SCC Chip Detection
- Adopted the chip detection logic in the thread <https://groups.google.com/g/retro-comp/c/imNsPBJO45s/m/mbpfnQDNAwAJ?utm_medium=email&utm_source=footer>
2026-01-16 08:17:22 -08:00
Wayne Warthen
7ee3601241 Tweaks to SIO and SCC Drivers
Minor improvements to hardware detection.
2026-01-14 16:27:10 -08:00
Wayne Warthen
1e5e4eeb6b Support SCC on RCBus
- Updated SCC driver and RCZ80 config
- Completed and tested IM1 support
- IM2 should work, but needs to be tested
- Not enabled by default
2026-01-13 17:50:19 -08:00
Wayne Warthen
e488aec54d Driver Init Processing Refactor
- Driver INIT call lists remvoed
- Added driver init phase dispatching
2026-01-07 14:43:45 -08:00
Wayne Warthen
d0ac04045a Preliminary Zilog SCC Support
- Interrupts and flow control not yet implemented.
2025-10-29 13:40:24 -07:00