Use a global flag to indicate if interrupts have been enabled during the boot process. Drivers that operate in the pre-interrupt phase can use this to manage interrupt disable bracketing.
This allows restoring the location of interrupt enable in the boot process to it's proper location.
The RC2014 Single and Dual UART Modules do not have the /RTS line connected. The /DTR line is used to signal flow control.
This PR simply adds active management of the /DTR.
The current UART initialisation process already does configuration, but not active management.
- UNARC updated to UNARCU11 which fixes an edge case where the user number was being incorrectly changed. See #496. Thanks and credit to Lars Nelson for this.
- Implement Interrupt Mode 2 (Mode 1 is still default)
- Implement interrupt driven keyboard support
- Improve UART keyboard driver to support interrupt driven flow control
- Rearranged HBIOS code to improve colocation of related code.
- Implemented macros to improve control over assembly diagnostic output.
- Improved handling of diagnostic LEDs.
- Improved application boot bank management.
- Implemented application boot for Z280 systems.
- Moved Z280_BNKSEL into proxy.
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Make the first UART port detected be Channel A $78-$7F : CHSEL=1. ( logic 0 on the CHSEL selects the UART channel B while a logic 1 selects UART channel A. )
- Update PR template for new branching under v3.4
- Tweak Makefile.inc for slightly improved performance
- Improve UART driver messaging when bad CTS signal is detected
- Added support for Duodyne Multi-IO board
- Added support for Duodyne Zilog-IO board
- Added SUPCTS equate in hbios.asm to allow selectively adding code to suppress use of CTS during HBIOS boot
- Added reference in User Guide to Bruce Hall's Assembly Language Programming document
- Detect CTS at startup to ensure it is asserted. If not, disable hardware flow control to avoid stalling the console at boot. Only for UART driver because this is the only place it is currently relevant.
- Update MFPIC related I/O ports from $4x to $1x. The default base address was changed to avoid conflicting with the default I/O range of $40-$7F on ECB Z180 boards.
- Some newer/multi-port UART chips now use MCR:3 to activate the interrupt pin(s), otherwise tri-state. This update sets MCR:3 in all cases.
- Added UARTDUAL config variable that enables detection of a dual UART chip at 0x80 for MBC platform.
- Fixed a typo in TastyBasic Build script.
- Added TMSMODE_RCKBD to support an 8242 keyboard combined with TMS video.
- Worked around a syntax issue from uz80as in rz.asm.
- Improved mechanism to handle forcing a UART detection for SIMH.
- Fixed issue recently introduced that kept AFC from being enabled for '650 and '850 chips.
- Increase receive interrupt threshold to 8 which improves interrupt handler efficiency under stress. Credit to Andrew Lynch.
- The UART driver has been enhanced to allow use of interrupt driven receive buffer and RTS flow control. It will only be used if enabled and the chip detected has no auto-flow control capability.
- Updates DEVICE call for all CIO devices to return unit mode and I/O base address
- Improved experimental XModem (XMX.COM) that uses direct hardware I/O for UART and USB-FIFO devices
Fixed some stuff in 16C2552 support
- Concurrent write was being enabled unintentionally
- Swapped the EPDSER UART base ports to match the boards annotations
