Wayne Warthen
6a46f8b74c
Z280 UART Flow Control
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- Implement RTS flow control on Z280 UART using C/T 2 output pin. Must be supported on PCB and wired properly at serial adapter.
2021-02-21 13:18:57 -08:00
Wayne Warthen
a1a25465da
Bug Fixes
2021-02-20 16:49:36 -08:00
Wayne Warthen
9da58082a7
Z280 Cleanup
2021-02-19 15:47:33 -08:00
Wayne Warthen
f20addf39d
Support ZZ80MB
2021-02-18 17:29:08 -08:00
Wayne Warthen
8e7e9039f9
Additional SK Z80-512K Support
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- Added support for UART clock divider (CLK2).
2021-02-11 14:28:26 -08:00
Wayne Warthen
4791d5f040
Perliminary support for Sergey's Z80-512K
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- Watchdog functionality will be enabled if a system timer is operational.
- LED indicates boot progress and thereafter disk I/O.
2021-02-10 15:47:23 -08:00
Wayne Warthen
7956074746
Miscellaneous
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- Fix minor ACIA bug that only occurs if setting a non-standard baud rate.
- Enhance Z280 UART driver to use C/T for more baud rates and to use Z280 opcodes to speed up interrupt handler a bit.
2021-02-04 13:35:21 -08:00
Wayne Warthen
8945580ff5
Z280 Cleanup
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- Z280 UART MODE command support
- BNKCALL handles calls into HBIOS using system mode
2021-01-30 16:17:34 -08:00
Wayne Warthen
fe14a4b2a8
Z280 UART in all interrupt modes
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By using polling mode, the Z280 UART can be utilized in interrupts modes 0/1/2.
2021-01-28 10:39:57 -08:00
Wayne Warthen
2d12da4903
Z280 Internal UART Support
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Z280 UART can only be used w/ native memory & interrupt mode 3.
2021-01-27 19:33:37 -08:00
b1ackmai1er
fd5dd15506
Update config files
2020-12-15 18:17:57 +08:00
Wayne Warthen
69b2293201
Build Tweaks
2020-09-25 17:24:46 -07:00
Wayne Warthen
5919a796a7
Tiny Z80 Support
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Propagated Sergey's Tiny Z80 support into dev branch.
2020-08-20 13:45:31 -07:00
Wayne Warthen
339c6620a2
ZRC support courtesy Bill Shen
2020-07-03 15:29:10 -07:00
Wayne Warthen
fbfd1e6cb9
Fix Bugs
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- Initial Z280 work caused some regression.
2020-06-07 12:40:30 -07:00
Wayne Warthen
8ef4456323
Multiple
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- Complete initial support for Karl's Z280 module w/ 512K RAM/ROM module
- Allow swapping Z180 serial ports via ASCISWAP config variable
- Fix Z180 include file per Issue #141 from J.B. Lang
2020-06-06 15:13:48 -07:00
Wayne Warthen
e9b9092e7d
Fix CTC divisor derivation
2020-06-03 10:13:23 -07:00
Wayne Warthen
3eac8d164c
Cleanup
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- Minor build script cleanup for DUART driver
2020-05-22 15:40:36 -07:00
Wayne Warthen
0cfb30459a
Minor Cleanup
2020-05-21 11:34:06 -07:00
Dean Netherton
5e65fcba13
AY38910: Refactored to use a common function for note mapping as SN76489 driver
2020-05-10 14:04:18 +10:00
Dean Netherton
7330928dca
SN76489: Moved clock configuration from driver to platform config files
2020-05-10 14:02:59 +10:00
b1ackmai1er
cea46daba9
replace ay driver with ay38910
2020-05-03 21:59:45 +08:00
Wayne Warthen
1a8cfb91e7
Changes from Dean Netherton
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- Allow immediate autoboot (no timeout)
- Allow configuring number of floppy devices
2020-05-02 14:58:07 -07:00
b1ackmai1er
a62d69c1c4
fixup platform builds and restore tune default behaviour
2020-05-02 12:47:06 +08:00
Wayne Warthen
e50f5f0935
Add support for EPFDC
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Credit to Alan Cox for the changes.
2020-04-29 17:45:04 -07:00
Dean Netherton
ff2ebbb09f
TMS: Enable support for using VSYNC interrupt
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Use the VSYNC interrupt to trigger the sys timer event
2020-04-25 17:11:32 +10:00
Wayne Warthen
dc2f55570c
Make tick frequency configurable
2020-04-23 17:28:18 -07:00
Wayne Warthen
d14cf27acf
Miscellaneous Cleanup
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No functional changes.
2020-04-22 11:26:32 -07:00
Dean Netherton
890f9262e0
HBIOS: Added support for sound drivers
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New sound driver support with initial support for the SN76489 chip
New build configuration entry:
* SN76489ENABLE
Ports are currently locked in with:
* SN76489_PORT_LEFT .EQU $FC ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
* SN76489_PORT_RIGHT .EQU $F8 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
2020-04-22 21:12:52 +10:00
Wayne Warthen
f57e3bed00
Enhance CTC periodic timer
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Add ability to use TIMER mode in CTC driver to generate priodic interrupts.
2020-04-21 12:46:31 -07:00
Wayne Warthen
57f78d1a6b
CTC driver fine tuning
2020-04-17 15:53:17 -07:00
Wayne Warthen
8ad2bdbb29
SIO driver now CTC aware
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The SIO driver can now use a CTC (if available) to provide much more flexible baud rate programming.
2020-04-17 11:25:28 -07:00
Wayne Warthen
257f784318
Improved clock driver auto-detect/fallback
2020-04-12 14:54:30 -07:00
Wayne Warthen
f4daaa91a4
Add RC2014 UART, Improve SD protocol fix
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- RC2014 and related platforms will autodetect a UART at 0xA0 and 0xA8
- Ensure that CS fully brackets all SD I/O
2020-04-09 11:49:09 -07:00
Wayne Warthen
621175533b
Start v3.1 Development
2020-04-06 12:54:23 -07:00
Phillip Stevens
6726f1be88
cfg - mutex consistent config language
2020-03-27 10:04:25 +11:00
Wayne Warthen
47774eacab
Config File Tuning
2020-03-26 15:32:26 -07:00
Wayne Warthen
dfd70b8d63
Cleanup
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Removed hack from Images Makefile. Fixed use of DEFSERCFG in various places.
2020-03-13 10:45:33 -07:00
Wayne Warthen
1831141abd
Finalize Pre-release 34
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Final support for FreeRTOS
2020-03-05 12:54:22 -08:00
Wayne Warthen
382b5594f0
Support multiple devices in IDE driver
2020-02-11 17:01:55 -08:00
Wayne Warthen
15d607d686
Further PPIDE updates
2020-02-07 11:47:16 -08:00
b1ackmai1er
5df54bc6fd
PPIDE updates
2020-02-06 04:06:44 +08:00
b1ackmai1er
7a4d42ba93
rf config updates
2020-02-03 14:09:39 +08:00
Wayne Warthen
14e48f24b5
Cosmetic Cleanup
2020-01-29 15:17:15 -08:00
b1ackmai1er
be45e63e90
minors
2020-01-10 11:40:56 +08:00
b1ackmai1er
4b7f570947
Minors
2020-01-09 23:18:18 +08:00
b1ackmai1er
276de14ff6
Add 80x30 screen format to VGA3 driver
2020-01-09 23:06:01 +08:00
Wayne Warthen
3c8cd5219e
Preliminary support for Dyno Computer
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Dyno Computer is the work of Steve Garcia and much of the code checked in is based on his work.
2020-01-05 15:26:08 -08:00
Wayne Warthen
2ebd800482
CTC Refactoring
2019-11-24 20:16:54 -08:00
Wayne Warthen
8f2754b0f7
Minor Cleanup
2019-11-10 18:59:43 -08:00