Z280 ROMless Fixes

- Corrected a couple deficiencies that caused Z280 CPUs to fail in the new ROMless configuration

Source/CBIOS/cbios.asm

@@ -2529,24 +2529,21 @@ MD_INIT:
 ; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE
 ;
 #IFDEF PLTWBW
-	; TODO: HANDLE DISABLED RAM/ROM DISK BETTER.
-	; IF RAM OR ROM DISK ARE DISABLED, BELOW WILL STILL
-	; TRY TO ADJUST THE DPB BASED ON RAM BANK CALCULATIONS.
-	; IT SHOULD NOT MATTER BECAUSE THE DPB SHOULD NEVER BE
-	; USED.  IT WOULD BE BETTER TO GET RAMD0/ROMD0 AND
-	; RAMDN/ROMDN FROM THE HCB AND USE THOSE TO CALC THE
-	; DPB ADJUSTMENT.  IF DN-D0=0, BYPASS ADJUSTMENT.
-	LD	A,(HCB + HCB_ROMBANKS)	; ROM BANK COUNT
-	SUB	4		; REDUCE BANK COUNT BY RESERVED PAGES
-	LD	IX,DPB_ROM	; ADDRESS OF DPB
-	CALL	MD_INIT1	; FIX IT UP
+	; NOTE: ROM AND/OR RAM DISK MAY NOT BE ACTIVE, BUT WE GO
+	; AHEAD AND UPDATE BOTH DPBS ANYWAY.  IT CAUSES NO HARM SINCE
+	; INACTIVE RAM/ROM DISK WILL NEVER BE ACCESSED.
 ;
-	LD	A,(HCB + HCB_RAMBANKS)	; RAM BANK COUNT
-	SUB	8		; REDUCE BANK COUNT BY RESERVED PAGES
-	LD	IX,DPB_RAM	; ADDRESS OF DPB
-	CALL	MD_INIT1	; FIX IT UP
+	; ROM DISK
+	LD	A,(HCB + HCB_ROMD_BNKS)	; ROM DISK SIZE IN BANKS
+	LD	IX,DPB_ROM		; ADDRESS OF DPB
+	CALL	MD_INIT1		; FIX IT UP
 ;
-	JR	MD_INIT4	; DONE
+	; RAM DISK
+	LD	A,(HCB + HCB_RAMD_BNKS)	; RAM DISK SIZE IN BANKS
+	LD	IX,DPB_RAM		; ADDRESS OF DPB
+	CALL	MD_INIT1		; FIX IT UP
+;	
+	JR	MD_INIT4		; DONE
 ;
 MD_INIT1:
 ;

Source/CPM3/diskio.z80

@@ -355,38 +355,30 @@ dpb$hdnew:	; 8MB Hard Disk Drive (new format)
 ;		called for first time initialization.
 
 dsk$init:
-	; TODO: Handle disabled RAM/ROM disk better.
-	; If RAM or ROM disk are disabled, below will still
-	; try to adjust the DPB based on RAM bank calculations.
-	; It should not matter because the DPB should never be
-	; used.  It would be better to get RAMD0/ROMD0 and
-	; RAMDN/ROMDN from the HCB and use those to calc the
-	; DPB adjustment.  If DN-D0=0, bypass adjustment.
-	ld	b,0FAh			; HBIOS Peek Function
-	ld	a,(@hbbio)		; HBIOS bank id
-	ld	d,a			; ... goes in D
-	ld	hl,10Ch			; Offset 10Ch is ROM bank cnt
-	rst	08			; Call HBIOS, value in E
-	ld	a,e			; move count to accum
-	sub	4			; reduce by # reserved banks
-	ld	ix,dpb$rom		; address of DPB
-	call	dsk$init1		; fix it up
-	
-	ld	b,0FAh			; HBIOS Peek Function
-	ld	a,(@hbbio)		; HBIOS bank id
-	ld	d,a			; ... goes in D
-	ld	hl,10Bh			; Offset 10Bh is RAM bank cnt
-	rst	08			; Call HBIOS, value in E
-	ld	a,e			; move count to accum
-	sub	8			; reduce by # reserved banks
-	ld	ix,dpb$ram		; address of DPB
-	call	dsk$init1		; fix it up
 
+	; NOTE: ROM and/or RAM disk may not be active, but we go
+	; ahead and update both DPBs anyway.  It causes no harm since
+	; inactive RAM/ROM disk will never be accessed.
+
+	ld	hl,1DFh			; ROM disk bank cnt in HCB
+	ld	ix,dpb$rom		; address of ROM Disk DPB
+	call	dsk$init1		; fix it up
+	ld	hl,1DDh			; RAM dsik bank cnt in HCB
+	ld	ix,dpb$ram		; address of RAM Disk DPB
+	call	dsk$init1		; fix it up
 	ret				; done
 
 dsk$init1:
+	; Get bank count of RAM/ROM disk
+	ld	b,0FAh			; HBIOS Peek Function
+	ld	a,(@hbbio)		; HBIOS bank id
+	ld	d,a			; ... goes in D
+	rst	08			; Call HBIOS, value in E
+	;ld	a,e			; move count to accum
+
 	; Setup HL with bank count
-	ld	l,a			; lsb
+	;ld	l,a			; lsb
+	ld	l,e			; lsb
 	ld	h,0			; msb is always zero
 
 	; Update EXM field

Source/CPM3/genbnk.dat

@@ -8,12 +8,12 @@ MEMTOP   = FD
 BNKSWT   = Y
 COMBAS   = 80
 LERROR   = Y
-NUMSEGS  = 04
+NUMSEGS  = 02
 MEMSEG00 = 01,17,00
 MEMSEG01 = 0E,72,02
 MEMSEG02 = 01,7F,03
-MEMSEG03 = 01,7F,04
-MEMSEG04 = 01,7F,05
+MEMSEG03 = 00,C0,04
+MEMSEG04 = 00,C0,05
 MEMSEG05 = 00,C0,06
 MEMSEG06 = 00,C0,07
 MEMSEG07 = 00,C0,08
@@ -25,38 +25,38 @@ MEMSEG0C = 00,C0,0D
 MEMSEG0D = 00,C0,0E
 MEMSEG0E = 00,C0,0F
 MEMSEG0F = 00,C0,10
-HASHDRVA = Y
-HASHDRVB = Y
-HASHDRVC = Y
-HASHDRVD = Y
-HASHDRVE = Y
-HASHDRVF = Y
-HASHDRVG = Y
-HASHDRVH = Y
-HASHDRVI = Y
-HASHDRVJ = Y
-HASHDRVK = Y
-HASHDRVL = Y
-HASHDRVM = Y
-HASHDRVN = Y
-HASHDRVO = Y
-HASHDRVP = Y
-ALTBNKSA = Y
-ALTBNKSB = Y
-ALTBNKSC = Y
-ALTBNKSD = Y
-ALTBNKSE = Y
-ALTBNKSF = Y
-ALTBNKSG = Y
-ALTBNKSH = Y
-ALTBNKSI = Y
-ALTBNKSJ = Y
-ALTBNKSK = Y
-ALTBNKSL = Y
-ALTBNKSM = Y
-ALTBNKSN = Y
-ALTBNKSO = Y
-ALTBNKSP = Y
+HASHDRVA = N
+HASHDRVB = N
+HASHDRVC = N
+HASHDRVD = N
+HASHDRVE = N
+HASHDRVF = N
+HASHDRVG = N
+HASHDRVH = N
+HASHDRVI = N
+HASHDRVJ = N
+HASHDRVK = N
+HASHDRVL = N
+HASHDRVM = N
+HASHDRVN = N
+HASHDRVO = N
+HASHDRVP = N
+ALTBNKSA = N
+ALTBNKSB = N
+ALTBNKSC = N
+ALTBNKSD = N
+ALTBNKSE = N
+ALTBNKSF = N
+ALTBNKSG = N
+ALTBNKSH = N
+ALTBNKSI = N
+ALTBNKSJ = N
+ALTBNKSK = N
+ALTBNKSL = N
+ALTBNKSM = N
+ALTBNKSN = N
+ALTBNKSO = N
+ALTBNKSP = N
 NDIRRECA = 08
 NDIRRECB = 00
 NDIRRECC = 00

Source/CPM3/genres.dat

@@ -8,7 +8,7 @@ MEMTOP   = FD
 BNKSWT   = N
 COMBAS   = 00
 LERROR   = Y
-NUMSEGS  = 03
+NUMSEGS  = 01
 MEMSEG00 = 00,80,00
 MEMSEG01 = 00,C0,02
 MEMSEG02 = 00,C0,03

Source/CPM3/move.z80

@@ -65,12 +65,11 @@ xbnkmov:
 ; ------------	--------------	-------
 ; COMMON	BID_COM		8Fh
 ; 0: OS/BUFS	BID_USR         8Eh
-;		BID_BIOS	8Dh	
-; 1: TPA	BID_AUX		8Ch
-; 2: BUFS	BID_AUX-1	8Bh
-; 3: BUFS	BID_AUX-2	8Ah
-; 4: BUFS	BID_AUX-3	89h
-; 5: BUFS	BID_AUX-4	88h
+; 1: TPA	BID_AUX		8Dh
+; 2: BUFS	BID_AUX-1	8Ch
+; 3: BUFS	BID_AUX-2	8Bh
+; 4: BUFS	BID_AUX-3	8Ah
+; 5: BUFS	BID_AUX-4	89h
 ;
 ; N.B., Below BID_AUX is considered RAM disk bank.  Need to
 ; make sure RAM disk is kept small enough to stay below
@@ -80,17 +79,13 @@ xbnkmov:
 ; to adjust for real size of RAM in system
 ;
 ?bnkxlt:
-	or	a
-	jr	z,bank0
-	neg			; 2 -> -2
-	add	a,8Dh		; 8Dh - 2 = 8Bh
-@hbbio	equ	$ - 1		; BID_BIOS
-	ret
-bank0:
-	ld	a,8Eh		; 0 -> 8Eh
+	neg			; ex: 2 -> -2
+	add	a,8Eh		; ex: 8Eh - 2 = 8Ch
 @hbusr	equ	$ - 1		; BID_USR
 	ret
-	
+
+@hbbio	db	0		; BID_BIOS
+
 movtyp	db	0		; non-zero for interbank move
 
 movbnks:

Source/HBIOS/Bank Layout.txt

@@ -0,0 +1,74 @@
+ROM Bank Layout
+
+Bank ID		Module		Start	Size
+------		------		------	------
+0x00		hbios		0x0000	0x8000
+		<end>		0x8000
+
+0x01		loader		0x0000	0x1000
+		dbgmon		0x1000	0x2000
+		cpm22		0x2000	0x3000
+		zsys		0x5000	0x3000
+		<end>		0x8000
+
+0x02		forth		0x0000	0x1700
+		basic		0x1700	0x2000
+		tbasic		0x3700	0x0900
+		game		0x4000	0x0900
+		egg		0x4900	0x0200
+		netboot         0x4B00	0x1000
+		updater         0x5B00	0x0D00
+		usrrom		0x6800	0x1800
+		<end>		0x8000
+
+0x03		imgpad2		0x0000	0x8000
+		<end>		0x8000
+
+0x04 - N	ROM Disk Data
+
+
+RAM Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81-0x8B       RAM Disk Data
+0x8C		CP/M 3 Buffers
+0x8D            CP/M 3 OS
+0x8E            User TPA
+0x8F            Common
+
+
+ROMless Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81		Loader, DbgMon, CP/M 2.2, ZSDOS
+0x82		ROM Apps
+0x83		More ROM Apps
+0x84-0x8B       RAM Disk Data
+0x8C		CP/M 3 Buffers
+0x8D            CP/M 3 OS
+0x8E            User TPA
+0x8F            Common
+
+
+ROMless Tiny Bank Layout (128K)
+NOTE: no ROM Apps, no CP/M 3 support, no RAM disk
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81		Loader, DbgMon, CP/M 2.2, ZSDOS
+0x82            User TPA
+0x83            Common
+
+Disk Image Sizes
+
+Image Size	ROM System	ROMless System
+----------	----------	--------------
+1024K		896K		768K
+512		384K		256K
+256		128K		0K
+128 (tiny)	n/a		0K

Source/HBIOS/Build.cmd

@@ -110,10 +110,8 @@ copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit
 :: should yield a result of zero.
 ::
 
-if %ROMSize% gtr 0 (
-    for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
-      "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
-    )
+for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
+  "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
 )
 
 ::
@@ -137,8 +135,8 @@ if %ROMSize% gtr 0 (
     copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
     copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
 ) else (
-    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.rom || exit /b
-    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.upd || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.rom || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
     copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
 )
 
@@ -222,6 +220,7 @@ call Build RCZ280 ext || exit /b
 call Build RCZ280 nat || exit /b
 call Build RCZ280 zz80mb || exit /b
 call Build RCZ280 zzrc || exit /b
+call Build RCZ280 zzrc_ram || exit /b
 call Build SCZ180 sc126 || exit /b
 call Build SCZ180 sc130 || exit /b
 call Build SCZ180 sc131 || exit /b

Source/HBIOS/Build.sh

@@ -19,6 +19,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc_ram"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh

Source/HBIOS/Config/RCZ280_zz80mb.asm

@@ -37,8 +37,7 @@ FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
-RAMLOC		.SET	23		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	8192		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
 Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)

Source/HBIOS/Config/RCZ280_zzrc.asm

@@ -39,10 +39,7 @@ MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
 RAMSIZE		.SET	256		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	256		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.SET	256		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
-;
-RAMLOC		.SET	18		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
 Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)

Source/HBIOS/Config/RCZ280_zzrc_ram.asm

@@ -0,0 +1,77 @@
+;
+;==================================================================================================
+;   RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz280.asm"
+;
+CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
+INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
+MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
+;
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+;
+Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
+Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
+Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
+;
+MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+;
+Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+Z2UOSC		.SET	(CPUOSC / 8)	; Z2U: OSC FREQUENCY IN MHZ
+Z2U0HFC		.SET	TRUE		; Z2U0: ENABLE HARDWARE FLOW CONTROL
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Makefile

@@ -67,11 +67,9 @@ $(OBJECTS) : $(ROMDEPS)
 		else \
 			cat imgpad2.bin >osimg2.bin ; \
 		fi ; \
-		if [ $(ROMSIZE) -gt 0 ] ; then \
-			for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
-				srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
-			done \
-		fi \
+		for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
+			srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
+		done \
 	fi
 	if [ $(ROM_PLATFORM) = UNA ] ; then \
 		cp osimg.bin $(DEST)/UNA_WBW_SYS.bin ; \
@@ -83,8 +81,8 @@ $(OBJECTS) : $(ROMDEPS)
 			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
 			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
 		else \
-			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).rom ; \
-			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).upd ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).rom ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
 			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
 		fi \
 	fi

Source/HBIOS/ROM Layout.txt

@@ -1,39 +0,0 @@
-RomWBW ROM Layout
-
-Bank		Module		Start	Size
-------		------		------	------		
-0		hbios		0x0000	0x8000
-		<end>		0x8000
-
-1		loader		0x0000	0x1000
-		dbgmon		0x1000	0x2000
-		cpm22		0x2000	0x3000
-		zsys		0x5000	0x3000
-		<end>		0x8000        
-
-2		forth		0x0000	0x1700
-		basic		0x1700	0x2000
-		tbasic		0x3700	0x0900
-		game		0x4000	0x0900
-		egg		0x4900	0x0200
-		netboot         0x4B00	0x1000
-		updater         0x5B00	0x0D00
-		usrrom		0x6800	0x1800
-		<end>		0x8000
-
-3		imgpad2		0x0000	0x8000
-		<end>		0x8000
-
-4 - N		ROM Disk Data
-
-
-RomWBW RAM Layout
-
-Bank ID         Usage                   Physical Address
--------         ------                  ----------------
-0x80-0x87       RAM Disk Data           0x80000-0xBFFFF
-0x88-0x8B       CP/M 3 Buffers          0xC0000-0xDFFFF
-0x8C            CP/M 3 OS               0xE0000-0xE7FFF
-0x8D            RomWBW HBIOS            0xE8000-0xEFFFF
-0x8E            User TPA                0xF0000-0xF7FFF
-0x8F            Common                  0xF8000-0xFFFFF

Source/HBIOS/cfg_duo.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$50		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$51		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_dyno.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_heath.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_master.asm

@@ -31,10 +31,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_mbc.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_mk4.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2

Source/HBIOS/cfg_n8.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
-RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2

Source/HBIOS/cfg_rcz180.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_rcz280.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_rcz80.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_rph.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_RPH		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
-RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2

Source/HBIOS/cfg_s100.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_57600_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_sbc.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_scz180.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_z80retro.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$60		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$61		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_zeta.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_zeta2.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/ch.asm

@@ -17,13 +17,6 @@
 ;    on CH376) resolved the issue for some devices, so that has been
 ;    added to the RESET routine when using CH376.
 ;
-;  - The CH37x can get in an inconsistent state.  The RESET_ALL command
-;    will clear this, but the RESET_ALL command is very problematic on
-;    the CH376.  On the CH376, the hardware reset takes a very long
-;    time (much longer than the documentation suggests).  It seems to
-;    work fine on the CH375, but since you don't know what chip you
-;    are dealing with at that point, I have given up on using it.
-;
 ; TODO:
 ;  - Implement auto-recovery on error status.
 ;
@@ -45,8 +38,12 @@ CHTYP_376	.EQU	2		; CH376
 CH_CMD_VER	.EQU	$01		; GET IC VER
 CH_CMD_RESET	.EQU	$05		; FULL CH37X RESET
 CH_CMD_EXIST	.EQU	$06		; CHECK EXISTS
+CH_CMD_MAXLUN	.EQU	$0A		; GET MAX LUN NUMBER
 CH_CMD_PKTSEC	.EQU	$0B		; SET PACKETS PER SECTOR
+CH_CMD_SETRETRY	.EQU	$0B		; SET RETRIES
 CH_CMD_MODE	.EQU	$15		; SET USB MODE
+CH_CMD_TSTCON	.EQU	$16		; TEST CONNECT
+CH_CMD_ABRTNAK	.EQU	$17		; ABORT DEVICE NAK RETRIES
 CH_CMD_STAT	.EQU	$22		; GET STATUS
 CH_CMD_RD6	.EQU	$27		; READ USB DATA (375 & 376)
 CH_CMD_RD5	.EQU	$28		; READ USB DATA (375)
@@ -56,6 +53,7 @@ CH_CMD_DSKMNT	.EQU	$31		; DISK MOUNT
 CH_CMD_DSKCAP	.EQU	$3E		; DISK CAPACITY
 CH_CMD_AUTOSET	.EQU	$4D		; USB AUTO SETUP
 CH_CMD_DSKINIT	.EQU	$51		; DISK INIT
+CH_CMD_DSKRES	.EQU	$52		; DISK RESET
 CH_CMD_DSKSIZ	.EQU	$53		; DISK SIZE
 CH_CMD_DSKRD	.EQU	$54		; DISK READ
 CH_CMD_DSKRDGO	.EQU	$55		; CONTINUE DISK READ
@@ -132,7 +130,7 @@ CH_INIT2:
 	CALL	PRTHEXBYTE		; DISPLAY IT
 ;
 	;CALL	CH_FLUSH		; FLUSH DEVICE OUTPUT QUEUE
-	;CALL	CH_RESET		; FULL CH37X RESET
+	CALL	CH_RESET		; FULL CH37X RESET
 	CALL	CH_DETECT		; DETECT CHIP PRESENCE
 	JR	Z,CH_INIT3		; GO AHEAD IF CHIP FOUND
 	LD	DE,CH_STR_NOHW		; NOT PRESENT
@@ -226,18 +224,18 @@ CH_WR:
 ; SMALL DELAY REQUIRED AT STRATEGIC LOCATIONS
 ;
 CH_NAP:
-	;CALL	DELAY			; *DEBUG*
-	;CALL	DELAY			; *DEBUG*
-	;CALL	DELAY			; *DEBUG*
 	JP	DELAY
 ;
 ; POLL WAITING FOR INTERRUPT
 ;
 CH_POLL:
+	PUSH	BC			; SAVE BC
 	PUSH	HL			; SAVE HL
 	CALL	CH_NAP			; SMALL DELAY
-	LD	HL,$8000		; POLL LOOP COUNTER
-	LD	HL,0			; *DEBUG*
+	LD	A,(CB_CPUMHZ)		; USE CPU SPEED AS CPU
+	LD	B,A			; ... SPEED COMP COUNTER
+CH_POLL0:
+	LD	HL,$8000		; PRIMARY LOOP COUNTER
 CH_POLL1:
 	CALL	CH_STAT			; GET INT STATUS
 	BIT	7,A			; CHECK BIT
@@ -245,9 +243,10 @@ CH_POLL1:
 	DEC	HL			; DECREMENT COUNTER
 	LD	A,H			; CHECK
 	OR	L			; ... LOOP COUNTER
-	JR	NZ,CH_POLL1		; LOOP AS NEEDED
-	;CALL	PC_ASTERISK		; *DEBUG*
+	JR	NZ,CH_POLL1		; INNER LOOP AS NEEDED
+	DJNZ	CH_POLL0		; OUTER LOOP AS NEEDED
 	POP	HL			; RESTORE HL
+	POP	BC			; RESTORE BC
 	OR	$FF			; FLAG TIMEOUT
 	RET				; AND RETURN
 CH_POLL2:
@@ -255,7 +254,15 @@ CH_POLL2:
 	CALL	CH_CMD			; SEND IT
 	CALL	CH_NAP			; SMALL DELAY
 	CALL	CH_RD			; GET RESULT
+	;PUSH	AF			; *DEBUG*
+	;LD	A,B			; *DEBUG*
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PC_LBKT			; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	;CALL	PC_RBKT			; *DEBUG*
+	;POP	AF			; *DEBUG*
 	POP	HL			; RESTORE HL
+	POP	BC			; RESTORE BC
 	RET				; AND RETURN
 ;
 ; SEND READ USB DATA COMMAND
@@ -294,17 +301,12 @@ CH_CMD_WR1:
 ;
 ; PERFORM A FULL HARDWARE RESET ON CH37X
 ;
-; WARNING: CH376 CAN TAKE A VERY LONG TIME TO PROCESS THIS
-; COMMAND.  PROBABLY DON'T WANT TO USE THIS.
-;
 CH_RESET:
 	;PRTS("\r\nHW RESET:$")		; *DEBUG*
 	PUSH	DE
 	LD	A,CH_CMD_RESET
 	CALL	CH_CMD
-	; DOC SAYS 40MS, BUT I FOUND THAT TO BE INSUFFICIENT
-	;LD	DE,2500			; 16US * 2500 = 40MS
-	LD	DE,10000		; 16US * 10000 = 160MS
+	LD	DE,2500			; 16US * 2500 = 40MS
 	CALL	VDELAY
 	;CALL	CH_RD			; *DEBUG*
 	;CALL	PC_SPACE		; *DEBUG*
@@ -658,20 +660,33 @@ CHUSB_RESET:
 	; INITIALIZE DISK
 	LD	B,24			; TRY A FEW TIMES
 CHUSB_RESET1:
+	;PRTS("\n\rDSKINIT:$")		; *DEBUG*
 	LD	A,CH_CMD_DSKINIT	; DISK INIT COMMAND
 	CALL	CH_CMD			; SEND IT
-	LD	DE,10000		; 10000 * 16 = 160MS ???
+	LD	DE,10000		; 10000 * 16 = 160US ???
+	LD	DE,20000		; 10000 * 16 = 160US ???
+	LD	DE,12500		; 1250 * 16 = 200US ???
 	CALL	VDELAY			; DELAY
 	CALL	CH_POLL			; WAIT FOR RESULT
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
 	CP	$14			; SUCCESS?
-	JR	Z,CHUSB_RESET2		; IF SO, MOVE ON
+	JR	Z,CHUSB_RESET2		; IF SO, CONTINUE
+	;JR	Z,CHUSB_RESET1A		; IF SO, CHECK READY
 	CP	$16			; NO MEDIA
 	JP	Z,CHUSB_NOMEDIA		; HANDLE IT
 	CALL	CH_NAP			; SMALL DELAY
 	DJNZ	CHUSB_RESET1		; LOOP AS NEEDED
 	JP	CHUSB_TO		; HANDLE TIMEOUT
+;;;;
+;;;CHUSB_RESET1A:
+;;;	CALL	CHUSB_DSKRES		; DISK RESET
+;;;	CP	$14			; GOOD?
+;;;	JR	Z,CHUSB_RESET2
+;;;	CALL	CHUSB_DSKRDY		; CHECK IF DISK READY
+;;;	CP	$14			; GOOD?
+;;;	JR	Z,CHUSB_RESET2		; IF SO, MOVE ON
+;;;	DJNZ	CHUSB_RESET1		; KEEP TRYING
 ;
 CHUSB_RESET2:
 	; USE OF CH376 DISK_MOUNT COMMAND SEEMS TO IMPROVE
@@ -680,95 +695,13 @@ CHUSB_RESET2:
 	CP	CHTYP_376		; IS CH376?
 	CALL	Z,CHUSB_DSKMNT		; IF SO, ISSUE MOUNT
 	;CALL	CHUSB_AUTOSET		; *DEBUG*
-;
-	; GET AND STORE DISK CAPACITY
-	;JP	CHUSB_RESET2D		; *DEBUG*
-	;LD	A,(IY+CH_TYPE)		; GET DEVICE TYPE
-	;CP	CHTYP_375
-	;JR	CHUSB_RESET2A
-	;CP	CHTYP_376
-	;JR	CHUSB_RESET2B
-	;JP	CHUSB_CMDERR
-;
-CHUSB_RESET2A:
-	; CH375 DISK SIZE
-	LD	A,CH_CMD_DSKSIZ		; DISK SIZE COMMAND
-	CALL	CH_CMD			; SEND IT
-	CALL	CH_POLL			; WAIT FOR RESULT
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$14			; SUCCESS?
-	;JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	JR	NZ,CHUSB_RESET2D	; FAKE THE CAPACITY
-	CALL	CH_CMD_RD		; SEND READ USB DATA CMD
-	CALL	CH_RD			; GET RD DATA LEN
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$08			; MAKE SURE IT IS 8
-	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
-	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-	PUSH	HL			; SAVE ADDRESS
-	CALL	CH_RD
-	LD	D,A
-	CALL	CH_RD
-	LD	E,A
-	CALL	CH_RD
-	LD	H,A
-	CALL	CH_RD
-	LD	L,A
-	CALL	CH_RD
-	CALL	CH_RD
-	CALL	CH_RD
-	CALL	CH_RD
-	POP	BC			; RECOVER ADDRESS TO BC
-	CALL	ST32			; STORE IT
-	CALL	CH_FLUSH		; DISCARD REMAINING CHARS
-	JR	CHUSB_RESET3		; CONTINUE
-;
-CHUSB_RESET2B:
-	; CH376 DISK CAPACITY
-	LD	A,CH_CMD_DSKCAP		; DISK CAPACITY COMMAND
-	CALL	CH_CMD			; SEND IT
-	CALL	CH_POLL			; WAIT FOR RESULT
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$14			; SUCCESS?
-	;JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	JR	NZ,CHUSB_RESET2D	; FAKE THE CAPACITY
-	CALL	CH_CMD_RD		; SEND USB READ DATA
-	CALL	CH_RD			; GET RD DATA LEN
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$04			; MAKE SURE IT IS 8
-	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
-	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-	CALL	CH_RD
-	LD	B,4			; 4 BYTES
-CHUSB_RESET2C:
-	LD	(HL),A
-	INC	HL
-	CALL	CH_RD
-	DJNZ	CHUSB_RESET2C
-	JR	CHUSB_RESET3		; CONTINUE
-;
-CHUSB_RESET2D:
-	; OLDER USB STICKS SEEM TO FAIL (PRIMARILY ON CH375).
-	; FAILURE TO GET A DISK CAPACITY SHOULD NOT PREVENT THE
-	; USE OF THE DISK.  SO, WE PUNT, AND JUST PLUG IN 1GB.
-	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
-	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-	PUSH	HL			; SAVE POINTER
-	LD	DE,$0020		; 1GB IS $20000 SECTORS
-	LD	HL,$0000
-	POP	BC			; RECOVER POINTER
-	CALL	ST32			; SAVE FAKE CAPACITY
-	; FALL THRU
-;
-CHUSB_RESET3:
+	;CALL	CHUSB_TSTCON		; *DEBUG*
+	;CALL	CHUSB_MAXLUN		; *DEBUG*
 	;CALL	CHUSB_DSKRDY		; *DEBUG*
 	;CALL	CHUSB_DSKINQ		; *DEBUG*
+;;
+	CALL	CHUSB_DSKSIZ		; GET AND RECORD DISK SIZE
+	RET	NZ			; ABORT ON ERROR
 ;
 	; SET STATUS AND RETURN
 	XOR	A			; CLEAR STATUS
@@ -847,6 +780,80 @@ CHUSB_GEOM:
 ; CH37X HELPER ROUTINES
 ;
 ;
+; PERFORM DISK MOUNT
+;
+CHUSB_DSKMNT:
+	;PRTS("\n\rMOUNT:$")		; *DEBUG*
+	LD	A,CH_CMD_DSKMNT		; DISK QUERY
+	CALL	CH_CMD			; DO IT
+	CALL	CH_POLL			; WAIT FOR RESPONSE
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$14			; SUCCESS?
+	RET	NZ			; ABORT IF NOT
+	CALL	CH_CMD_RD		; SEND READ COMMAND
+	CALL	CH_RD			; GET LENGTH
+	LD	B,A			; LOOP COUNTER
+	LD	HL,HB_WRKBUF		; USE WORK BUFFER FOR DATA
+DSKMNT1:
+	CALL	CH_RD			; GET A BYTE
+	LD	(HL),A			; SAVE IT
+	INC	HL			; BUMP BUF PTR
+	DJNZ	DSKMNT1			; LOOP FOR ALL DATA
+;
+	;LD	DE,HB_WRKBUF		; *DEBUG*
+	;CALL	DUMP_BUFFER		; *DEBUG*
+;
+	;CALL	CHUSB_PRTPREFIX		; PRINT DEVICE PREFIX
+	;LD	HL,HB_WRKBUF + 8
+	;LD	B,28
+DSKMNT2:
+	;LD	A,(HL)
+	;INC	HL
+	;CALL	COUT
+	;DJNZ	DSKMNT2
+;
+	RET
+;
+; PERFORM DISK SIZE
+;
+CHUSB_DSKSIZ:
+	;PRTS("\n\rDSKSIZ:$")		; *DEBUG*
+	LD	A,CH_CMD_DSKSIZ		; DISK SIZE COMMAND
+	CALL	CH_CMD			; SEND IT
+	CALL	CH_POLL			; WAIT FOR RESULT
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$14			; SUCCESS?
+	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
+	CALL	CH_CMD_RD		; SEND READ USB DATA CMD
+	CALL	CH_RD			; GET RD DATA LEN
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$08			; MAKE SURE IT IS 8
+	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
+	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
+	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
+	PUSH	HL			; SAVE ADDRESS
+	CALL	CH_RD
+	LD	D,A
+	CALL	CH_RD
+	LD	E,A
+	CALL	CH_RD
+	LD	H,A
+	CALL	CH_RD
+	LD	L,A
+	CALL	CH_RD
+	CALL	CH_RD
+	CALL	CH_RD
+	CALL	CH_RD
+	POP	BC			; RECOVER ADDRESS TO BC
+	CALL	ST32			; STORE IT
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND DONE
+;
+#IF FALSE
+;
 ; PERFORM DISK INQUIRY
 ; BASICALLY THE SCSI INQUIRY COMMAND
 ;
@@ -883,50 +890,48 @@ DSKINQ2:
 ;
 	RET
 ;
-; PERFORM DISK MOUNT
+; PERFORM SET RETRIES
 ;
-CHUSB_DSKMNT:
-	;PRTS("\n\rMOUNT:$")		; *DEBUG*
-	LD	A,CH_CMD_DSKMNT		; DISK QUERY
+CHUSB_SETRETRY:
+	;PRTS("\n\rSETRETRY:$")		; *DEBUG*
+	LD	A,CH_CMD_SETRETRY	; DISK READY
+	CALL	CH_CMD			; DO IT
+	CALL	CH_NAP
+	LD	A,$25			; CONSTANT
+	CALL	CH_WR			; SEND IT
+	CALL	CH_NAP
+	LD	A,$BF			; MAX
+	CALL	CH_WR
+	CALL	CH_NAP
+	CALL	CH_RD			; GET RESULT
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	RET
+;
+; PERFORM DISK RESET
+;
+CHUSB_DSKRES:
+	;PRTS("\n\rDSKRES:$")		; *DEBUG*
+	LD	A,CH_CMD_DSKRES		; DISK READY
 	CALL	CH_CMD			; DO IT
 	CALL	CH_POLL			; WAIT FOR RESPONSE
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$14			; SUCCESS?
-	RET	NZ			; ABORT IF NOT
-	CALL	CH_CMD_RD		; SEND READ COMMAND
-	CALL	CH_RD			; GET LENGTH
-	LD	B,A			; LOOP COUNTER
-	LD	HL,HB_WRKBUF		; USE WORK BUFFER FOR DATA
-DSKMNT1:
-	CALL	CH_RD			; GET A BYTE
-	LD	(HL),A			; SAVE IT
-	INC	HL			; BUMP BUF PTR
-	DJNZ	DSKMNT1			; LOOP FOR ALL DATA
-;
-	;LD	DE,HB_WRKBUF		; *DEBUG*
-	;CALL	DUMP_BUFFER		; *DEBUG*
-;
-	;CALL	CHUSB_PRTPREFIX		; PRINT DEVICE PREFIX
-	;LD	HL,HB_WRKBUF + 8
-	;LD	B,28
-DSKMNT2:
-	;LD	A,(HL)
-	;INC	HL
-	;CALL	COUT
-	;DJNZ	DSKMNT2
 ;
 	RET
 ;
 ; PERFORM DISK READY
 ;
 CHUSB_DSKRDY:
-	;PRTS("\n\rREADY:$")		; *DEBUG*
+	;PRTS("\n\rDSKRDY:$")		; *DEBUG*
 	LD	A,CH_CMD_DSKRDY		; DISK READY
 	CALL	CH_CMD			; DO IT
 	CALL	CH_POLL			; WAIT FOR RESPONSE
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$14			; *DEBUG*
+	JR	NZ,CHUSB_DSKRDY		; *DEBUG*
 ;
 	RET
 ;
@@ -936,12 +941,44 @@ CHUSB_AUTOSET:
 	;PRTS("\n\rAUTOSET:$")		; *DEBUG*
 	LD	A,CH_CMD_AUTOSET	; AUTOMATIC SETUP FOR USB
 	CALL	CH_CMD			; DO IT
+	CALL	LDELAY			; *DEBUG*
 	CALL	CH_POLL			; WAIT FOR RESPONSE
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
 ;
 	RET
 ;
+; PERFORM TEST CONNECT
+;
+CHUSB_TSTCON:
+	;PRTS("\n\rTSTCON:$")		; *DEBUG*
+	LD	A,CH_CMD_TSTCON		; TEST USB DEVICE CONNECT
+	CALL	CH_CMD			; DO IT
+	CALL	CH_NAP			; WAIT A BIT
+	CALL	CH_RD			; GET RESPONSE
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	RET
+;
+; PERFORM GET MAX LUN
+;
+CHUSB_MAXLUN:
+	;PRTS("\n\rMAXLUN:$")		; *DEBUG*
+	LD	A,CH_CMD_MAXLUN		; TEST USB DEVICE CONNECT
+	CALL	CH_CMD			; DO IT
+	CALL	CH_NAP			; WAIT A BIT
+	LD	A,$38			; CONSTANT
+	CALL	CH_WR			; SEND IT
+	CALL	CH_NAP
+	CALL	CH_RD			; GET RESPONSE
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	RET
+;
+#ENDIF
+;
 ; ERROR HANDLERS
 ;
 ;

Source/HBIOS/dsrtc.asm

@@ -145,6 +145,8 @@ DSRTC_PREINIT:
 	;OR	DSRTC_IDLE		; SET OUR IDLE BITS
 	;LD	(DSRTC_OPRVAL),A	; SAVE IT
 ;
+	XOR	A			; ZERO
+	LD	(DSRTC_STAT),A		; CLEAR STATUS
 	CALL	DSRTC_DETECT		; HARDWARE DETECTION
 	LD	(DSRTC_STAT),A		; SAVE RESULT
 	RET	NZ			; ABORT IF ERROR

Source/HBIOS/hbios.asm

@@ -88,20 +88,6 @@ MODCNT	.SET	MODCNT + 1
 	!!!	; FORCE AN ASSEMBLY ERROR
 #ENDIF
 ;
-; SOME HARDWARE REQUIRES A SPECIFIC ROMSIZE (NOTABLY ZZRCC) OR THE
-; RESULTING BUILD IMAGES WILL BE CORRUPT.  ROMSIZE_CHK IS SPECIFIED
-; IN THE CONFIG FILE AND IS VERIFIED AGAINST THE ROMSIZE BEING USED
-; BY THE BUILD.  A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERIFICATION
-; IS DISABLED (WHICH IT USUALLY IS).
-;
-#IF (ROMSIZE_CHK != 0) & (ROMSIZE != ROMSIZE_CHK)
-	.ECHO	"*** ERROR: ROMSIZE VALUE VERIFICATION FAILURE.\n"
-	.ECHO	"THIS CONFIGURATION REQUIRES A ROMSIZE OF " \ .ECHO ROMSIZE_CHK \ .ECHO ".\n"
-	.ECHO	"BUILD IS USING A ROMSIZE OF " \ .ECHO ROMSIZE \ .ECHO ".\n"
-	.ECHO	"SEE COMMENTS IN HBIOS.ASM.\n"
-	!!!	; FORCE AN ASSEMBLY ERROR
-#ENDIF
-;
 ;
 ;
 #IF (FPLED_ENABLE)
@@ -196,7 +182,13 @@ MODCNT	.SET	MODCNT + 1
   #ENDIF
 #ENDIF
 ;
+; CONVERT ROMWBW LOGICAL BANK ID TO PHYSICAL 32K BANK OFFSET
 ;
+#DEFINE PBANK(X) (((X >> 7) * (RAMBIAS / 32)) + (X & $7F))
+;
+; CONVERT ROMWBW LOGICAL BANK ID TO Z280 PHYSICAL BANK (4K) OFFSET
+;
+#DEFINE Z2_BANK(X) (PBANK(X) << 3)
 ;
 ; THE RTCDEF EQUATE IS INITIALIZED HERE AND UPDATED BY DRIVER INCLUDES
 ; THAT SHARE THE RTC LATCH.  AS EACH DRIVER FILE IS INCLUDED, IT CAN
@@ -318,9 +310,9 @@ CB_BIDUSR	.DB	BID_USR
 CB_BIDBIOS	.DB	BID_BIOS
 CB_BIDAUX	.DB	BID_AUX
 CB_BIDRAMD0	.DB	BID_RAMD0
-CB_BIDRAMDN	.DB	BID_RAMDN
+CB_RAMD_BNKS	.DB	RAMD_BNKS
 CB_BIDROMD0	.DB	BID_ROMD0
-CB_BIDROMDN	.DB	BID_ROMDN
+CB_ROMD_BNKS	.DB	ROMD_BNKS
 ;
 	.FILL	(HCB + HCB_SIZ - $),0	; PAD REMAINDER OF HCB
 ;
@@ -1222,14 +1214,14 @@ Z280_BOOTPDRTBL:
 	.DW	($006 << 4) | $A
 	.DW	($007 << 4) | $A
 	; UPPER 32 K (COMMON)
-	.DW	(((((BID_COM & $7F) * 8) + 0) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 1) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 2) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 3) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 4) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 5) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 6) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 7) + (1 << (RAMLOC - 12))) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 0) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 1) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 2) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 3) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 4) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 5) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 6) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 7) << 4) | $A
 ;
 Z280_INITZ:
 ;
@@ -1435,7 +1427,7 @@ S100MON_SKIP:
 ;
 ; THIS VALUE IS TEMPORARILY STORED AT HBX_LOC - 2
 ; BECAUSE WE ARE CURRENTLY RUNNING IN ROM.  AFTER WE TRANSITION HBIOS
-; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_APPBNK.
+; TO RAM, THE VALUE IS MOVED TO IT'S REAL LOCATION AT HB_APPBNK.
 ;
 	LD	A,(HB_CURBNK)		; GET HB_CURBNK
 	LD	(HBX_LOC - 2),A		; ... AND SAVE TEMP FOR APPBNK
@@ -1607,67 +1599,18 @@ MBC_SINGLE:
 ;
 #ENDIF
 ;
-; IF THIS IS A ROM-LESS SYSTEM, THEN WE NEED TO COPY THE PAYLOAD
-; (LOADER, MONITOR, ZSDOS) THAT HAS BEEN LOADED TO PHYSICAL RAM
-; BANKS 0 AND 1 TO THE USER TPA BANK TO RUN AFTER BOOT.
-; IT IS DONE PRIOR TO COPYING HBIOS TO IT'S FINAL BANK BECAUSE
-; THE PAYLOAD MAY EXTEND INTO THE HBIOS OPERATING BANK.  THIS
-; HAPPENS PRIMARILY IN THE CASE WHERE THE
-; SYSTEM HAS THE MINIMUM 128KB OF RAM.
-;
-#IFDEF ROMBOOT
-  #IF (ROMSIZE == 0)
- ; 
-	; THE PAYLOAD IS LIKELY TO CROSS OVER THE RAM BANK 0/1
-	; BOUNDARY.  BNKCPY DOES NOT HANDLE THIS BECAUSE IT ASSUMES
-	; THE COMMON BANK IS USED AFTER PASSING OVER THE BANK
-	; BOUNDARY.  WE WORK AROUND THAT HERE BY DOING TWO COPIES.
-	; THE FIRST ONE HANDLES THE PORTION OF THE PAYLOAD FROM THE
-	; END OF HBIOS TO THE BANK BOUNDARY ($8000).  THE SECOND
-	; ONE HANDLES THE PORTION THAT EXTENDS INTO THE SECOND
-	; PHYSICAL RAM BANK.
-;
-	; COPY PORTION OF PAYLOAD FOLLOWING HBIOS TO THE BANK
-	; BOUNDARY AT $8000 INTO START OF TPA.
-	LD	A,BID_RAM0
-	LD	(HB_SRCBNK),A
-	LD	A,BID_USR
-	LD	(HB_DSTBNK),A
-	LD	HL,HB_END
-	LD	DE,0
-	LD	BC,$8000-HB_END
-;
-    #IF (MEMMGR == MM_Z280)
-	CALL	Z280_BNKCPY
-    #ELSE
-	CALL	HBX_BNKCPY
-    #ENDIF
-;
-	; COPY REMAINDER OF PAYLOAD EXTENDING INTO THE SECOND PHYSICAL
-	; RAM BANK.  NOTE THAT THE DESTINATION ADDRESS (DE) IS
-	; ALREADY CORRECT FROM THE PRIOR COPY.
-	LD	A,BID_RAM0+1
-	LD	(HB_SRCBNK),A
-	LD	HL,$0000
-	; DE IS ALREADY CORRECT
-	LD	BC,$8000-($8000-HB_END)
-;
-    #IF (MEMMGR == MM_Z280)
-	CALL	Z280_BNKCPY
-    #ELSE
-	CALL	HBX_BNKCPY
-    #ENDIF
-;
-  #ENDIF
-;
-#ENDIF
-;
 ; IF ALREADY EXECUTING IN RAM, BYPASS RAM BANK INSTALLATION
 ;
 	LD	A,(HB_RAMFLAG)
 	OR	A
 	JR	NZ,HB_START1
 ;
+; IF BID_BOOT AND BID_BIOS ARE THE SAME, THEN IT IS NEVER APPROPRIATE
+; TO COPY THE HBIOS IMAGE FROM BID_BOOT TO BID_BIOS.  THIS IS TYPICALLY
+; THE CASE FOR A ROMLESS SYSTEM.
+;
+#IF (BID_BOOT != BID_BIOS)
+;
 ; INSTALL HBIOS IN RAM BANK
 ;
 	LD	A,(HB_CURBNK)
@@ -1677,24 +1620,26 @@ MBC_SINGLE:
 	LD	HL,0
 	LD	DE,0
 	LD	BC,$8000
-#IF (MEMMGR == MM_Z280)
+  #IF (MEMMGR == MM_Z280)
 	CALL	Z280_BNKCPY
-#ELSE
+  #ELSE
 	CALL	HBX_BNKCPY
-#ENDIF
+  #ENDIF
 ;
 ; TRANSITION TO HBIOS IN RAM BANK
 ;
-#IF (MEMMGR == MM_Z280)
+  #IF (MEMMGR == MM_Z280)
 	LD	A,BID_BIOS
 	LD	B,$10			; FIRST SYSTEM PDR
 	CALL	Z280_BNKSEL
 	JR	HB_START1
-#ELSE
+  #ELSE
 	LD	A,BID_BIOS		; BIOS BANK ID
 	LD	IX,HB_START1		; EXECUTION RESUMES HERE
 	CALL	HBX_BNKCALL		; CONTINUE IN RAM BANK, DO NOT RETURN
 	HALT				; WE SHOULD NOT COME BACK HERE!
+  #ENDIF
+;
 #ENDIF
 ;
 HB_RAMFLAG	.DB	FALSE		; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
@@ -1712,10 +1657,6 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	; NOTIFY THAT WE MADE THE TRANSITION!
 	DIAG(DIAG_03)
 	LED(%00000010)
-;
-	; SET THE IN-RAM FLAG
-	LD	A,TRUE			; ACCUM := TRUE
-	LD	(HB_RAMFLAG),A		; SET RAMFLAG
 ;
 	; RECOVER DATA PASSED PRIOR TO RAM TRANSITION
 	; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBNK
@@ -1733,7 +1674,7 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT
 	; IVT *MUST* BE ON A 4K BOUNDARY
 	LD	C,Z280_VPR
-	LD	HL,0 + ((((BID_BIOS & $7F) * 8) + (1 << (RAMLOC - 12))) << 4) + (Z280_IVT >> 8)
+	LD	HL,0 + (((PBANK(BID_BIOS) << 15) + Z280_IVT) >> 8)
 	LDCTL	(C),HL
 #ENDIF
 ;
@@ -1914,6 +1855,14 @@ HB_CPU1:
 	LD	A,L
 	LD	(HB_CPUTYPE),A
 ;
+; CLEAR DISPATCH TABLE ENTRIES
+;
+	XOR	A		; ZERO
+	LD	(CIO_CNT),A	; CIO DEVICES
+	LD	(DIO_CNT),A	; DIO DEVICES
+	LD	(VDA_CNT),A	; VDA DEVICES
+	LD	(SND_CNT),A	; SND DEVICES
+;
 #IF (DSRTCENABLE)
 	CALL	DSRTC_PREINIT
 #ENDIF
@@ -2721,13 +2670,13 @@ HB_CKBNK:
 	LD	BC,1			; DECREMENT VALUE
 	XOR	A			; ZERO ACCUM
 HB_CKBNK1:
-#IF (MEMMGR == MM_Z280)
+    #IF (MEMMGR == MM_Z280)
 	LD	D,A			; WORKING VALUE TO D
 	LDUD	A,(HL)			; GRAB NEXT BYTE FROM USER SPACE
 	ADD	A,D			; ADD NEXT BYTE
-#ELSE
+    #ELSE
 	ADD	A,(HL)			; ADD NEXT BYTE
-#ENDIF
+    #ENDIF
 	OR	A			; CLEAR CARRY
 	SBC	HL,BC			; DECREMENT
 	JR	NC,HB_CKBNK1		; LOOP TILL DONE
@@ -3104,11 +3053,7 @@ INITSYS4:
 ; CHAIN TO LOADER
 ;
 #IFDEF ROMBOOT
-  #IF (ROMSIZE > 0)
 	LD	A,BID_IMG0		; CHAIN TO OS IMAGES BANK
-  #ELSE
-	LD	A,BID_USR		; CHAIN TO USER BANK
-  #ENDIF
 #ELSE
 	LD	A,BID_USR		; CHAIN TO USER BANK
 #ENDIF
@@ -4149,10 +4094,6 @@ SYS_RESINT:
 ; GO BACK TO ROM BOOT LOADER
 ;
 SYS_RESWARM:
-;
-#IF (ROMSIZE == 0)
-	JR	SYS_RESCOLD
-#ENDIF
 ;
 	CALL	SYS_RESINT
 ;
@@ -4171,13 +4112,6 @@ SYS_RESWARM:
 ;
 SYS_RESCOLD:
 ;
-#IF (ROMSIZE == 0)
-	LD	DE,STR_RESTART
-	CALL	Z,WRITESTR
-	DI
-	HALT
-#ENDIF
-;
 #IF (MEMMGR == MM_Z280)
 	JP	Z280_RESTART
 #ELSE
@@ -5855,7 +5789,7 @@ Z280_BNKSEL:
 	LDCTL	HL,(C)			; GET CURRENT I/O PAGE
 	PUSH	HL			; SAVE IT
 	LD	L,$FF			; NEW I/O PAGE
-	LDCTL	(C),HL
+	LDCTL	(C),HL			; IMPLEMENT
 ;
 	; CONVERT BANK ID TO TOP 12 BITS OF PHYSICAL ADDRESS
 	; WITH $0A IN THE LOW ORDER NIBBLE:
@@ -5866,8 +5800,10 @@ Z280_BNKSEL:
 	MULTU	A,$80			; HL=0R00 0BBB B000 0000
 	BIT	6,H			; RAM BIT SET?
 	JR	Z,Z280_BNKSEL2		; IF NOT, ALL DONE
-	RES	6,H			; OTHERWISE, MOVE RAM BIT
-	SET	RAMLOC-16,H		; HL=0000 RBBB B000 0000
+	RES	6,H			; OTHERWISE, REMOVE RAM BIT
+	LD	A,RAMBIAS >> 6		; RAM OFFSET (TOP 8 BITS)
+	OR	H			; RECOMBINE
+	LD	H,A			; AND PUT BACK IN H
 ;
 Z280_BNKSEL2:
 ;
@@ -6115,10 +6051,12 @@ Z2DMAADR1:
 	; MOVE THE RAM/ROM BIT.
 	; RCBUS DMA HI=0000 RBBB BAAA 1111 LO=1111 AAAA AAAA AAAA
 	; ZZ80MB DMA HI=R000 0BBB BAAA 1111 LO=1111 AAAA AAAA AAAA
-	BIT	6,H
-	JR	Z,Z2DMAADR2
-	RES	6,H
-	SET	RAMLOC-16,H
+	BIT	6,H			; RAM BIT SET?
+	JR	Z,Z2DMAADR2		; IF NOT, ALL DONE
+	RES	6,H			; OTHERWISE, REMOVE RAM BIT
+	LD	A,RAMBIAS >> 6		; RAM OFFSET (TOP 8 BITS)
+	OR	H			; RECOMBINE
+	LD	H,A			; AND PUT BACK IN H
 ;
 Z2DMAADR2:
 	PUSH	HL			; SAVE IT FOR NOW
@@ -7804,7 +7742,6 @@ STR_LOWBAT	.DB	"\r\n\r\n+++ LOW BATTERY +++$"
 STR_PANIC	.TEXT	"\r\n>>> PANIC: $"
 STR_SYSCHK	.TEXT	"\r\n>>> SYSCHK: $"
 STR_CONTINUE	.TEXT	"\r\nContinue (Y/N)? $"
-STR_RESTART	.TEXT	"\r\n\r\n>>> Press hardware reset button to restart system\r\n\r\n$"
 ;
 #IF (DSKYENABLE)	;	'H','B','I','O',' ',' ',' ',' '
 MSG_HBVER		.DB	$76,$7F,$30,$3F,$00,$00,$00,$00	; "HBIO    "

Source/HBIOS/hbios.inc

@@ -435,9 +435,9 @@ HCB_BIDUSR	.EQU	$D9		; USER BANK (TPA)
 HCB_BIDBIOS	.EQU	$DA		; BIOS BANK (HBIOS, UBIOS)
 HCB_BIDAUX	.EQU	$DB		; AUX BANK (BPBIOS)
 HCB_BIDRAMD0	.EQU	$DC		; FIRST BANK OF RAM DRIVE
-HCB_BIDRAMDN	.EQU	$DD		; LAST BANK OF RAM DRIVE
+HCB_RAMD_BNKS	.EQU	$DD		; RAM DRIVE BANK COUNT
 HCB_BIDROMD0	.EQU	$DE		; FIRST BANK OF ROM DRIVE
-HCB_BIDROMDN	.EQU	$DF		; LAST BANK OF ROM DRIVE
+HCB_ROMD_BNKS	.EQU	$DF		; ROM DRIVE BANK COUNT
 ;
 ; HBIOS PROXY COMMON DATA BLOCK
 ; EXACTLY 32 BYTES AT $FFE0-$FFFF

Source/HBIOS/md.asm

@@ -72,32 +72,30 @@ MD_INIT:
 ;
 #IF (MDROM)
 	PRTS(" ROMDISK=$")
-;	LD	HL,ROMSIZE - 128
-	LD	A,(HCB + HCB_ROMBANKS)	; GET NUMBER OF BANKS
-	SUB	(TOT_ROM_RB)
-	LD	L,A
-	LD	H,0			; CALCULATE RAM SIZE
+	LD	A,(CB_ROMD_BNKS)	; ROM DISK SIZE IN BANKS
+	LD	L,A			; PUT IN L
+	LD	H,0			; CALCULATE ROM DISK SIZE
 	ADD	HL,HL			; X2
 	ADD	HL,HL			; X4
 	ADD	HL,HL			; X8
 	ADD	HL,HL			; X16
 	ADD	HL,HL			; X32
+	LD	(MD_ROMDSIZE),HL	; SAVE ROM DISK SIZE
 	CALL	PRTDEC
 	PRTS("KB$")
 #ENDIF
 ;
 #IF (MDRAM)
 	PRTS(" RAMDISK=$")
-;	LD	HL,RAMSIZE - 256
-	LD	A,(HCB + HCB_RAMBANKS)	; GET NUMBER OF BANKS
-	SUB	(TOT_RAM_RB)		; LESS RESERVED BANKS
-	LD	L,A
-	LD	H,0			; CALCULATE RAM SIZE
+	LD	A,(CB_RAMD_BNKS)	; RAM DISK SIZE IN BANKS
+	LD	L,A			; PUT IN L
+	LD	H,0			; CALCULATE RAM DISK SIZE
 	ADD	HL,HL			; X2
 	ADD	HL,HL			; X4
 	ADD	HL,HL			; X8
 	ADD	HL,HL			; X16
 	ADD	HL,HL			; X32
+	LD	(MD_RAMDSIZE),HL	; SAVE RAM DISK SIZE
 	CALL	PRTDEC
 	PRTS("KB$")
 #ENDIF
@@ -183,21 +181,18 @@ MD_CAP:					; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM
 	SYSCHKERR(ERR_NOUNIT)		; INVALID UNIT
 	RET
 MD_CAP0:
-	LD	A,(HCB + HCB_RAMBANKS)	; POINT TO RAM BANK COUNT
-	LD	B,TOT_RAM_RB		; SET # RESERVED RAM BANKS
-	JR	MD_CAP2
+	; RAM DISK SIZE
+	LD	HL,(MD_RAMDSIZE)	; SIZE IN KB
+	JR	MD_CAP2			; CONTINUE
 MD_CAP1:
-	LD	A,(HCB + HCB_ROMBANKS)	; POINT TO ROM BANK COUNT
-	LD	B,TOT_ROM_RB		; SET # RESERVED ROM BANKS
+	; ROM DISK SIZE
+	LD	HL,(MD_ROMDSIZE)	; SIZE IN KB
 MD_CAP2:
-	SUB	B			; SUBTRACT OUT RESERVED BANKS
-	LD	H,A			; H := # BANKS
-	LD	E,64			; # 512 BYTE BLOCKS / BANK
-	CALL	MULT8			; HL := TOTAL # 512 BYTE BLOCKS
-	LD	DE,0			; NEVER EXCEEDS 64K, ZERO HIGH WORD
+	ADD	HL,HL			; CONVERT TO BLOCK COUNT
+	LD	DE,0			; FILL IN HIGH WORD
 	LD	BC,512			; 512 BYTE SECTOR
-	XOR	A
-	RET
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
 ;
 ;
 ;
@@ -1032,6 +1027,8 @@ MD_FFSEN	.DB	00h		; FLASH FILES SYSTEM ENABLE
 ;
 #ENDIF
 ;
+MD_ROMDSIZE	.DW	0
+MD_RAMDSIZE	.DW	0
 MD_RWFNADR	.DW	0
 MD_DSKBUF	.DW	0
 MD_SRCBNK	.DB	0

Source/HBIOS/romldr.asm

@@ -140,7 +140,8 @@ start:
 	rst	08			; do it
 	ld	a,c			; previous bank to A
 	ld	(bid_ldr),a		; save previous bank for later
-	bit	7,a			; starting from ROM?
+	;;;bit	7,a			; starting from ROM?
+	cp	BID_IMG0		; ROM startup?
 #endif
 ;
 #if (BIOS == BIOS_UNA)
@@ -2189,7 +2190,9 @@ err:
 	ld	hl,str_err_prefix
 	call	pstr
 	pop	hl
-	jp	pstr
+	call	pstr
+	or	$ff			; signal error
+	ret				; done
 ;
 str_err_prefix	.db	bel,"\r\n\r\n*** ",0
 str_err_invcmd	.db	"Invalid command",0

Source/HBIOS/std.asm

@@ -566,10 +566,8 @@ SYSTIM	.SET	TM_Z280
 ;
 ; MEMORY BANK CONFIGURATION
 ;
-WBW_ROM_R	.EQU	128	; 128K			; RESERVED ROM REQUIRED FOR ROMWBW
-WBW_RAM_R	.EQU	256	; 256K			; RESERVED RAM REQUIRED FOR ROMWBW
-TOT_ROM_RB	.EQU	(WBW_ROM_R / 32)		; TOTAL ROM BANKS RESERVED
-TOT_RAM_RB	.EQU	(WBW_RAM_R / 32)		; TOTAL RAM BANKS RESERVED
+ROMBANKS	.EQU	(ROMSIZE / 32)			; TOTAL ROM BANKS
+RAMBANKS	.EQU	(RAMSIZE / 32)			; TOTAL RAM BANKS
 ;
 #IF (BIOS == BIOS_UNA)
 BID_ROM0	.EQU	$0000
@@ -580,26 +578,45 @@ BID_RAM0	.EQU	$8000
 BID_ROM0	.EQU	$00
 BID_RAM0	.EQU	$80
 #ENDIF
-
-BID_ROMN	.EQU	(BID_ROM0 + ((ROMSIZE / 32) - 1))
-BID_RAMN	.EQU	(BID_RAM0 + ((RAMSIZE / 32) - 1))
 ;
-BID_RAMD0	.EQU	BID_RAM0	; FIRST RAM DRIVE BANK			 ^  RAM
-BID_RAMDN	.EQU	BID_RAMN - TOT_RAM_RB	; LAST RAM DRIVE BANK		 |  DRIVE
-;					; OS BUFFERS CP/M3?			-+ THESE	CPM3 BNK 5 (BUF)
-;					; OS BUFFERS CP/M3?			 | MAKE		CPM3 BNK 4 (BUF)
-;					; OS BUFFERS CP/M3?			 | UP		CPM3 BNK 3 (BUF)
-;					; OS BUFFERS CP/M3?			 | THE		CPM3 BNK 2 (BUF)
-BID_AUX		.EQU	BID_RAMN - 3	; AUX BANK (BPBIOS, ETC.)		 | 256KB	CPM3 BNK 1 (TPA)
-BID_BIOS	.EQU	BID_RAMN - 2	; BIOS BANK				 | RESERVED
-BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		 | RAM		CPM3 BNK 0 (OS)
-BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		-+ BANKS
-BID_BOOT	.EQU	BID_ROM0 + 0	; BOOT BANK				-+ THESE MAKE
-BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	 | UP THE 128KB
-BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK		 	 | RESERVED
-BID_IMG2	.EQU	BID_ROM0 + 3	; NETWORK BOOT				-+ ROM BANKS
-BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK			 |  ROM
-BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK			 V  DRIVE
+BID_ROMN	.EQU	(BID_ROM0 + ROMBANKS - 1)
+BID_RAMN	.EQU	(BID_RAM0 + RAMBANKS - 1)
+;
+#IF (ROMSIZE > 0)
+;										-- TYPICAL --
+BID_BOOT	.EQU	BID_ROM0 + 0	; BOOT BANK				0x00
+BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	0x01
+BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK		 	0x02
+BID_IMG2	.EQU	BID_ROM0 + 3	; RESERVED				0x03
+BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK			0x04
+BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK			0x0F
+;
+BID_BIOS	.EQU	BID_RAM0	; HBIOS BANK				0x80
+BID_RAMD0	.EQU	BID_RAM0 + 1	; FIRST RAM DRIVE BANK			0x81
+BID_RAMDN	.EQU	BID_RAMN - 4	; LAST RAM DRIVE BANK			0x8B
+BID_BUF		.EQU	BID_RAMN - 3	; OS BUFFERS (CP/M3)			0x8C
+BID_AUX		.EQU	BID_RAMN - 2	; AUX BANK (CP/M 3, BPBIOS, ETC.)	0x8D
+BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		0x8E
+BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		0x8F
+;
+#ELSE
+;										-- TYPICAL --
+BID_BOOT	.EQU	BID_RAM0 + 0	; BOOT BANK				0x80
+BID_IMG0	.EQU	BID_RAM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	0x81
+BID_IMG1	.EQU	BID_RAM0 + 2	; SECOND IMAGES BANK		 	0x82
+BID_IMG2	.EQU	BID_RAM0 + 3	; RESERVED				0x83
+BID_RAMD0	.EQU	BID_RAM0 + 4	; FIRST RAM DRIVE BANK			0x84
+BID_RAMDN	.EQU	BID_RAMN - 4	; LAST RAM DRIVE BANK			0x8B
+BID_BUF		.EQU	BID_RAMN - 3	; OS BUFFERS (CP/M3)			0x8C
+BID_AUX		.EQU	BID_RAMN - 2	; AUX BANK (CP/M 3, BPBIOS, ETC.)	0x8D
+BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		0x8E
+BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		0x8F
+;
+BID_BIOS	.EQU	BID_BOOT	; HBIOS BANK				0x80
+BID_ROMD0	.EQU	0		; NO ROM DRIVE
+BID_ROMDN	.EQU	$FF		; NO ROM DRIVE
+;
+#ENDIF
 ;
 #IF (ROMSIZE == 0)
 BID_BOOT	.SET	BID_RAM0	; SPECIAL CASE ROM-LESS SYSTEM
@@ -609,17 +626,21 @@ BID_BOOT	.SET	BID_RAM0	; SPECIAL CASE ROM-LESS SYSTEM
 ;
   #IF (!MDRAM)
 BID_RAMD0	.SET	$FF		; RAM DRIVE DISABLED
-BID_RAMDN	.SET	$FF		; RAM DRIVE DISABLED
+BID_RAMDN	.SET	0		; RAM DRIVE DISABLED
   #ENDIF
 ;
   #IF (!MDROM)
 BID_ROMD0	.SET	$FF		; ROM DRIVE DISABLED
-BID_ROMDN	.SET	$FF		; ROM DRIVE DISABLED
+BID_ROMDN	.SET	0		; ROM DRIVE DISABLED
   #ENDIF
 ;
+ROMD_BNKS	.EQU	(BID_ROMDN - BID_ROMD0 + 1)
+RAMD_BNKS	.EQU	(BID_RAMDN - BID_RAMD0 + 1)
+;
 #ENDIF
 ;
-#IF FALSE
+#IF TRUE
+	.ECHO "BID_BUF: " \ .ECHO BID_BUF \ .ECHO "\n"
 	.ECHO "BID_AUX: " \ .ECHO BID_AUX \ .ECHO "\n"
 	.ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n"
 	.ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n"

Source/ZZRC/Build.cmd

@@ -4,39 +4,38 @@ setlocal
 set ROMFILE=..\..\Binary\RCZ280_zzrc.rom
 set ROMSIZE=262144
 
-if not exist %ROMFILE% goto :eof
+set TOOLS=../../Tools
 
-::
-:: The ROM image *must* be exactly 256K or the resulting disk
-:: image produced below will be invalid.  Check for the proper size.
-::
+set PATH=%TOOLS%\srecord;%PATH%
 
-call :filesize %ROMFILE%
+if exist ..\..\Binary\RCZ280_zzrc.rom call :build_zzrc
 
-if "%FILESIZE%" neq "%ROMSIZE%" (
-  echo.
-  echo.
-  echo ERROR: "%ROMFILE%" is not exactly %ROMSIZE% bytes as required!!!
-  echo You must specify a ROMSIZE of "256" when building the ZZRCC ROM image.
-  echo.
-  echo.
-  exit /b 1
-)
+if exist ..\..\Binary\RCZ280_zzrc_ram.rom call :build_zzrc_ram
 
-rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_zzrc.rom -Binary -Exclude 0x5000 0x7000 zzrc_romldr.hex -Intel -Output ..\..\Binary\RCZ280_zzrc.hex -Intel || exit /b
+goto :eof
 
-..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_zzrc.rom -Binary -Output ..\..\Binary\RCZ280_zzrc.hex -Intel || exit /b
+:build_zzrc
 
-rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_zzrc.hex -Intel -Output ..\..\Binary\RCZ280_zzrc_ldr.rom -Binary || exit /b
-
-rem copy /b zzrc_cfldr.bin + zzrc_ptbl.bin + zzrc_fill_1.bin + zzrc_mon.bin + zzrc_fill_2.bin + ..\..\Binary\RCZ280_zzrc_ldr.rom + zzrc_fill_3.bin ..\..\Binary\hd1k_zzrc_prefix.dat || exit /b
-
-copy /b zzrc_cfldr.bin + zzrc_ptbl.bin + zzrc_fill_1.bin + zzrc_mon.bin + zzrc_fill_2.bin + ..\..\Binary\RCZ280_zzrc.rom + zzrc_fill_3.bin ..\..\Binary\hd1k_zzrc_prefix.dat || exit /b
+srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ280_zzrc.rom -binary -offset 0x24000 -o temp.dat -binary
+move temp.dat ..\..\Binary\hd1k_zzrc_prefix.dat
 
 copy /b ..\..\Binary\hd1k_zzrc_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrc_combo.img || exit /b
 
 goto :eof
 
-:filesize
-set FILESIZE=%~z1
-goto :eof
+:build_zzrc_ram
+
+srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ280_zzrc_ram.rom -binary -offset 0x24000 -o temp.dat -binary
+move temp.dat ..\..\Binary\hd1k_zzrc_ram_prefix.dat
+
+copy /b ..\..\Binary\hd1k_zzrc_ram_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrc_ram_combo.img || exit /b
+
+goto :eof

Source/ZZRC/Makefile

@@ -1,15 +1,20 @@
 HD1KZZRCPREFIX = hd1k_zzrc_prefix.dat
 HD1KZZRCCOMBOIMG = hd1k_zzrc_combo.img
+HD1KZZRCRAMPREFIX = hd1k_zzrc_ram_prefix.dat
+HD1KZZRCRAMCOMBOIMG = hd1k_zzrc_ram_combo.img
 ZZRCROM = ../../Binary/RCZ280_zzrc.rom
-ZZRCROMHEX = RCZ280_zzrc.hex
+ZZRCRAMROM = ../../Binary/RCZ280_zzrc_ram.rom
 HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
 	../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
-ZZRCROMSIZE = 262144
 
 OBJECTS :=
 
 ifneq ($(wildcard $(ZZRCROM)),)
-	OBJECTS += $(ZZRCROMHEX) $(HD1KZZRCPREFIX) $(HD1KZZRCCOMBOIMG)
+	OBJECTS += $(HD1KZZRCPREFIX) $(HD1KZZRCCOMBOIMG)
+endif
+
+ifneq ($(wildcard $(ZZRCRAMROM)),)
+	OBJECTS += $(HD1KZZRCRAMPREFIX) $(HD1KZZRCRAMCOMBOIMG)
 endif
 
 DEST=../../Binary
@@ -20,14 +25,24 @@ include $(TOOLS)/Makefile.inc
 
 DIFFPATH = $(DIFFTO)/Binary
 
-zzrcromchk:
-	[ `wc -c $(ZZRCROM) | awk '{print $$1}'` = $(ZZRCROMSIZE) ]
-	
-$(HD1KZZRCPREFIX): zzrcromchk
-	cat zzrc_cfldr.bin zzrc_ptbl.bin zzrc_fill_1.bin zzrc_mon.bin zzrc_fill_2.bin $(ZZRCROM) zzrc_fill_3.bin >$@
+$(HD1KZZRCPREFIX):
+	srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZZRCROM) -binary -offset 0x24000 -o temp.dat -binary
+	mv temp.dat $@
 
-$(HD1KZZRCCOMBOIMG): zzrcromchk $(HD1KZZRCPREFIX) $(HD1KIMGS)
-	cat $(HD1KZZRCPREFIX) $(HD1KIMGS) > $@
+$(HD1KZZRCRAMPREFIX):
+	srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZZRCRAMROM) -binary -offset 0x24000 -o temp.dat -binary
+	mv temp.dat $@
 
-$(ZZRCROMHEX): zzrcromchk $(ZZRCROM)
-	srec_cat $(ZZRCROM) -Binary -Output $(ZZRCROMHEX) -Intel -CRLF
+$(HD1KZZRCCOMBOIMG): $(HD1KZZRCPREFIX) $(HD1KIMGS)
+	cat $^ > $@
+
+$(HD1KZZRCRAMCOMBOIMG): $(HD1KZZRCRAMPREFIX) $(HD1KIMGS)
+	cat $^ > $@

Source/ver.inc

@@ -2,7 +2,7 @@
 #DEFINE	RMN	3
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.3.0-dev.57"
+#DEFINE BIOSVER	"3.3.0-dev.59"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	3
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.3.0-dev.57"
+	db	"3.3.0-dev.59"
 	endm