mirror of
https://github.com/wwarthen/RomWBW.git
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Compare commits
3 Commits
v3.4.0-dev
...
v3.4.0-dev
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e9b9782ede | ||
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af00df9182 |
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@@ -3,7 +3,7 @@
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**RomWBW ReadMe** \
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Version 3.4 \
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||||
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
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14 Dec 2023
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18 Dec 2023
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# Overview
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@@ -1,6 +1,6 @@
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RomWBW ReadMe
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||||
Wayne Warthen (wwarthen@gmail.com)
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||||
14 Dec 2023
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18 Dec 2023
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@@ -4256,6 +4256,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
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- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- ACIA: IO=128, INTERRUPTS ENABLED
|
||||
- CH: IO=62
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||||
- CH: IO=60
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||||
- CHUSB: IO=62
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||||
- CHUSB: IO=60
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||||
- MD: TYPE=RAM
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||||
- MD: TYPE=ROM
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||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
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@@ -4292,6 +4296,10 @@ the RomWBW HBIOS configuration.
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||||
- UART: MODE=RC, IO=168
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||||
- SIO MODE=STD, IO=136, CHANNEL A, INTERRUPTS ENABLED
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||||
- SIO MODE=STD, IO=136, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
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||||
- CH: IO=60
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||||
- CHUSB: IO=62
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||||
- CHUSB: IO=60
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||||
- MD: TYPE=RAM
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||||
- MD: TYPE=ROM
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- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
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||||
@@ -4336,6 +4344,10 @@ the RomWBW HBIOS configuration.
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||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
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||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
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||||
- CH: IO=60
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||||
- CHUSB: IO=62
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- CHUSB: IO=60
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||||
- MD: TYPE=RAM
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- MD: TYPE=ROM
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- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
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@@ -4377,6 +4389,10 @@ the RomWBW HBIOS configuration.
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- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
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- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
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- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
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||||
- CH: IO=62
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||||
- CH: IO=60
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||||
- CHUSB: IO=62
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- CHUSB: IO=60
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||||
- MD: TYPE=RAM
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- MD: TYPE=ROM
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- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
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@@ -4418,6 +4434,10 @@ the RomWBW HBIOS configuration.
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- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
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||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
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||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
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||||
- CH: IO=60
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- CHUSB: IO=62
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- CHUSB: IO=60
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- ACIA: IO=128, INTERRUPTS ENABLED
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- MD: TYPE=RAM
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- MD: TYPE=ROM
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@@ -4457,6 +4477,10 @@ the RomWBW HBIOS configuration.
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- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
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||||
- CH: IO=60
|
||||
- CHUSB: IO=62
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||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
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||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4497,6 +4521,10 @@ the RomWBW HBIOS configuration.
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||||
- SIO MODE=STD, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4537,6 +4565,10 @@ the RomWBW HBIOS configuration.
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||||
- SIO MODE=STD, IO=24, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4578,6 +4610,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- ACIA: IO=128, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4621,6 +4657,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4665,6 +4705,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4736,6 +4780,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4779,6 +4827,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -4822,7 +4874,11 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- MD: TYPE=RAM
|
||||
- CH: IO=62
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||||
- CH: IO=60
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||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
S- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
|
||||
@@ -4978,6 +5034,10 @@ the RomWBW HBIOS configuration.
|
||||
- ACIA: IO=128, INTERRUPTS ENABLED
|
||||
- VRC: IO=0, KBD MODE=VRC, KBD IO=244
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- KBD: ENABLED
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- CH: IO=62
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||||
- CH: IO=60
|
||||
- CHUSB: IO=62
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||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -5021,6 +5081,10 @@ the RomWBW HBIOS configuration.
|
||||
- ACIA: IO=128, INTERRUPTS ENABLED
|
||||
- VRC: IO=0, KBD MODE=VRC, KBD IO=244
|
||||
- KBD: ENABLED
|
||||
- CH: IO=62
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||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
|
||||
@@ -5064,6 +5128,10 @@ the RomWBW HBIOS configuration.
|
||||
- ACIA: IO=128, INTERRUPTS ENABLED
|
||||
- VRC: IO=0, KBD MODE=VRC, KBD IO=244
|
||||
- KBD: ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
|
||||
@@ -5107,6 +5175,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
|
||||
@@ -5147,6 +5219,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- CH: IO=62
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- CH: IO=60
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- CHUSB: IO=62
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- CHUSB: IO=60
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- VRC: IO=0, KBD MODE=VRC, KBD IO=244
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- KBD: ENABLED
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- MD: TYPE=RAM
|
||||
@@ -5191,6 +5267,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- VRC: IO=0, KBD MODE=VRC, KBD IO=244
|
||||
- KBD: ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
|
||||
@@ -5233,6 +5313,10 @@ the RomWBW HBIOS configuration.
|
||||
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
|
||||
- VRC: IO=0, KBD MODE=VRC, KBD IO=244
|
||||
- KBD: ENABLED
|
||||
- CH: IO=62
|
||||
- CH: IO=60
|
||||
- CHUSB: IO=62
|
||||
- CHUSB: IO=60
|
||||
- MD: TYPE=RAM
|
||||
- MD: TYPE=ROM
|
||||
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
|
||||
@@ -5300,7 +5384,6 @@ the RomWBW HBIOS configuration.
|
||||
- MD: TYPE=ROM
|
||||
- SD: MODE=SC, IO=12, UNITS=1
|
||||
|
||||
|
||||
##### Notes:
|
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||||
`\clearpage`{=latex}
|
||||
|
||||
@@ -52,3 +52,4 @@ PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM
|
||||
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
|
||||
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
|
||||
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
|
||||
CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
|
||||
@@ -253,12 +253,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -303,12 +303,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -251,12 +251,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -253,16 +253,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
|
||||
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
|
||||
;
|
||||
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -257,16 +257,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
|
||||
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
|
||||
;
|
||||
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -252,16 +252,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
|
||||
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
|
||||
;
|
||||
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -247,16 +247,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
|
||||
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
|
||||
;
|
||||
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
|
||||
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
|
||||
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
|
||||
CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
|
||||
CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
|
||||
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
|
||||
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
|
||||
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
|
||||
CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
|
||||
CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
|
||||
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
|
||||
;
|
||||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
|
||||
|
||||
@@ -155,7 +155,14 @@ CH_INIT2:
|
||||
XOR A ; UNKNOWN MODE
|
||||
LD (CH_MODE),A ; SAVE IT
|
||||
;CALL CH_FLUSH ; FLUSH DEVICE OUTPUT QUEUE
|
||||
CALL CH_RESET ; FULL CH37X RESET
|
||||
;
|
||||
; I AM ENCOUNTERING SOME CH376 CHIPS THAT GO HAYWIRE AFTER A
|
||||
; RESET COMMAND. THEY STOP RESPONDING FOR A VERY LONG TIME.
|
||||
; I AM SEEING THIS ONLY ON "LC TECH" ADAPTERS AND ONLY ON Z80
|
||||
; SYSTEMS (NOT Z180). NO IDEA WHAT IS GOING ON, SO I AM
|
||||
; GIVING UP FOR NOW AND REMOVING THE RESET.
|
||||
;CALL CH_RESET ; FULL CH37X RESET
|
||||
;
|
||||
CALL CH_DETECT ; DETECT CHIP PRESENCE
|
||||
JR Z,CH_INIT3 ; GO AHEAD IF CHIP FOUND
|
||||
LD DE,CH_STR_NOHW ; NOT PRESENT
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
#DEFINE RMN 4
|
||||
#DEFINE RUP 0
|
||||
#DEFINE RTP 0
|
||||
#DEFINE BIOSVER "3.4.0-dev.34"
|
||||
#DEFINE BIOSVER "3.4.0-dev.37"
|
||||
#define rmj RMJ
|
||||
#define rmn RMN
|
||||
#define rup RUP
|
||||
|
||||
@@ -3,5 +3,5 @@ rmn equ 4
|
||||
rup equ 0
|
||||
rtp equ 0
|
||||
biosver macro
|
||||
db "3.4.0-dev.34"
|
||||
db "3.4.0-dev.37"
|
||||
endm
|
||||
|
||||
Reference in New Issue
Block a user