More Config Tweaks

Forth documentation and Hide NVR Config app

Doc/ChangeLog.txt

@@ -38,8 +38,8 @@ Version 3.5
 - WBW: Add CPU speed selection for HEATH platform to HBIOS
 - WBW: Add Warm/Cold reboot options to CPUSPD utility
 - D?N: Added support for eZ80 CPU
-- MAP: Contributed COPYSL utility
-- MAP: Added new HBIOS function EXT_SLICE (orginally SYSGET_DIOMED)
+- MAP: Contributed COPYSL utility that allows disk slices to be copied
+- MAP: Added new HBIOS function EXT_SLICE, extended disk slice info
 - MAP: ROMLDR now uses EXT_SLICE to get Slice Sector for boot
 - MAP: CBIOS now uses EXT_SLICE during drive selection
 - MAP: CPM3 Boot Loader, and BIOS (drive select) now use EXT_SLICE
@@ -47,7 +47,10 @@ Version 3.5
 - MAP: Significant improvement in Disk Catalog document
 - MAP: Added Disk Image for the Z3PLUS (Z-System for CP/M-Plus) os.
 - H?H: Fix XModem 12.3 WRERR to put CAN char in proper register to send.
-- MAP: Initial NVRAM configuration infrastructure, and boot device selection.
+- MAP: Added support for dynamic HBIOS config via (RTC) NVRAM
+- MAP: Added boot application to allow config of NVRAM options
+- MAP: Configuration of autoboot disk/app added to NVRAM config
+- WBW: Autoboot is now handled in seperate prompt during RomWBW startup
 - MAP: Added additional tools (Linker/Disasembler) to the Z80ASM Disk Image
 - PMS: Support interrupt-driven PS2 Keyboard Interface
 - D?M: Added NetBoot support for Duodyne

Doc/ReadMe.txt

@@ -31,9 +31,9 @@ Log of changes in RomWBW by version.
 RomWBW User Guide ("RomWBW User Guide.pdf")
 RomWBW System Guide ("RomWBW System Guide.pdf")
 RomWBW Applications ("RomWBW Applications.pdf")
-RomWBW ROM Applications ("RomWBW ROM Applications.pdf")
 RomWBW Disk Catalog ("RomWBW Disk Catalog.pdf")
-RomWBW Errata ("RomWBW Errata.pdf")
+RomWBW Hardware ("RomWBW Hardware.pdf")
+
 -------------------------------------------------------
 
 Documentation set for RomWBW.  The primary document is the

ReadMe.md

@@ -1,17 +1,22 @@
 
 
-**RomWBW ReadMe** \
+
+
+
+
+**RomWBW Introduction** \
 Version 3.5 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-18 Jan 2025
+27 Jan 2025
 
 # Overview
 
 RomWBW software provides a complete, commercial quality implementation
 of CP/M (and workalike) operating systems and applications for modern
-Z80/180/280 retro-computing hardware systems. A wide variety of
-platforms are supported including those produced by these developer
-communities:
+Z80/180/280 retro-computing hardware systems.
+
+A wide variety of platforms are supported including those produced by
+these developer communities:
 
 - [RetroBrew Computers](https://www.retrobrewcomputers.org)
   (<https://www.retrobrewcomputers.org>)
@@ -23,10 +28,21 @@ communities:
 - [Small Computer Central](https://smallcomputercentral.com/)
   (<https://smallcomputercentral.com/>)
 
-A complete list of the currently supported platforms is found in the
-\[Installation\] section.
+A complete list of the currently supported platforms is found in [RomWBW
+Hardware](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Hardware.pdf)
+.
 
-General features include:
+# Description
+
+## Primary Features
+
+By design, RomWBW isolates all of the hardware specific functions in the
+ROM chip itself. The ROM provides a hardware abstraction layer such that
+all of the operating systems and applications on a disk will run on any
+RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
+Card) and move it between systems transparently.
+
+Supported hardware features of RomWBW include:
 
 - Z80 Family CPUs including Z80, Z180, and Z280
 - Banked memory services for several banking designs
@@ -36,34 +52,19 @@ General features include:
 - Video drivers including TMS9918, SY6545, MOS8563, HD6445
 - Keyboard (PS/2) drivers via VT8242 or PPI interfaces
 - Real time clock drivers including DS1302, BQ4845
-- OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and
-  FreeRTOS
+- Support for CP/NET networking using Wiznet, MT011 or Serial
 - Built-in VT-100 terminal emulation support
 
-RomWBW is distributed as both source code and pre-built ROM and disk
-images. Some of the provided software can be launched directly from the
-ROM firmware itself:
-
-- System Monitor
-- Operating Systems (CP/M 2.2, ZSDOS)
-- ROM BASIC (Nascom BASIC and Tasty BASIC)
-- ROM Forth
-
 A dynamic disk drive letter assignment mechanism allows mapping
 operating system drive letters to any available disk media.
 Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
 support the use of multiple slices (up to 256 per device). Each slice
 contains a complete CP/M filesystem and can be mapped independently to
 any drive letter. This overcomes the inherent size limitations in legacy
-OSes and allows up to 2GB of accessible storage on a single device.
+OSes and allows up to 2GB of addressable storage on a single device,
+with up to 128MB accessible at any one time.
 
-The pre-built ROM firmware images are generally suitable for most users.
-However, it is also very easy to modify and build custom ROM images that
-fully tailor the firmware to your specific preferences. All tools
-required to build custom ROM firmware under Windows are included – no
-need to install assemblers, etc. The firmware can also be built using
-Linux or MacOS after confirming a few standard tools have been
-installed.
+## Included Software
 
 Multiple disk images are provided in the distribution. Most disk images
 contain a complete, bootable, ready-to-run implementation of a specific
@@ -72,37 +73,79 @@ with a full operating system implementation. If you use this disk image,
 you can easily pick whichever operating system you want to boot without
 changing media.
 
-By design, RomWBW isolates all of the hardware specific functions in the
-ROM chip itself. The ROM provides a hardware abstraction layer such that
-all of the operating systems and applications on a disk will run on any
-RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
-Card) and move it between systems transparently.
+Some of the included software:
+
+- Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS, QPM
+  )
+- Support for other operating systems, p-System, FreeRTOS, and FUZIX.
+- Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
+- C Compiler’s including Aztec-C, and HI-TECH C
+- Microsoft Basic Compiler, and Microsoft Fortran
+- Some games such as Colossal Cave, Zork, etc
+- Wordstar Word processing software
+
+Some of the provided software can be launched directly from the ROM
+firmware itself:
+
+- System Monitor
+- Operating Systems (CP/M 2.2, ZSDOS)
+- ROM BASIC (Nascom BASIC and Tasty BASIC)
+- ROM Forth
 
 A tool is provided that allows you to access a FAT-12/16/32 filesystem.
 The FAT filesystem may be coresident on the same disk media as RomWBW
 slices or on stand-alone media. This makes exchanging files with modern
 OSes such as Windows, MacOS, and Linux very easy.
 
-# Acquiring RomWBW
+## ROM Distribution
 
 The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
 (<https://github.com/wwarthen/RomWBW>) on GitHub is the official
-distribution location for all project source and documentation. The
-fully-built distribution releases are available on the [RomWBW Releases
-Page](https://github.com/wwarthen/RomWBW/releases)
-(<https://github.com/wwarthen/RomWBW/releases>) of the repository. On
-this page, you will normally see a Development Snapshot as well as
+distribution location for all project source and documentation.
+
+RomWBW is distributed as both source code and pre-built ROM and disk
+images.
+
+The pre-built ROM images distributed with RomWBW are based on the
+default system configurations as determined by the hardware
+provider/designer. The pre-built ROM firmware images are generally
+suitable for most users.
+
+The fully-built distribution releases are available on the [RomWBW
+Releases Page](https://github.com/wwarthen/RomWBW/releases)
+(<https://github.com/wwarthen/RomWBW/releases>) of the repository.
+
+On this page, you will normally see a Development Snapshot as well as
 recent stable releases. Unless you have a specific reason, I suggest you
-stick to the most recent stable release. Expand the “Assets” drop-down
-for the release you want to download, then select the asset named
-RomWBW-vX.X.X-Package.zip. The Package asset includes all pre-built ROM
-and Disk images as well as full source code. The other assets contain
-only source code and do not have the pre-built ROM or disk images.
+stick to the most recent stable release.
 
-All source code and distributions are maintained on GitHub. Code
-contributions are very welcome.
+The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM and
+Disk images as well as full source code. The other assets contain only
+source code and do not have the pre-built ROM or disk images.
 
-# Installation & Operation
+#### Distribution Directory Layout
+
+The RomWBW distribution is a compressed zip archive file organized in a
+set of directories. Each of these directories has its own ReadMe.txt
+file describing the contents in detail. In summary, these directories
+are:
+
+| **Directory** | **Description** |
+|----|----|
+| **Binary** | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in “.rom” and disk images ending in .img. |
+| **Doc** | Contains various detailed documentation, both RomWBW specifically as well as the operating systems and applications. |
+| **Source** | Contains the source code files used to build the software and ROM images. |
+| **Tools** | Contains the programs that are used by the build process or that may be useful in setting up your system. |
+
+#### Building from Source
+
+It is also very easy to modify and build custom ROM images that fully
+tailor the firmware to your specific preferences. All tools required to
+build custom ROM firmware under Windows are included – no need to
+install assemblers, etc. The firmware can also be built using Linux or
+MacOS after confirming a few standard tools have been installed.
+
+## Installation & Operation
 
 In general, installation of RomWBW on your platform is very simple. You
 just need to program your ROM with the correct ROM image from the RomWBW
@@ -119,18 +162,73 @@ for helpful release-specific information.
 
 ## Documentation
 
-Documentation for RomWBW includes:
+There are several documents that form the core of the RomWBW
+documentation:
 
 - [RomWBW User
   Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf)
-- [RomWBW System
-  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
+  is the main user guide for RomWBW, it covers the major topics of how
+  to install, manage and use RomWBW, and includes additional guidance to
+  the use of some of the operating systems supported by RomWBW
+
+- [RomWBW
+  Hardware](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Hardware.pdf)
+  contains a description of all the hardware platforms, and devices
+  supported by RomWBW.
+
 - [RomWBW
   Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Applications.pdf)
-- [RomWBW
-  Errata](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Errata.pdf)
+  is a reference for the ROM-hosted and OS-hosted applications created
+  or customized to enhance the operation of RomWBW.
 
-# Acknowledgments
+- [RomWBW Disk
+  Catalog](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Disk%20Catalog.pdf)
+  is a reference for the contents of the disk images provided with
+  RomWBW, with a description of many of the files on each image
+
+- [RomWBW System
+  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
+  discusses much of the internal design and construction of RomWBW. It
+  includes a reference for the RomWBW HBIOS API functions.
+
+Each of the operating systems and ROM applications included with RomWBW
+are sophisticated tools in their own right. It is not reasonable to
+fully document their usage. However, you will find complete manuals in
+PDF format in the Doc directory of the distribution. The intention of
+this documentation is to describe the operation of RomWBW and the ways
+in which it enhances the operation of the included applications and
+operating systems.
+
+Since RomWBW is purely a software product for many different platforms,
+the documentation does **not** cover hardware construction,
+configuration, or troubleshooting – please see your hardware provider
+for this information.
+
+# Support
+
+## Getting Assistance
+
+The best way to get assistance with RomWBW or any aspect of the
+RetroBrew Computers projects is via one of the community forums:
+
+- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
+- [RC2014 Google
+  Group](https://groups.google.com/forum/#!forum/rc2014-z80)
+- [retro-comp Google
+  Group](https://groups.google.com/forum/#!forum/retro-comp)
+
+Submission of issues and bugs are welcome at the [RomWBW GitHub
+Repository](https://github.com/wwarthen/RomWBW).
+
+Also feel free to email Wayne Warthen at <wwarthen@gmail.com>. I am
+happy to provide support adapting RomWBW to new or modified systems
+
+# Contributions
+
+All source code and distributions are maintained on GitHub.
+Contributions of all kinds to RomWBW are very welcome.
+
+## Acknowledgments
 
 I want to acknowledge that a great deal of the code and inspiration for
 RomWBW has been provided by or derived from the work of others in the
@@ -201,11 +299,14 @@ let me know if I missed you!
 - Martin R has provided substantial help reviewing and improving the
   User Guide and Applications documents.
 
-- Mark Pruden has also contributed a great deal of content to the Disk
-  Catalog, User Guide as well as contributing the disk image for the
-  Z3PLUS operating system, the COPYSL utility, and also implemented a
-  feature for RomWBW configuration by NVRAM, and added the /B bulk mode
-  of disk assignment to the ASSIGN utility.
+- Mark Pruden has made a wide variety of contributions including:
+
+  - significant content in the Disk Catalog and User Guide
+  - creation of the Introduction and Hardware documents
+  - Z3PLUS operating system disk image
+  - COPYSL utility
+  - a feature for RomWBW configuration by NVRAM
+  - the /B bulk mode of disk assignment to the ASSIGN utility
 
 - Jacques Pelletier has contributed the DS1501 RTC driver code.
 
@@ -238,10 +339,47 @@ let me know if I missed you!
 
 - Les Bird has contributed support for the NABU w/ Option Board
 
-Contributions of all kinds to RomWBW are very welcome.
+## Related Projects
+
+Outside of the hardware platforms adapted to RomWBW, there are a variety
+of projects that either target RomWBW specifically or provide a
+RomWBW-specific variation. These efforts are greatly appreciated and are
+listed below. Please contact the author if there are any other such
+projects that are not listed.
+
+#### Z88DK
+
+Z88DK is a software powerful development kit for Z80 computers
+supporting both C and assembly language. This kit now provides specific
+library support for RomWBW HBIOS. The Z88DK project is hosted at
+<https://github.com/z88dk/z88dk>.
+
+#### Paleo Editor
+
+Steve Garcia has created a Windows-hosted IDE that is tailored to
+development of RomWBW. The project can be found at
+<https://github.com/alloidian/PaleoEditor>.
+
+#### Z80 fig-FORTH
+
+Dimitri Theulings’ implementation of fig-FORTH for the Z80 has a
+RomWBW-specific variant. The project is hosted at
+<https://github.com/dimitrit/figforth>.
+
+#### Assembly Language Programming for the RC2014 Zed
+
+Bruce Hall has written a very nice document that describes how to
+develop assembly language applications on RomWBW. It begins with the
+setup and configuration of a new RC2014 Zed system running RomWBW. It
+describes not only generic CP/M application development, but also RomWBW
+HBIOS programming and bare metal programming. The latest copy of this
+document is hosted at [http://w8bh.net/Assembly for
+RC2014Z.pdf](http://w8bh.net/Assembly%20for%20RC2014Z.pdf).
 
 # Licensing
 
+## License Terms
+
 RomWBW is free software: you can redistribute it and/or modify it under
 the terms of the GNU General Public License as published by the Free
 Software Foundation, either version 3 of the License, or (at your
@@ -281,19 +419,3 @@ encouraged to submit their contributions via the RomWBW source code
 control system to ensure their contributions are clearly documented.
 
 All contributions to RomWBW are subject to this license.
-
-# Getting Assistance
-
-The best way to get assistance with RomWBW or any aspect of the
-RetroBrew Computers projects is via one of the community forums:
-
-- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
-- [RC2014 Google
-  Group](https://groups.google.com/forum/#!forum/rc2014-z80)
-- [retro-comp Google
-  Group](https://groups.google.com/forum/#!forum/retro-comp)
-
-Submission of issues and bugs are welcome at the [RomWBW GitHub
-Repository](https://github.com/wwarthen/RomWBW).
-
-Also feel free to email Wayne Warthen at <wwarthen@gmail.com>.

ReadMe.txt

@@ -1,6 +1,9 @@
-RomWBW ReadMe
+RomWBW Introduction
 Wayne Warthen (wwarthen@gmail.com)
-18 Jan 2025
+27 Jan 2025
+
+
+
 
 
 
@@ -9,9 +12,10 @@ OVERVIEW
 
 RomWBW software provides a complete, commercial quality implementation
 of CP/M (and workalike) operating systems and applications for modern
-Z80/180/280 retro-computing hardware systems. A wide variety of
-platforms are supported including those produced by these developer
-communities:
+Z80/180/280 retro-computing hardware systems.
+
+A wide variety of platforms are supported including those produced by
+these developer communities:
 
 -   RetroBrew Computers (https://www.retrobrewcomputers.org)
 -   RC2014 (https://rc2014.co.uk),
@@ -19,10 +23,23 @@ communities:
 -   Retro Computing (https://groups.google.com/g/retro-comp)
 -   Small Computer Central (https://smallcomputercentral.com/)
 
-A complete list of the currently supported platforms is found in the
-[Installation] section.
+A complete list of the currently supported platforms is found in RomWBW
+Hardware .
 
-General features include:
+
+
+DESCRIPTION
+
+
+Primary Features
+
+By design, RomWBW isolates all of the hardware specific functions in the
+ROM chip itself. The ROM provides a hardware abstraction layer such that
+all of the operating systems and applications on a disk will run on any
+RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
+Card) and move it between systems transparently.
+
+Supported hardware features of RomWBW include:
 
 -   Z80 Family CPUs including Z80, Z180, and Z280
 -   Banked memory services for several banking designs
@@ -32,34 +49,20 @@ General features include:
 -   Video drivers including TMS9918, SY6545, MOS8563, HD6445
 -   Keyboard (PS/2) drivers via VT8242 or PPI interfaces
 -   Real time clock drivers including DS1302, BQ4845
--   OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and
-    FreeRTOS
+-   Support for CP/NET networking using Wiznet, MT011 or Serial
 -   Built-in VT-100 terminal emulation support
 
-RomWBW is distributed as both source code and pre-built ROM and disk
-images. Some of the provided software can be launched directly from the
-ROM firmware itself:
-
--   System Monitor
--   Operating Systems (CP/M 2.2, ZSDOS)
--   ROM BASIC (Nascom BASIC and Tasty BASIC)
--   ROM Forth
-
 A dynamic disk drive letter assignment mechanism allows mapping
 operating system drive letters to any available disk media.
 Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
 support the use of multiple slices (up to 256 per device). Each slice
 contains a complete CP/M filesystem and can be mapped independently to
 any drive letter. This overcomes the inherent size limitations in legacy
-OSes and allows up to 2GB of accessible storage on a single device.
+OSes and allows up to 2GB of addressable storage on a single device,
+with up to 128MB accessible at any one time.
 
-The pre-built ROM firmware images are generally suitable for most users.
-However, it is also very easy to modify and build custom ROM images that
-fully tailor the firmware to your specific preferences. All tools
-required to build custom ROM firmware under Windows are included – no
-need to install assemblers, etc. The firmware can also be built using
-Linux or MacOS after confirming a few standard tools have been
-installed.
+
+Included Software
 
 Multiple disk images are provided in the distribution. Most disk images
 contain a complete, bootable, ready-to-run implementation of a specific
@@ -68,11 +71,24 @@ with a full operating system implementation. If you use this disk image,
 you can easily pick whichever operating system you want to boot without
 changing media.
 
-By design, RomWBW isolates all of the hardware specific functions in the
-ROM chip itself. The ROM provides a hardware abstraction layer such that
-all of the operating systems and applications on a disk will run on any
-RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
-Card) and move it between systems transparently.
+Some of the included software:
+
+-   Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS,
+    QPM )
+-   Support for other operating systems, p-System, FreeRTOS, and FUZIX.
+-   Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
+-   C Compiler’s including Aztec-C, and HI-TECH C
+-   Microsoft Basic Compiler, and Microsoft Fortran
+-   Some games such as Colossal Cave, Zork, etc
+-   Wordstar Word processing software
+
+Some of the provided software can be launched directly from the ROM
+firmware itself:
+
+-   System Monitor
+-   Operating Systems (CP/M 2.2, ZSDOS)
+-   ROM BASIC (Nascom BASIC and Tasty BASIC)
+-   ROM Forth
 
 A tool is provided that allows you to access a FAT-12/16/32 filesystem.
 The FAT filesystem may be coresident on the same disk media as RomWBW
@@ -80,30 +96,67 @@ slices or on stand-alone media. This makes exchanging files with modern
 OSes such as Windows, MacOS, and Linux very easy.
 
 
-
-ACQUIRING ROMWBW
-
+ROM Distribution
 
 The RomWBW Repository (https://github.com/wwarthen/RomWBW) on GitHub is
 the official distribution location for all project source and
-documentation. The fully-built distribution releases are available on
-the RomWBW Releases Page (https://github.com/wwarthen/RomWBW/releases)
-of the repository. On this page, you will normally see a Development
-Snapshot as well as recent stable releases. Unless you have a specific
-reason, I suggest you stick to the most recent stable release. Expand
-the “Assets” drop-down for the release you want to download, then select
-the asset named RomWBW-vX.X.X-Package.zip. The Package asset includes
-all pre-built ROM and Disk images as well as full source code. The other
-assets contain only source code and do not have the pre-built ROM or
-disk images.
+documentation.
 
-All source code and distributions are maintained on GitHub. Code
-contributions are very welcome.
+RomWBW is distributed as both source code and pre-built ROM and disk
+images.
+
+The pre-built ROM images distributed with RomWBW are based on the
+default system configurations as determined by the hardware
+provider/designer. The pre-built ROM firmware images are generally
+suitable for most users.
+
+The fully-built distribution releases are available on the RomWBW
+Releases Page (https://github.com/wwarthen/RomWBW/releases) of the
+repository.
+
+On this page, you will normally see a Development Snapshot as well as
+recent stable releases. Unless you have a specific reason, I suggest you
+stick to the most recent stable release.
+
+The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM and
+Disk images as well as full source code. The other assets contain only
+source code and do not have the pre-built ROM or disk images.
+
+Distribution Directory Layout
+
+The RomWBW distribution is a compressed zip archive file organized in a
+set of directories. Each of these directories has its own ReadMe.txt
+file describing the contents in detail. In summary, these directories
+are:
+
+  -------------------------------------------------------------------------
+  DIRECTORY   DESCRIPTION
+  ----------- -------------------------------------------------------------
+  BINARY      The final output files of the build process are placed here.
+              Most importantly, the ROM images with the file names ending
+              in “.rom” and disk images ending in .img.
+
+  DOC         Contains various detailed documentation, both RomWBW
+              specifically as well as the operating systems and
+              applications.
+
+  SOURCE      Contains the source code files used to build the software and
+              ROM images.
+
+  TOOLS       Contains the programs that are used by the build process or
+              that may be useful in setting up your system.
+  -------------------------------------------------------------------------
+
+Building from Source
+
+It is also very easy to modify and build custom ROM images that fully
+tailor the firmware to your specific preferences. All tools required to
+build custom ROM firmware under Windows are included – no need to
+install assemblers, etc. The firmware can also be built using Linux or
+MacOS after confirming a few standard tools have been installed.
 
 
-
-INSTALLATION & OPERATION
-
+Installation & Operation
 
 In general, installation of RomWBW on your platform is very simple. You
 just need to program your ROM with the correct ROM image from the RomWBW
@@ -118,18 +171,73 @@ Notes for helpful release-specific information.
 
 Documentation
 
-Documentation for RomWBW includes:
+There are several documents that form the core of the RomWBW
+documentation:
 
--   RomWBW User Guide
--   RomWBW System Guide
--   RomWBW Applications
--   RomWBW Errata
+-   RomWBW User Guide is the main user guide for RomWBW, it covers the
+    major topics of how to install, manage and use RomWBW, and includes
+    additional guidance to the use of some of the operating systems
+    supported by RomWBW
+
+-   RomWBW Hardware contains a description of all the hardware
+    platforms, and devices supported by RomWBW.
+
+-   RomWBW Applications is a reference for the ROM-hosted and OS-hosted
+    applications created or customized to enhance the operation of
+    RomWBW.
+
+-   RomWBW Disk Catalog is a reference for the contents of the disk
+    images provided with RomWBW, with a description of many of the files
+    on each image
+
+-   RomWBW System Guide discusses much of the internal design and
+    construction of RomWBW. It includes a reference for the RomWBW HBIOS
+    API functions.
+
+Each of the operating systems and ROM applications included with RomWBW
+are sophisticated tools in their own right. It is not reasonable to
+fully document their usage. However, you will find complete manuals in
+PDF format in the Doc directory of the distribution. The intention of
+this documentation is to describe the operation of RomWBW and the ways
+in which it enhances the operation of the included applications and
+operating systems.
+
+Since RomWBW is purely a software product for many different platforms,
+the documentation does NOT cover hardware construction, configuration,
+or troubleshooting – please see your hardware provider for this
+information.
 
 
 
-ACKNOWLEDGMENTS
+SUPPORT
 
 
+Getting Assistance
+
+The best way to get assistance with RomWBW or any aspect of the
+RetroBrew Computers projects is via one of the community forums:
+
+-   RetroBrew Computers Forum
+-   RC2014 Google Group
+-   retro-comp Google Group
+
+Submission of issues and bugs are welcome at the RomWBW GitHub
+Repository.
+
+Also feel free to email Wayne Warthen at wwarthen@gmail.com. I am happy
+to provide support adapting RomWBW to new or modified systems
+
+
+
+CONTRIBUTIONS
+
+
+All source code and distributions are maintained on GitHub.
+Contributions of all kinds to RomWBW are very welcome.
+
+
+Acknowledgments
+
 I want to acknowledge that a great deal of the code and inspiration for
 RomWBW has been provided by or derived from the work of others in the
 RetroBrew Computers Community. I sincerely appreciate all of their
@@ -200,11 +308,14 @@ let me know if I missed you!
 -   Martin R has provided substantial help reviewing and improving the
     User Guide and Applications documents.
 
--   Mark Pruden has also contributed a great deal of content to the Disk
-    Catalog, User Guide as well as contributing the disk image for the
-    Z3PLUS operating system, the COPYSL utility, and also implemented a
-    feature for RomWBW configuration by NVRAM, and added the /B bulk
-    mode of disk assignment to the ASSIGN utility.
+-   Mark Pruden has made a wide variety of contributions including:
+
+    -   significant content in the Disk Catalog and User Guide
+    -   creation of the Introduction and Hardware documents
+    -   Z3PLUS operating system disk image
+    -   COPYSL utility
+    -   a feature for RomWBW configuration by NVRAM
+    -   the /B bulk mode of disk assignment to the ASSIGN utility
 
 -   Jacques Pelletier has contributed the DS1501 RTC driver code.
 
@@ -238,13 +349,50 @@ let me know if I missed you!
 
 -   Les Bird has contributed support for the NABU w/ Option Board
 
-Contributions of all kinds to RomWBW are very welcome.
+
+Related Projects
+
+Outside of the hardware platforms adapted to RomWBW, there are a variety
+of projects that either target RomWBW specifically or provide a
+RomWBW-specific variation. These efforts are greatly appreciated and are
+listed below. Please contact the author if there are any other such
+projects that are not listed.
+
+Z88DK
+
+Z88DK is a software powerful development kit for Z80 computers
+supporting both C and assembly language. This kit now provides specific
+library support for RomWBW HBIOS. The Z88DK project is hosted at
+https://github.com/z88dk/z88dk.
+
+Paleo Editor
+
+Steve Garcia has created a Windows-hosted IDE that is tailored to
+development of RomWBW. The project can be found at
+https://github.com/alloidian/PaleoEditor.
+
+Z80 fig-FORTH
+
+Dimitri Theulings’ implementation of fig-FORTH for the Z80 has a
+RomWBW-specific variant. The project is hosted at
+https://github.com/dimitrit/figforth.
+
+Assembly Language Programming for the RC2014 Zed
+
+Bruce Hall has written a very nice document that describes how to
+develop assembly language applications on RomWBW. It begins with the
+setup and configuration of a new RC2014 Zed system running RomWBW. It
+describes not only generic CP/M application development, but also RomWBW
+HBIOS programming and bare metal programming. The latest copy of this
+document is hosted at http://w8bh.net/Assembly for RC2014Z.pdf.
 
 
 
 LICENSING
 
 
+License Terms
+
 RomWBW is free software: you can redistribute it and/or modify it under
 the terms of the GNU General Public License as published by the Free
 Software Foundation, either version 3 of the License, or (at your
@@ -284,20 +432,3 @@ encouraged to submit their contributions via the RomWBW source code
 control system to ensure their contributions are clearly documented.
 
 All contributions to RomWBW are subject to this license.
-
-
-
-GETTING ASSISTANCE
-
-
-The best way to get assistance with RomWBW or any aspect of the
-RetroBrew Computers projects is via one of the community forums:
-
--   RetroBrew Computers Forum
--   RC2014 Google Group
--   retro-comp Google Group
-
-Submission of issues and bugs are welcome at the RomWBW GitHub
-Repository.
-
-Also feel free to email Wayne Warthen at wwarthen@gmail.com.

Source/Doc/Applications.md

@@ -596,7 +596,7 @@ CamelForth is the version of Forth included as part of the boot ROM in
 RomWBW. It has been converted from the Z80 CP/M version published at 
 <https://www.camelforth.com/page.php?5>. The 
 author is Brad Rodriguez who is a prolific Forth enthusiast, whose work 
-can be found here: <https://www.bradrodriguez/papers/index.html>.
+can be found here: <https://www.bradrodriguez.com/papers>.
 
 For those are who are not familiar with Forth, I recommend the
 wikipedia article <https://en.wikipedia.org/wiki/Forth_(programming_language)>
@@ -618,6 +618,10 @@ words are added to the dictionary.
 This implementation does not support loading or saving of programs. All programs
 need to be typed in. Additionally, screen editing and code blocks are not supported.
 
+A CP/M version is not provided with RomWBW, this is only a ROM application. If you need to 
+run it under CP/M you would need to download it from the camelforth web site, the link is 
+above.
+
 ### Structure of Forth source files
 
 File          | Description
@@ -2551,7 +2555,7 @@ checking.
 
 The `WDATE` application was written and contributed by Kevin Boone.
 The source code is available on GitHub at
-<https://github.com/kevinboone/wdate-cpm/blob/main/README.md>.
+<https://github.com/kevinboone/wdate-cpm>.
 
 `\clearpage`{=latex}
 

Source/Doc/Basic.h

@@ -8,11 +8,12 @@ $define{doc_date}{$date{%d %b %Y}$}$
 $ifndef{doc_authmail}$ $define{doc_authmail}{wwarthen@gmail.com}$ $endif$
 $define{doc_orgname}{RetroBrew Computers Group}$
 $define{doc_orgurl}{www.retrobrewcomputers.org}$
+$define{doc_intro}{[RomWBW Introduction]($doc_root$/RomWBW Introduction.pdf)}$
 $define{doc_user}{[RomWBW User Guide]($doc_root$/RomWBW User Guide.pdf)}$
 $define{doc_sys}{[RomWBW System Guide]($doc_root$/RomWBW System Guide.pdf)}$
 $define{doc_apps}{[RomWBW Applications]($doc_root$/RomWBW Applications.pdf)}$
 $define{doc_catalog}{[RomWBW Disk Catalog]($doc_root$/RomWBW Disk Catalog.pdf)}$
-$define{doc_errata}{[RomWBW Errata]($doc_root$/RomWBW Errata.pdf)}$
+$define{doc_hardware}{[RomWBW Hardware]($doc_root$/RomWBW Hardware.pdf)}$
 
 ---
 title: $doc_product$ $doc_title$

Source/Doc/Build.cmd

@@ -15,20 +15,24 @@ set PATH=%TOOLS%\gpp;%PATH%
 
 if not "%1"=="" (call :GenDoc %1 & goto :eof)
 
-call :GenDoc ReadMe || exit /b
+:: call :GenDoc ReadMe || exit /b
+call :GenDoc Introduction || exit /b
 call :GenDoc UserGuide || exit /b
 call :GenDoc SystemGuide || exit /b
 call :GenDoc Applications || exit /b
 call :GenDoc Catalog || exit /b
-call :GenDoc Errata || exit /b
+call :GenDoc Hardware || exit /b
 
-if exist ReadMe.gfm copy Readme.gfm ..\..\ReadMe.md || exit /b
-if exist ReadMe.txt copy ReadMe.txt ..\..\ReadMe.txt || exit /b
+:: if exist ReadMe.gfm copy Readme.gfm ..\..\ReadMe.md || exit /b
+:: if exist ReadMe.txt copy ReadMe.txt ..\..\ReadMe.txt || exit /b
+if exist Introduction.gfm copy Introduction.gfm ..\..\ReadMe.md || exit /b
+if exist Introduction.txt copy Introduction.txt ..\..\ReadMe.txt || exit /b
+if exist Introduction.pdf copy Introduction.pdf "..\..\Doc\RomWBW Introduction.pdf" || exit /b
 if exist UserGuide.pdf copy UserGuide.pdf "..\..\Doc\RomWBW User Guide.pdf" || exit /b
 if exist SystemGuide.pdf copy SystemGuide.pdf "..\..\Doc\RomWBW System Guide.pdf" || exit /b
 if exist Applications.pdf copy Applications.pdf "..\..\Doc\RomWBW Applications.pdf" || exit /b
 if exist Catalog.pdf copy Catalog.pdf "..\..\Doc\RomWBW Disk Catalog.pdf" || exit /b
-if exist Errata.pdf copy Errata.pdf "..\..\Doc\RomWBW Errata.pdf" || exit /b
+if exist Hardware.pdf copy Hardware.pdf "..\..\Doc\RomWBW Hardware.pdf" || exit /b
 
 echo.
 goto :eof
@@ -53,4 +57,4 @@ pandoc %1.tmp -f markdown -t gfm-yaml_metadata_block -s -o %1.gfm --default-imag
 ::pandoc %1.tmp -f markdown -t gfm-yaml_metadata_block -s -o %1.txt --markdown-headings=setext --default-image-extension=png || exit /b
 pandoc %1.tmp -f markdown -t plain+gutenberg -s -o %1.txt || exit /b
 
-goto :eof
+goto :eof

Source/Doc/Catalog.md

@@ -381,11 +381,10 @@ The following files appear in User Area 0
 | `GET.COM`     | DRI CPM+ Temporarily get console input form a disk file                |
 | `HELP.COM`    | DRI CPM+ Display information on how to use commands                    |
 | `HELP.HLP`    | DRI CPM+ Databse of help information for HELP.COM                      |
-| `HEXCOM.COM`  | DRI CPM+ Create a COM file from a hex file output by MAC               |
+| `HEXCOM.COM`  | DRI CPM+ Create a COM file from a hex file (replaces LOAD.COM)         |
 | `INITDIR.COM` | DRI CPM+ Initializes a disk to allow time and date stamping            |
 | `LIB.COM`     | DRI object file library manager                                        |
 | `LINK.COM`    | DRI object file linker                                                 |
-| `LOAD.COM`    | DRI loader for Intel hex files                                         |
 | `MAC.COM`     | DRI 8080 macro assembler                                               |
 | `PATCH.COM`   | DRI CPM+ Display or install patch to the CPM+ system or command files  |
 | `PIP.COM`     | DRI CPM+ Periperal Interchange Program                                 |
@@ -671,6 +670,8 @@ The following are found in
 | CPN3MT.LBR      | CP/NET 3            | CP/M 3          | RCBus w/ MT011          |
 | CPN12DUO.LBR    | CP/NET 1.2          | CP/M 2.2        | Duodyne w/ Disk I/O     |
 | CPN3DUO.LBR     | CP/NET 3            | CP/M 3          | Duodyne w/ Disk I/O     |
+| CPN12SER.LBR    | CP/NET 1.2          | CP/M 2.2        | RomWBW Serial Port      |
+| CPN3SER.LBR     | CP/NET 3            | CP/M 3          | RomWBW Serial Port      |
 
 ## General Purpose Applications
 

Source/Doc/Errata.md

@@ -1,19 +0,0 @@
-$define{doc_title}{Errata}$
-$include{"Book.h"}$
-
-# Errata
-
-The following errata apply to $doc_product$ $doc_ver$:
-
-* The use of high density floppy disks requires a CPU speed of 8 MHz or 
-  greater.
-
-* The PropIO support is based on RomWBW specific firmware. Be sure to 
-  program/update your PropIO firmware with the corresponding firmware 
-  image provided in the Binary directory of the RomWBW distribution.
-
-* Reading bytes from the video memory of the VDU board (not Color 
-  VDU) appears to be problematic. This is only an issue when the driver 
-  needs to scroll a portion of the screen which is done by applications 
-  such as WordStar or ZDE. You are likely to see screen corruption in 
-  this case.

Source/Doc/Introduction.md

@@ -0,0 +1,409 @@
+$define{doc_title}{Introduction}$
+$include{"Book.h"}$
+
+# Overview
+
+RomWBW software provides a complete, commercial quality
+implementation of CP/M (and workalike) operating systems and
+applications for modern Z80/180/280 retro-computing hardware systems.
+
+A wide variety of platforms are supported including those
+produced by these developer communities:
+
+* [RetroBrew Computers](https://www.retrobrewcomputers.org)
+  (<https://www.retrobrewcomputers.org>)
+* [RC2014](https://rc2014.co.uk) (<https://rc2014.co.uk>), \
+  [RC2014-Z80](https://groups.google.com/g/rc2014-z80)
+  (<https://groups.google.com/g/rc2014-z80>)
+* [Retro Computing](https://groups.google.com/g/retro-comp)
+  (<https://groups.google.com/g/retro-comp>)
+* [Small Computer Central](https://smallcomputercentral.com/)
+  (<https://smallcomputercentral.com/>)
+
+A complete list of the currently supported platforms is found in
+$doc_hardware$ .
+
+`\clearpage`{=latex}
+
+# Description
+
+## Primary Features
+
+By design, RomWBW isolates all of the hardware specific functions in
+the ROM chip itself.  The ROM provides a hardware abstraction layer
+such that all of the operating systems and applications on a disk
+will run on any RomWBW-based system.  To put it simply, you can take
+a disk (or CF/SD/USB Card) and move it between systems transparently.
+
+Supported hardware features of RomWBW include:
+
+* Z80 Family CPUs including Z80, Z180, and Z280
+* Banked memory services for several banking designs
+* Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip, Iomega
+* Serial drivers including UART (16550-like), ASCI, ACIA, SIO
+* Video drivers including TMS9918, SY6545, MOS8563, HD6445
+* Keyboard (PS/2) drivers via VT8242 or PPI interfaces
+* Real time clock drivers including DS1302, BQ4845
+* Support for CP/NET networking using Wiznet, MT011 or Serial
+* Built-in VT-100 terminal emulation support
+
+A dynamic disk drive letter assignment mechanism allows mapping
+operating system drive letters to any available disk media.
+Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
+support the use of multiple slices (up to 256 per device). Each slice
+contains a complete CP/M filesystem and can be mapped independently to
+any drive letter. This overcomes the inherent size limitations in legacy
+OSes and allows up to 2GB of addressable storage on a single device, 
+with up to 128MB accessible at any one time.
+
+## Included Software
+
+Multiple disk images are provided in the distribution. Most disk
+images contain a complete, bootable, ready-to-run implementation of a
+specific operating system. A "combo" disk image contains multiple
+slices, each with a full operating system implementation. If you use
+this disk image, you can easily pick whichever operating system you
+want to boot without changing media.
+
+Some of the included software:
+
+* Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS, QPM )
+* Support for other operating systems, p-System, FreeRTOS, and FUZIX.
+* Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
+* C Compiler's including Aztec-C, and HI-TECH C
+* Microsoft Basic Compiler, and Microsoft Fortran
+* Some games such as Colossal Cave, Zork, etc
+* Wordstar Word processing software
+
+Some of the provided software can be launched directly from the
+ROM firmware itself:
+
+* System Monitor
+* Operating Systems (CP/M 2.2, ZSDOS)
+* ROM BASIC (Nascom BASIC and Tasty BASIC)
+* ROM Forth
+
+A tool is provided that allows you to access a FAT-12/16/32 filesystem.
+The FAT filesystem may be coresident on the same disk media as RomWBW
+slices or on stand-alone media.  This makes exchanging files with modern
+OSes such as Windows, MacOS, and Linux very easy.
+
+`\clearpage`{=latex}
+
+## ROM Distribution 
+
+The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
+(<https://github.com/wwarthen/RomWBW>) on GitHub is the official
+distribution location for all project source and documentation.
+
+RomWBW is distributed as both source code and pre-built ROM and disk
+images.
+
+The pre-built ROM images distributed with RomWBW are based on
+the default system configurations as determined by the hardware
+provider/designer. The pre-built ROM firmware images are generally
+suitable for most users.
+
+The fully-built distribution releases are available on the
+[RomWBW Releases Page](https://github.com/wwarthen/RomWBW/releases)
+(<https://github.com/wwarthen/RomWBW/releases>) of the repository.
+
+On this page, you will normally see a Development Snapshot as well as
+recent stable releases. Unless you have a specific reason, I suggest you
+stick to the most recent stable release.
+
+The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM
+and Disk images as well as full source code. The other assets contain
+only source code and do not have the pre-built ROM or disk images.
+
+#### Distribution Directory Layout
+
+The RomWBW distribution is a compressed zip archive file organized in
+a set of directories. Each of these directories has its own
+ReadMe.txt file describing the contents in detail. In summary, these
+directories are:
+
+| **Directory**            | **Description**                                                                                                                                                    |
+|--------------------------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| **Binary**               | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in ".rom" and disk images ending in .img. |
+| **Doc**                  | Contains various detailed documentation, both RomWBW specifically as well as the operating systems and applications.                                               |
+| **Source**               | Contains the source code files used to build the software and ROM images.                                                                                          |
+| **Tools**                | Contains the programs that are used by the build process or that may be useful in setting up your system.                                                          |
+
+`\clearpage`{=latex}
+
+#### Building from Source
+
+It is also very easy to modify and build custom ROM
+images that fully tailor the firmware to your specific preferences.
+All tools required to build custom ROM firmware under Windows are
+included -- no need to install assemblers, etc.  The firmware can also
+be built using Linux or MacOS after confirming a few standard tools
+have been installed.
+
+## Installation & Operation
+
+In general, installation of RomWBW on your platform is very simple. You
+just need to program your ROM with the correct ROM image from the RomWBW
+distribution. Subsequently, you can write disk images on your disk
+drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
+functionality.
+
+Complete instructions for installation and operation of RomWBW are found
+in the $doc_user$. It is also a good idea to review the [Release
+Notes](https://github.com/wwarthen/RomWBW/blob/master/RELEASE_NOTES.md)
+for helpful release-specific information.
+
+## Documentation
+
+There are several documents that form the core of the RomWBW documentation:
+
+* $doc_user$ is the main user guide for RomWBW, it covers the major topics
+  of how to install, manage and use RomWBW, and includes additional guidance
+  to the use of some of the operating systems supported by RomWBW
+
+* $doc_hardware$ contains a description of all the hardware platforms,
+  and devices supported by RomWBW.
+
+* $doc_apps$ is a reference for the ROM-hosted and OS-hosted applications
+  created or customized to enhance the operation of RomWBW.
+
+* $doc_catalog$ is a reference for the contents of the disk images
+  provided with RomWBW, with a description of many of the files on each image
+
+* $doc_sys$ discusses much of the internal design and construction
+  of RomWBW.  It includes a reference for the RomWBW HBIOS API
+  functions.
+
+Each of the operating systems and ROM applications included with RomWBW
+are sophisticated tools in their own right. It is not reasonable to
+fully document their usage. However, you will find complete manuals
+in PDF format in the Doc directory of the distribution.  The intention
+of this documentation is to describe the operation of RomWBW and the ways in
+which it enhances the operation of the included applications and
+operating systems.
+
+Since RomWBW is purely a software product for many different platforms,
+the documentation does **not** cover hardware construction,
+configuration, or troubleshooting -- please see your hardware provider
+for this information.
+
+# Support 
+
+## Getting Assistance
+
+The best way to get assistance with RomWBW or any aspect of the
+RetroBrew Computers projects is via one of the community forums:
+
+* [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
+* [RC2014 Google Group](https://groups.google.com/forum/#!forum/rc2014-z80)
+* [retro-comp Google Group](https://groups.google.com/forum/#!forum/retro-comp)
+
+Submission of issues and bugs are welcome at the
+[RomWBW GitHub Repository](https://github.com/wwarthen/RomWBW).
+
+Also feel free to email $doc_author$ at [$doc_authmail$](mailto:$doc_authmail$).
+I am happy to provide support adapting RomWBW to new or modified systems
+
+# Contributions
+
+All source code and distributions are maintained on GitHub.
+Contributions of all kinds to RomWBW are very welcome.
+
+## Acknowledgments
+
+I want to acknowledge that a great deal of the code and inspiration
+for RomWBW has been provided by or derived from the work of others
+in the RetroBrew Computers Community.  I sincerely appreciate all of
+their contributions.  The list below is probably missing many names --
+please let me know if I missed you!
+
+* Andrew Lynch started it all when he created the N8VEM Z80 SBC
+  which became the first platform RomWBW supported.  Some of his
+  original code can still be found in RomWBW.
+
+* Dan Werner wrote much of the code from which RomWBW was originally
+  derived and he has always been a great source of knowledge and
+  advice.
+
+* Douglas Goodall contributed code, time, testing, and advice in  "the
+  early days". He created an entire suite of application programs to
+  enhance the use of RomWBW. Unfortunately, they have become unusable
+  due  to internal changes within RomWBW. As of RomWBW 2.6, these
+  applications are no longer provided.
+
+* Sergey Kiselev created several hardware platforms for RomWBW
+  including the very popular Zeta.
+
+* David Giles created support for the Z180 CSIO which is now included
+  SD Card driver.
+
+* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver, DMA support, and a long list of general code
+  and documentation enhancements.
+
+* Ed Brindley contributed some of the code that supports the RCBus
+  platform.
+
+* Spencer Owen created the RC2014 series of hobbyist kit computers
+  which has exponentially increased RomWBW usage.  Some of his kits
+  include RomWBW.
+
+* Stephen Cousins has likewise created a series of hobbyist kit
+  computers at Small Computer Central and is distributing RomWBW
+  with many of them.
+
+* Alan Cox has contributed some driver code and has provided a great
+  deal of advice.
+
+* The CP/NET client files were developed by Douglas Miller.
+
+* Phillip Stevens contributed support for FreeRTOS.
+
+* Curt Mayer contributed the original Linux / MacOS build process.
+
+* UNA BIOS and FDISK80 are the products of John Coffman.
+
+* FLASH4 is a product of Will Sowerbutts.
+
+* CLRDIR is a product of Max Scane.
+
+* Tasty Basic is a product of Dimitri Theulings.
+
+* Dean Netherton contributed eZ80 CPU support, the sound driver
+  interface, and the SN76489 sound driver.
+
+* The RomWBW Disk Catalog document was produced by Mykl Orders.
+
+* Rob Prouse has created many of the supplemental disk images
+  including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
+  BASIC Compiler, Microsoft Fortran Compiler, and a Games
+  compendium.
+
+* Martin R has provided substantial help reviewing and improving the
+  User Guide and Applications documents.
+
+* Mark Pruden has made a wide variety of contributions including:
+  - significant content in the Disk Catalog and User Guide
+  - creation of the Introduction and Hardware documents
+  - Z3PLUS operating system disk image
+  - COPYSL utility
+  - a feature for RomWBW configuration by NVRAM
+  - the /B bulk mode of disk assignment to the ASSIGN utility
+
+* Jacques Pelletier has contributed the DS1501 RTC driver code.
+
+* Jose Collado has contributed enhancements to the TMS driver
+  including compatibility with standard TMS register configuration.
+
+* Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
+
+* Matt Carroll has contributed a fix to XM.COM that corrects the
+  port specification when doing a send.
+
+* Dean Jenkins enhanced the build process to accommodate the
+  Raspberry Pi 4.
+
+* Tom Plano has contributed a new utility (HTALK) to allow talking
+  directly to HBIOS COM ports.
+
+* Lars Nelson has contributed several generic utilities such as
+  a universal (OS agnostic) UNARC application.
+
+* Dylan Hall added support for specifying a secondary console.
+
+* Bill Shen has contributed boot loaders for several of his
+  systems.
+
+* Laszlo Szolnoki has contributed an EF9345 video display
+  controller driver.
+
+* Ladislau Szilagyi has contributed an enhanced version of
+  CP/M Cowgol that leverages RomWBW memory banking.
+
+* Les Bird has contributed support for the NABU w/ Option Board
+
+`\clearpage`{=latex}
+
+## Related Projects
+
+Outside of the hardware platforms adapted to RomWBW, there are a variety
+of projects that either target RomWBW specifically or provide
+a RomWBW-specific variation.  These efforts are greatly appreciated
+and are listed below.  Please contact the author if there are any other
+such projects that are not listed.
+
+#### Z88DK
+
+Z88DK is a software powerful development kit for Z80 computers
+supporting both C and assembly language.  This kit now provides
+specific library support for RomWBW HBIOS.  The Z88DK project is
+hosted at <https://github.com/z88dk/z88dk>.
+
+#### Paleo Editor
+
+Steve Garcia has created a Windows-hosted IDE that is tailored to
+development of RomWBW.  The project can be found at
+<https://github.com/alloidian/PaleoEditor>.
+
+#### Z80 fig-FORTH
+
+Dimitri Theulings' implementation of fig-FORTH for the Z80 has a
+RomWBW-specific variant. The project is hosted at
+<https://github.com/dimitrit/figforth>.
+
+#### Assembly Language Programming for the RC2014 Zed
+
+Bruce Hall has written a very nice document that describes how to
+develop assembly language applications on RomWBW.  It begins with the
+setup and configuration of a new RC2014 Zed system running RomWBW.
+It describes not only generic CP/M application development, but also
+RomWBW HBIOS programming and bare metal programming.  The latest copy
+of this document is hosted at
+[http://w8bh.net/Assembly for RC2014Z.pdf](http://w8bh.net/Assembly%20for%20RC2014Z.pdf).
+
+# Licensing
+
+## License Terms
+
+RomWBW is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+RomWBW is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with RomWBW.  If not, see <https://www.gnu.org/licenses/>.
+
+Portions of RomWBW were created by, contributed by, or derived from
+the work of others.  It is believed that these works are being used
+in accordance with the intentions and/or licensing of their creators.
+
+If anyone feels their work is being used outside of its intended
+licensing, please notify:
+
+> $doc_author$ \
+> [$doc_authmail$](mailto:$doc_authmail$)
+
+RomWBW is an aggregate work.  It is composed of many individual,
+standalone programs that are distributed as a whole to function as
+a cohesive system.  Each program may have its own licensing which
+may be different from other programs within the aggregate.
+
+In some cases, a single program (e.g., CP/M Operating System) is
+composed of multiple components with different licenses.  It is
+believed that in all such cases the licenses are compatible with
+GPL version 3.
+
+RomWBW encourages code contributions from others.  Contributors
+may assert their own copyright in their contributions by
+annotating the contributed source code appropriately.  Contributors
+are further encouraged to submit their contributions via the RomWBW
+source code control system to ensure their contributions are clearly
+documented.
+
+All contributions to RomWBW are subject to this license.

Source/Doc/Makefile

@@ -9,7 +9,7 @@
 # On Ubuntu Linux:
 # apt install gpp pandoc texlive texlive-luatex texlive-fonts-extra
 #
-OBJECTS = ReadMe.gfm ReadMe.txt UserGuide.pdf SystemGuide.pdf Applications.pdf Catalog.pdf Errata.pdf
+OBJECTS = Introduction.gfm Introduction.txt Introduction.pdf UserGuide.pdf SystemGuide.pdf Applications.pdf Catalog.pdf Hardware.pdf
 # DEST = ../../Doc
 TOOLS = ../../Tools
 OTHERS = *.tmp
@@ -31,16 +31,17 @@ all :: deploy
 	pandoc $< -f markdown -t dokuwiki -s -o $@ --default-image-extension=pdf
 
 %.gfm : %.tmp
-	pandoc $< -f markdown -t gfm -s -o $@ --default-image-extension=pdf
+	pandoc $< -f markdown -t gfm-yaml_metadata_block -s -o $@ --default-image-extension=pdf
 
 %.txt : %.tmp
 	pandoc $< -f markdown -t plain -s -o $@ --default-image-extension=pdf
 
 deploy :
-	cp ReadMe.gfm            "../../ReadMe.md"
-	cp ReadMe.txt            "../../ReadMe.txt"
+	cp Introduction.gfm      "../../ReadMe.md"
+	cp Introduction.txt      "../../ReadMe.txt"
+	cp Introduction.pdf      "../../Doc/RomWBW Introduction.pdf"
 	cp UserGuide.pdf         "../../Doc/RomWBW User Guide.pdf"
 	cp SystemGuide.pdf       "../../Doc/RomWBW System Guide.pdf"
 	cp Applications.pdf      "../../Doc/RomWBW Applications.pdf"
 	cp Catalog.pdf           "../../Doc/RomWBW Disk Catalog.pdf"
-	cp Errata.pdf            "../../Doc/RomWBW Errata.pdf"
+	cp Hardware.pdf          "../../Doc/RomWBW Hardware.pdf"

Source/Doc/ReadMe.md

@@ -3,9 +3,10 @@ $include{"Basic.h"}$
 
 # Overview
 
-RomWBW software provides a complete, commercial quality 
-implementation of CP/M (and workalike) operating systems and 
+RomWBW software provides a complete, commercial quality
+implementation of CP/M (and workalike) operating systems and
 applications for modern Z80/180/280 retro-computing hardware systems.
+
 A wide variety of platforms are supported including those
 produced by these developer communities:
 
@@ -22,7 +23,7 @@ produced by these developer communities:
 A complete list of the currently supported platforms is found in the
 [Installation] section.
 
-General features include:
+Supported hardware features of RomWBW include:
 
 * Z80 Family CPUs including Z80, Z180, and Z280
 * Banked memory services for several banking designs
@@ -31,7 +32,7 @@ General features include:
 * Video drivers including TMS9918, SY6545, MOS8563, HD6445
 * Keyboard (PS/2) drivers via VT8242 or PPI interfaces
 * Real time clock drivers including DS1302, BQ4845
-* OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and FreeRTOS
+* Support for CP/NET networking using Wiznet, MT011 or Serial
 * Built-in VT-100 terminal emulation support
 
 RomWBW is distributed as both source code and pre-built ROM and disk
@@ -43,13 +44,14 @@ ROM firmware itself:
 * ROM BASIC (Nascom BASIC and Tasty BASIC)
 * ROM Forth
 
-A dynamic disk drive letter assignment mechanism allows mapping 
-operating system drive letters to any available disk media. 
-Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.) 
-support the use of multiple slices (up to 256 per device). Each slice 
-contains a complete CP/M filesystem and can be mapped independently to 
+A dynamic disk drive letter assignment mechanism allows mapping
+operating system drive letters to any available disk media.
+Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
+support the use of multiple slices (up to 256 per device). Each slice
+contains a complete CP/M filesystem and can be mapped independently to
 any drive letter. This overcomes the inherent size limitations in legacy
-OSes and allows up to 2GB of accessible storage on a single device.
+OSes and allows up to 2GB of accessible storage on a single device, 
+with up to 128MB accessible at any one time.
 
 The pre-built ROM firmware images are generally suitable for most
 users. However, it is also very easy to modify and build custom ROM
@@ -72,25 +74,25 @@ such that all of the operating systems and applications on a disk
 will run on any RomWBW-based system.  To put it simply, you can take
 a disk (or CF/SD/USB Card) and move it between systems transparently.
 
-A tool is provided that allows you to access a FAT-12/16/32 filesystem. 
-The FAT filesystem may be coresident on the same disk media as RomWBW 
+A tool is provided that allows you to access a FAT-12/16/32 filesystem.
+The FAT filesystem may be coresident on the same disk media as RomWBW
 slices or on stand-alone media.  This makes exchanging files with modern
 OSes such as Windows, MacOS, and Linux very easy.
 
 # Acquiring RomWBW
 
 The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
-(<https://github.com/wwarthen/RomWBW>) on GitHub is the official 
-distribution location for all project source and documentation.  The 
-fully-built distribution releases are available on the
+(<https://github.com/wwarthen/RomWBW>) on GitHub is the official
+distribution location for all project source and documentation.
+The fully-built distribution releases are available on the
 [RomWBW Releases Page](https://github.com/wwarthen/RomWBW/releases)
-(<https://github.com/wwarthen/RomWBW/releases>) of the repository.  On 
-this page, you will normally see a Development Snapshot as well as 
+(<https://github.com/wwarthen/RomWBW/releases>) of the repository.
+On this page, you will normally see a Development Snapshot as well as
 recent stable releases. Unless you have a specific reason, I suggest you
- stick to the most recent stable release. Expand the "Assets" drop-down 
-for the release you want to download, then select the asset named 
-RomWBW-vX.X.X-Package.zip. The Package asset includes all pre-built ROM 
-and Disk images as well as full source code. The other assets contain 
+stick to the most recent stable release.
+
+The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM
+and Disk images as well as full source code. The other assets contain
 only source code and do not have the pre-built ROM or disk images.
 
 All source code and distributions are maintained on GitHub. Code
@@ -113,10 +115,12 @@ for helpful release-specific information.
 
 Documentation for $doc_product$ includes:
 
+* $doc_intro$
 * $doc_user$
 * $doc_sys$
 * $doc_apps$
-* $doc_errata$
+* $doc_catalog$
+* $doc_hardware$
 
 # Acknowledgments
 
@@ -190,12 +194,14 @@ please let me know if I missed you!
 
 * Martin R has provided substantial help reviewing and improving the
   User Guide and Applications documents.
-  
-* Mark Pruden has also contributed a great deal of content to the
-  Disk Catalog, User Guide as well as contributing the disk image
-  for the Z3PLUS operating system, the COPYSL utility, and also
-  implemented a feature for RomWBW configuration by NVRAM,
-  and added the /B bulk mode of disk assignment to the ASSIGN utility.
+
+* Mark Pruden has made a wide variety of contributions including:
+  - significant content in the Disk Catalog and User Guide
+  - creation of the Introduction and Hardware documents
+  - Z3PLUS operating system disk image
+  - COPYSL utility
+  - a feature for RomWBW configuration by NVRAM
+  - the /B bulk mode of disk assignment to the ASSIGN utility
 
 * Jacques Pelletier has contributed the DS1501 RTC driver code.
 

Source/Forth/camel80.azm

@@ -6,7 +6,7 @@ BF_SYSRESET		EQU	0F0h		; RESTART SYSTEM
 BF_SYSRES_WARM		EQU	01h		; WARM START (RESTART BOOT LOADER)
 
 
-; THE FOLLOWING NEED TO BE SYNCED WITH STD.ASM SO ROMLDR
+; THE FOLLOWING NEED TO BE SYNCED WITH INCLUDE.ASM SO ROMLDR
 ; KNOWS WHERE THIS EXECUTES AT
 
 FTH_SIZ			EQU	1700h
@@ -31,7 +31,7 @@ HB_LOC			EQU	0FD80h
 ; You should have received a copy of the GNU General Public License
 ; along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
-; Commercial inquiries should be directed to the author at 
+; Commercial inquiries should be directed to the author at
 ; 115 First St., #105, Collingwood, Ontario L9Y 4W3 Canada
 ; or via email to bj@camelforth.com
 ;
@@ -68,18 +68,18 @@ HB_LOC			EQU	0FD80h
 ;                   keywords are being passed in a
 ;                   macro.
 ;       b1ackmai1er difficultylevelhigh@gmail.com
-;   03-Dec 20 v1.02 Add James Bowmans double 
+;   03-Dec 20 v1.02 Add James Bowmans double
 ;                   precision words as per RC2014
-;                   version. Increase terminal 
+;                   version. Increase terminal
 ;                   input buffer (TIB) size.
-;       b1ackmai1er difficultylevelhigh@gmail.com  
+;       b1ackmai1er difficultylevelhigh@gmail.com
 ;   22-Jan 21 v1.02 Adjust for revised HBIOS
 ;                   proxy size.
 ;       b1ackmai1er difficultylevelhigh@gmail.com
-;   07-Sep 21 v1.02 Separate additions.  
+;   07-Sep 21 v1.02 Separate additions.
 ;   05-Oct 21 v1.02 Add Douglas Beattie Jr.'s
 ;                   API call and port read and
-;                   write words.                
+;                   write words.
 ; ===============================================
 ; Macros to define Forth headers
 ; HEAD  label,length,name,action
@@ -296,7 +296,7 @@ dodoes: ; -- a-addr
         next
 
 ; CP/M TERMINAL I/O =============================
- 
+
 ;C EMIT     c --    output character to console
     head EMIT,4,EMIT,docode
 		PUSH	DE
@@ -309,7 +309,7 @@ dodoes: ; -- a-addr
 		POP		DE
 		pop		BC					; PUT TOP OF STACK IN BC
 		next
-;		
+;
 ;Z SAVEKEY  -- addr  temporary storage for KEY?
     head savekey,7,SAVEKEY,dovar
 SVKY:	DW 0
@@ -318,7 +318,7 @@ SVKY:	DW 0
     head querykey,4,KEY?,docode
 		PUSH	BC					; SAVE TOP OF STACK
 		PUSH	DE
-		PUSH	HL					; GET CONSOLE INPUT STATUS VIA HBIOS					
+		PUSH	HL					; GET CONSOLE INPUT STATUS VIA HBIOS
 		LD		C,CIODEV_CONSOLE	; CONSOLE UNIT TO C
 		LD		B,CIOIST			; HBIOS FUNC: INPUT STATUS
 		RST		08					; HBIOS RETURNS STATUS IN A
@@ -334,7 +334,7 @@ key3:	LD		C,0
 		LD		(HL),B
 		INC		HL
 		LD		(HL),C
-		POP		HL					 
+		POP		HL
 		POP		DE
 		next
 
@@ -1090,6 +1090,6 @@ ELSE
 	nop
 ENDIF
 	.DEPHASE
-		
+
         END
 

Source/HBIOS/Config/GMZ180_std.asm

@@ -60,7 +60,7 @@ FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

Source/HBIOS/Config/MK4_std.asm

@@ -54,7 +54,7 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)

Source/HBIOS/Config/RCEZ80_std.asm

@@ -52,7 +52,7 @@ CPUOSC		.SET	20000000	; CPU OSC FREQ IN MHZ
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]

Source/HBIOS/Config/RCZ180_ext_std.asm

@@ -44,9 +44,14 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ180.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 ;
 MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
@@ -54,14 +59,18 @@ MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
@@ -80,11 +89,22 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ180_nat_std.asm

@@ -44,9 +44,14 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ180.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 ;
 MEMMGR		.SET	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
@@ -54,14 +59,18 @@ MEMMGR		.SET	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
@@ -74,17 +83,28 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ180_z1rcc_std.asm

@@ -62,7 +62,7 @@ Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -88,7 +88,8 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ280_ext_std.asm

@@ -59,7 +59,7 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
@@ -79,7 +79,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ280_nat_std.asm

@@ -59,8 +59,7 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
-;
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
@@ -80,8 +79,8 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER

Source/HBIOS/Config/RCZ280_zz80mb_std.asm

@@ -83,7 +83,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm

@@ -91,7 +91,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ280_zzrcc_std.asm

@@ -87,15 +87,15 @@ MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 ;
-;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_coleco_std.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW DEFAULT BUILD SETTINGS FOR RCBUS Z80 W/ JBL GAME BOARDS
+;   ROMWBW DEFAULT BUILD SETTINGS FOR RCBUS Z80 W/ JBL GAME BOARDS AND COLECO STYLE GAMES
 ;==================================================================================================
 ;
 ; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -54,7 +54,6 @@
 ; MOVING THE SECONDARY CLOCK DIVIDER JUMPER (E.G., 38400 @ 2.458MHZ). THE BAUD RATE DOES
 ; NOT NEED TO BE CHANGED IN THIS CONFIGURATION FILE IN ORDER TO DO THIS, BUT THE DEVICE
 ; LIST WILL INCORRECTLY SHOW THE PORT RUNNING AT 115200 REGARDLESS OF THE CLOCK DIVIDER.
-; UNCOMMENT THE LINE THAT SETS BOOTCON TO 1 TO BOOT ON THE SECOND SIO PORT BY DEFAULT.
 ;
 ; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
 ; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
@@ -69,34 +68,20 @@
 #INCLUDE "Config/RCZ80_std.asm"
 ;
 CPUOSC		.SET	3686400		; CPU OSC FREQ IN MHZ
-;
-VDAEMU_SERKBD	.SET	1		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-;
 UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
-;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
-SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0ACFG	.SET	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
-SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0BCFG	.SET	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
-SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSMODE		.SET	TMSMODE_COLECO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 ;
-FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
-;
-IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER

Source/HBIOS/Config/RCZ80_easy_std.asm

@@ -46,11 +46,16 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
 PLATFORM	.SET	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	10000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
@@ -60,17 +65,18 @@ CTCMODE		.SET	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
 CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
 WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -87,7 +93,6 @@ TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 ;
-;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 ;
@@ -95,10 +100,19 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;

Source/HBIOS/Config/RCZ80_ez512_std.asm

@@ -46,30 +46,38 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
-CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 ;
+CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$00		; KIO BASE I/O ADDRESS
-;
-RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-MEMMGR		.SET	MM_EZ512	; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
-FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
-;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
 CTCOSC		.SET	1843200		; CTC CLOCK FREQUENCY
 ;
-DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+MEMMGR		.SET	MM_EZ512	; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
 ;
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
@@ -89,20 +97,25 @@ EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 ;
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
 ;
-CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
-;
 FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 ;
-IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_EZ512	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;

Source/HBIOS/Config/RCZ80_k80w_std.asm

@@ -52,15 +52,12 @@ INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
 ;
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
-;
-DSRTCMODE	.SET	DSRTCMODE_K80W	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
-;
-AUTOCON		.SET	FALSE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
-;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
 CTCOSC		.SET	1843200		; CTC CLOCK FREQUENCY
 ;
+DSRTCMODE	.SET	DSRTCMODE_K80W	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
+;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP

Source/HBIOS/Config/RCZ80_kio_std.asm

@@ -50,11 +50,12 @@
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
-;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
 ;
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP

Source/HBIOS/Config/RCZ80_skz_std.asm

@@ -44,23 +44,30 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 ;
 SKZENABLE	.SET	TRUE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_12		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 WDOGMODE	.SET	WDOG_SKZ	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
 LEDPORT		.SET	$6E		; STATUS LED PORT ADDRESS
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
@@ -78,15 +85,27 @@ EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_std.asm

@@ -44,18 +44,28 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 ;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
@@ -80,11 +90,15 @@ SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;

Source/HBIOS/Config/RCZ80_tiny_std.asm

@@ -46,11 +46,16 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
 PLATFORM	.SET	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	16000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
@@ -62,18 +67,20 @@ CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
 EIPCENABLE	.SET	TRUE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
 LEDPORT		.SET	$6E		; STATUS LED PORT ADDRESS
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -99,12 +106,22 @@ IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_zrc512_std.asm

@@ -46,21 +46,34 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
 ;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -81,10 +94,19 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;

Source/HBIOS/Config/RCZ80_zrc_ram_std.asm

@@ -46,21 +46,34 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 ;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -81,12 +94,22 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_zrc_std.asm

@@ -46,21 +46,34 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
 ;
 #INCLUDE "cfg_RCZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 ;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+;
 RAMSIZE		.SET	1536		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
+;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -79,12 +92,22 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SCZ180_sc126_std.asm

@@ -59,7 +59,7 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$0D		; FP: PORT ADDRESS FOR FP LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -84,11 +84,10 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SCZ180_sc130_std.asm

@@ -60,7 +60,7 @@ FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -85,11 +85,10 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SCZ180_sc131_std.asm

@@ -58,9 +58,10 @@ Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
-;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
 ;
+LCDENABLE	.SET	FALSE		; DISABLE LCD DISPLAY
+;
 DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 ;
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -74,9 +75,6 @@ SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
-
-LCDENABLE	.SET	FALSE		; DISABLE LCD DISPLAY

Source/HBIOS/Config/SCZ180_sc140_std.asm

@@ -62,6 +62,8 @@ FPSW_IO		.SET	$A0		; FP: PORT ADDRESS FOR FP SWITCHES
 ;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
 ;
+LCDENABLE	.SET	FALSE		; DISABLE LCD DISPLAY
+;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;

Source/HBIOS/Config/SCZ180_sc503_std.asm

@@ -63,6 +63,8 @@ FPSW_IO		.SET	$A0		; FP: PORT ADDRESS FOR FP SWITCHES
 LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
 ;
+LCDENABLE	.SET	FALSE		; DISABLE LCD DISPLAY
+;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;

Source/HBIOS/Config/SCZ180_sc700_std.asm

@@ -59,7 +59,7 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
 LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
@@ -84,11 +84,10 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/cfg_DUO.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Duodyne", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -64,7 +64,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_UNSUP	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -332,21 +331,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$48		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$EC		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_DYNO.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Dyno", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -330,11 +329,11 @@ PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_EPITX.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "MiniITX"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -128,7 +127,7 @@ SECCON		.SET	$FF		; SECONDARY CONSOLE DEVICE
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU		.SET	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
 ; TODO - ADD PS/2 BITBANGER
-VDAEMU_SERKBD	.SET	$00		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ANSITRACE	.SET	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPKTRACE	.SET	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -341,21 +340,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_FZ80.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "S100 FPGA Z80", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -350,21 +349,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$C7		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_GMZ180.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "GM STD BUS Z180", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -346,21 +345,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_HEATH.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "HEATHKIT", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	16384000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -132,7 +131,7 @@ BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
 SECCON		.SET	$FF		; SECONDARY CONSOLE DEVICE
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU		.SET	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ANSITRACE	.SET	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPKTRACE	.SET	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -340,21 +339,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_MASTER.asm

@@ -43,7 +43,7 @@
 ; TO REDEFINE A PREVIOUS DEFINITION.
 ;
 #DEFINE PLATFORM_NAME "RomWBW", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_9600_8N1
+#DEFINE DEFSERCFG SER_9600_8N1		; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -65,7 +65,6 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	1000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.EQU	SER_9600_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -409,21 +408,21 @@ LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.EQU	PPAMODE_NONE	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.EQU	IMMMODE_NONE	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.EQU	IMMMODE_NONE	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_MBC.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Nhyodyne", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -64,7 +64,6 @@ CPUSPDCAP	.SET	SPD_HILO	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -318,21 +317,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$EC		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_MK4.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Mark IV", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -329,11 +328,11 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$EC		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

Source/HBIOS/cfg_MON.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Monsputer", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	4000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -345,21 +344,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_N8.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "RetroBrew N8", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -322,11 +321,11 @@ PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

Source/HBIOS/cfg_NABU.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "NABU Personal Computer", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	3580000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -350,21 +349,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_RCEZ80.asm

@@ -1,432 +0,0 @@
-;
-;==================================================================================================
-;   ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: RCZE80
-;==================================================================================================
-;
-; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
-; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD,
-; YOU SHOULD OVERRIDE SETTINGS YOU WANT USING A CONFIGURATION FILE IN
-; THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
-;
-; THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.  IT IS MAINTAINED BY THE
-; AUTHORS OF ROMWBW.  TO OVERRIDE SETTINGS YOU SHOULD USE A
-; CONFIGURATION FILE IN THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
-;
-; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
-;
-; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
-; |
-; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
-;     |
-;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
-;         |
-;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
-;
-; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
-; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
-; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
-; OVERRIDE THESE SETTINGS AS DESIRED.
-;
-; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
-; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
-; MODIFIED.  TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THE
-; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
-; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
-; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
-;
-; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
-; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
-; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
-;
-; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
-; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
-; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
-;
-#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
-;
-#INCLUDE "cfg_MASTER.asm"
-;
-PLATFORM	.SET	PLT_RCEZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
-CPUFAM		.SET	CPU_EZ80	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
-BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
-BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
-HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
-USELZSA2	.SET	TRUE		; ENABLE FONT COMPRESSION
-TICKFREQ	.SET	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
-;
-BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
-BOOT_DELAY	.SET	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
-AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
-;
-CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
-CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
-CPUOSC		.SET	20000000	; CPU OSC FREQ IN MHZ
-INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
-;
-RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-APP_BNKS	.SET	$FF		; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
-MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
-MPGSEL_0	.SET	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
-MPGSEL_1	.SET	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
-MPGSEL_2	.SET	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
-MPGSEL_3	.SET	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
-MPGENA		.SET	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
-;
-RTCIO		.SET	$C0		; RTC LATCH REGISTER ADR
-;
-KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
-KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
-;
-CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
-CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
-CTCMODE		.SET	CTCMODE_TIM16	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
-CTCPRE		.SET	256		; PRESCALE CONSTANT (1-256)
-CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
-CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
-CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
-;
-PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
-PCFBASE		.SET	$F0		; PCF8584 BASE I/O ADDRESS
-;
-EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
-;
-SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
-SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
-;
-WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
-WDOGIO		.SET	$6E		; WATCHDOG REGISTER ADR
-;
-FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
-FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
-;
-DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
-;
-LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
-;
-DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
-DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
-ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
-ICMPPIBASE	.SET	$60		; BASE I/O ADDRESS OF ICM PPI
-PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
-PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
-PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
-H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
-LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
-GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
-;
-BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
-SECCON		.SET	$FF		; SECONDARY CONSOLE DEVICE
-CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
-VDAEMU		.SET	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
-VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
-ANSITRACE	.SET	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPKTRACE	.SET	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPKKBLOUT	.SET	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
-KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
-MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
-;
-DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
-DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
-;
-DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
-DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
-;
-BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
-BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
-;
-INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
-;
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
-;
-HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
-SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
-;
-DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
-DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
-;
-DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
-;
-SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
-SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
-SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
-SSERDATA	.SET	$FF		; SSER: DATA PORT
-SSERIRDY	.SET	%00000001	; SSER: INPUT READY BIT MASK
-SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
-SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
-SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
-;
-DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-DUARTCNT	.SET	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
-DUART0BASE	.SET	$A0		; DUART 0: BASE ADDRESS OF CHIP
-DUART0ACFG	.SET	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
-DUART0BCFG	.SET	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
-DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
-DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
-DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
-;
-UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
-UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
-UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
-UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
-UART4UART	.SET	FALSE		; UART: SUPPORT 4UART ECB BOARD
-UART4UARTBASE	.SET	$C0		; UART: BASE IO ADDRESS OF 4UART ECB BOARD
-UART0BASE	.SET	$80		; UART 0: REGISTERS BASE ADR
-UART0CFG	.SET	DEFSERCFG	; UART 0: SERIAL LINE CONFIG
-UART1BASE	.SET	$88		; UART 1: REGISTERS BASE ADR
-UART1CFG	.SET	DEFSERCFG	; UART 1: SERIAL LINE CONFIG
-UART2BASE	.SET	$A0		; UART 2: REGISTERS BASE ADR
-UART2CFG	.SET	DEFSERCFG	; UART 2: SERIAL LINE CONFIG
-UART3BASE	.SET	$A8		; UART 3: REGISTERS BASE ADR
-UART3CFG	.SET	DEFSERCFG	; UART 3: SERIAL LINE CONFIG
-UART4BASE	.SET	$FF		; UART 4: REGISTERS BASE ADR
-UART4CFG	.SET	DEFSERCFG	; UART 4: SERIAL LINE CONFIG
-UART5BASE	.SET	$FF		; UART 5: REGISTERS BASE ADR
-UART5CFG	.SET	DEFSERCFG	; UART 5: SERIAL LINE CONFIG
-UART6BASE	.SET	$FF		; UART 6: REGISTERS BASE ADR
-UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
-UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
-UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
-;
-ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-;
-Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
-;
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
-ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
-ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
-ACIA0CLK	.SET	CPUOSC		; ACIA 0: OSC FREQ IN HZ
-ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
-ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
-ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
-ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
-ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
-ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
-;
-SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
-SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
-SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
-SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
-SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
-SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
-SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
-SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
-SIO1ACLK	.SET	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
-SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1BCLK	.SET	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
-SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-;
-XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
-;
-VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
-CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
-TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
-TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
-TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
-VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
-SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
-EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
-FVENABLE	.SET	FALSE		; FV: ENABLE FPGA VGA VIDEO DRIVER (FV.ASM)
-;
-MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
-MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
-MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
-MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
-;
-FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
-FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
-FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMAUTO		.SET	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
-FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
-FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
-;
-RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
-;
-IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
-IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
-IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
-IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
-IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
-IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
-IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
-IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
-IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
-IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
-IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
-IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
-IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
-IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
-;
-PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
-PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
-PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
-PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
-PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
-PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
-PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
-PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
-SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
-;
-CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
-CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-CHCNT		.SET	2		; CH: NUMBER OF BOARDS TO DETECT (1-2)
-CH0BASE		.SET	$3E		; CH 0: BASE I/O ADDRESS
-CH0USBENABLE	.SET	TRUE		; CH 0: ENABLE USB DISK
-CH0SDENABLE	.SET	FALSE		; CH 0: ENABLE SD DISK
-CH1BASE		.SET	$3C		; CH 1: BASE I/O ADDRESS
-CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
-CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
-;
-PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-PRPSDENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
-PRPSDTRACE	.SET	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PRPCONENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
-;
-PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
-;
-ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
-;
-HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
-;
-PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
-PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
-PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
-;
-LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.SET	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
-LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
-LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
-LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
-;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
-PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
-PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
-PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
-PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
-;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
-IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
-IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
-IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
-IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
-;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
-SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
-SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
-SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
-SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
-;
-PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
-PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
-PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
-;
-UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
-;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.SET	CPUOSC/4	; SN: PSG CLOCK FREQ, ASSUME MSX STD
-SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
-;
-AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.SET	CPUOSC/4	; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
-;
-SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
-AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
-;
-DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
-DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.SET	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
-;
-YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
-VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
-;
-; EZ80 SETTINGS
-;
-EZ80TMR_NONE	.SET	0		; DO NOT USE ON-BOARD TIMER TO GENERATE TICKS
-EZ80TMR_INT	.SET	1		; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
-EZ80TMR_FIRM	.SET	2		; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
-;
-EZ80UARTENABLE	.SET	TRUE		; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
-EZ80RTCENABLE	.SET	TRUE		; EZ80 ON CHIP RTC
-EZ80TIMER	.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
-EZ80IOBASE	.SET	$FF		; EZ80 I/O BASE ADDRESS FOR EXTERNAL IO
-;
-; BUS TIMING FOR PAGED MEMORY ACCESS (CS3)
-EZ80_MEM_CYCLES	.SET	3		; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
-EZ80_MEM_MIN_NS	.SET	100		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-EZ80_MEM_WS	.SET	5		; MEMORY WAIT STATES (0-7) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_WAIT
-EZ80_MEM_MIN_WS	.SET	0		; MINIMUM WAIT STATES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-;
-; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2)
-EZ80_IO_CYCLES	.SET	4		; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
-EZ80_IO_WS	.SET	7		; IO WAIT STATES (0-7) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_WAIT
-EZ80_IO_MIN_NS	.SET	250		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-
-; THE MINMUM W/S SHOULD BE AT LEAST 1 GREATER THAN THE HOLD TRIGGER COUNT PROGRAMMED WITHIN THE PLD OF THE
-; EZ80 INTERFACE MODULE.  SEE THE EZ80-CPU.PLD FILE WITHIN THE EZ80 FIRMWARE CODE BASE
-EZ80_IO_MIN_WS	.SET	7		; MINIMUM WAIT STATES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-;
-; APPLY CYCLES, W/S OR CALCULATE CYCLES BASED ON DESIRED PERIOD
-EZ80_WSMD_TYP	.SET	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES|WAIT]
-;
-; BUS TIMING FOR ON CHIP ROM
-;
-EZ80_FLSH_WS		.SET	1		; WAIT STATES FOR ON CHIP FLASH (0-7)
-EZ80_FLSH_MIN_NS	.SET	60		; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-EZ80_FWSMD_TYP		.SET	EZ80WSMD_CALC	; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)

Source/HBIOS/cfg_RCZ180.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -105,7 +104,7 @@ FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
 FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
 FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
 FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
@@ -124,7 +123,7 @@ PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 LCDBASE		.SET	$AA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
@@ -203,7 +202,7 @@ UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
 UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
 UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
 ;
-ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.SET	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.SET	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.SET	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
@@ -214,7 +213,7 @@ Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -222,18 +221,18 @@ SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
 SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.SET	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0ACFG	.SET	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
 SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0BCFG	.SET	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.SET	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACFG	.SET	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
 SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO1BCLK	.SET	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCFG	.SET	SER_115200_8N1	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
@@ -303,14 +302,14 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
-CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -345,21 +344,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_RCZ280.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -313,7 +312,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -355,21 +354,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_RCZ80.asm

@@ -43,8 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
-#DEFINE DEFSERCFG xxxxx
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -64,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -81,7 +79,7 @@ RTCIO		.SET	$C0		; RTC LATCH REGISTER ADR
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
@@ -125,7 +123,7 @@ PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
@@ -181,7 +179,7 @@ DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
 DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
 DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -208,7 +206,7 @@ ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
 Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
-ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
 ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
 ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
@@ -220,7 +218,7 @@ ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
 ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
 ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
 ;
-SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -316,7 +314,7 @@ SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
-CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -351,21 +349,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_RPH.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Rhyophyre", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -310,11 +309,11 @@ PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

Source/HBIOS/cfg_S100.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "S100", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_57600_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_57600_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_57600_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -335,21 +334,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_SBC.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "RetroBrew SBC", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -311,11 +310,11 @@ PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

Source/HBIOS/cfg_SCZ180.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Small Computer", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -345,21 +344,21 @@ LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.SET	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
 PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
 PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
 PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
 IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
 IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
 IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
 SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]

Source/HBIOS/cfg_Z80RETRO.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Z80Retro", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -287,11 +286,11 @@ PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_ZETA.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Zeta", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -257,11 +256,11 @@ PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_ZETA2.asm

@@ -43,7 +43,7 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "Zeta 2", " [", CONFIG, "]"
-#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS
+#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
@@ -63,7 +63,6 @@ CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-;;;DEFSERCFG	.SET	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -268,11 +267,11 @@ PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 ;
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/hbios.asm

@@ -283,6 +283,16 @@ SUPCTS	.EQU	FALSE		; SUPPRESS CTS DURING HBIOS BOOT
   #ENDIF
 #ENDIF
 ;
+; IF VDAEMU_SEKBD AND AUTOCON ARE BOTH ACTIVE, THEN THE BOOT LOADER
+; PROMPT WILL BE CONFUSED BECAUSE IT WILL POLL THE SHARED SERIAL PORT
+; FOR BOTH DEVICES.
+;
+#IF ((VDAEMU_SERKBD != $FF) & (AUTOCON == TRUE))
+	.ECHO	"*** ERROR: VDAEMU_SERKBD CANNOT BE COMBINED WITH AUTOCON!!! ***\n"
+	.ECHO	"SET VDAEMU_SERKBD = $FF OR SET AUTOCON = FALSE\n"
+	!!!	; FORCE AN ASSEMBLY ERROR
+#ENDIF
+;
 ; CONVERT ROMWBW LOGICAL BANK ID TO PHYSICAL 32K BANK OFFSET
 ;
 #DEFINE PBANK(X) (((X >> 7) * (RAMBIAS / 32)) + (X & $7F))
@@ -8721,7 +8731,7 @@ PS_DTSD		.TEXT	"SD Card$"
 PS_DTUSB	.TEXT	"USB Drive$"
 PS_DTROM	.TEXT	"ROM Disk$"
 PS_DTRAM	.TEXT	"RAM Disk$"
-PS_DTFSH	.TEXT	"Flash ROM"
+PS_DTFSH	.TEXT	"Flash ROM$"
 PS_DTRF		.TEXT	"RAM Floppy$"
 PS_DTCD		.TEXT	"CD-ROM$"
 PS_DTCRT	.TEXT	"Cartridge$"

Source/HBIOS/layout.inc

@@ -63,6 +63,7 @@ BNK1_REMAIN	.EQU	BNKTOP - BNK1_IMGEND	; REMAINING
 ; ROM BANK 2 LAYOUT (osimg1.bin)
 ; ==============================
 ;
+; NOTE FOLLOWING ARE COPY/PASTED INTO camel80.azm !!!!!!!!
 FTH_LOC		.EQU	$0200			; CAMEL FORTH
 FTH_SIZ		.EQU	$1700
 FTH_END		.EQU	FTH_LOC + FTH_SIZ

Source/HBIOS/romldr.asm

@@ -2646,7 +2646,7 @@ ra_ent(str_fth,	  'F',	   KY_EX, BID_IMG1, FTH_IMGLOC,  FTH_LOC, FTH_SIZ, FTH_LO
 ra_ent(str_play,  'P',	   $FF,	  BID_IMG1, GAM_IMGLOC,  GAM_LOC, GAM_SIZ, GAM_LOC)
 ra_ent(str_net,   'N',	   $FF,	  BID_IMG1, NET_IMGLOC,  NET_LOC, NET_SIZ, NET_LOC)
 ra_ent(str_upd,   'X',	   $FF,	  BID_IMG1, UPD_IMGLOC,  UPD_LOC, UPD_SIZ, UPD_LOC)
-ra_ent(str_nvr,   'W',	   $FF,	  BID_IMG1, NVR_IMGLOC,  NVR_LOC, NVR_SIZ, NVR_LOC)
+ra_ent(str_nvr,   'W'+$80, $FF,	  BID_IMG1, NVR_IMGLOC,  NVR_LOC, NVR_SIZ, NVR_LOC)
 ra_ent(str_user,  'U',	   $FF,	  BID_IMG1, USR_IMGLOC,  USR_LOC, USR_SIZ, USR_LOC)
 #endif
 #if (DSKYENABLE)

Source/HBIOS/tms.asm

@@ -74,6 +74,7 @@ TMSKBD		.SET	TMSKBD_PPK	; PPK KEYBOARD
 #IF (TMSMODE == TMSMODE_MSX)
 TMS_DATREG	.EQU	$98		; READ/WRITE DATA
 TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
+		DEVECHO	"MSX"
 #ENDIF
 ;
 #IF (TMSMODE == TMSMODE_MSXKBD)
@@ -122,6 +123,7 @@ TMSKBD		.SET	TMSKBD_KBD	; PS2 KEYBOARD
 TMS_DATREG	.EQU	$A0		; READ/WRITE DATA
 TMS_CMDREG	.EQU	$A1		; READ STATUS / WRITE REG SEL
 TMSKBD		.SET	TMSKBD_NABU	; NABU KEYBOARD
+		DEVECHO	"NABU"
 #ENDIF
 ;
 		DEVECHO	", IO="

Source/ver.inc

@@ -2,7 +2,7 @@
 #DEFINE	RMN	5
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.5.0-beta.1"
+#DEFINE BIOSVER	"3.5.0-beta.3"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	5
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.5.0-beta.1"
+	db	"3.5.0-beta.3"
 	endm