- Update MFPIC related I/O ports from $4x to $1x. The default base address was changed to avoid conflicting with the default I/O range of $40-$7F on ECB Z180 boards.
- Some newer/multi-port UART chips now use MCR:3 to activate the interrupt pin(s), otherwise tri-state. This update sets MCR:3 in all cases.
- Added UARTDUAL config variable that enables detection of a dual UART chip at 0x80 for MBC platform.
- Fixed a typo in TastyBasic Build script.
- Added TMSMODE_RCKBD to support an 8242 keyboard combined with TMS video.
- Worked around a syntax issue from uz80as in rz.asm.
- Improved mechanism to handle forcing a UART detection for SIMH.
- Fixed issue recently introduced that kept AFC from being enabled for '650 and '850 chips.
- Increase receive interrupt threshold to 8 which improves interrupt handler efficiency under stress. Credit to Andrew Lynch.
- The UART driver has been enhanced to allow use of interrupt driven receive buffer and RTS flow control. It will only be used if enabled and the chip detected has no auto-flow control capability.
- Updates DEVICE call for all CIO devices to return unit mode and I/O base address
- Improved experimental XModem (XMX.COM) that uses direct hardware I/O for UART and USB-FIFO devices
Fixed some stuff in 16C2552 support
- Concurrent write was being enabled unintentionally
- Swapped the EPDSER UART base ports to match the boards annotations
