RomWBW

Commit Graph

Author	SHA1	Message	Date
Wayne Warthen	11ea0c8c27	Add Speaker Beep Added a generic routine in HBIOS to play a beep sound on the first available sound device. Implemented the beep in the ANSI and TTY terminal emulators.	4 years ago
Wayne Warthen	44b17ccc3a	Improve Centronics Compatibility - Renamed Centronics driver from "CEN" to "LPT" based on input that LPT is the more recognized name for IBM compatible Centronics interfaces. - Modified LPT hardware detection to be more generic (no longer depends on MBC-specific hardware implementation). - Fix to CPU speed display for SBC v2 (004 and above) speed selection mechanism.	4 years ago
Wayne Warthen	b2e1294452	Correct AY38910 Off By 1 Octave Issue I think this update corrects a long-standing issue in which the AY38910 driver played notes off by one octave.	4 years ago
Wayne Warthen	a62f5805ca	Add BOOT_DELAY Configuration Variable Some systems use terminal devices (Raspberry Pi, etc.) that take a few seconds to be ready to display console text. The BOOT_DELAY setting can be used to introduce an arbitrary delay (in seconds) in the boot process just prior to text output. This can be used to avoid missing some of the boot messages.	4 years ago
Wayne Warthen	982906757e	Support QP/M TIMDAT Routine QP/M is a CP/M 2.2 replacement for BDOS/CCP. However, it adds it's own concept of date/time stamping. Support for the QP/M date/time routine has been added. You can configure QP/M to find the vector at address 0x0010. A sidenote on QP/M. By default, it uses 2 bytes at address 0x0008 to store the current drive/user. This will conflict with RomWBW's use of RST 08 for API function calls. I recommend using address 0x000E when configuring QP/M for the location of the current drive/user.	4 years ago
b1ackmai1er	c1412ee755	Fix boot failure with three sound devices	4 years ago
b1ackmai1er	e974a4a960	Recovery mode message, ay-3-8910 build fix	4 years ago
Wayne Warthen	b98ee17e14	Plumbing for uPD7220 GDC Driver	4 years ago
Wayne Warthen	4a88e0bcae	Improve Z180 Variant Handling - There were several places that RomWBW was making incorrect assumptions about what the older Z180 CPUs could do. These have been corrected.	4 years ago
Wayne Warthen	f6d0e7fea4	Initial RHYOPHYRE Support	4 years ago
Wayne Warthen	170ac7d9e8	Prep for Centronics Driver - Added Centronics Driver shell	4 years ago
Wayne Warthen	7549789248	Finalize ROM-Less Booting	4 years ago
Wayne Warthen	5d81574226	Preliminary Support for ROMless Booting	4 years ago
Wayne Warthen	9f3c9e180d	Add PIO Driver - Just a stub that detects and initializes the hardware.	4 years ago
Wayne Warthen	51d9bdb655	Minor ASSIGN Fixes, Add 2PIOTST - Improved ASSIGN operation under CP/M 3 to better handle BIOS function invocations - Added 2PIOTST for testing the DUALPIO MBC board - Increased default RAM drive size for ZRC	4 years ago
Wayne Warthen	bf965c2604	Minor Z280 Fixes - Fixed the ROM VERIFY functionality on Z280. It was indicating errors incorrectly. - Revised the way that ZZRCC is built to remove a bunch of complexity that was causing issues. An implication of this is that ZZRCC now treats the data loaded from the CF Card as a ROM disk instead of a RAM disk. - Updated the assemblers to handle some more Z280 instructions used in HBIOS. - When building ZZRCC, checks have been added to ensure the ROM image is exactly 256K. The build defaults to 512K and that causes the ZZRCC disk image to be corrupted. This will stop the build if the user fails to specify a 256K ROM size.	4 years ago
Wayne Warthen	e6b9d2dcfd	Improve Z280 DMA Memory Copy The Z280 interbank memory copy uses DMA and did not properly handle scenarios where the source or destination memory range crossed over the banked/common memory boundary. It added a bunch of code, but it is fixed now. This seems to be required by CP/M 3.	4 years ago
Wayne Warthen	214ed54584	Miscellaneous - Fix build under Windows (credit to Dean Netherton for finding this). - Fix ReadMe.md file format to remove superfluous junk at top. - Improve RAM size detection (work in progress, not part of normal build).	4 years ago
Wayne Warthen	97aa0aae9f	Bug Fix Fixed a small issue in the boot management of the CPU speed for MBC and SBC platforms.	4 years ago
Wayne Warthen	92399fe537	More CPUSPD Tweaks I know I said I was done, but I found a few more things I decided to tweak. Functionality is unchanged.	4 years ago
Wayne Warthen	b6aa769f12	Finalize CPUSPD The CPUSPD app is now considered stable and fully supported. I have added the application and the API's to the documentation.	4 years ago
Wayne Warthen	21a38aed6e	CPU Speed Change API - Moved the CPU speed changing mechanism into the HBIOS as an API call. - Added support for CPU speed changing on Z180 platforms.	4 years ago
Wayne Warthen	48c5f4da9d	Cleanups and CPUSPD App - Added very preliminary CPUSPD app which works only on MBC and SBC - HBIOS initialization code cleanup - Prep work on RAM size detection	4 years ago
Wayne Warthen	e8ecdd0fac	Support MBC VDC	4 years ago
Wayne Warthen	dd3dfff172	DMA Driver Speed Handling - Updated DMA driver to leave system speed as it originally found it.	4 years ago
Wayne Warthen	322c083531	8242 Support for TMS Driver - Added TMSMODE_RCKBD to support an 8242 keyboard combined with TMS video. - Worked around a syntax issue from uz80as in rz.asm. - Improved mechanism to handle forcing a UART detection for SIMH.	4 years ago
b1ackmai1er	53fe7a60f3	Revert conflict concept	4 years ago
b1ackmai1er	68f00df56d	Sanity check fro conflicting port settings Hi Wayne, is this something you would be interested in? If so I will continue populating E.g. DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM) DMABASE .SET $68 ; DMA: DMA BASE ADDRESS DMAMODE .SET DMAMODE_ECB ; DMA: DMA MODE (NONE\|ECB\|Z180\|Z280\|RC\|MBC ..... SYSTEM TIMER: NONE HBIOS INT STACK space: 54 bytes. HBIOS TEMP STACK space: 20 bytes. DSRTC occupies 697 bytes. UART occupies 791 bytes. VDU occupies 908 bytes. DMA occupies 303 bytes. FONTS occupy 0 bytes. PPK occupies 1192 bytes. MD occupies 5545 bytes. FD occupies 2381 bytes. RF occupies 378 bytes. PPIDE occupies 1703 bytes. TERM occupies 2078 bytes. SPK occupies 714 bytes. RTCDEF=40 WARNING : DEVICE PORT CONFLICT : UARTSBC 104-111:104-105	4 years ago
b1ackmai1er	3bc8afcc87	Add VDA Read Character function For your consideration. Seems to work.	4 years ago
b1ackmai1er	90a1f814c1	Update hbios.asm	4 years ago
b1ackmai1er	47d9c4008d	Prelim speed management framework	4 years ago
b1ackmai1er	abee120b4e	reorganize test applications. Improve dmamon linux build to be fixed yet	4 years ago
Wayne Warthen	756f538a70	Minor Cosmetic Tweaks	4 years ago
b1ackmai1er	3582fcedc5	Update hbios.asm	4 years ago
b1ackmai1er	c1083ce5b2	Update hbios.asm	4 years ago
b1ackmai1er	145ae8baa1	run time memory size adjustment	4 years ago
b1ackmai1er	2c633d2d13	remove assembly time memory constraints	4 years ago
Wayne Warthen	097777c043	Finalize UART Interrupt Receive	4 years ago
Wayne Warthen	14b005d64e	UART Driver Interrupt Driven Receive - The UART driver has been enhanced to allow use of interrupt driven receive buffer and RTS flow control. It will only be used if enabled and the chip detected has no auto-flow control capability.	4 years ago
Wayne Warthen	74dc98b140	Fix DSKY Initialization - Missed a couple things in the last round of DSKY changes.	4 years ago
Wayne Warthen	4f941de39c	Miscellaneous - Improve handling of RTC latch shadow - Hardware auto-detect on DSKY and DSKYNG - Regen documentation	4 years ago
Wayne Warthen	80ee13e0f4	Misc - Update TUNE.COM to mute sound card at end of playback when playing via HBIOS. - Update SN76489 sound driver to use proper default port addresses. - Modify Phil's CPU MHz speed rounding function to round up anytime speed in KHz is withing 500 KHz of next MHz increment.	5 years ago
Wayne Warthen	9f2a59fea8	Update hbios.asm - Fix typo	5 years ago
Wayne Warthen	8b9be05bea	Continuing Disk Image Cleanup - Reorganized most of the "common" files into special directories. - Fixed bug affecting application boot related to ROM checksum test. - Added support for LiNC sound card at default port address.	5 years ago
b1ackmai1er	206ed87210	Adjust reported CPU speed Round reported CPU Mhz up if within 20hz of next MHz increment	5 years ago
Wayne Warthen	ac2f10996a	Disk Image Reorg Trying to make sense out of the disk image creation process so that it is easier to maintain going forward. This is just the initial round of changes.	5 years ago
Wayne Warthen	5e12bc3199	ROM Checksum & Verification A ROM checksum is now imbedded at the end of the ROM code banks. At boot, this checksum is verified with results displayed during boot.	5 years ago
Wayne Warthen	182e60e700	Fix SPI I/O Contention Alan's emulator found an issue where the RTC code could contend with the I2C/SPI signals on SC126.	5 years ago
Wayne Warthen	e4f638a17a	Add Bank Selection to Debug Monitor - The debug monitor will not display the current bank id in the prompt - The debug monitor has a new command to set the current bank for the lower 32K NOTE: Bank selection is not possible when running under interrupt mode 1. The command will be rejected with an error.	5 years ago
Wayne Warthen	ff55b0d8f0	Handle 1MB RAM in MBC Memory Mapper	5 years ago

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297 Commits (bfdfd83f2a074acf8a62085c99ef42345e37a402)