User Defined SD Interface

Integrated code from Lanea to allow for an easy way to define a custom SD Card interface.  CSMODE_USR is not yet complete or tested!

.github/workflows/commit.yml

@@ -14,9 +14,9 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-      - uses: rlespinasse/github-slug-action@v3.x
+      - uses: rlespinasse/github-slug-action@v4.4.0
         
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3.1.0
 
       - name: Build
         run: |
@@ -24,7 +24,6 @@ jobs:
           sudo apt-get install libncurses-dev
           sudo apt-get install srecord
           make dist
-          make clean
           rm -rf .git*
 
       - name: List Output
@@ -34,7 +33,7 @@ jobs:
           find -type f -exec md5sum '{}' \;
 
       - name: Upload Artifact
-        uses: actions/upload-artifact@v2
+        uses: actions/upload-artifact@v3.1.1
         with:
           name: RomWBW_Linux-${{env.GITHUB_REF_SLUG}}-${{env.GITHUB_SHA_SHORT}}
           path: .
@@ -44,7 +43,7 @@ jobs:
             zip -r RomWBW-SnapShot-Package.zip .
  
       - name: Post SnapShot
-        uses: "marvinpinto/action-automatic-releases@latest"
+        uses: wwarthen/actions/packages/automatic-releases@built-packages
         with:
           repo_token: "${{ secrets.GITHUB_TOKEN }}"
           automatic_release_tag: "SnapShot"
@@ -54,17 +53,16 @@ jobs:
             RomWBW-SnapShot-Package.zip
 
   buildMacOS:
-    runs-on: macos-latest
+    runs-on: macOS-12
 
     steps:
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3.1.0
 
       - name: Build
         run: |
           export TZ='America/Los_Angeles'
           brew install srecord
           make dist
-          make clean
           rm -rf .git*
 
       - name: List Output
@@ -74,7 +72,7 @@ jobs:
           find . -type f -exec md5 -r -- '{}' +;
 
       - name: Upload Artifact
-        uses: actions/upload-artifact@v2
+        uses: actions/upload-artifact@v3.1.1
         with:
           name: RomWBW_MacOS
           path: .

.github/workflows/release.yml

@@ -27,7 +27,6 @@ jobs:
         run: |
           sudo apt-get install libncurses-dev
           make dist
-          make clean
           rm -rf .git*
       
       - name: Upload Artifact

Binary/Apps/Makefile

@@ -7,5 +7,5 @@ include $(TOOLS)/Makefile.inc
 all::
 	mkdir -p Tunes
 
-clobber::
+clean::
 	@rm -f *.bin *.com *.img *.rom *.pdf *.log *.eeprom *.ovr *.hlp *.doc *.COM *.BIN Tunes/*.mym Tunes/*.pt? Tunes/*.vgm

Binary/Apps/Test/Makefile

@@ -3,5 +3,5 @@ MOREDIFF := $(shell $(TOOLS)/unix/casefn.sh *.com)
 
 include $(TOOLS)/Makefile.inc
 
-clobber::
+clean::
 	@rm -f *.com

Binary/CPM3/Makefile

@@ -3,5 +3,5 @@ MOREDIFF := $(shell $(TOOLS)/unix/casefn.sh *.spr)
 
 include $(TOOLS)/Makefile.inc
 
-clobber::
-	@rm -f *.spr
+clean::
+	@rm -f *.spr *.com *.sys *.dat cpm3fix.pat readme.1st

Binary/Makefile

@@ -4,5 +4,5 @@ SUBDIRS = Apps CPM3 ZPM3
 
 include $(TOOLS)/Makefile.inc
 
-clobber::
-	@rm -f *.bin *.com *.img *.rom *.upd *.hex *.pdf *.log *.eeprom *.dat
+clean::
+	@rm -f *.bin *.com *.img *.rom *.upd *.hex *.pdf *.log *.eeprom *.dat

Binary/ZPM3/Makefile

@@ -3,5 +3,5 @@ MOREDIFF := $(shell $(TOOLS)/unix/casefn.sh *.spr)
 
 include $(TOOLS)/Makefile.inc
 
-clobber::
-	@rm -f *.spr
+clean::
+	@rm -f *.spr *.com *.sys *.dat *.zpm

Build.cmd

@@ -3,4 +3,4 @@ setlocal
 
 pushd Source && call Build %* || exit /b & popd
 
-pause
+if "%*" == "" pause

Doc/ChangeLog.txt

@@ -62,6 +62,9 @@ Version 3.1.1
 - WBW: ZPMLDR and ZPM3 fixes, credit to Lars Nelson for finding ZPM3 source!
 - DDW: Add support for MBC sound card
 - WBW: Add support for "romless" booting
+- L?N: Fixes for ZCPR-D&J (buffer overflow, default drive/user)
+- J?P: Add support for DS1501 RTC
+- LLS: Added a user defined mode for SD Card interfaces (not complete)
 
 Version 3.1
 -----------

Makefile

@@ -1,20 +1,19 @@
 all:
-	$(MAKE) --directory Tools/unix
+	$(MAKE) --directory Tools
 	$(MAKE) --directory Source
 
 clean:
-	$(MAKE) --directory Tools/unix clean
+	$(MAKE) --directory Tools clean
 	$(MAKE) --directory Source clean
 	$(MAKE) --directory Binary clean
+	rm -f make.log
 
-clobber:
-	$(MAKE) --directory Tools/unix clobber
-	$(MAKE) --directory Source  clobber
-	$(MAKE) --directory Binary clobber
-	rm -f typescript
+clobber: clean
 
 diff:
 	$(MAKE) --directory Source diff
 
 dist:
-	$(MAKE) ROM_PLATFORM=dist
+	$(MAKE) ROM_PLATFORM=dist 2>&1 | tee make.log
+	$(MAKE) --directory Source clean
+	$(MAKE) --directory Tools clean

ReadMe.md

@@ -3,23 +3,23 @@
 ## Z80/Z180 System Software
 
 Version 3.1 Pre-release  
-21 Mar 2022
+10 Dec 2022
 
 Wayne Warthen <wwarthen@gmail.com>
 
 ### Download
 
--   [RomWBW Distribution
-    Package](https://github.com/wwarthen/RomWBW/releases)
+- [RomWBW Distribution
+  Package](https://github.com/wwarthen/RomWBW/releases)
 
 ### Related Pages
 
--   [RomWBW Architecture
-    Document](https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=software:firmwareos:romwbw:romwbw_architecture.pdf)
--   [RomWBW
-    Applications](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:apps)
--   [RomWBW
-    Errata](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:errata)
+- [RomWBW Architecture
+  Document](https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=software:firmwareos:romwbw:romwbw_architecture.pdf)
+- [RomWBW
+  Applications](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:apps)
+- [RomWBW
+  Errata](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:errata)
 
 # Overview
 
@@ -27,28 +27,28 @@ RomWBW provides a complete software system for a wide variety of
 hobbyist Z80/Z180 CPU-based systems produced by these developer
 communities:
 
--   [RetroBrew Computers](https://www.retrobrewcomputers.org)
--   [RC2014](https://rc2014.co.uk)
--   [retro-comp](https://groups.google.com/forum/#!forum/retro-comp)
+- [RetroBrew Computers](https://www.retrobrewcomputers.org)
+- [RC2014](https://rc2014.co.uk)
+- [retro-comp](https://groups.google.com/forum/#!forum/retro-comp)
 
 General features include:
 
--   Banked memory services for several banking designs
--   Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
--   Serial drivers including UART (16550-like), ASCI, ACIA, SIO
--   Video drivers including TMS9918, SY6545, MOS8563, HD6445
--   Real time clock drivers including DS1302, BQ4845
--   Multiple OS support including CP/M 2.2, ZSDOS, CP/M 3, ZPM3
--   Built-in VT-100 terminal emulation support
+- Banked memory services for several banking designs
+- Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
+- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
+- Video drivers including TMS9918, SY6545, MOS8563, HD6445
+- Real time clock drivers including DS1302, BQ4845
+- Multiple OS support including CP/M 2.2, ZSDOS, CP/M 3, ZPM3
+- Built-in VT-100 terminal emulation support
 
 RomWBW is distributed as both source code and pre-built ROM and disk
 images. Some of the provided software can be launched directly from the
 ROM firmware itself:
 
--   System Monitor
--   Operating Systems (CP/M 2.2, ZSDOS)
--   ROM BASIC (Nascom BASIC and Tasty BASIC)
--   ROM Forth
+- System Monitor
+- Operating Systems (CP/M 2.2, ZSDOS)
+- ROM BASIC (Nascom BASIC and Tasty BASIC)
+- ROM Forth
 
 A dynamic disk drive letter assignment mechanism allows mapping
 operating system drive letters to any available disk media.
@@ -209,10 +209,10 @@ modular approach to implementing device drivers and presenting devices
 to the operating system. In general, all devices are classified as one
 of the following:
 
--   Disk (Hard Disk, CF Card, SD Card, RAM/ROM Disk, etc.)
--   Character (Serial Ports, Parallel Ports, etc.)
--   Video (Video Display/Keyboard Interfaces)
--   RTC/NVRAM (Real Time Clock, Non-volatile RAM)
+- Disk (Hard Disk, CF Card, SD Card, RAM/ROM Disk, etc.)
+- Character (Serial Ports, Parallel Ports, etc.)
+- Video (Video Display/Keyboard Interfaces)
+- RTC/NVRAM (Real Time Clock, Non-volatile RAM)
 
 HBIOS uses the concept of unit numbers to present a complex set of
 hardware devices to the operating system. As an example, a typical
@@ -418,7 +418,7 @@ therefore, globally available.
 
 Some custom applications do not fit on the ROM disk. They are found on
 the disk image files or the individual files can be found in the
-Binary\\Apps directory of the distribution.
+Binary\Apps directory of the distribution.
 
 | Application | Description                                                 |
 |-------------|-------------------------------------------------------------|
@@ -452,6 +452,15 @@ well. However, you will find some files on the ROM disk that will work
 with ZSDOS, but will not work on CP/M 2.2. For example, `LDDS`, which
 loads the ZSDOS date/time stamper will only run on ZSDOS.
 
+## Flash ROM Disks
+
+The limitation of ROM disks being read only can be overcome on some
+platforms with the appropriate selection of Flash ROM chip and system
+configuration. In this case the flash-file system can be enabled which
+will allow the ROM disk to be read and written to. Flash devices have a
+limited write lifespan and continual usage will eventually wear out the
+device. It is not suited for high usage applications.
+
 ## Disk Devices
 
 While the RAM/ROM disks provide a functional system, they are not useful
@@ -738,17 +747,17 @@ most stable and you are less likely to encounter problems.
 
 ### Notes
 
--   You can change media, but it must be done while at the OS command
-    prompt and you **must** warm start CP/M by pressing ctrl-c. This is
-    a CP/M 2.2 constraint and is well documented in the DRI manuals.
+- You can change media, but it must be done while at the OS command
+  prompt and you **must** warm start CP/M by pressing ctrl-c. This is a
+  CP/M 2.2 constraint and is well documented in the DRI manuals.
 
--   The original versions of DDT, DDTZ, and ZSID used the RST 38 vector
-    which conflicts with interrupt mode 1 use of this vector. The DDT,
-    DDTZ, and ZSID applications in RomWBW have been modified to use RST
-    30 to avoid this issue.
+- The original versions of DDT, DDTZ, and ZSID used the RST 38 vector
+  which conflicts with interrupt mode 1 use of this vector. The DDT,
+  DDTZ, and ZSID applications in RomWBW have been modified to use RST 30
+  to avoid this issue.
 
--   Z-System applications will not run under CP/M 2.2. For example, the
-    `LDDS` date stamper will not run.
+- Z-System applications will not run under CP/M 2.2. For example, the
+  `LDDS` date stamper will not run.
 
 ## ZSDOS 1.1
 
@@ -766,14 +775,13 @@ Manual.pdf”).
 
 ### Notes
 
--   Although most CP/M 2.2 applications will run under Z-System, some
-    may not work as expected. The best example is PIP which is not aware
-    of the ZSDOS paths and will fail in some scenarios (use `COPY`
-    instead).
+- Although most CP/M 2.2 applications will run under Z-System, some may
+  not work as expected. The best example is PIP which is not aware of
+  the ZSDOS paths and will fail in some scenarios (use `COPY` instead).
 
--   Although ZSDOS can recognize a media change in some cases, it will
-    not always work. You should only change media at a command prompt
-    and be sure to warm start the OS with a ctrl-c.
+- Although ZSDOS can recognize a media change in some cases, it will not
+  always work. You should only change media at a command prompt and be
+  sure to warm start the OS with a ctrl-c.
 
 ## NZCOM Automatic Z-System
 
@@ -794,8 +802,8 @@ RomWBW Doc directory.
 
 ### Notes
 
--   There is no `DIR` command, you must use `SDZ` instead. If you don’t
-    like this, look into the ALIAS facility.
+- There is no `DIR` command, you must use `SDZ` instead. If you don’t
+  like this, look into the ALIAS facility.
 
 ## Digital Research CP/M 3
 
@@ -811,19 +819,18 @@ tracks. `CPMLDR.SYS` chain loads `CPM3.SYS`.
 
 ### Notes
 
--   The `DATE` command cannot yet be used to **set** the RTC. The RTC is
-    used to read the current date/time for file stamping, etc. You can
-    use the `RTC` app to set the RTC clock.
+- The `DATE` command cannot yet be used to **set** the RTC. The RTC is
+  used to read the current date/time for file stamping, etc. You can use
+  the `RTC` app to set the RTC clock.
 
--   The `COPYSYS` command described in the DRI CP/M 3 documentation is
-    not provided with RomWBW. The RomWBW `SYSCOPY` command is used
-    instead.
+- The `COPYSYS` command described in the DRI CP/M 3 documentation is not
+  provided with RomWBW. The RomWBW `SYSCOPY` command is used instead.
 
--   Although CP/M 3 is generally able to run CP/M 2.2 programs, this is
-    not universally true. This is especially true of the utility
-    programs included with the operating system. For example, the
-    `SUBMIT` program of CP/M 3 is completely different from the `SUBMIT`
-    program of CP/M 2.2.
+- Although CP/M 3 is generally able to run CP/M 2.2 programs, this is
+  not universally true. This is especially true of the utility programs
+  included with the operating system. For example, the `SUBMIT` program
+  of CP/M 3 is completely different from the `SUBMIT` program of CP/M
+  2.2.
 
 ## Simeon Cran’s ZPM3
 
@@ -835,14 +842,14 @@ tracks of the disk.
 
 ### Notes
 
--   `ZPMLDR` is equivalent to CPMLDR. Both are included. Previously,
-    ZPMLDR had issues that prevented it from properly booting RomWBW
-    ZPM3. However, those issues have been resolved.
+- `ZPMLDR` is equivalent to CPMLDR. Both are included. Previously,
+  ZPMLDR had issues that prevented it from properly booting RomWBW ZPM3.
+  However, those issues have been resolved.
 
--   The ZPM operating system is contained in the file called CPM3.SYS
-    which is confusing, but this is as intended by the ZPM3
-    distribution. I believe it was done this way to make it easier for
-    users to transition from CP/M 3 to ZPM3.
+- The ZPM operating system is contained in the file called CPM3.SYS
+  which is confusing, but this is as intended by the ZPM3 distribution.
+  I believe it was done this way to make it easier for users to
+  transition from CP/M 3 to ZPM3.
 
 ## FreeRTOS
 
@@ -924,7 +931,7 @@ documents.
 Note that the build scripts for RomWBW create the default disk images
 supplied with RomWBW. It is relatively easy to customize the contents of
 the disk images that are part of RomWBW. This is described in more
-detail in the Source\\Images directory of the distribution.
+detail in the Source\Images directory of the distribution.
 
 ## FAT Filesystem Transfers
 
@@ -945,7 +952,7 @@ however. Longer filenames will show up as a truncated version.
 
 The `FAT` application is not on your ROM disk because it is too large to
 fit. You will find it on all of the pre-built disk images as well as in
-the Binary\\Apps directory of the distribution.
+the Binary\Apps directory of the distribution.
 
 For advanced users, it is possible to create a hybrid disk that contains
 CP/M slices at the beginning and a FAT filesystem after. Such a hybrid
@@ -953,7 +960,7 @@ disk can be used to boot an operating system and still have access to
 FAT files on the FAT portion of the disk. David Reese has prepared a
 document describing how to do this. It is called
 “SC126_How-To_No_2\_Preparing_an_SD_Card_for_Use_with_SC126_Rev_1-5.pdf”
-and can be found in the Doc\\Contrib directory of the distribution.
+and can be found in the Doc\Contrib directory of the distribution.
 
 # Startup Command Processing
 
@@ -1027,10 +1034,10 @@ images.
 While John is likely to enhance UNA over time, there are currently a few
 things that UNA does not support:
 
--   Floppy Drives
--   Terminal Emulation
--   Zeta 1, N8, RC2014, Easy Z80, and Dyno Systems
--   Some older support boards
+- Floppy Drives
+- Terminal Emulation
+- Zeta 1, N8, RC2014, Easy Z80, and Dyno Systems
+- Some older support boards
 
 The UNA version embedded in RomWBW is the latest production release of
 UNA. RomWBW will be updated with John’s upcoming UNA release with
@@ -1136,100 +1143,96 @@ If the disk is bootable, you need to update the system image on the disk
 using the procedure described below corresponsing to the operating
 system on your disk.
 
--   **CP/M 2.2**
+- **CP/M 2.2**
 
-    Boot to CP/M 2.2 from ROM, then use `SYSCOPY` to update the system
-    image on **all** CP/M 2.2 boot disks/slices. The CP/M 2.2 system
-    image is called CPM.SYS and is found on the ROM disk. For example:
+  Boot to CP/M 2.2 from ROM, then use `SYSCOPY` to update the system
+  image on **all** CP/M 2.2 boot disks/slices. The CP/M 2.2 system image
+  is called CPM.SYS and is found on the ROM disk. For example:
 
-    `B>SYSCOPY C:=CPM.SYS`
+  `B>SYSCOPY C:=CPM.SYS`
 
--   **ZSDOS**
+- **ZSDOS**
 
-    Boot to Z-System from ROM, then use `SYSCOPY` to update the system
-    image on **all** ZSDOS boot disks/slices. The ZSDOS system image is
-    called ZSYS.SYS and is found on the ROM disk. For example:
+  Boot to Z-System from ROM, then use `SYSCOPY` to update the system
+  image on **all** ZSDOS boot disks/slices. The ZSDOS system image is
+  called ZSYS.SYS and is found on the ROM disk. For example:
 
-    `B>SYSCOPY C:=ZSYS.SYS`
+  `B>SYSCOPY C:=ZSYS.SYS`
 
--   **NZCOM**
+- **NZCOM**
 
-    NZCOM runs on top of either CP/M 2.2 or ZSDOS. By default, the
-    RomWBW disk image for NZCOM uses ZSDOS. Follow the corresponding
-    procedure above to update the system image on the NZCOM boot
-    disks/slices.
+  NZCOM runs on top of either CP/M 2.2 or ZSDOS. By default, the RomWBW
+  disk image for NZCOM uses ZSDOS. Follow the corresponding procedure
+  above to update the system image on the NZCOM boot disks/slices.
 
--   **CP/M 3**
+- **CP/M 3**
 
-    CP/M 3 uses a multi-step boot process involving multiple files. The
-    CP/M 3 boot files are not included on the ROM disk due to space
-    constraints. You will need to transfer the files to your system from
-    the RomWBW distribution directory Binary\\CPM3.
+  CP/M 3 uses a multi-step boot process involving multiple files. The
+  CP/M 3 boot files are not included on the ROM disk due to space
+  constraints. You will need to transfer the files to your system from
+  the RomWBW distribution directory Binary\CPM3.
 
-    After this is done, you will need to use `SYSCOPY` to place the CP/M
-    3 loader image on the boot tracks of all CP/M 3 boot disks/slices.
-    The loader image is called `CPMLDR.SYS`. You must then copy (at a
-    minimum) `CPM3.SYS` and `CCP.COM` onto the disk/slice. Assuming you
-    copied the CP/M 3 boot files onto your RAM disk at A:, you would
-    use:
+  After this is done, you will need to use `SYSCOPY` to place the CP/M 3
+  loader image on the boot tracks of all CP/M 3 boot disks/slices. The
+  loader image is called `CPMLDR.SYS`. You must then copy (at a minimum)
+  `CPM3.SYS` and `CCP.COM` onto the disk/slice. Assuming you copied the
+  CP/M 3 boot files onto your RAM disk at A:, you would use:
 
-        A>B:SYSCOPY C:=CPMLDR.SYS
-        A>B:COPY CPM3.SYS C:
-        A>B:COPY CCP.COM C:
+      A>B:SYSCOPY C:=CPMLDR.SYS
+      A>B:COPY CPM3.SYS C:
+      A>B:COPY CCP.COM C:
 
--   **ZPM3**
+- **ZPM3**
 
-    ZPM3 uses a multi-step boot process involving multiple files. The
-    ZPM3 boot files are not included on the ROM disk due to space
-    constraints. You will need to transfer the files to your system from
-    the RomWBW distribution directory Binary\\ZPM3.
+  ZPM3 uses a multi-step boot process involving multiple files. The ZPM3
+  boot files are not included on the ROM disk due to space constraints.
+  You will need to transfer the files to your system from the RomWBW
+  distribution directory Binary\ZPM3.
 
-    After this is done, you will need to use `SYSCOPY` to place the ZPM3
-    loader image on the boot tracks of all ZPM3 boot disks/slices. The
-    loader image is called `ZPMLDR.SYS`. You must then copy (at a
-    minimum) `CPM3.SYS`, `ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM`
-    onto the disk/slice. Assuming you copied the ZPM3 boot files onto
-    your RAM disk at A:, you would use:
+  After this is done, you will need to use `SYSCOPY` to place the ZPM3
+  loader image on the boot tracks of all ZPM3 boot disks/slices. The
+  loader image is called `ZPMLDR.SYS`. You must then copy (at a minimum)
+  `CPM3.SYS`, `ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM` onto the
+  disk/slice. Assuming you copied the ZPM3 boot files onto your RAM disk
+  at A:, you would use:
 
-        A>B:SYSCOPY C:=ZPMLDR.SYS
-        A>B:COPY CPM3.SYS C:
-        A>B:COPY ZCCP.COM C:
-        A>B:COPY ZINSTAL.ZPM C:
-        A>B:COPY STARTZPM.COM C:
+      A>B:SYSCOPY C:=ZPMLDR.SYS
+      A>B:COPY CPM3.SYS C:
+      A>B:COPY ZCCP.COM C:
+      A>B:COPY ZINSTAL.ZPM C:
+      A>B:COPY STARTZPM.COM C:
 
-    You may be wondering if the reference to `CPM3.SYS` is a typo. It is
-    not. The ZPM3 main system code file is called `CPM3.SYS` which is
-    the same name as CP/M 3 uses, but the file contents are not the
-    same.
+  You may be wondering if the reference to `CPM3.SYS` is a typo. It is
+  not. The ZPM3 main system code file is called `CPM3.SYS` which is the
+  same name as CP/M 3 uses, but the file contents are not the same.
 
 Finally, if you have copies of any of the RomWBW custom applications on
 your hard disk, you need to update them with the latest copies. The
 following applications are found on your ROM disk. Use COPY to copy them
 over any older versions of the app on your disk:
 
--   ASSIGN.COM
--   SYSCOPY.COM
--   MODE.COM
--   FDU.COM (was FDTST.COM)
--   FORMAT.COM
--   XM.COM
--   FLASH.COM
--   FDISK80.COM
--   TALK.COM
--   RTC.COM
--   TIMER.COM
--   INTTEST.COM
+- ASSIGN.COM
+- SYSCOPY.COM
+- MODE.COM
+- FDU.COM (was FDTST.COM)
+- FORMAT.COM
+- XM.COM
+- FLASH.COM
+- FDISK80.COM
+- TALK.COM
+- RTC.COM
+- TIMER.COM
+- INTTEST.COM
 
 For example: `B>COPY ASSIGN.COM C:`
 
 Some RomWBW custom applications are too large to fit on the ROM disk. If
 you are using any of these you will need to transfer them to your system
 and then update all copies. These applications are found in the
-Binary\\Apps directory of the distribution and in all of the disk
-images.
+Binary\Apps directory of the distribution and in all of the disk images.
 
--   FAT.COM
--   TUNE.COM
+- FAT.COM
+- TUNE.COM
 
 ## System Update
 
@@ -1243,11 +1246,11 @@ and CP/M system.
 A System Update may be more favorable than a System Upgrade in cases
 such as:
 
--   Overwriting of the ROM drive is not desired.
--   Space is unavailable to hold a full ROMWBW ROM.
--   To mimimize time taken to transfer and flash a full ROM.
--   Configuration changes are only minor and do not impact disk
-    applications.
+- Overwriting of the ROM drive is not desired.
+- Space is unavailable to hold a full ROMWBW ROM.
+- To mimimize time taken to transfer and flash a full ROM.
+- Configuration changes are only minor and do not impact disk
+  applications.
 
 The ROMWBW build process generates a system upgrade file along with the
 normal ROM image and can be identified by the extension “.upd”. It will
@@ -1298,22 +1301,22 @@ continue the maintenance of these applications and they have become
 unusable due to changes within RomWBW. As of RomWBW 2.6, these
 applications are no longer provided.
 
--   David Giles contributed support for the CSIO support in the SD Card
-    driver.
--   Ed Brindley contributed some of the code that supports the RC2014
-    platform.
--   Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-    AY-3-8910 sound driver as well as a long list of general code
-    enhancements.
--   Phillip Stevens contributed support for FreeRTOS.
--   Curt Mayer contributed the original Linux / MacOS build process.
--   UNA BIOS and FDISK80 are the products of John Coffman.
--   FLASH4 is a product of Will Sowerbutts.
--   CLRDIR is a product of Max Scane.
--   Tasty Basic is a product of Dimitri Theulings.
--   Dean Netherton contributed the sound driver interface and the
-    SN76489 sound driver.
--   The RomWBW Disk Catalog document was produced by Mykl Orders.
+- David Giles contributed support for the CSIO support in the SD Card
+  driver.
+- Ed Brindley contributed some of the code that supports the RC2014
+  platform.
+- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver as well as a long list of general code
+  enhancements.
+- Phillip Stevens contributed support for FreeRTOS.
+- Curt Mayer contributed the original Linux / MacOS build process.
+- UNA BIOS and FDISK80 are the products of John Coffman.
+- FLASH4 is a product of Will Sowerbutts.
+- CLRDIR is a product of Max Scane.
+- Tasty Basic is a product of Dimitri Theulings.
+- Dean Netherton contributed the sound driver interface and the SN76489
+  sound driver.
+- The RomWBW Disk Catalog document was produced by Mykl Orders.
 
 Contributions of all kinds to RomWBW are very welcome.
 
@@ -1364,12 +1367,11 @@ All contributions to RomWBW are subject to this license.
 The best way to get assistance with RomWBW or any aspect of the
 RetroBrew Computers projects is via the community forums:
 
--   [RetroBrew Computers
-    Forum](https://www.retrobrewcomputers.org/forum/)
--   [RC2014 Google
-    Group](https://groups.google.com/forum/#!forum/rc2014-z80)
--   [retro-comp Google
-    Group](https://groups.google.com/forum/#!forum/retro-comp)
+- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
+- [RC2014 Google
+  Group](https://groups.google.com/forum/#!forum/rc2014-z80)
+- [retro-comp Google
+  Group](https://groups.google.com/forum/#!forum/retro-comp)
 
 Submission of issues and bugs are welcome at the [RomWBW GitHub
 Repository](https://github.com/wwarthen/RomWBW).

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW Getting Started
 Wayne Warthen (mailto:wwarthen@gmail.com)
-21 Mar 2022
+10 Dec 2022
 
 
 
@@ -17,7 +17,7 @@ RomWBW
 Z80/Z180 System Software
 
 Version 3.1 Pre-release
-21 Mar 2022
+10 Dec 2022
 
 Wayne Warthen wwarthen@gmail.com
 
@@ -213,15 +213,23 @@ disk devices.
 
 The following ROM applications are available at the boot loader prompt:
 
-  Application    
-  -------------- --------------------------------------------------------
-  Monitor        Z80 system debug monitor w/ Intel Hex loader
-  Forth          Brad Rodriguez’s ANSI compatible Forth language
-  Basic          Nascom 8K BASIC language
-  Tasty BASIC    Dimitri Theuling’s Tiny BASIC implementation
-  Play           A simple video game (requires ANSI terminal emulation)
-  Network Boot   Boot through Wiznet MT011 device
-  Flash Update   Upload and flash a new ROMWBW image using xmodem
+  --------------------------------------------------------------------------
+  Application   
+  ------------- ------------------------------------------------------------
+  Monitor       Z80 system debug monitor w/ Intel Hex loader
+
+  Forth         Brad Rodriguez’s ANSI compatible Forth language
+
+  Basic         Nascom 8K BASIC language
+
+  Tasty BASIC   Dimitri Theuling’s Tiny BASIC implementation
+
+  Play          A simple video game (requires ANSI terminal emulation)
+
+  Network Boot  Boot through Wiznet MT011 device
+
+  Flash Update  Upload and flash a new ROMWBW image using xmodem
+  --------------------------------------------------------------------------
 
 In general, the command to exit these applications and restart the
 system is BYE. The exceptions are the Monitor which uses B and Play
@@ -430,11 +438,11 @@ the OS variants included with RomWBW.
 The following custom applications are found on the ROM disk and are,
 therefore, globally available.
 
-  -----------------------------------------------------------------------------
+  ----------------------------------------------------------------------------
   Application   Description
-  ------------- ---------------------------------------------------------------
-  ASSIGN        Add, change, and delete drive letter assignments. Use ASSIGN /?
-                for usage instructions.
+  ------------- --------------------------------------------------------------
+  ASSIGN        Add, change, and delete drive letter assignments. Use ASSIGN
+                /? for usage instructions.
 
   SYSCOPY       Copy system image to a device to make it bootable. Use SYSCOPY
                 with no parms for usage instructions.
@@ -446,8 +454,8 @@ therefore, globally available.
   FORMAT        Will someday be a command line tool to format floppy disks.
                 Currently does nothing!
 
-  XM            XModem file transfer program adapted to hardware. Automatically
-                uses primary serial port on system.
+  XM            XModem file transfer program adapted to hardware.
+                Automatically uses primary serial port on system.
 
   FLASH         Will Sowerbutts’ in-situ ROM programming utility.
 
@@ -461,17 +469,21 @@ therefore, globally available.
   TIMER         Display value of running periodic system timer.
 
   CPUSPD        Change the running CPU speed and wait states of the system.
-  -----------------------------------------------------------------------------
+  ----------------------------------------------------------------------------
 
 Some custom applications do not fit on the ROM disk. They are found on
 the disk image files or the individual files can be found in the
 Binary\Apps directory of the distribution.
 
+  --------------------------------------------------------------------------
   Application   Description
-  ------------- -------------------------------------------------------------
+  ------------- ------------------------------------------------------------
   TUNE          Play .PT2, .PT3, .MYM audio files.
+
   FAT           Access MS-DOS FAT filesystems from RomWBW (based on FatFs).
+
   INTTEST       Test interrupt vector hooking.
+  --------------------------------------------------------------------------
 
 Additional documentation on all of these applications can be found in
 “RomWBW Applications.pdf” in the Doc directory of the distribution.
@@ -499,6 +511,15 @@ well. However, you will find some files on the ROM disk that will work
 with ZSDOS, but will not work on CP/M 2.2. For example, LDDS, which
 loads the ZSDOS date/time stamper will only run on ZSDOS.
 
+Flash ROM Disks
+
+The limitation of ROM disks being read only can be overcome on some
+platforms with the appropriate selection of Flash ROM chip and system
+configuration. In this case the flash-file system can be enabled which
+will allow the ROM disk to be read and written to. Flash devices have a
+limited write lifespan and continual usage will eventually wear out the
+device. It is not suited for high usage applications.
+
 Disk Devices
 
 While the RAM/ROM disks provide a functional system, they are not useful
@@ -667,14 +688,21 @@ The following table shows the disk image files available. Note that the
 images in the “Hard” column are fine for use on CF Cards, SD Cards, as
 well as real spinning hard disks.
 
-  Floppy         Hard           Description
-  -------------- -------------- ------------------------------
-  fd_cpm22.img   hd_cpm22.img   DRI CP/M 2.2 boot disk
-  fd_zsdos.img   hd_zsdos.img   ZSDOS 1.1 boot disk
-  fd_nzcom.img   hd_nzcom.img   NZCOM boot disk
-  fd_cpm3.img    hd_cpm3.img    DRI CP/M 3 boot disk
-  fd_zpm3.img    hd_zpm3.img    ZPM3 boot disk
-  fd_ws4.img     hd_ws4.img     WordStar v4 application disk
+  -----------------------------------------------------------------------
+  Floppy          Hard            Description
+  --------------- --------------- ---------------------------------------
+  fd_cpm22.img    hd_cpm22.img    DRI CP/M 2.2 boot disk
+
+  fd_zsdos.img    hd_zsdos.img    ZSDOS 1.1 boot disk
+
+  fd_nzcom.img    hd_nzcom.img    NZCOM boot disk
+
+  fd_cpm3.img     hd_cpm3.img     DRI CP/M 3 boot disk
+
+  fd_zpm3.img     hd_zpm3.img     ZPM3 boot disk
+
+  fd_ws4.img      hd_ws4.img      WordStar v4 application disk
+  -----------------------------------------------------------------------
 
 In addition to the disk images above, there is also a special hard disk
 image called hd_combo.img. This image contains all of the images above,
@@ -685,14 +713,21 @@ system options.
 
 This is the layout of the hd_combo disk image:
 
-  Slice     Description
-  --------- ------------------------------
-  Slice 0   DRI CP/M 2.2 boot disk
-  Slice 1   ZSDOS 1.1 boot disk
-  Slice 2   NZCOM boot disk
-  Slice 3   DRI CP/M 3 boot disk
-  Slice 4   ZPM3 boot disk
-  Slice 5   WordStar v4 application disk
+  ------------------------------------------------------------------------
+  Slice   Description
+  ------- ----------------------------------------------------------------
+  Slice 0 DRI CP/M 2.2 boot disk
+
+  Slice 1 ZSDOS 1.1 boot disk
+
+  Slice 2 NZCOM boot disk
+
+  Slice 3 DRI CP/M 3 boot disk
+
+  Slice 4 ZPM3 boot disk
+
+  Slice 5 WordStar v4 application disk
+  ------------------------------------------------------------------------
 
 Note that unlike the ROM firmware, you do not need to choose a disk
 image specific to your hardware. Because the RomWBW firmware provides a

Readme.unix

@@ -34,22 +34,19 @@ By default, this will generate all of the standard configurations of
 RomWBW for all platforms.  If you just want to build the ROM for a
 specific platform and configuration you can use
 
-	make ROM_PLATFORM=<platform> ROM_CONFIG=<config> [ROMSIZE=<size>]
+	make ROM_PLATFORM=<platform> ROM_CONFIG=<config>
 
 where <platform> is one of the supported platforms such as SBC, RCZ80, 
-etc. and <config> is a configuration of that platform.  A ROM size may
-optionally be specified and must be one of 128, 256, 512, or 1024.  It
-defaults to 512.  For example, to build the "126" configuration of
-the "SCZ180" platform:
+etc. and <config> is a configuration of that platform.  For example,
+to build the "126" configuration of the "SCZ180" platform:
 
 	make ROM_PLATFORM=SCZ180 ROM_CONFIG=126
 
 Please be aware that the make-based build does have a few deficiencies.
 
 First and most important, the Makefiles do not handle reruns very well.
-To ensure a full buld, use "make clobber" from the top level directory
-before running the actual build.  For those used to using "make clean",
-you can do that but it is not as thorough as "make clobber".
+To ensure a full buld, use "make clean" from the top level directory
+before running the actual build.
 
 Second, there are some build failures that will not stop the make 
 process.  Most of this is because real CP/M 2.2 tools are used in 
@@ -57,7 +54,7 @@ places and CP/M 2.2 does not allow programs to return a result code.
 
 Third, not all dependencies are properly handled.  So, changes to some
 files will not cause things to rebuild as appropriate.  In general, I
-recommend doing a "make clobber" before running "make" to ensure that
+recommend doing a "make clean" before running "make" to ensure that
 everything is fully rebuilt.
 
 For macOS users, you may encounter a failure reading or writing files.
@@ -78,7 +75,7 @@ running.  To disable this feature:
 DISCLAIMER: You do this at your own risk.  I highly recommend that you
 return the settings back to normal immediately after doing a build.
 
-Heavy use is made of make's include facility and pattern rules. the 
+Heavy use is made of make's include facility and pattern rules. The 
 master rule set is in Tools/Makefile.inc.  Changes here will affect 
 almost every Makefile, and where exceptions are needed, the overrides 
 are applied in the lower Makefiles.
@@ -102,10 +99,10 @@ Credit:
 	hacked to do case-insensitivity. These are not marked, and are 
 	not extensive.
 
-	zx is from the distributed version, and also has local hacks 
+	zxcc is from the distributed version, and also has local hacks 
 	for case insensitivity.
 
-	Both zx and cpmtools ship with an overly complicated makefile 
+	Both zxcc and cpmtools ship with an overly complicated makefile 
 	generation system and this is ignored.
 
 	This whole Linux build framework is the work of Curt Mayer, 

Source/Apps/Test/rzsz/rz.asm

@@ -327,9 +327,9 @@ bdos_s:		call	bdos
 		ret
 
 ;----------------------------------------------------------------------------
-;		S u b r	o u t i	n e
+;		Search for 0 terminated string starting at HL
 
-sub_476:	push	af
+Search0:	push	af
 loc_477:	push	bc
 		xor	a
 		ld	b,a
@@ -361,7 +361,7 @@ text495h:	.db	0,0,0
 
 sub_4A4:	ld	de,file_fcb
 		ld	hl,byte_4F8
-		ld	(hl),3Ah
+		ld	(hl),':'
 		inc	hl
 		xor	a
 		ld	b,0Dh
@@ -370,14 +370,14 @@ sub_4A4:	ld	de,file_fcb
 		call	sub_16C4
 		dec	de
 		ld	a,(de)
-		add	a,40h
+		add	a,'A'-1
 		ld	(byte_4F4),a
 		dec	de
 		ld	a,(de)
 		ld	de,byte_4F5
 		call	sub_16E7
-		ld	a,24h
-		ld	(byte_507),a
+		ld	a,'$'
+		ld	(term_fn),a
 		ld	de,text4F2h
 		ld	c,C_WRITESTR
 		call	bdos		; Output string
@@ -386,13 +386,13 @@ sub_4A4:	ld	de,file_fcb
 		or	l
 		ret	z
 		ld	b,1
-		call	sub_476
+		call	Search0
 		dec	hl
-		ld	(hl),24h
+		ld	(hl),'$'
 		ld	de,(byte_2CD4)
 		ld	c,C_WRITESTR
 		call	bdos		; Output string
-		ld	de,text508h
+		ld	de,newline
 		ld	c,C_WRITESTR
 		jp	bdos		; Output string
 
@@ -418,8 +418,8 @@ byte_4F8:	.db	0 ;
 		.db	0 ;
 		.db	0 ;
 		.db	20h ;
-byte_507:	.db	0			
-text508h:	.text	"\r\n$"
+term_fn:	.db	0			
+newline:	.text	"\r\n$"
 
 ;----------------------------------------------------------------------------
 ;		S u b r	o u t i	n e
@@ -1278,7 +1278,7 @@ loc_9AE:	ld	a,(byte_8AF)
 		ret	z
 		push	hl
 		ld	b,1
-		call	sub_476
+		call	Search0
 		dec	hl
 		ld	(hl),20h
 		pop	hl

Source/Apps/VGM/vgmplay.asm

@@ -1,16 +1,17 @@
 ;------------------------------------------------------------------------------
-; SN76489 + AY-3-8910 + YM2162 VGM player for CP/M
+; SN76489 + AY-3-8910 + YM2162 + YM2151 VGM player for CP/M
 ;------------------------------------------------------------------------------
 ;
 ; Based on VGM player by J.B. Langston
 ; https://github.com/jblang/SN76489
 ;
 ; Enhanced with multi-chip support by Marco Maccaferri
+; YM2151 support from Ed Brindley
 ;
 ; YM2162/YM3484, GD3 support, VGM Chip identification, 
 ; default file type, basic file size checking added by Phil Summers
 ;
-; Bugs: YM2612 Mute not working.
+; Bugs: YM2151 playback untested & no mute.
 ;
 ; Assemble with:
 ;
@@ -20,84 +21,145 @@
 ; Device and system specific definitions
 ;------------------------------------------------------------------------------
 ;
-P8X180          .EQU    0                   ; System configuration
+P8X180          .EQU    0           	        ; System configuration
 RC2014          .EQU    0
 SBCECB		.EQU	1
-
+MBC		.EQU	0
+;
                 .IF P8X180
-RSEL            .EQU    82H                 ; Primary AY-3-8910 Register selection
-RDAT            .EQU    83H                 ; Primary AY-3-8910 Register data
-RSEL2           .EQU    88H                 ; Secondary AY-3-8910 Register selection
-RDAT2           .EQU    89H                 ; Secondary AY-3-8910 Register data
-PSGREG          .EQU    84H                 ; Primary SN76489
-PSG2REG         .EQU    8AH                 ; Secondary SN76489
-FRAME_DLY       .EQU    48                  ; Frame delay (~ 1/44100)
+RSEL            .EQU    82H			; Primary AY-3-8910 Register selection
+RDAT            .EQU    83H			; Primary AY-3-8910 Register data
+RSEL2           .EQU    88H			; Secondary AY-3-8910 Register selection
+RDAT2           .EQU    89H			; Secondary AY-3-8910 Register data
+PSG1REG         .EQU    84H			; Primary SN76489
+PSG2REG         .EQU    8AH			; Secondary SN76489
+YM2151_SEL1	.EQU	0B0H			; Primary YM2151 register selection
+YM2151_DAT1	.EQU	0B1H			; Primary YM2151 register data
+YM2151_SEL2	.EQU	0B2H			; Secondary YM2151 register selection
+YM2151_DAT2	.EQU	0B3H			; Secondary YM2151 register data
+FRAME_DLY       .EQU    48			; Frame delay (~ 1/44100)
                 .ENDIF
-
+;
                 .IF RC2014
-RSEL            .EQU    0D8H                ; Primary AY-3-8910 Register selection
-RDAT            .EQU    0D0H                ; Primary AY-3-8910 Register data
-RSEL2           .EQU    0A0H                ; Secondary AY-3-8910 Register selection
-RDAT2           .EQU    0A1H                ; Secondary AY-3-8910 Register data
-PSGREG          .EQU    0FFH                ; Primary SN76489
-PSG2REG         .EQU    0FBH                ; Secondary SN76489
-FRAME_DLY       .EQU    15                  ; Frame delay (~ 1/44100)
+RSEL            .EQU    0D8H			; Primary AY-3-8910 Register selection
+RDAT            .EQU    0D0H			; Primary AY-3-8910 Register data
+RSEL2           .EQU    0A0H			; Secondary AY-3-8910 Register selection
+RDAT2           .EQU    0A1H			; Secondary AY-3-8910 Register data
+PSG1REG         .EQU    0FFH			; Primary SN76489
+PSG2REG         .EQU    0FBH			; Secondary SN76489
+YM2151_SEL1	.EQU	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.EQU	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.EQU	0D0H			; Secondary YM2151 register selection
+YM2151_DAT2	.EQU	0D1H			; Secondary YM2151 register data
+FRAME_DLY       .EQU    15			; Frame delay (~ 1/44100)
                 .ENDIF
-
+;
                 .IF SBCECB
 RSEL            .EQU    0D8H			; Primary AY-3-8910 Register selection
 RDAT            .EQU    0D0H			; Primary AY-3-8910 Register data
 RSEL2           .EQU    0A0H			; Secondary AY-3-8910 Register selection
 RDAT2           .EQU    0A1H			; Secondary AY-3-8910 Register data
+YMSEL		.EQU	0C0H			; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.EQU	0C1H			; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.EQU	0C2H			; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.EQU	0C3H			; Secondary YM2162 11000011 a1=1 a0=1
+PSG1REG         .EQU    0C6H			; Primary SN76489
+PSG2REG         .EQU    0C7H			; Secondary SN76489
+YM2151_SEL1	.EQU	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.EQU	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.EQU	0FEH			; Secondary YM2151 register selection
+YM2151_DAT2	.EQU	0FFH			; Secondary YM2151 register data
+FRAME_DLY       .EQU    8  			; Frame delay (~ 1/44100)
+                .ENDIF
+;
+		.IF MBC
+RSEL            .EQU    0A0H			; Primary AY-3-8910 Register selection
+RDAT            .EQU    0A1H			; Primary AY-3-8910 Register data
+RSEL           	.EQU    0D8H			; Secondary AY-3-8910 Register selection
+RDAT           	.EQU    0D0H			; Secondary AY-3-8910 Register data
 YMSEL		.EQU	0C0H			; 11000000 a1=0 a0=0
 YMDAT		.EQU	0C1H			; 11000001 a1=0 a0=1
 YM2SEL		.EQU	0C2H			; 11000010 a1=1 a0=0
 YM2DAT		.EQU	0C3H			; 11000011 a1=1 a0=1
 PSGREG          .EQU    0C6H			; Primary SN76489
 PSG2REG         .EQU    0C7H			; Secondary SN76489
+YM2151_SEL1	.EQU	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.EQU	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.EQU	0FEH			; Secondary YM2151 register selection
+YM2151_DAT2	.EQU	0FFH			; Secondary YM2151 register data
 FRAME_DLY       .EQU    10  			; Frame delay (~ 1/44100)
-
-#DEFINE SBCV2004
-HB_RTCVAL	.EQU	0FFEEH	
-RTCIO		.EQU	070H
-
                 .ENDIF
+;
+;------------------------------------------------------------------------------
+; Your customer overrides can go in here i.e. ports 
+;------------------------------------------------------------------------------
+;
+;RSEL            .SET    09AH			; Primary AY-3-8910 Register selection
+;RDAT            .SET    09BH			; Primary AY-3-8910 Register data
+;
+;------------------------------------------------------------------------------
+; Frame delay overide values for different processor speeds. 
+;------------------------------------------------------------------------------
+;
+;FRAME_DLY       .SET    10  			; 1Mhz	; not 
+;FRAME_DLY       .SET    10  			; 2Mhz	; implemented
+;FRAME_DLY       .SET    10  			; 4Mhz	; yet
+;FRAME_DLY       .SET    15  			; 8Mhz
+;FRAME_DLY       .SET    10  			; 10Mhz
+;FRAME_DLY       .SET    20  			; 12Mhz
+;
+;------------------------------------------------------------------------------
+; Frame delay values for pal/ntsc
+;------------------------------------------------------------------------------
+;
+D60		.EQU	735
+D50		.EQU	882
+;
+;------------------------------------------------------------------------------
+; Processor speed control for SBCV2004+
+;------------------------------------------------------------------------------
+;
+;#DEFINE 	SBCV2004			; My SBC board at 12Mhz needs this to switch to
+HB_RTCVAL	.EQU	0FFEEH			; 6MHz for it to work with the ECB-VGM reliably.
+RTCIO		.EQU	070H						
 
-
+;------------------------------------------------------------------------------
+; YM2162 Register write macros
+;------------------------------------------------------------------------------
+;
 #DEFINE	setreg(reg,val) \
 #DEFCONT \	ld	a,reg 
 #DEFCONT \	out	(YMSEL),a 
-#DEFCONT \	nop
-#DEFCONT \	nop
 #DEFCONT \	ld	a,val 
 #DEFCONT \	out	(YMDAT),a 
-#DEFCONT \	nop
-#DEFCONT \	nop
-
+#DEFCONT \	in	a,(YMSEL)
+#DEFCONT \	rlca
+#DEFCONT \	jp	c,$-3
+;
 #DEFINE	setreg2(reg,val) \
 #DEFCONT \	ld	a,reg 
 #DEFCONT \	out	(YM2SEL),a 
-#DEFCONT \	nop
-#DEFCONT \	nop
 #DEFCONT \	ld	a,val 
-#DEFCONT \	out	(YM2DAT),a 
-#DEFCONT \	nop
-#DEFCONT \	nop
-
-D50		.EQU	500			; 900			;735
-D60		.EQU	600			; 1000			;882
+#DEFCONT \	out	(YM2DAT),a
+#DEFCONT \	in	a,(YMSEL)
+#DEFCONT \	rlca
+#DEFCONT \	jp	c,$-3 
 
 ;------------------------------------------------------------------------------
 ; VGM Codes
 ;------------------------------------------------------------------------------
 
 VGM_GG_W	.EQU	04FH			; GAME GEAR PSG STEREO. WRITE DD TO PORT 0X06
-VGM_PSG_W	.EQU	050H			; PSG (SN76489/SN76496) WRITE VALUE DD
-VGM_YM2612_W	.EQU	052H			; YM2612 WRITE VALUE DD
+VGM_PSG1_W	.EQU	050H			; PSG (SN76489/SN76496) #1 WRITE VALUE DD
+VGM_PSG2_W	.EQU	030H			; PSG (SN76489/SN76496) #2 WRITE VALUE DD
+VGM_YM26121_W	.EQU	052H			; YM2612 #1 WRITE VALUE DD
+VGM_YM26122_W	.EQU	053H			; YM2612 #2 WRITE VALUE DD
 VGM_WNS		.EQU	061H			; WAIT N SAMPLES
 VGM_W735	.EQU	062H			; WAIT 735 SAMPLES (1/60TH SECOND)
 VGM_W882	.EQU	063H			; WAIT 882 SAMPLES (1/50TH SECOND)
 VGM_ESD		.EQU	066H			; END OF SOUND DATA
+VGM_YM21511_W	.EQU	054H			; YM2612 #1 WRITE VALUE DD
+VGM_YM21512_W	.EQU	0A4H			; YM2612 #2WRITE VALUE DD
 
 ;------------------------------------------------------------------------------
 ; Generic CP/M definitions
@@ -168,13 +230,12 @@ L1              LD      B,FRAME_DLY
 ; Program Exit
 ;------------------------------------------------------------------------------
 ;
-EXIT
+EXIT:		CALL	VGMDEVICES		; Display devices used
+		CALL	VGMMUTE			; Mute Devices
+		
 #IFDEF SBCV2004
 		CALL	FASTIO
 #ENDIF
-		CALL	VGMDEVICES		; Display devices used
-		CALL	VGMMUTE			; Mute Devices
-		
 		LD	DE,MSG_EXIT		
 EXIT_ERR:	CALL	PRTSTR			; Generic message or error
                 LD      SP, (OLDSTACK)		; Exit to CP/M
@@ -266,7 +327,7 @@ VGMINFO:	LD	DE,MSG_BADF		; Check valid file
 		EX	DE,HL
 		PUSH	BC
 		POP	DE
-;		CALL	PRTHEX32
+;		CALL	PRTHEX32		; Debug
 
 		LD	HL,(VGMDATA+16H)	; Is GD3 in range?
 		LD	A,H
@@ -296,6 +357,9 @@ VGMINFO:	LD	DE,MSG_BADF		; Check valid file
 		ADD	HL,DE
 
 		CALL	CRLF
+		LD	DE,MSG_TRACK
+		CALL	PRTSTR
+
 GD3_NXT:	LD	A,(HL)			; Print English Track
 		OR	A
 		INC	HL
@@ -311,7 +375,9 @@ GD3_NXT1:	LD	A,(HL)			; Skip Japanese Track
 		JR	NZ,GD3_NXT1
 ;		JR	GD3_NXT1
 
-		CALL	CRLF
+		LD 	DE,MSG_TITLE
+		CALL	PRTSTR
+
 GD3_NXT2:	LD	A,(HL)			; Print English Title
 		OR	A
 		INC	HL
@@ -349,20 +415,22 @@ NEXT            LD      A, (HL)
 NEXT1           CP      VGM_GG_W		; Game Gear SN76489 stereo. Ignored
                 JR      NZ, PSG
 		LD	IX,VGM_DEV
-		SET	6,(IX+0)
-                INC     HL
-                JR      NEXT
+		SET	0,(IX+1)
+		INC     HL
+		JR      NEXT
 
-PSG             CP      VGM_PSG_W		; Write byte to SN76489.
+;	SN76489 SECTION
+
+PSG             CP      VGM_PSG1_W		; Write byte to SN76489.
                 JR      NZ, PSG2
                 LD      A, (HL)
 		INC	HL
-                OUT     (PSGREG), A
+                OUT     (PSG1REG), A
 		LD	IX,VGM_DEV
 		SET	0,(IX+0)
                 JR      NEXT
 
-PSG2            CP      30H			; Write byte to second SN76489.
+PSG2            CP      VGM_PSG2_W		; Write byte to second SN76489.
                 JR      NZ, AY
                 LD      A, (HL)
                 INC     HL
@@ -371,10 +439,10 @@ PSG2            CP      30H			; Write byte to second SN76489.
 		SET	1,(IX+0)
                 JR      NEXT
 
-;	AY SECTION
+;	AY-3-8910 SECTION
 
 AY              CP      0A0H
-		JR	NZ,YM
+		JR	NZ,YM2162_1
 		LD      A, (HL)
                 INC     HL
                 BIT     7, A			; Bit 7=1 for second AY-3-8910
@@ -395,10 +463,10 @@ AY1		OUT     (RSEL), A
 		SET	3,(IX+0)
                 JR      NEXT
 
-;	YM SECTION
+;	YM2612 SECTION
 
-YM:		CP      052H
-                JR      NZ, YM2
+YM2162_1	CP      VGM_YM26121_W
+                JR      NZ, YM2162_2
 		LD	A,(HL)
 		OUT	(YMSEL),A
 		INC	HL
@@ -409,9 +477,8 @@ YM:		CP      052H
 		SET	4,(IX+0)
 		JP	NEXT
 ;
-YM2:		CP      053H
-                JR      NZ,WAITNN
-
+YM2162_2	CP      VGM_YM26122_W
+                JR      NZ,YM2151_1
 		LD	A,(HL)
 		OUT	(YM2SEL),A
 		INC	HL
@@ -419,10 +486,36 @@ YM2:		CP      053H
 		OUT	(YM2DAT),A
 		INC	HL
 		LD	IX,VGM_DEV
-		SET	4,(IX+0)
+		SET	4,(IX+0)		; 2nd channel 
+		JP	NEXT
+
+;	YM2151 SECTION
+
+YM2151_1	CP      VGM_YM21511_W
+                JR      NZ,YM2151_2
+		LD	A,(HL)
+		OUT	(YM2151_SEL1),A
+		INC	HL
+		LD	A,(HL)
+		OUT	(YM2151_DAT1),A
+		INC	HL
+		LD	IX,VGM_DEV
+		SET	6,(IX+0)
+		JP	NEXT
+;
+YM2151_2	CP      VGM_YM21512_W
+                JR      NZ,WAITNN
+		LD	A,(HL)
+		OUT	(YM2151_SEL2),A
+		INC	HL
+		LD	A,(HL)
+		OUT	(YM2151_DAT2),A
+		INC	HL
+		LD	IX,VGM_DEV
+		SET	7,(IX+0)
 		JP	NEXT
 ;	
-WAITNN:         CP      61H			; Wait nn samples
+WAITNN		CP      VGM_WNS			; Wait nn samples
                 JR      NZ, WAIT60
                 LD      A, (HL)
                 INC     HL
@@ -437,14 +530,14 @@ WAITNN:         CP      61H			; Wait nn samples
 WAIT60          CP      VGM_W735		; Wait 735 samples (60Hz)
                 JR      NZ, WAIT50
                 LD      (VGMPOS), HL
-                LD      HL, D50
+                LD      HL, D60
                 LD      (VGMDLY), HL
                 RET
 ;
 WAIT50          CP      VGM_W882		; Wait 882 samples (50Hz)
                 JR      NZ, WAIT1
                 LD      (VGMPOS), HL
-                LD      HL, D60
+                LD      HL, D50
                 LD      (VGMDLY), HL
                 RET
 ;
@@ -458,8 +551,8 @@ WAIT1           CP      70H			; WAIT 0-15 SAMPLES
                 LD      (VGMDLY), HL
                 RET
 ;
-UNK:		LD	IX,VGM_DEV		; Set flag for
-		SET	6,(IX+0)		; unknown device
+UNK		LD	IX,VGM_DEV		; Set flag for
+		SET	0,(IX+1)		; unknown device
 		INC	HL			; Try and skip
 		JP	NEXT
 ;
@@ -489,24 +582,38 @@ VGMDEVICES:	LD	DE,MSG_PO		; Played on ...
 		SRL	A
 		PUSH	AF
 ;
-		LD	DE,MSG_YM		; YM-2612 Devices
+		LD	DE,MSG_YM2612		; YM-2612 Devices
 		CALL	CHKDEV
 ;
 		POP	AF
 		SRL	A
 		SRL	A
+		PUSH	AF
+;
+		LD	DE,MSG_YM2151		; YM-2151 Devices
+		CALL	CHKDEV
+;
+		POP	AF
+;		SRL	A
+;		SRL	A
 ;		PUSH	AF
 ;
+		LD	A,(IX+1)
 		LD	DE,MSG_UNK		; Unknown Device Code detected
 ;		CALL	CHKDEV
 ;
 CHKDEV:		AND	%00000011		; Display 
-		SRL	A			; number of
-		ADC	A,'0'			; devices
-		CP	'0'
-		RET	Z			; Skip if not
-		CALL	PRTCHR			; used.
-		CALL	PRTSTR
+		RET	Z			; number of
+		SRL	A			; devices
+		ADC	A,'0'
+		CALL	PRTCHR			; Skip if not
+		CALL	PRTSTR			; used.
+		RET
+
+DEBUG:		PUSH	AF
+		LD	A,'*'
+		CALL	PRTCHR
+		POP	AF
 		RET
 ;
 ;------------------------------------------------------------------------------
@@ -518,16 +625,16 @@ VGMMUTE:	LD	A,(IX+0)		; Only mute devices used.
 		JR	Z,SKIP1
 
 		LD      A, 9FH              	; Mute all channels on psg
-                OUT     (PSGREG), A
+                OUT     (PSG1REG), A
                 OUT     (PSG2REG), A
                 LD      A, 0BFH
-                OUT     (PSGREG), A
+                OUT     (PSG1REG), A
                 OUT     (PSG2REG), A
                 LD      A, 0DFH
-                OUT     (PSGREG), A
+                OUT     (PSG1REG), A
                 OUT     (PSG2REG), A
                 LD      A, 0FFH
-                OUT     (PSGREG), A
+                OUT     (PSG1REG), A
                 OUT     (PSG2REG), A
 
 SKIP1:		LD	A,(IX+0)
@@ -554,11 +661,12 @@ SKIP1:		LD	A,(IX+0)
                 OUT     (RDAT2), A
 		CALL	FASTIO
 
-SKIP2:		LD	A,(IX+0)
+SKIP2:		LD	A,(IX+0)		; mute all channels on ym2612
 		AND	%00110000
 		JP	Z,SKIP3
 
 		setreg($22,$00)			; lfo off
+
 		setreg($27,$00)			; Disable independant Channel 3
 		setreg($28,$00)			; note off ch 1
 		setreg($28,$01)			; note off ch 2
@@ -573,9 +681,240 @@ SKIP2:		LD	A,(IX+0)
 		setreg($b6,$00)
 		setreg2($b4,$00)		; sound off ch 4-6
 		setreg2($b5,$00)
-		setreg2($b6,$00)		
+		setreg2($b6,$00)
+
+		setreg($40,$7f)			; ch 1-3 total level minimum
+		setreg($41,$7f)
+		setreg($42,$7f)
+		setreg($44,$7f)
+		setreg($45,$7f)
+		setreg($46,$7f)
+		setreg($48,$7f)
+		setreg($49,$7f)
+		setreg($4a,$7f)
+		setreg($4c,$7f)
+		setreg($4d,$7f)
+		setreg($4e,$7f)
+
+		setreg2($40,$7f)		; ch 4-6 total level minimum
+		setreg2($41,$7f)
+		setreg2($42,$7f)
+		setreg2($44,$7f)
+		setreg2($45,$7f)
+		setreg2($46,$7f)
+		setreg2($48,$7f)
+		setreg2($49,$7f)
+		setreg2($4a,$7f)
+		setreg2($4c,$7f)
+		setreg2($4d,$7f)
+		setreg2($4e,$7f)
+
+#if (0)
+
+		setreg($2a,$00)			; dac value
+
+		setreg($24,$00)			; timer A frequency
+		setreg($25,$00)			; timer A frequency
+		setreg($26,$00)			; time B frequency
+
+		setreg($30,$00)			; ch 1-3 multiply & detune
+		setreg($31,$00)
+		setreg($32,$00)
+		setreg($34,$00)
+		setreg($35,$00)
+		setreg($36,$00)
+		setreg($38,$00)
+		setreg($39,$00)
+		setreg($3a,$00)
+		setreg($3c,$00)
+		setreg($3d,$00)
+		setreg($3e,$00)
+
+		setreg2($30,$00)		; ch 4-6 multiply & detune
+		setreg2($31,$00)
+		setreg2($32,$00)
+		setreg2($34,$00)
+		setreg2($35,$00)
+		setreg2($36,$00)
+		setreg2($38,$00)
+		setreg2($39,$00)
+		setreg2($3a,$00)
+		setreg2($3c,$00)
+		setreg2($3d,$00)
+		setreg2($3e,$00)
+
+		setreg($50,$00)			; ch 1-3 attack rate and scaling
+		setreg($51,$00)
+		setreg($52,$00)
+		setreg($54,$00)
+		setreg($55,$00)
+		setreg($56,$00)
+		setreg($58,$00)
+		setreg($59,$00)
+		setreg($5a,$00)
+		setreg($5c,$00)
+		setreg($5d,$00)
+		setreg($5e,$00)
+
+		setreg2($50,$00)		; ch 4-6 attack rate and scaling
+		setreg2($51,$00)
+		setreg2($52,$00)
+		setreg2($54,$00)
+		setreg2($55,$00)
+		setreg2($56,$00)
+		setreg2($58,$00)
+		setreg2($59,$00)
+		setreg2($5a,$00)
+		setreg2($5c,$00)
+		setreg2($5d,$00)
+		setreg2($5e,$00)
+
+		setreg($60,$00)			; ch 1-3 decay rate and am enable
+		setreg($61,$00)
+		setreg($62,$00)
+		setreg($64,$00)
+		setreg($65,$00)
+		setreg($66,$00)
+		setreg($68,$00)
+		setreg($69,$00)
+		setreg($6a,$00)
+		setreg($6c,$00)
+		setreg($6d,$00)
+		setreg($6e,$00)
+
+		setreg2($60,$00)		; ch 4-6 decay rate and am enable
+		setreg2($61,$00)
+		setreg2($62,$00)
+		setreg2($64,$00)
+		setreg2($65,$00)
+		setreg2($66,$00)
+		setreg2($68,$00)
+		setreg2($69,$00)
+		setreg2($6a,$00)
+		setreg2($6c,$00)
+		setreg2($6d,$00)
+		setreg2($6e,$00)
+
+		setreg($70,$00)			; ch 1-3 sustain rate
+		setreg($71,$00)
+		setreg($72,$00)
+		setreg($74,$00)
+		setreg($75,$00)
+		setreg($76,$00)
+		setreg($78,$00)
+		setreg($79,$00)
+		setreg($7a,$00)
+		setreg($7c,$00)
+		setreg($7d,$00)
+		setreg($7e,$00)
+
+		setreg2($70,$00)		; ch 4-6 sustain rate
+		setreg2($71,$00)
+		setreg2($72,$00)
+		setreg2($74,$00)
+		setreg2($75,$00)
+		setreg2($76,$00)
+		setreg2($78,$00)
+		setreg2($79,$00)
+		setreg2($7a,$00)
+		setreg2($7c,$00)
+		setreg2($7d,$00)
+		setreg2($7e,$00)
+
+		setreg($80,$00)			; ch 1-3 release rate and sustain level
+		setreg($81,$00)
+		setreg($82,$00)
+		setreg($84,$00)
+		setreg($85,$00)
+		setreg($86,$00)
+		setreg($88,$00)
+		setreg($89,$00)
+		setreg($8a,$00)
+		setreg($8c,$00)
+		setreg($8d,$00)
+		setreg($8e,$00)
+
+		setreg2($80,$00)		; ch 4-6 release rate and sustain level
+		setreg2($81,$00)
+		setreg2($82,$00)
+		setreg2($84,$00)
+		setreg2($85,$00)
+		setreg2($86,$00)
+		setreg2($88,$00)
+		setreg2($89,$00)
+		setreg2($8a,$00)
+		setreg2($8c,$00)
+		setreg2($8d,$00)
+		setreg2($8e,$00)
+
+		setreg($90,$00)			; ch 1-3 ssg-eg
+		setreg($91,$00)
+		setreg($92,$00)
+		setreg($94,$00)
+		setreg($95,$00)
+		setreg($96,$00)
+		setreg($98,$00)
+		setreg($99,$00)
+		setreg($9a,$00)
+		setreg($9c,$00)
+		setreg($9d,$00)
+		setreg($9e,$00)
+
+		setreg2($90,$00)		; ch 4-6 ssg-eg
+		setreg2($91,$00)
+		setreg2($92,$00)
+		setreg2($94,$00)
+		setreg2($95,$00)
+		setreg2($96,$00)
+		setreg2($98,$00)
+		setreg2($99,$00)
+		setreg2($9a,$00)
+		setreg2($9c,$00)
+		setreg2($9d,$00)
+		setreg2($9e,$00)
+
+		setreg($a0,$00)			; ch 1-3 frequency
+		setreg($a1,$00)
+		setreg($a2,$00)
+		setreg($a4,$00)
+		setreg($a5,$00)
+		setreg($a6,$00)
+;		setreg($a8,$00)			; ch 3 special mode
+;		setreg($a9,$00)
+;		setreg($aa,$00)
+;		setreg($ac,$00)
+;		setreg($ad,$00)
+;		setreg($ae,$00)
+
+		setreg2($a0,$00)		; ch 4-6 frequency
+		setreg2($a1,$00)
+		setreg2($a2,$00)
+		setreg2($a4,$00)
+		setreg2($a5,$00)
+		setreg2($a6,$00)
+;		setreg2($a8,$00)		; ch 3 special mode
+;		setreg2($a9,$00)
+;		setreg2($aa,$00)
+;		setreg2($ac,$00)
+;		setreg2($ad,$00)
+;		setreg2($ae,$00)
+
+		setreg($b0,$00)			; ch 1-3 algorith + feedback
+		setreg($b1,$00)
+		setreg($b2,$00)
+		setreg2($b0,$00)		; ch 4-6 algorith + feedback
+		setreg2($b1,$00)
+		setreg2($b2,$00)
+
+#endif
 		
-SKIP3:		RET
+SKIP3:		LD	A,(IX+0)		; For YM2151 ... Unimplemented
+		AND	%11000000
+		JP	Z,SKIP4
+
+		; MUTE YM2151
+
+SKIP4		RET
 ;
 ;------------------------------------------------------------------------------
 ; Hardware specific routines.
@@ -609,18 +948,21 @@ FASTIO:
 ; Strings and constants.
 ;------------------------------------------------------------------------------
 ;
-MSG_WELC:	.DB	"VGM Player for RomWBW v0.2, 27-Nov-2021",CR,LF
+MSG_WELC:	.DB	"VGM Player for RomWBW v0.3, 2-Jul-2022",CR,LF
 ;		.DB	"J.B. Langston/Marco Maccaferri/Phil Summers",CR,LF
 		.DB	0
 MSG_BADF:	.DB	"Not a VGM file",CR,LF,0
 MSG_PO		.DB	"Played on : ",0
-MSG_YM:		.DB	"xYM-2612 ",0
+MSG_YM2612:	.DB	"xYM-2612 ",0
 MSG_SN:		.DB	"xSN76489 ",0
 MSG_AY:		.DB	"xAY-3-8910 ",0
-MSG_UNK		.DB	"xUnsupported device encountered", CR, LF, 0
+MSG_YM2151:	.DB	"xYM-2151 ",0
+MSG_UNK:	.DB	"xUnsupported device encountered", CR, LF, 0
 MSG_EXIT:	.DB	"FINISHED.",CR,LF,0
 MSG_NOFILE:     .DB	"File not found", CR, LF, 0
 MSG_MEM:	.DB	"File to big", CR, LF, 0
+MSG_TITLE:	.DB	" from: ",0
+MSG_TRACK	.DB	"Playing: ",0
 ;
 ;------------------------------------------------------------------------------
 ; Variables
@@ -629,7 +971,8 @@ MSG_MEM:	.DB	"File to big", CR, LF, 0
 VGMPOS          .DW     0
 VGMDLY          .DW     0
 VGMUNK_F	.DB	0		; Flag for unknown device
-VGM_DEV		.DB	%00000000	; UUYYAASS
+VGM_DEV		.DB	%00000000	; yyYYAASS
+		.DB	%00000000	; Unimplemented device flags
 
 OLDSTACK        .DW     0		; original stack pointer
                 .DS     40H		; space for stack

Source/Apps/assign.asm

@@ -244,7 +244,7 @@ initcpm3:
 ; The CP/M 3 drvtbl is in common memory, but the XDPHs are not.
 ; So, here we temporarily swap the bank to the CP/M 3 system
 ; bank.  We cannot use the CP/M Direct BIOS call because it
-; explicitly blocks use of SELMEM, so we are foreced to use
+; explicitly blocks use of SELMEM, so we are forced to use
 ; HBIOS call.  The CP/M 3 system bank is always the HBIOS
 ; user bank.
 ;

Source/Apps/sysgen.z80

@@ -22,7 +22,7 @@ DREADF	EQU	20		; DISK READ FUNCTION
 ;
 CR	EQU	0DH		; CARRIAGE RETURN
 LF	EQU	0AH		; LINE FEED
-STKSIZE	EQU	16		; SIZE OF LOCAL STACK
+STKSIZE	EQU	32		; SIZE OF LOCAL STACK
 ;
 WBOOT	EQU	1		; ADDRESS OF WARM BOOT (OTHER PATCH ENTRY
 ;

Source/BPBIOS/Makefile

@@ -30,7 +30,7 @@ zcpr33n.rel zcpr33t.rel:
 
 all:: $(HD0IMG)
 
-clobber::
+clean::
 	@rm -f $(HD0IMG)
 
 %.img: zcpr33n.rel zcpr33t.rel

Source/BPBIOS/diskdefs

@@ -311,6 +311,7 @@ diskdef wbw_rom1024
 end
 
 # RomWBW 720K floppy media
+
 diskdef wbw_fd720
   seclen 512
   tracks 160
@@ -323,6 +324,7 @@ diskdef wbw_fd720
 end
 
 # RomWBW 1.44M floppy media
+
 diskdef wbw_fd144
   seclen 512
   tracks 160
@@ -335,6 +337,7 @@ diskdef wbw_fd144
 end
 
 # RomWBW 360K floppy media
+
 diskdef wbw_fd360
   seclen 512
   tracks 80
@@ -347,6 +350,7 @@ diskdef wbw_fd360
 end
 
 # RomWBW 1.20M floppy media
+
 diskdef wbw_fd120
   seclen 512
   tracks 160
@@ -359,7 +363,8 @@ diskdef wbw_fd120
 end
 
 # RomWBW 8320KB Hard Disk Slice (512 directory entry format)
-# Legacy format, 512 dir entries, 16,630 sectors / slice
+# Legacy format: 512 dir entries, 16,630 sectors / slice
+
 diskdef wbw_hd512
   seclen 512
   tracks 1040
@@ -372,6 +377,9 @@ diskdef wbw_hd512
 end
 
 # First 4 slices of wbw_hd512
+# Assumes first slice (slice 0) starts at sector 0
+# Offset of any slice (in tracks) = (1040 * <slice_num>)
+
 diskdef wbw_hd512_0
   seclen 512
   tracks 1040
@@ -380,45 +388,50 @@ diskdef wbw_hd512_0
   maxdir 512
   skew 0
   boottrk 16
+  offset 0T
   os 2.2
 end
 
 diskdef wbw_hd512_1
   seclen 512
-  tracks 2080
+  tracks 1040
   sectrk 16
   blocksize 4096
   maxdir 512
   skew 0
-  boottrk 1056
+  boottrk 16
+  offset 1040T
   os 2.2
 end
 
 diskdef wbw_hd512_2
   seclen 512
-  tracks 3120
+  tracks 1040
   sectrk 16
   blocksize 4096
   maxdir 512
   skew 0
-  boottrk 2096
+  boottrk 16
+  offset 2080T
   os 2.2
 end
 
 diskdef wbw_hd512_3
   seclen 512
-  tracks 4160
+  tracks 1040
   sectrk 16
   blocksize 4096
   maxdir 512
   skew 0
-  boottrk 3136
+  boottrk 16
+  offset 3120T
   os 2.2
 end
 
 # RomWBW 8MB Hard Disk (1024 directory entry format)
-# New format, 1024 dir entries, 16,384 sectors / slice
+# New format: 1024 dir entries, 16,384 sectors / slice
 # Pure filesystem image, no MBR prefix
+
 diskdef wbw_hd1024
   seclen 512
   tracks 1024
@@ -431,110 +444,124 @@ diskdef wbw_hd1024
 end
 
 # First 4 slices of wbw_hd1024
-# Assumes 1MB prefix (2048 sectors)
+# Assumes standard 1MB prefix
+# Offset of any slice (in tracks) = 128 + (1024 * <slice_num)
+
 diskdef wbw_hd1024_0
   seclen 512
-  tracks 1040
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 130
+  boottrk 2
+  offset 128T
   os 2.2
 end
 
 diskdef wbw_hd1024_1
   seclen 512
-  tracks 2064
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 1154
+  boottrk 2
+  offset 1152T
   os 2.2
 end
 
 diskdef wbw_hd1024_2
   seclen 512
-  tracks 3112
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 2178
+  boottrk 2
+  offset 2176T
   os 2.2
 end
 
 diskdef wbw_hd1024_3
   seclen 512
-  tracks 4136
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 3202
+  boottrk 2
+  offset 3200T
   os 2.2
 end
 
 # SmallZ80 Hard Disk Image
 # 5 slices
+
 diskdef smz80_hd0
   seclen 512
-  tracks 1034
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 10
+  boottrk 0
+  offset 10T
   os 2.2
 end
 
 diskdef smz80_hd1
   seclen 512
-  tracks 2058
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 1034
+  boottrk 0
+  offset 1034T
   os 2.2
 end
 
 diskdef smz80_hd2
   seclen 512
-  tracks 1034
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 2058
+  boottrk 0
+  offset 2058T
   os 2.2
 end
 
 diskdef smz80_hd3
   seclen 512
-  tracks 4106
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 3082
+  boottrk 0
+  offset 3082T
   os 2.2
 end
 
 diskdef smz80_hd4
   seclen 512
-  tracks 5130
+  tracks 1024
   sectrk 16
   blocksize 4096
   maxdir 1024
   skew 0
-  boottrk 4106
+  boottrk 0
+  offset 4106T
   os 2.2
 end
 
-# RC2014 standard hard disk image
+# RC2014 standard (Grant Searle) hard disk image
 # Slices A-P
+# Offset of slice (in tracks) = (512 * <slice_num>)
+
 diskdef rc2014a
   seclen 512
   tracks 512
@@ -542,155 +569,171 @@ diskdef rc2014a
   blocksize 4096
   maxdir 512
   boottrk 1
+  offset 0T
   os 2.2
 end
 
 diskdef rc2014b
   seclen 512
-  tracks 1024
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 512
+  boottrk 0
+  offset 512T
   os 2.2
 end
 
 diskdef rc2014c
   seclen 512
-  tracks 1536
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 1024
+  boottrk 0
+  offset 1024T
   os 2.2
 end
 
 diskdef rc2014d
   seclen 512
-  tracks 2048
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 1536
+  boottrk 0
+  offset 1536T
   os 2.2
 end
 
 diskdef rc2014e
   seclen 512
-  tracks 2560
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 2048
+  boottrk 0
+  offset 2048T
   os 2.2
 end
 
 diskdef rc2014f
   seclen 512
-  tracks 3072
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 2560
+  boottrk 0
+  offset 2560T
   os 2.2
 end
 
 diskdef rc2014g
   seclen 512
-  tracks 3584
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 3072
+  boottrk 0
+  offset 3072T
   os 2.2
 end
 
 diskdef rc2014h
   seclen 512
-  tracks 4096
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 3584
+  boottrk 0
+  offset 3584T
   os 2.2
 end
 
 diskdef rc2014i
   seclen 512
-  tracks 4608
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 4096
+  boottrk 0
+  offset 4096T
   os 2.2
 end
 
 diskdef rc2014j
   seclen 512
-  tracks 5120
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 4608
+  boottrk 0
+  offset 4608T
   os 2.2
 end
 
 diskdef rc2014k
   seclen 512
-  tracks 5632
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 5120
+  boottrk 0
+  offset 5120T
   os 2.2
 end
 
 diskdef rc2014l
   seclen 512
-  tracks 6144
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 5632
+  boottrk 0
+  offset 5632T
   os 2.2
 end
 
 diskdef rc2014m
   seclen 512
-  tracks 6656
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 6144
+  boottrk 0
+  offset 6144T
   os 2.2
 end
 
 diskdef rc2014n
   seclen 512
-  tracks 7168
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 6656
+  boottrk 0
+  offset 6656T
   os 2.2
 end
 
 diskdef rc2014o
   seclen 512
-  tracks 7680
+  tracks 512
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 7168
+  boottrk 0
+  offset 7168T
   os 2.2
 end
 
 diskdef rc2014p
   seclen 512
-  tracks 7808
+  tracks 128
   sectrk 32
   blocksize 4096
   maxdir 512
-  boottrk 7680
+  boottrk 0
+  offset 7680T
   os 2.2
 end

Source/CBIOS/cbios.asm

@@ -144,6 +144,43 @@ CBXSIZ	.EQU	$ - CBX
 	.ECHO	" bytes.\n"
 ;
 ;==================================================================================================
+; TIMDAT ROUTINE FOR QP/M
+;==================================================================================================
+;
+#IFDEF PLTWBW
+  #IF QPMTIMDAT
+;
+TIMDAT:
+	; GET CURRENT DATE/TIME FROM RTC INTO BUFFER
+	LD	B,BF_RTCGETTIM		; HBIOS GET TIME FUNCTION
+	LD	HL,CLKDAT		; POINTER TO BUFFER
+	RST	08			; DO IT
+;
+	; CONVERT ALL BYTES FROM BCD TO BINARY
+	LD	HL,CLKDAT		; BUFFER
+	LD	B,7			; DO 7 BYTES
+TIMDAT1:
+	LD	A,(HL)
+	CALL	BCD2BYTE
+	LD	(HL),A
+	INC	HL
+	DJNZ	TIMDAT1
+;
+	; SWAP BYTES 0 & 2 TO MAKE BUFFER INTO QP/M ORDER
+	LD	A,(CLKDAT+0)
+	PUSH	AF
+	LD	A,(CLKDAT+2)
+	LD	(CLKDAT+0),A
+	POP	AF
+	LD	(CLKDAT+2),A
+;
+	LD	HL,CLKDAT		; RETURN BUFFER ADDRESS
+	RET
+;
+  #ENDIF
+#ENDIF
+;
+;==================================================================================================
 ; CHARACTER DEVICE MAPPING
 ;==================================================================================================
 ;
@@ -346,11 +383,13 @@ BOOT:
 #ENDIF
 	CALL	RESCPM		; RESET CPM
 ;
-#IF DEBUG
+#IF AUTOSUBMIT
+  #IF DEBUG
 	CALL	PRTSTRD
 	.DB	"\r\nPerforming Auto Submit...$"
-#ENDIF
+  #ENDIF
 	CALL	AUTOSUB		; PREP AUTO SUBMIT, IF APPROPRIATE
+#ENDIF
 ;
 #IF DEBUG
 	CALL	PRTSTRD
@@ -393,6 +432,8 @@ WBOOT:
 #ENDIF
 ;
 #IFDEF PLTUNA
+	LD	SP,STACK		; STACK FOR INITIALIZATION
+
 	; RESTORE COMMAND PROCESSOR FROM UNA BIOS CACHE
 	LD	BC,$01FB		; UNA FUNC = SET BANK
 	LD	DE,(BNKBIOS)		; UBIOS_PAGE (SEE PAGES.INC)
@@ -1587,6 +1628,7 @@ LBA_IO:
 ;
 DSK_IO2:
 	PUSH	BC			; SAVE INCOMING FUNCTION, UNIT
+	RES	7,D			; CLEAR LBA BIT FOR UNA
 	LD	B,C			; UNIT TO B
 	LD	C,$41			; UNA SET LBA
 	RST	08			; CALL UNA
@@ -1718,6 +1760,12 @@ SLICE		.DB	0		; CURRENT SLICE
 SPS		.DW	0		; SECTORS PER SLICE
 STKSAV		.DW	0		; TEMP SAVED STACK POINTER
 ;
+#IFDEF PLTWBW
+  #IF QPMTIMDAT
+CLKDAT		.FILL	7,0		; RTC CLOCK DATA BUFFER
+  #ENDIF
+#ENDIF
+;
 #IFDEF PLTWBW
 BNKBIOS		.DB	0		; BIOS BANK ID
 BNKUSER		.DB	0		; USER BANK ID
@@ -2317,6 +2365,17 @@ INIT3:
 	LD	DE,STR_TPA2		; AND TPA SUFFIX
 	CALL	WRITESTR
 	CALL	NEWLINE			; FORMATTING
+;
+; SETUP QP/M TIMDAT ROUTINE VECTOR IN ZERO PAGE AT 0x0010
+;
+#IFDEF PLTWBW
+  #IF QPMTIMDAT
+	LD	A,$C3			; JP INSTRUCTION
+	LD	($0010),A		; STORE AT 0x0008
+	LD	HL,TIMDAT		; ROUTINE ADDRESS
+	LD	($0011),HL		; SET VECTOR
+  #ENDIF
+#ENDIF
 ;
 	RET				; DONE
 ;
@@ -2328,6 +2387,9 @@ ERR_BIOMEM:
 ;
 ;
 ;__________________________________________________________________________________________________
+;
+#IF AUTOSUBMIT
+;
 AUTOSUB:
 ;
 	; SETUP AUTO SUBMIT COMMAND (IF REQUIRED FILES EXIST)
@@ -2359,6 +2421,8 @@ AUTOSUB:
 	LDIR				; PATCH COMMAND LINE INTO CCP
 	RET				; DONE
 ;
+#ENDIF
+;
 ;
 ;__________________________________________________________________________________________________
 DEV_INIT:

Source/CBIOS/config.asm

@@ -2,6 +2,8 @@
 ; CBIOS BUILD CONFIGURATION OPTIONS
 ;
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
+AUTOSUBMIT	.EQU	TRUE		; PROCESS PROFILE.SUB AT STARTUP
+QPMTIMDAT	.EQU	TRUE		; SUPPORT QP/M TIMDAT ROUTINE
 WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 DEBUG		.EQU	FALSE		; MISCELLANEOUS DEBUG TRACING

Source/CBIOS/util.asm

@@ -460,7 +460,52 @@ HEXCONV:
 	DAA	
 	ADC	A,40H
 	DAA	
-	RET	
+	RET
+;
+;****************************
+;	A(BCD) => A(BIN)
+;	[00H..99H] -> [0..99]
+;****************************
+;
+BCD2BYTE:
+	PUSH	BC
+	LD	C,A
+	AND	0F0H
+	SRL	A
+	LD	B,A
+	SRL	A
+	SRL	A
+	ADD	A,B
+	LD	B,A
+	LD	A,C
+	AND	0FH
+	ADD	A,B
+	POP	BC
+	RET
+;
+;*****************************
+;	 A(BIN) =>  A(BCD)
+;	[0..99] => [00H..99H]
+;*****************************
+;
+BYTE2BCD:
+	PUSH	BC
+	LD	B,10
+	LD	C,-1
+BYTE2BCD1:
+	INC	C
+	SUB	B
+	JR	NC,BYTE2BCD1
+	ADD	A,B
+	LD	B,A
+	LD	A,C
+	ADD	A,A
+	ADD	A,A
+	ADD	A,A
+	ADD	A,A
+	OR	B
+	POP	BC
+	RET
 ;
 ; PRINT A BYTE BUFFER IN HEX POINTED TO BY DE
 ; REGISTER A HAS SIZE OF BUFFER

Source/CPM3/Makefile

@@ -13,6 +13,7 @@ OTHERS = cpmldr.rel biosldr.rel cpm3res.sys cpm3bnk.sys loader.bin cpmldr.bin
 OTHERS += biosldrc.rel biosldrd.rel
 NODELETE = ccp.com gencpm.com genres.dat genbnk.dat bdos3.spr bnkbdos3.spr resbdos3.spr
 NODELETE += readme.1st cpm3fix.pat
+NODIFF = zpmbios3
 
 DEST = ../../Binary/CPM3
 TOOLS = ../../Tools

Source/Doc/Architecture.md

@@ -30,6 +30,8 @@ RomWBW firmware includes:
 * HBIOS (Hardware BIOS) providing support for the vast majority of
 RetroBrew Computers I/O components
 
+* Diagnostics and customizable debugging information.
+
 * A complete operating system (either CP/M 2.2 or ZSDOS 1.1)
 
 * A built-in CP/M filesystem containing the basic applications and
@@ -919,7 +921,7 @@ device number assigned by the driver.
 Each RTC device is handled by an appropriate driver (DSRTC, BQRTC,
 etc.) which is identified by a device type id from the table below.
 
-**Type ID** | **Disk Device Type**
+**Type ID** | **RTC Device Type**
 ----------- | --------------------
 0x00        | DS1302
 0x10        | BQ4845P
@@ -1399,7 +1401,7 @@ If the driver is able to generate the requested note, a success (0) is
 returned, otherwise a non-zero error state will be returned.
 
 The sound chip resolution and its oscillator limit the range and
-accuracy of the notes played. The typically range of the AY-3-8910
+accuracy of the notes played. The typical range of the AY-3-8910
 is six octaves, Bb2/A#2-A7, where each value is a unique tone. Values
 above and below can still be played but each quarter tone step may not
 result in a note change.
@@ -1409,18 +1411,18 @@ to the corresponding octave and note.
 
 | Note  | Oct 0 | Oct 1 | Oct 2 | Oct 3 | Oct 4 | Oct 5 | Oct 6 | Oct 7 |
 |:----- | -----:| -----:| -----:| -----:| -----:| -----:| -----:| -----:|
-| Bb/A# |   0   |   48  |  96   |  144  |  192  |  240  |  288  |  336  |
+| C     |   X   |   8   |   56  |  104  |  152  |  200  |  248  |  296  |
+| C#/Db |   X   |   12  |   60  |  108  |  156  |  204  |  252  |  300  |
+| D     |   X   |   16  |   64  |  112  |  160  |  208  |  256  |  304  |
+| D#/Eb |   X   |   20  |   68  |  116  |  164  |  212  |  260  |  308  |
+| E     |   X   |   24  |   72  |  120  |  168  |  216  |  264  |  312  |
+| F     |   X   |   28  |   76  |  124  |  172  |  220  |  268  |  316  |
+| F#/Gb |   X   |   32  |   80  |  128  |  176  |  224  |  272  |  320  |
+| G     |   X   |   36  |   84  |  132  |  180  |  228  |  276  |  324  |
+| G#/Ab |   X   |   40  |   88  |  136  |  184  |  232  |  280  |  328  |
+| A     |   X   |   44  |   92  |  140  |  188  |  236  |  284  |  332  |
+| A#/Bb |   0   |   48  |   96  |  144  |  192  |  240  |  288  |  336  |
 | B     |   4   |   52  |  100  |  148  |  196  |  244  |  292  |  340  |
-| C     |   8   |   56  |  104  |  152  |  200  |  248  |  296  |  344  |
-| C#/Db |   12  |   60  |  108  |  156  |  204  |  252  |  300  |  348  |
-| D     |   16  |   64  |  112  |  160  |  208  |  256  |  304  |  352  |
-| Eb/D# |   20  |   68  |  116  |  164  |  212  |  260  |  308  |  356  |
-| E     |   24  |   72  |  120  |  168  |  216  |  264  |  312  |  360  |
-| F     |   28  |   76  |  124  |  172  |  220  |  268  |  316  |  364  |
-| F#/Gb |   32  |   80  |  128  |  176  |  224  |  272  |  320  |  368  |
-| G     |   36  |   84  |  132  |  180  |  228  |  276  |  324  |  372  |
-| Ab/G# |   40  |   88  |  136  |  184  |  232  |  280  |  328  |  376  |
-| A     |   44  |   92  |  140  |  188  |  236  |  284  |  332  |  380  |
 
 ### Function 0x54 -- Sound Play (SNDPLAY)
 
@@ -2166,7 +2168,7 @@ IM1, the size of the table is the number of vectors chained together.
 For IM2, the size of the table is the number of slots in the vector
 table.
 
-#### SYSINT Subfunction 0x10) -- Get Interrupt (INTGET)
+#### SYSINT Subfunction 0x10 -- Get Interrupt (INTGET)
 
 |      _Entry Parameters_
 |           BC: 0xFC10
@@ -2180,7 +2182,7 @@ On entry, register E must contain an index into the interrupt vector
 table. On return, HL will contain the address of the current interrupt
 vector at the specified index.
 
-#### SYSINT Subfunction 0x20) -- Set Interrupt (INTSET)
+#### SYSINT Subfunction 0x20 -- Set Interrupt (INTSET)
 
 |      _Entry Parameters_
 |           BC: 0xFC20
@@ -2198,6 +2200,173 @@ be inserted in the table at the index. On return, HL will contain the
 previous address in the table at the index.
 
 
+`\clearpage`{=latex}
+
+
+Errors and diagnostics
+========
+
+ROMWBW tries to provide useful information when a run time or build time
+error occurs. Many sections of the code also have code blocks that can be 
+enable to aid in debugging and in some cases the level of reporting detail
+can be customized.
+
+Run time errors
+--------
+
+### PANIC
+
+A panic error indicates a non-recoverable error. The processor status is displayed on the console
+and interrupts are disabled and execution is halted. A cold boot or reset is required to restart.
+
+Example error message: 
+
+\>>> PANIC: @06C4[DFA3:DFC3:0100:F103:04FC:0000:2B5E] 
+
+\*** System Halted ***
+
+The format of the information provided is 
+
+@XXXX [-AF-:-BC-:-DE-:-HL-:-SP-:-IX-:-IY-]
+
+Where @XXXX is the address the panic was called from. The other information
+is the CPU register contents.
+
+Possible reasons a PANIC may occur are:
+
+- RAM Bank range error when attempting a read or write to a RAM disk.
+- Sector read function has not been setup but a read was attempted.
+- An interrupt vector has not been set up when an interrupt was received.
+- There was an attempt to add more devices than the device table had room for.
+- An illegal SD card command was encountered.
+
+The @XXXX memory address can be cross referenced with the build source code to identify
+which section of the software or hardware caused the fault.
+
+### SYSCHK 
+
+A syschk error is identified when an internal error is detected. When this 
+occurs an error code is returned to the calling program in the A register.
+A non-zero result indicates an error.
+
+Syschk errors may be reported to the console. Whether this occurs depends on 
+the value of the diagnosis level equate DIAGLVL. By default syschk errors
+are not reported to the console.
+
+If the diagnosis level is set to display the diagnosis information, then
+memory address, register dump and error code is displayed.
+A key differance with the PANIC error is that execution may be continued. 
+
+Example error message:
+
+\>>> SYSCHK: @06C4[DFA3:DFC3:0100:F103:04FC:0000:2B5E] FD
+Continue (Y/N)
+
+The format of the information provided is similar the PANIC report.
+
+@XXXX [-AF-:-BC-:-DE-:-HL-:-SP-:-IX-:-IY-] YY
+
+The syschk error codes YY is returned in the A register.
+
+| Error                               | Code YY  |
+| ----------------------------------- | -------- |
+| Success                             |   0x00   | 
+| Undefined Error                     |   0xFF   | 
+| Function Not Implemented            |   0xFE   | 
+| Invalid Function                    |   0xFD   | 
+| Invalid Unit Number                 |   0xFC   | 
+| Out Of Memory                       |   0xFB   | 
+| Parameter Out Of Range              |   0xFA   | 
+| Media Not Present                   |   0xF9   | 
+| Hardware Not Present                |   0xF8   | 
+| I/O Error                           |   0xF7   | 
+| Write Request To Read-Only Media    |   0xF6   | 
+| Device Timeout                      |   0xF5   | 
+| Invalid Configuration               |   0xF4   | 
+| Internal Error                      |   0xF3   | 
+
+### Error Level reporting
+
+placeholder
+
+Build time errors
+--------
+
+### Build chain tool errors
+
+place holder
+
+### Assembly time check errors
+
+placeholder
+
+Diagnostics
+--------
+
+### DIAG
+
+Progress through the boot and initialization process can be difficult to monitor 
+due to the lack of console or video output. Access to these output devices does
+not become available until late the in the boot process. If these output devices 
+are also involved with the issue trying to be resolved then trouble shooting is 
+even more difficult.
+
+ROMWBW can be configured to display boot progress with the assistance of additional 
+hardware. This take the form of an LED breakout debugging board connected to an
+8-bit output port. As the boot code executes, the LED output display is updated.
+
+To use a LED breakout board, it must be connected the computers data, reset and port
+select lines.
+
+To enable the DIAG option the following settings must be made in the systems .ini
+configuration file, where 0xnn is the port address.
+
+DIAGENABLE .SET TRUE
+DIAGPORT   .SET 0xnn
+
+The following table shows the ROMWBW process steps in relation to the LED display.
+
+|   LED    | ROMWBW Processes                               |
+| -------- |:---------------------------------------------- |
+| `........` | Initial boot                                 |
+|          | Jump to start address                          |
+|          | Disable interrupts                             |
+|          | Set interrupt mode 1                           |
+|          | Initialize critical ports and initial speed    |
+| `.......O` |  Setup initial stack                         |
+|          | Memory manager and CPU configuration           |
+|          | Set top bank to be RAM                         |
+| `......OO` |  Get and save battery condition              |
+|          | Install HBIOS proxy in upper memory            |
+|          | If platform is MBC reconfigure memory manager  |
+|          | Setup "ROMLESS" HBIOS image or ...             |
+|          | Copy HBIOS from ROM to RAM if RAM flag not set |
+|          | Jump to HBIOS in RAM                           |
+|          | Set running in RAM flag                        |
+|  `.....OOO` | Finalize configuration for running in RAM   |
+|          | Check battery condition                        |
+|          | Check for recovery mode boot                   |
+| `....OOOO` | Identify CPU type                            |
+| `...OOOOO` | Set cpu oscillator speed                     |
+|          | Setup counter-timers                           |
+|          | Setup heap                                     |
+| `..OOOOOO` | Preconsole initialization                    |
+| `.OOOOOOO` | Boot delay                                   |
+|          | Set boot console device                        |
+|          | Bios announcement                              |
+| `OOOOOOOO` | Display platform information                 |
+|          | Display memory configuration                   |
+|          | Display CPU family                             |
+|          | Verify ROM checksum                            |
+|          | Report battery condition                       |
+|          | Perform device driver initialization           |
+|          | Report watchdog status                         |
+|          | Mark HBIOS heap so it is preserved             |
+|          | Switch from boot console to CRT if active      |
+|          | Display device summary                         |
+|          | Execute boot loader                            |
+
+
 `\clearpage`{=latex}
 
 ### Appendix A Driver Instance Data fields
@@ -2229,3 +2398,5 @@ The following section outlines the read only data referenced by the
 | DCNTL* | 14 | 1  | Z180 DMA/WAIT CONTROL |
 
 * ONLY PRESENT FOR Z180 BUILDS
+
+

Source/Doc/GettingStarted.md

@@ -411,20 +411,20 @@ functional on all of the OS variants included with RomWBW.
 The following custom applications are found on the ROM disk and are,
 therefore, globally available.
 
-| Application | Description                                                                                          |
-| ----------- | ---------------------------------------------------------------------------------------------------- |
-| ASSIGN      | Add, change, and delete drive letter assignments. Use ASSIGN /? for usage instructions.              |
-| SYSCOPY     | Copy system image to a device to make it bootable. Use SYSCOPY with no parms for usage instructions. |
-| MODE        | Reconfigures serial ports dynamically.                                                               |
-| FDU         | Format and test floppy disks. Menu driven interface.                                                 |
-| FORMAT      | Will someday be a command line tool to format floppy disks. Currently does nothing!                  |
-| XM          | XModem file transfer program adapted to hardware. Automatically uses primary serial port on system.  |
-| FLASH       | Will Sowerbutts' in-situ ROM programming utility.                                                    |
-| FDISK80     | John Coffman's Z80 hard disk partitioning tool.  See documentation in Doc directory.                 |
-| TALK        | Direct console I/O to a specified character device.                                                  |
-| RTC         | Manage and test the Real Time Clock hardware.                                                        |
-| TIMER       | Display value of running periodic system timer.                                                      |
-| CPUSPD      | Change the running CPU speed and wait states of the system.    |
+| Application   | Description                                                                                          |
+| ------------- | ---------------------------------------------------------------------------------------------------- |
+| ASSIGN        | Add, change, and delete drive letter assignments. Use ASSIGN /? for usage instructions.              |
+| SYSCOPY       | Copy system image to a device to make it bootable. Use SYSCOPY with no parms for usage instructions. |
+| MODE          | Reconfigures serial ports dynamically.                                                               |
+| FDU           | Format and test floppy disks. Menu driven interface.                                                 |
+| FORMAT        | Will someday be a command line tool to format floppy disks. Currently does nothing!                  |
+| XM            | XModem file transfer program adapted to hardware. Automatically uses primary serial port on system.  |
+| FLASH         | Will Sowerbutts' in-situ ROM programming utility.                                                    |
+| FDISK80       | John Coffman's Z80 hard disk partitioning tool.  See documentation in Doc directory.                 |
+| TALK          | Direct console I/O to a specified character device.                                                  |
+| RTC           | Manage and test the Real Time Clock hardware.                                                        |
+| TIMER         | Display value of running periodic system timer.                                                      |
+| CPUSPD        | Change the running CPU speed and wait states of the system.                                          |
 
 Some custom applications do not fit on the ROM disk. They are found on the
 disk image files or the individual files can be found in the Binary\\Apps
@@ -434,7 +434,7 @@ directory of the distribution.
 | ----------- | -------------------------------------------------------------- |
 | TUNE        | Play .PT2, .PT3, .MYM audio files.                             |
 | FAT         | Access MS-DOS FAT filesystems from RomWBW (based on FatFs).    |
-| INTTEST     | Test interrupt vector hooking.                                                                       |
+| INTTEST     | Test interrupt vector hooking.                                 |
 
 Additional documentation on all of these applications can be found in
 "RomWBW Applications.pdf" in the Doc directory of the distribution.
@@ -463,6 +463,16 @@ will find some files on the ROM disk that will work with ZSDOS, but
 will not work on CP/M 2.2. For example, `LDDS`, which loads the
 ZSDOS date/time stamper will only run on ZSDOS.
 
+## Flash ROM Disks
+
+The limitation of ROM disks being read only can be overcome on some
+platforms with the appropriate selection of Flash ROM chip and 
+system configuration. In this case the flash-file system can be
+enabled which will allow the ROM disk to be read and written to.
+Flash devices have a limited write lifespan and continual usage will
+eventually wear out the device. It is not suited for high usage
+applications. 
+
 ## Disk Devices
 
 While the RAM/ROM disks provide a functional system, they are not

Source/Doc/ROM_Applications.md

@@ -316,7 +316,9 @@ D+	| d1 d2 -- d1+d2             | Add double numbers
 2>R	| d --                       | 2 to R
 2R>	| d --                       | fetch 2 from R
 M*/	| d1 n2 u3 --  d=(d1*n2)/u3  | double precision mult. div
-
+SVC	| hl de bc n -- hl de bc af  | Execute a ROMWBW function
+P!	| n p --                     | Write a byte to a I/O port
+P@      | p -- n                     | Read a byte from and I/O port
 
 # BASIC
 

Source/Fonts/fonts.txt

@@ -1,15 +1,36 @@
 Font files for ROMWBW.
 
-There are three fonts associated with ROMWBW supported hardware - ECB-SCG, ECB-CVDU and the ECB-VGA3.
+8x8: 8x8 cell, mostly IBM CGA, first 16 differ, thin font
+8x11: 8x11 cell, possibly VT-100?
+8x16: 8x16 cell, IBM MDA
+CGA: 8x16 cell, IBM CGA, normal (thick) CGA font, rows 8-15 are unused padding
 
-Name            Format      Size    Board & Display Mode
-------------------------------------------------------------------------------------
-font8x8u.bin    8x8         2048    ECB-SCG, ECB-VGA3 (80x60)     
-font8x11u.bin   8x11        2816    ECB-VGA3 (80x43)
-font8x16u.bin   8x16        4096    ECB-CVDU (80x25), ECB-VGA3 (80x24, 80x25, 80x30), MBC-VDC
-fontcgau.bin	8x8         4096    ECB-CVDU (80x25), MBC-VDC
+There are multiple fonts associated with ROMWBW supported hardware:
 
-For inclusion in HBIOS the .bin format files must be convert to assembler .asm format.
+	Board		Driver		Chip
+	--------	--------	--------
+	ECB-SCG		tms.asm		9918
+	ECB-VDU		vdu.asm		6545
+	ECB-CVDU	cvdu.asm	8563
+	ECB-VGA3	vga.asm		6445
+	MBC-VDC		cvdu.asm	8568
+	MBC-VDP		tms.asm		9938/9958
+
+Name            Font    Storage	    Size    Board & Display Mode
+--------------------------------------------------------------------------------------------
+font8x8u.bin    6x8     8x8         2048    ECB-SCG, ECB-VGA3 (80x60), MBC-VDP
+font8x11u.bin   8x11    8x11        2816    ECB-VGA3 (80x43)
+font8x16u.bin   8x14    8x16        4096    ECB-CVDU (80x25), ECB-VGA3 (80x24, 80x25, 80x30), MBC-VDC
+fontcgau.bin    8x8     8x16        4096    ECB-CVDU (80x25), MBC-VDC
+
+Notes:
+
+- The CGA font is roughly equivalent to the 8x8 font, but padded out to 8x16.  Scan lines
+  8-15 are unused.  The CVDU driver (8563 chip) always uses fonts defined in an 8x16 cell.
+  When the CVDU is configured for use with a CGA monitor, an 8x8 character cell is used,
+  but the font definition must still be 8x16.  The CGA font is used for this.
+
+For inclusion in HBIOS the .bin format files must be converted to assembler .asm format.
 This is acheived using the fonttool utility and is completed automatically as part of the build process.
 i.e. fonts files are converted to .asm format and then copied to the HBIOS directory. 
 

Source/HBIOS/Build.cmd

@@ -4,7 +4,7 @@ setlocal
 if "%1" == "dist" goto :dist
 
 ::
-:: Build [<platform> [<config> [<romsize> [<romname>]]]]
+:: Build [<platform> [<config> [<romname>]]]
 ::
 
 set TOOLS=../../Tools
@@ -28,11 +28,21 @@ PowerShell -ExecutionPolicy Unrestricted .\Build.ps1 %* || exit /b
 ::
 :: Below, we process the command file created by the PowerShell script.
 :: This sets the environment variables: Platform, Config, ROMName,
-:: ROMSize, & CPUType.
+:: & CPUType.
 ::
 
 call build_env.cmd
 
+::
+:: Create a small app that is used to export key build variables of the build.
+:: Then run the app to output a file with the variables.  Finally, read the
+:: file into variables usable in this batch file.
+::
+
+tasm -t80 -g3 -dCMD hbios_env.asm hbios_env.com hbios_env.lst || exit /b
+zxcc hbios_env >hbios_env.cmd
+call hbios_env.cmd
+
 ::
 :: Start of the actual build process for a given ROM.
 ::
@@ -183,34 +193,34 @@ goto :eof
 
 :dist
 
-call Build SBC std 512 || exit /b
-call Build SBC simh 512 || exit /b
-call Build MBC std 512 || exit /b
-call Build ZETA std 512 || exit /b
-call Build ZETA2 std 512 || exit /b
-call Build N8 std 512 || exit /b
-call Build MK4 std 512 || exit /b
-call Build RCZ80 std 512 || exit /b
-call Build RCZ80 skz 512 || exit /b
-call Build RCZ80 kio 512 || exit /b
-call Build RCZ80 mt 512 || exit /b
-call Build RCZ80 duart 512 || exit /b
-call Build RCZ80 zrc 512 || exit /b
-call Build RCZ80 zrc_ram 0 || exit /b
-call Build RCZ180 ext 512 || exit /b
-call Build RCZ180 nat 512 || exit /b
-call Build RCZ280 ext 512 || exit /b
-call Build RCZ280 nat 512 || exit /b
-call Build RCZ280 nat_zz 512 || exit /b
-call Build RCZ280 nat_zzr 256 || exit /b
-call Build SCZ180 126 512 || exit /b
-call Build SCZ180 130 512 || exit /b
-call Build SCZ180 131 512 || exit /b
-call Build SCZ180 140 512 || exit /b
-call Build EZZ80 std 512 || exit /b
-call Build EZZ80 tz80 512 || exit /b
-call Build DYNO std 512 || exit /b
-call Build UNA std 512 || exit /b
-call Build RPH std 512 || exit /b
+call Build SBC std || exit /b
+call Build SBC simh || exit /b
+call Build MBC std || exit /b
+call Build ZETA std || exit /b
+call Build ZETA2 std || exit /b
+call Build N8 std || exit /b
+call Build MK4 std || exit /b
+call Build RCZ80 std || exit /b
+call Build RCZ80 skz || exit /b
+call Build RCZ80 kio || exit /b
+call Build RCZ80 mt || exit /b
+call Build RCZ80 duart || exit /b
+call Build RCZ80 zrc || exit /b
+call Build RCZ80 zrc_ram || exit /b
+call Build RCZ180 ext || exit /b
+call Build RCZ180 nat || exit /b
+call Build RCZ280 ext || exit /b
+call Build RCZ280 nat || exit /b
+call Build RCZ280 nat_zz || exit /b
+call Build RCZ280 nat_zzr || exit /b
+call Build SCZ180 126 || exit /b
+call Build SCZ180 130 || exit /b
+call Build SCZ180 131 || exit /b
+call Build SCZ180 140 || exit /b
+call Build EZZ80 std || exit /b
+call Build EZZ80 tz80 || exit /b
+call Build DYNO std || exit /b
+call Build UNA std || exit /b
+call Build RPH std || exit /b
 
 goto :eof

Source/HBIOS/Build.ps1

@@ -1,4 +1,4 @@
-param([string]$Platform = "", [string]$Config = "", [int]$RomSize = 512, [string]$ROMName = "")
+param([string]$Platform = "", [string]$Config = "", [string]$ROMName = "")
 
 # If a PowerShell exception occurs, just stop the script immediately.
 $ErrorAction = 'Stop'
@@ -67,19 +67,6 @@ while ($true)
 	$Config = (Read-Host -prompt "Configuration").Trim()
 }
 
-#
-# Establish the ROM size (in KB).  It may have been passed in on the command line.  Validate
-# $RomSize and loop requesting a new value as long as it is not valid.  The valid ROM sizes
-# are just hard-coded for now.  The ROM size does nothing more than determine the size of the
-# ROM disk portion of the ROM image.
-#
-
-while ($true)
-{
-	if (($RomSize -eq 0) -or ($RomSize -eq 128) -or ($RomSize -eq 256) -or ($RomSize -eq 512) -or ($RomSize -eq 1024)) {break}
-	$RomSize = (Read-Host -prompt "ROM Size [0|128|256|512|1024]").Trim()
-}
-
 #
 # TASM should be invoked with the proper CPU type.  Below, the CPU type is inferred
 # from the platform.
@@ -103,7 +90,7 @@ while ($ROMName -eq "")
 }
 
 # Current date/time is queried here to be subsequently imbedded in image
-$TimeStamp = '"' + (Get-Date -Format 'yyyy-MM-dd') + '"'
+$TimeStamp = (Get-Date -Format 'yyyy-MM-dd')
 
 #
 # Since TASM has no mechanism to include files dynamically based on variables, a file
@@ -115,9 +102,8 @@ $TimeStamp = '"' + (Get-Date -Format 'yyyy-MM-dd') + '"'
 @"
 ; RomWBW Configured for ${Platform} ${Config}, $(Get-Date -Format "s")
 ;
-#DEFINE		TIMESTAMP	${TimeStamp}
-;
-ROMSIZE		.EQU		${ROMSize}
+#DEFINE		TIMESTAMP	"${TimeStamp}"
+#DEFINE		CONFIG		"${Platform}_${Config}"
 ;
 #INCLUDE "${ConfigFile}"
 ;
@@ -134,6 +120,5 @@ ROMSIZE		.EQU		${ROMSize}
 set Platform=${Platform}
 set Config=${Config}
 set ROMName=${ROMName}
-set ROMSize=${ROMSize}
 set CPUType=${CPUType}
 "@ | Out-File "build_env.cmd" -Encoding ASCII

Source/HBIOS/Build.sh

@@ -6,51 +6,42 @@ set -e
 export ROM_PLATFORM
 export ROM_CONFIG
 export ROMSIZE
+export CPUFAM
 
 if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	echo "!!!DISTRIBUTION BUILD!!!"
-	ROM_PLATFORM="DYNO"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="EZZ80"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="EZZ80"; ROM_CONFIG="tz80"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="MK4"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="N8"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="ext"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat_zz"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat_zzr"; ROMSIZE="256"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="kio"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="skz"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram"; ROMSIZE="0"; bash Build.sh
-	ROM_PLATFORM="RPH"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="SCZ180"; ROM_CONFIG="126"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="SCZ180"; ROM_CONFIG="130"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="SCZ180"; ROM_CONFIG="131"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="SCZ180"; ROM_CONFIG="140"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
-	ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
+	ROM_PLATFORM="DYNO"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="EZZ80"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="EZZ80"; ROM_CONFIG="tz80"; bash Build.sh
+	ROM_PLATFORM="MK4"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="N8"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext"; bash Build.sh
+	ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="ext"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat_zz"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat_zzr"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="kio"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="skz"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram"; bash Build.sh
+	ROM_PLATFORM="RPH"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
+	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="SCZ180"; ROM_CONFIG="126"; bash Build.sh
+	ROM_PLATFORM="SCZ180"; ROM_CONFIG="130"; bash Build.sh
+	ROM_PLATFORM="SCZ180"; ROM_CONFIG="131"; bash Build.sh
+	ROM_PLATFORM="SCZ180"; ROM_CONFIG="140"; bash Build.sh
+	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh
 	exit
 fi
 
-###if [ $1 == '-d' ] ; then
-###	shift
-###	diffdir=$1
-###	shift
-###	if [ -f $diffdir/build.inc ] ; then
-###		timestamp=$(grep TIMESTAMP $diffdir/build.inc | awk '{print $3}' | tr -d '\015"')
-###		echo diff build using $timestamp
-###	fi
-###fi
-
 # prompt if no match
 platforms=($(find Config -name \*.asm -print | \
 	sed -e 's,Config/,,' -e 's/_.*$//' | sort -u))
@@ -69,36 +60,41 @@ done
 
 CONFIGFILE=Config/${ROM_PLATFORM}_${ROM_CONFIG}.asm
 
-if [ -z "${ROMSIZE}" ] ; then
-	ROMSIZE="512"
-fi
-
-while [ ! '(' "${ROMSIZE}" = 1024 -o "${ROMSIZE}" = 512 -o "${ROMSIZE}" = 256 -o "${ROMSIZE}" = 128 -o "${ROMSIZE}" = 0 ')' ] ; do
-	echo -n "Romsize :"
-	read ROMSIZE
-done
-
 if [ -z "${ROMNAME}" ] ; then
 	ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG}
 fi
 
+echo -e "\n\nBuilding $ROM_PLATFORM $ROM_CONFIG\n\n"
+
 TIMESTAMP=$(date +%Y-%m-%d)
 
-CONFIGFILE=Config/${ROM_PLATFORM}_${ROM_CONFIG}.asm
+if [ "$1" = "-d" ] ; then
+	shift
+	diffdir=$1
+	shift
+	if [ -f $diffdir/build.inc ] ; then
+		timestamp=$(grep TIMESTAMP $diffdir/build.inc | awk '{print $3}' | tr -d '\015"')
+		echo diff build using $timestamp
+	fi
+fi
 
-echo Building $ROMNAME for $ROM_PLATFORM $ROM_CONFIG $ROMSIZE
+CONFIGFILE=Config/${ROM_PLATFORM}_${ROM_CONFIG}.asm
 
 cat <<- EOF > build.inc
 ; RomWBW Configured for ${ROM_PLATFORM} ${ROM_CONFIG} ${TIMESTAMP}
 ;
 #DEFINE	TIMESTAMP	"${TIMESTAMP}"
-;
-ROMSIZE		.EQU	${ROMSIZE}
+#DEFINE CONFIG		"${ROM_PLATFORM}_${ROM_CONFIG}"
 ;
 #INCLUDE "${CONFIGFILE}"
 ;
 EOF
 
+make hbios_env.sh
+source hbios_env.sh
+
+echo Creating ${ROMSIZE}K ROM named ${ROMNAME}.rom
+
 export OBJECTS
 OBJECTS="${ROMNAME}.rom"
 if [ "${ROM_PLATFORM}" != "UNA" ] ; then

Source/HBIOS/Clean.cmd

@@ -14,3 +14,4 @@ if exist *.sys del *.sys
 if exist build.inc del build.inc
 if exist font*.asm del font*.asm
 if exist build_env.cmd del build_env.cmd
+if exist hbios_env.cmd del hbios_env.cmd

Source/HBIOS/Config/EZZ80_tz80.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE PLATFORM_NAME "TINYZ80"
-;
 #include "cfg_ezz80.asm"
 ;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP

Source/HBIOS/Config/MBC_std.asm

@@ -22,7 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE PLATFORM_NAME "Multi Board Computer"
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "cfg_mbc.asm"

Source/HBIOS/Config/RCZ280_nat_zz.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"ZZ80MB"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "Config/RCZ280_nat.asm"

Source/HBIOS/Config/RCZ280_nat_zzr.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"ZZRCC"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "Config/RCZ280_nat.asm"
@@ -31,6 +29,7 @@
 CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 ;
 RAMSIZE		.SET	256		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	256		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.SET	256		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 ;
 RAMLOC		.SET	18		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE

Source/HBIOS/Config/RCZ80_duart.asm

@@ -24,8 +24,6 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
-#DEFINE	PLATFORM_NAME	"RC2014 (DUART)"
-;
 #include "Config/RCZ80_std.asm"
 ;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP

Source/HBIOS/Config/RCZ80_kio.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"RC2014 (KIO)"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "Config/RCZ80_std.asm"

Source/HBIOS/Config/RCZ80_mt.asm

@@ -24,8 +24,6 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
-#DEFINE	PLATFORM_NAME	"RC2014 (MT)"
-;
 #include "Config/RCZ80_std.asm"
 ;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP

Source/HBIOS/Config/RCZ80_skz.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"RC2014 (SKZ)"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "Config/RCZ80_std.asm"

Source/HBIOS/Config/RCZ80_zrc_ram.asm

@@ -31,6 +31,7 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 ;
 RAMSIZE		.SET	2048		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK

Source/HBIOS/Config/SBC_max.asm

@@ -62,6 +62,8 @@ SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 ;
 PRPENABLE	.SET	TRUE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
-AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER (AY38910.ASM)
 ;
-SN7ENABLE	.SET	TRUE		; SN : SN76489 DRIVER
+SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER (SN76489.ASM)
+;
+YM2612ENABLE	.SET	TRUE		; YM2612: ENABLE ECB VGM YM2612 SOUND DRIVER (YM2612.ASM)

Source/HBIOS/Config/SBC_simh.asm

@@ -24,8 +24,6 @@
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
-#DEFINE		PLATFORM_NAME	"SBC (simh)"
-;
 #include "cfg_sbc.asm"
 ;
 INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2

Source/HBIOS/Config/SCZ180_126.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"SC126"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "cfg_scz180.asm"

Source/HBIOS/Config/SCZ180_130.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"SC130"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "cfg_scz180.asm"

Source/HBIOS/Config/SCZ180_131.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE	PLATFORM_NAME	"SC131"
-;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "cfg_scz180.asm"

Source/HBIOS/Config/SCZ180_140.asm

@@ -22,8 +22,6 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE		PLATFORM_NAME	"SC140"
-;
 #include "cfg_scz180.asm"
 ;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ

Source/HBIOS/Makefile

@@ -1,30 +1,36 @@
 
-MOREDIFF = camel80.bin game.bin hbios_rom.bin nascom.bin prefix.bin usrrom.bin \
+MOREDIFF = game.bin hbios_rom.bin nascom.bin usrrom.bin \
 	dbgmon.bin hbios_app.bin imgpad2.bin osimg1.bin osimg2.bin romldr.bin \
-	eastaegg.bin hbios_img.bin osimg.bin tastybasic.bin \
-	game.bin updater.bin usrrom.bin
+	eastaegg.bin hbios_img.bin osimg.bin game.bin updater.bin usrrom.bin
 
 SUBDIRS =
 DEST = ../../Binary
 TOOLS =../../Tools
-OTHERS =  *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat
-include $(TOOLS)/Makefile.inc
+OTHERS =  *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
 
-FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
+# DIFFMAKE = 1
 
-ifneq ($(findstring $(ROM_PLATFORM), N8 MK4 RCZ180 SCZ180 DYNO RPH),)
-	TASM=$(BINDIR)/uz80as -t hd64180
-endif
-
-ifneq ($(findstring $(ROM_PLATFORM), RCZ280),)
-	TASM=$(BINDIR)/uz80as -t z280
-endif
+# DIFFPATH = $(DIFFTO)/Binary
 
 ifeq ($(DIFFMAKE),1)
 	DIFFBUILD := -d $(DIFFTO)/Source/HBIOS
 endif
 
-DIFFPATH = $(DIFFTO)/Binary
+ifeq ($(OBJECTS),)
+start:
+	chmod +x Build.sh
+	bash Build.sh $(DIFFBUILD)
+endif
+
+include $(TOOLS)/Makefile.inc
+
+FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
+
+ifeq ($(CPUFAM),2)
+	TASM=$(BINDIR)/uz80as -t hd64180
+else ifeq ($(CPUFAM),3)
+	TASM=$(BINDIR)/uz80as -t z280
+endif
 
 DEPS=prereq dbgmon.bin romldr.bin nascom.bin tastybasic.bin game.bin eastaegg.bin updater.bin usrrom.bin imgpad2.bin
 
@@ -38,19 +44,15 @@ endif
 
 ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG}
 
-#$(info DEPS=$(DEPS))
-#$(info ROM_PLATFORM=$(ROM_PLATFORM))
-#$(info ROM_CONFIG=$(ROM_CONFIG))
-#$(info ROMSIZE=$(ROMSIZE))
-#$(info ROMNAME=$(ROMNAME))
+# $(info DEPS=$(DEPS))
+# $(info ROM_PLATFORM=$(ROM_PLATFORM))
+# $(info ROM_CONFIG=$(ROM_CONFIG))
+# $(info ROMSIZE=$(ROMSIZE))
+# $(info ROMNAME=$(ROMNAME))
+# $(info CPUFAM=$(CPUFAM))
+# $(info TASM=$(TASM))
 
-all::
-	if [ -z "$(OBJECTS)" ] ; then \
-		chmod +x Build.sh ; \
-		bash Build.sh ; \
-	fi
-
-$(ROMNAME).rom $(ROMNAME).com $(ROMNAME).img &: $(ROMDEPS)
+$(OBJECTS) : $(ROMDEPS)
 	cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin ../CPM22/cpm_$(BIOS).bin >osimg.bin
 	cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >osimg_small.bin
 	if [ $(ROM_PLATFORM) != UNA ] ; then \
@@ -98,6 +100,12 @@ hbios_app.bin:	hbios.asm build.inc  $(DEPS)
 hbios_img.bin:	hbios.asm build.inc  $(DEPS)
 	$(TASM) -dIMGBOOT hbios.asm hbios_img.bin hbios_img.lst
 
+hbios_env.com:	hbios_env.asm build.inc
+	$(TASM) -dBASH hbios_env.asm hbios_env.com hbios_env.lst
+	
+hbios_env.sh: hbios_env.com
+	$(ZXCC) hbios_env.com >hbios_env.sh
+
 romldr.bin:	build.inc
 dbgmon.bin:	build.inc
 nascom.bin:	build.inc

Source/HBIOS/ansi.asm

@@ -280,6 +280,8 @@ ANSI_STSTR:	; STATE == STRING DATA
 ;==================================================================================================
 ;
 ANSI_C0DISP:
+	CP	$07		; BEL
+	JP	Z,ANSI_BEL
 	CP	$08		; BS: BACKSPACE
 	JP	Z,ANSI_BS
 	CP	$09		; HT: TAB
@@ -615,6 +617,9 @@ ANSI_FF:
 	CALL	ANSI_VDADISP	; PERFORM FILL
 	JP	ANSI_XY		; HOME CURSOR AND RETURN
 ;
+ANSI_BEL:
+	JP	SND_BEEP	; BEEP THE SPEAKER
+;
 ANSI_BS:
 	LD	A,(ANSI_COL)	; GET CURRENT COLUMN
 	DEC	A		; BACK IT UP BY ONE

Source/HBIOS/audio.inc

@@ -46,7 +46,7 @@ AUD_NOTE:
 	LD	DE, 48
 	CALL	DIV16
 					; BC IS OCTAVE COUNT
-					; HL is NOTE WITIN OCTAVE
+					; HL is NOTE WITHIN OCTAVE
 	ADD	HL, HL
 	pop	de
 	ADD	HL, DE

Source/HBIOS/ay38910.asm

@@ -327,7 +327,8 @@ AY_NOTE:
 	LD	H, (HL)			; SO WE CAN UPDATE IT FOR THE REQUIRED OCTAVE
 	LD	L, A
 ;
-	LD	A,AY_SCALE-1		; THE NOTE TABLE PERIOD DATA HAS BEEN
+	;LD	A,AY_SCALE - 1		; THE NOTE TABLE PERIOD DATA HAS BEEN
+	LD	A,AY_SCALE		; THE NOTE TABLE PERIOD DATA HAS BEEN
 	ADD	A,C			; PRESCALED TO MAINTAIN RANGE SO ALLOW
 	LD	B,A			; FOR THIS WHEN CHANGING OCTAVE
 AY_NOTE1:
@@ -534,7 +535,7 @@ AY_EI:
 AY_WRTPSG:
 	CALL	AY_DI
 #IFDEF SBCV2004
-	LD	A,(RTCVAL)		; GET CURRENT RTC LATCH VALUE
+	LD	A,(HB_RTCVAL)		; GET CURRENT RTC LATCH VALUE
 	OR	%00001000		; SBC-V2-004 CHANGE
 	OUT	(RTCIO),A		; TO HALF CLOCK SPEED
 #ENDIF
@@ -553,7 +554,7 @@ AY_WRTPSG:
 	OUT0	(Z180_DCNTL),A		; AND RESTORE IT
 #ENDIF
 #IFDEF SBCV2004
-	LD	A,(RTCVAL)		; SBC-V2-004 CHANGE TO
+	LD	A,(HB_RTCVAL)		; SBC-V2-004 CHANGE TO
 	OUT	(RTCIO),A		; NORMAL CLOCK SPEED
 #ENDIF
 	JP	AY_EI
@@ -565,7 +566,7 @@ AY_WRTPSG:
 AY_RDPSG:
 	CALL	AY_DI
 #IFDEF SBCV2004
-	LD	A,(RTCVAL)		; GET CURRENT RTC LATCH VALUE
+	LD	A,(HB_RTCVAL)		; GET CURRENT RTC LATCH VALUE
 	OR	%00001000		; SBC-V2-004 CHANGE
 	OUT	(RTCIO),A		; TO HALF CLOCK SPEED
 #ENDIF
@@ -584,7 +585,7 @@ AY_RDPSG:
 	OUT0	(Z180_DCNTL),A		; AND RESTORE IT
 #ENDIF
 #IFDEF SBCV2004
-	LD	A,(RTCVAL)		; SBC-V2-004 CHANGE TO
+	LD	A,(HB_RTCVAL)		; SBC-V2-004 CHANGE TO
 	OUT	(RTCIO),A		; NORMAL CLOCK SPEED
 #ENDIF
 	JP	AY_EI
@@ -617,51 +618,51 @@ AYT_REGWR		.DB	"\r\nOUT AY-3-8910 $"
 ; ASSUMING A CLOCK OF 1843200 THIS MAPS TO A0#
 ;
 AY3NOTETBL:
-	.DW	AY_RATIO / 2913
-	.DW	AY_RATIO / 2956
-	.DW	AY_RATIO / 2999
-	.DW	AY_RATIO / 3042
-	.DW	AY_RATIO / 3086
-	.DW	AY_RATIO / 3131
-	.DW	AY_RATIO / 3177
-	.DW	AY_RATIO / 3223
-	.DW	AY_RATIO / 3270
-	.DW	AY_RATIO / 3318
-	.DW	AY_RATIO / 3366
-	.DW	AY_RATIO / 3415
-	.DW	AY_RATIO / 3464
-	.DW	AY_RATIO / 3515
-	.DW	AY_RATIO / 3566
-	.DW	AY_RATIO / 3618
-	.DW	AY_RATIO / 3670
-	.DW	AY_RATIO / 3724
-	.DW	AY_RATIO / 3778
-	.DW	AY_RATIO / 3833
-	.DW	AY_RATIO / 3889
-	.DW	AY_RATIO / 3945
-	.DW	AY_RATIO / 4003
-	.DW	AY_RATIO / 4061
-	.DW	AY_RATIO / 4120
-	.DW	AY_RATIO / 4180
-	.DW	AY_RATIO / 4241
-	.DW	AY_RATIO / 4302
-	.DW	AY_RATIO / 4365
-	.DW	AY_RATIO / 4428
-	.DW	AY_RATIO / 4493
-	.DW	AY_RATIO / 4558
-	.DW	AY_RATIO / 4624
-	.DW	AY_RATIO / 4692
-	.DW	AY_RATIO / 4760
-	.DW	AY_RATIO / 4829
-	.DW	AY_RATIO / 4899
-	.DW	AY_RATIO / 4971
-	.DW	AY_RATIO / 5043
-	.DW	AY_RATIO / 5116
-	.DW	AY_RATIO / 5191
-	.DW	AY_RATIO / 5266
-	.DW	AY_RATIO / 5343
-	.DW	AY_RATIO / 5421
-	.DW	AY_RATIO / 5499
-	.DW	AY_RATIO / 5579
-	.DW	AY_RATIO / 5661
-	.DW	AY_RATIO / 5743
+	.DW	AY_RATIO / 2913		; A0#/B0b	178977250 / 2913 = 61440; PROOF: 61440 >> 3 = 7680, 3579545 / 7680 / 16 = 29.13
+	.DW	AY_RATIO / 2956		;
+	.DW	AY_RATIO / 2999		;
+	.DW	AY_RATIO / 3042		;
+	.DW	AY_RATIO / 3086		; B0
+	.DW	AY_RATIO / 3131		; 
+	.DW	AY_RATIO / 3177		; 
+	.DW	AY_RATIO / 3223		; 
+	.DW	AY_RATIO / 3270		; C1
+	.DW	AY_RATIO / 3318		; 
+	.DW	AY_RATIO / 3366		; 
+	.DW	AY_RATIO / 3415		; 
+	.DW	AY_RATIO / 3464		; C1#/D1b
+	.DW	AY_RATIO / 3515		; 
+	.DW	AY_RATIO / 3566		; 
+	.DW	AY_RATIO / 3618		; 
+	.DW	AY_RATIO / 3670		; D1
+	.DW	AY_RATIO / 3724		; 
+	.DW	AY_RATIO / 3778		; 
+	.DW	AY_RATIO / 3833		; 
+	.DW	AY_RATIO / 3889		; D1#/E1b
+	.DW	AY_RATIO / 3945		; 
+	.DW	AY_RATIO / 4003		; 
+	.DW	AY_RATIO / 4061		; 
+	.DW	AY_RATIO / 4120		; E1
+	.DW	AY_RATIO / 4180		; 
+	.DW	AY_RATIO / 4241		; 
+	.DW	AY_RATIO / 4302		; 
+	.DW	AY_RATIO / 4365		; F1
+	.DW	AY_RATIO / 4428		; 
+	.DW	AY_RATIO / 4493		; 
+	.DW	AY_RATIO / 4558		; 
+	.DW	AY_RATIO / 4624		; F1#/G1b
+	.DW	AY_RATIO / 4692		; 
+	.DW	AY_RATIO / 4760		; 
+	.DW	AY_RATIO / 4829		; 
+	.DW	AY_RATIO / 4899		; G1
+	.DW	AY_RATIO / 4971		; 
+	.DW	AY_RATIO / 5043		; 
+	.DW	AY_RATIO / 5116		; 
+	.DW	AY_RATIO / 5191		; G1#/A1b
+	.DW	AY_RATIO / 5266		; 
+	.DW	AY_RATIO / 5343		; 
+	.DW	AY_RATIO / 5421		; 
+	.DW	AY_RATIO / 5499		; A1
+	.DW	AY_RATIO / 5579		; 
+	.DW	AY_RATIO / 5661		; 
+	.DW	AY_RATIO / 5743		; 

Source/HBIOS/bqrtc.asm

@@ -161,9 +161,7 @@ BQRTC_DISPATCH:
 	JP	Z, BQRTC_SETALM			; Set Alarm
 	DEC	A
 	JP	Z, BQRTC_DEVICE			; Report RTC device info
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 	
 ;
@@ -173,9 +171,7 @@ BQRTC_GETBYT:
 BQRTC_SETBYT:
 BQRTC_GETBLK:
 BQRTC_SETBLK:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 	
 ; RTC Get Time

Source/HBIOS/cfg_dyno.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "DYNO"
+#DEFINE PLATFORM_NAME "Dyno", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -64,6 +66,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -82,6 +85,9 @@ DSRTCENABLE	.EQU	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	TRUE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -168,7 +174,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -182,7 +188,7 @@ HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -204,3 +210,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_ezz80.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "EASYZ80"
+#DEFINE PLATFORM_NAME "Easy-Z80", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -65,6 +67,7 @@ WDOGIO		.EQU	$6F		; WATCHDOG REGISTER ADR
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -88,6 +91,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -205,7 +211,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -223,7 +229,10 @@ HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPT0BASE	.EQU	$E4		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$E8		; LPT 1: REGISTERS BASE ADR
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -245,3 +254,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_master.asm

@@ -8,7 +8,7 @@
 ; USED ONLY AS A REFERENCE TO HELP MANAGE THE FULL SET OF POSSIBLE SETTINGS AND
 ; KEEP THINGS CONSISTENT.
 ;
-#DEFINE PLATFORM_NAME "ROMWBW"
+#DEFINE PLATFORM_NAME "RomWBW", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -21,6 +21,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -29,7 +30,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -96,6 +98,7 @@ WDOGIO		.EQU	$6F		; WATCHDOG REGISTER ADR
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -122,6 +125,9 @@ DSRTCENABLE	.EQU	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -268,12 +274,12 @@ PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE2BASE	.EQU	$44		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -299,10 +305,10 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
-CENCNT		.EQU	1		; CEN: NUMBER OF CHIPS TO DETECT (1-2)
-CEN0BASE	.EQU	$E8		; CEN 0: REGISTERS BASE ADR
-CEN1BASE	.EQU	$EC		; CEN 1: REGISTERS BASE ADR
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -328,3 +334,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_mbc.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "Multi Board Computer"
+#DEFINE PLATFORM_NAME "Nhyodyne", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_HILO	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -61,6 +63,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -87,6 +90,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -197,12 +203,12 @@ PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE2BASE	.EQU	$44		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -223,10 +229,10 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	TRUE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
-CENCNT		.EQU	1		; CEN: NUMBER OF CHIPS TO DETECT (1-2)
-CEN0BASE	.EQU	$E8		; CEN 0: REGISTERS BASE ADR
-CEN1BASE	.EQU	$EC		; CEN 1: REGISTERS BASE ADR
+LPTENABLE	.EQU	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -252,3 +258,7 @@ SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+

Source/HBIOS/cfg_mk4.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "MARK IV"
+#DEFINE PLATFORM_NAME "Mark IV", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -67,6 +69,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -93,6 +96,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -190,7 +196,7 @@ IDE2B8BIT	.EQU	FALSE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.EQU	2		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
-PPIDE0BASE	.EQU	$44		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0BASE	.EQU	$14		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
@@ -201,7 +207,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -225,7 +231,10 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -251,3 +260,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_n8.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "N8"
+#DEFINE PLATFORM_NAME "N8", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -69,6 +71,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -95,6 +98,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -223,7 +229,7 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -249,3 +255,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rcz180.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "RC2014"
+#DEFINE PLATFORM_NAME "RC2014", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -67,6 +69,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -90,6 +93,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -218,7 +224,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -239,7 +245,7 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -261,3 +267,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rcz280.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "RC2014"
+#DEFINE PLATFORM_NAME "RC2014", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -72,6 +74,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -95,6 +98,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -233,7 +239,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -254,7 +260,7 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -276,3 +282,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z280	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rcz80.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "RC2014"
+#DEFINE PLATFORM_NAME "RC2014", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -66,6 +68,7 @@ WDOGIO		.EQU	$6E		; WATCHDOG REGISTER ADR
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -89,6 +92,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -222,7 +228,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -243,7 +249,10 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPT0BASE	.EQU	$E4		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$E8		; LPT 1: REGISTERS BASE ADR
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -265,3 +274,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rph.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "RHYOPHYRE"
+#DEFINE PLATFORM_NAME "Rhyophyre", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_RPH		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -67,6 +69,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -93,6 +96,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -203,7 +209,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -223,7 +229,7 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -249,3 +255,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_sbc.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "SBC"
+#DEFINE PLATFORM_NAME "Single Board Computer", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -61,6 +63,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -87,6 +90,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -197,12 +203,12 @@ PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE2BASE	.EQU	$44		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -223,7 +229,10 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -249,3 +258,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_scz180.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "SCZ180"
+#DEFINE PLATFORM_NAME "Small Computer", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -62,6 +64,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$0D		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -85,6 +88,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -213,7 +219,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -229,13 +235,13 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
-;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -256,3 +262,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_una.asm

@@ -11,11 +11,12 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "UNA"
+#DEFINE PLATFORM_NAME "UNA", " [", CONFIG, "]"
 ;
 #INCLUDE "../UBIOS/ubios.inc"
 ;
 ;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
@@ -26,7 +27,10 @@ CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
 RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
 ;
 DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING

Source/HBIOS/cfg_zeta.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "ZETA"
+#DEFINE PLATFORM_NAME "Zeta", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -53,6 +55,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -74,6 +77,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -146,7 +152,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -163,11 +169,8 @@ PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
-PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
-PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -183,3 +186,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_zeta2.asm

@@ -11,7 +11,7 @@
 ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
 ; FOR THE PLATFORM.
 ;
-#DEFINE PLATFORM_NAME "ZETA V2"
+#DEFINE PLATFORM_NAME "Zeta 2", " [", CONFIG, "]"
 ;
 #INCLUDE "hbios.inc"
 ;
@@ -24,6 +24,7 @@ USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
 TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
@@ -32,7 +33,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -64,6 +66,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -85,6 +88,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -157,7 +163,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -175,7 +181,7 @@ HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
-CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -188,7 +194,9 @@ SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
-;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/ctc.asm

@@ -112,7 +112,7 @@ CTC_PREINIT1:
 ;
 	; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR
 	; EACH CHANNEL.  BELOW WE SET THE BASE VECTOR TO THE
-	; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE
+	; START OF THE IVT, SO THE FIRST FOUR ENTRIES OF THE
 	; IVT CORRESPOND TO CTC CHANNELS A-D.
 	LD	A,INT_CTC0A * 2
 	OUT	(CTCBASE),A		; SETUP CTC BASE INT VECTOR

Source/HBIOS/cvdu.asm

@@ -171,9 +171,7 @@ CVDU_VDADEV:
 	RET
 
 CVDU_VDASCS:
-	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)	; NOT IMPLEMENTED (YET)
 	RET
 
 CVDU_VDASCP:

Source/HBIOS/dbgmon.asm

@@ -38,6 +38,8 @@ ENA_XM	.EQU	FALSE			; NO ROOM FOR BOTH DSKY+XMODEM
 ENA_XM	.EQU	TRUE			; INCLUDE XMODEM IF SPACE AVAILABLE
 #ENDIF
 ;
+ENA_MBC6502	.EQU	FALSE		; ENABLE OR DISABLE MBC6502 OPTION
+;
 #INCLUDE "util.asm"
 ;
 ;__UART_ENTRY_________________________________________________________________
@@ -69,6 +71,8 @@ UART_ENTRY:
 ; R XXXX		- RUN A PROGRAM AT ADDRESS XXXX
 ; S XX			- SET ACTIVE BANK TO XX
 ; T XXXX 		- X-MODEM TRANSFER TO MEMORY LOCATION XXXX
+; U 			- SET BANK TO PREVIOUS BANK
+; 6 XX                  - TRANSFER CONTROL TO MBC6502 UNIT XX
 ; X			- EXIT MONITOR
 ;
 ;__COMMAND_PARSE______________________________________________________________
@@ -126,6 +130,12 @@ SERIALCMDLOOP:
 #IF (BIOS == BIOS_WBW)
 	CP	'S'			; IS IT A "S" (Y/N)
 	JP	Z,SETBNK		; SET BANK COMMAND
+	CP	'U'			; IS IT A "U" (Y/N)
+	JP	Z,UNSETBNK		; UNSET (REVERT) BANK COMMAND		
+  #IF ((PLATFORM = PLT_MBC) & ENA_MBC6502)
+	CP	'6'			; IS IT A "6" (Y/N)
+	JP	Z,MBC6502		; TRANSFER TO MBC6502 COMMAND
+  #ENDIF
 #ENDIF
 	CP	'X'			; IS IT A "X" (Y/N)
 	JP	Z,EXIT			; EXIT COMMAND
@@ -218,6 +228,8 @@ SETBNK:
 	LD	HL,TXT_IMERR
 	CALL	PRTSTR
 #ELSE
+	LD	A,($FFE0)		; GET AND SAVE
+	LD	(BNKSAV),A		; CURRENT BANK
 	CALL	BYTEPARM		; GET BANK NUMBER
 	JP	C,ERR			; HANDLE DATA ENTRY ERROR
 	LD	C,A			; PUT IN C FOR FOR FUNC CALL
@@ -226,6 +238,25 @@ SETBNK:
 #ENDIF
 	JP	SERIALCMDLOOP		; NEXT COMMAND
 ;
+;__UNSETBNK___________________________________________________________________
+;
+;	PERFORM UNSET BANK ACTION - REVERT TO BANK BEFORE PREVIOUS SET
+;_____________________________________________________________________________
+;
+UNSETBNK:
+#IF (INTMODE == 1)
+	LD	HL,TXT_IMERR
+	CALL	PRTSTR
+#ELSE
+	LD	A,(BNKSAV)
+	LD	C,A			; PUT IN C FOR FOR FUNC CALL
+	LD	B,BF_SYSSETBNK		; SET BANK FUNCTION
+	CALL	$FFF0			; C HAS BANK, DO IT
+#ENDIF
+	JP	SERIALCMDLOOP		; NEXT COMMAND
+;
+BNKSAV	.DB	00H			; OLD BANK FROM BEFORE SET
+;
 #ENDIF
 ;
 ;__RUN________________________________________________________________________
@@ -358,7 +389,8 @@ XMLOAD:	CALL	WORDPARM		; GET STARTING LOCATION
 	CALL	NEWLINE
 ;
 	LD	BC,$F8F0		; GET CPU SPEED
-	RST	08			; AND MULTIPLY
+	CALL	$FFF0			; CALL HBIOS
+;	RST	08			; AND MULTIPLY
 	LD	A,L			; BY 4
 	PUSH	AF
 	ADD	A,A			; TO CREATE
@@ -769,6 +801,30 @@ HELP:
 	CALL	PRTSTR			; DISPLAY IT
 	JP	SERIALCMDLOOP		; AND BACK TO COMMAND LOOP
 ;
+;__MBC6502____________________________________________________________________
+;
+;	TRANSFER CONTROL TO MBC6502
+;_____________________________________________________________________________
+;
+;
+#IF (BIOS == BIOS_WBW)
+  #IF ((PLATFORM = PLT_MBC) & ENA_MBC6502)
+MBC6502:
+	CALL	BYTEPARM		; GET BYTE VALUE (FILL VALUE) INTO A
+	CPL				; UNIT 0 = FFH, 1 = FEH ETC
+	LD	C,A
+;
+	IN	A,(C)			; EXECUTE
+	NOP				; TRANSFER
+;
+	LD	A,($FFE0)		; GET PREVIOUS BANK
+	OUT	(MPCL_RAM),A		; SET RAM PAGE SELECTOR
+	OUT	(MPCL_ROM),A		; SET ROM PAGE SELECTOR
+;
+	JP	SERIALCMDLOOP		; AND BACK TO COMMAND LOOP
+  #ENDIF
+#ENDIF
+;
 ;__ERR________________________________________________________________________
 ;
 ;	SYNTAX ERROR
@@ -1205,9 +1261,17 @@ TXT_HELP	.TEXT	"\r\nMonitor Commands (all values in hex):"
 		.TEXT	"\r\nP xxxx           - Program RAM at address xxxx"
 		.TEXT	"\r\nR xxxx [[yy] [zzzz]]  - Run code at address xxxx"
 		.TEXT	"\r\n                        Pass yy and zzzz to register A and BC"
+#IF (BIOS == BIOS_WBW)
 		.TEXT	"\r\nS xx             - Set bank to xx"
+		.TEXT	"\r\nU                - Set bank to previous bank"
+#ENDIF
 #IF (ENA_XM)
 		.TEXT	"\r\nT xxxx           - X-modem transfer to memory location xxxx"
+#ENDIF
+#IF (BIOS == BIOS_WBW)
+  #IF ((PLATFORM == PLT_MBC) & ENA_MBC6502)
+		.TEXT	"\r\n6 xx             - Transfer control to MBC6502 unit xx"
+  #ENDIF
 #ENDIF
 		.TEXT	"\r\nX                - Exit monitor"
 		.TEXT	"$"

Source/HBIOS/ds1501rtc.asm

@@ -0,0 +1,397 @@
+
+;
+;==================================================================================================
+; Maxim DS1501/DS1511 Y2K-Compliant Watchdog RTC Driver
+;==================================================================================================
+;
+; THIS DRIVER CODE WAS CONTRIBUTED TO ROMWBW BY JPELLETIER 3:59 PM 7/24/2022
+;
+;  Register Addresses (HEX / BCD):
+;
+;  +---+-----+---------------+-------------------+------------------+----------------+
+;  |ADR|  D7 | D6  | D5 | D4 | D3 | D2 | D1 | D0 | RANGE            | REGISTER       |
+;  +---+-----+---------------+-------------------+------------------+----------------+
+;  | 0 |  0  |     10-Second |          1-Second |            00-59 | Seconds        |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | 1 |  0  |     10-Minute |          1-Minute |            00-59 | Minutes        |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | 2 |  0  |  0  | 10-Hour |            1-Hour |            00-23 | Hours          |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | 3 |  0  |  0  |  0 |  0 |  0 |  Day Of Week |            01-07 | Day Of Week    |
+;  +---+-----+-----+----+----+----+--------------+------------------+----------------+
+;  | 4 |  0  |  0  | 10-Date |            1-Date |            01-31 | Date           |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | 5 |/EOSC|/E32K|BB32|10Mo|           1-Month |            01-12 | Month          |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | 6 |             10-Year |            1-Year |            00-99 | Year           |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  | 7 |          10-Century |         1-Century |            00-39 | Century        |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  | 8 |  AM1|     10-Second |          1-Second |            00-59 | Seconds Alarm  |
+;  +---+-----+---------------+-------------------+------------------+----------------+
+;  | 9 |  AM2|     10-Minute |          1-Minute |            00-59 | Minutes Alarm  |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | A |  AM3|  0  | 10-Hour |            1-Hour |            00-23 | Hours Alarm    |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | B |  AM4|DY/DT| 10-date |          Day/Date |        1-7/01-31 | Day/Date Alarm |
+;  +---+-----+-----+----+----+----+--------------+------------------+----------------+
+;  | C |          0.1-Second |       0.01-Second |            00-99 | Watchdog       |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | D |           10-Second |          1-Second |            00-99 | Watchdog       |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | E | BLF1| BLF2| PRS| PAB| TDF| KSF| WDF|IRQF|                  | ControlA       |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  | F |   TE|   CS| BME| TPE| TIE| KIE| WDE| WDS|                  | ControlB       |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  |10 |           Extended RAM Address          |            00-FF | RAM Address    |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  |11 |                 Reserved                |                  |                |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  |12 |                 Reserved                |                  |                |
+;  +---+--+--+-----+----+----+----+----+----+----+------------------+----------------+
+;  |13 |             Extended RAM Data           |            00-FF | RAM Data       |
+;  +---+--+--+-----+----+----+----+----+----+----+------------------+----------------+
+;  |14-1F |              Reserved                |                  |                |
+;  +------+--+-----+----+----+----+----+----+----+------------------+----------------+
+
+;  * = Unused bits; unwritable and read as 0.
+;  0 = should be set to 0 for valid time/calendar range.
+;  Clock calendar data is BCD. Automatic leap year adjustment.
+;  Day-Of-Week coded as Sunday = 1 through Saturday = 7.
+
+; Constants
+
+;By defining 2 bases, this allows some flexibility for address decoding
+DS1501NVM_BASE      .EQU    DS1501RTC_BASE + $10
+
+DS1501RTC_SEC	    .EQU	DS1501RTC_BASE + $00
+DS1501RTC_MIN	    .EQU	DS1501RTC_BASE + $01
+DS1501RTC_HOUR	    .EQU	DS1501RTC_BASE + $02
+DS1501RTC_WEEK_DAY	.EQU	DS1501RTC_BASE + $03
+DS1501RTC_DAY	    .EQU	DS1501RTC_BASE + $04
+DS1501RTC_MONTH	    .EQU	DS1501RTC_BASE + $05
+DS1501RTC_YEAR	    .EQU	DS1501RTC_BASE + $06
+DS1501RTC_CENT      .EQU	DS1501RTC_BASE + $07
+DS1501RTC_SEC_ALM	.EQU	DS1501RTC_BASE + $08
+DS1501RTC_MIN_ALM	.EQU	DS1501RTC_BASE + $09
+DS1501RTC_HOUR_ALM	.EQU	DS1501RTC_BASE + $0A
+DS1501RTC_DAY_ALM	.EQU	DS1501RTC_BASE + $0B
+DS1501RTC_WDOG1     .EQU	DS1501RTC_BASE + $0C
+DS1501RTC_WDOG2 	.EQU	DS1501RTC_BASE + $0D
+DS1501RTC_CONTROLA	.EQU	DS1501RTC_BASE + $0E
+DS1501RTC_CONTROLB	.EQU	DS1501RTC_BASE + $0F
+
+DS1501RTC_RAMADDR	.EQU	DS1501NVM_BASE + $00
+DS1501RTC_RAMDATA	.EQU	DS1501NVM_BASE + $03
+
+DS1501RTC_HIGH	.EQU	%11110000
+DS1501RTC_LOW	.EQU	%00001111
+
+;ControlA bit masks
+;BLF1| BLF2| PRS| PAB| TDF| KSF| WDF|IRQF
+DS1501RTC_IRQF	.EQU	%00000001
+DS1501RTC_WDF	.EQU	%00000010
+DS1501RTC_KSF	.EQU	%00000100
+DS1501RTC_TDF	.EQU	%00001000
+DS1501RTC_PAB	.EQU	%00010000
+DS1501RTC_PRS 	.EQU	%00100000
+DS1501RTC_BLF2  .EQU	%01000000
+DS1501RTC_BLF1	.EQU	%10000000
+
+;ControlB bit masks
+;TE| CS| BME| TPE| TIE| KIE| WDE| WDS|
+DS1501RTC_WDS 	.EQU	%00000001
+DS1501RTC_WDE	.EQU	%00000010
+DS1501RTC_KIE	.EQU	%00000100
+DS1501RTC_TIE	.EQU	%00001000
+DS1501RTC_TPE	.EQU	%00010000
+DS1501RTC_BME 	.EQU	%00100000
+DS1501RTC_CS    .EQU	%01000000
+DS1501RTC_TE	.EQU	%10000000
+
+DS1501RTC_BUFSIZE	.EQU	6		; 6 BYTE BUFFER (YYMMDDHHMMSS)
+
+; RTC Device Initialization Entry
+
+DS1501RTC_INIT:
+	CALL	NEWLINE				; Formatting
+	PRTS("DS1501RTC: IO=0x$")
+	LD	A, DS1501RTC_BASE
+	CALL	PRTHEXBYTE
+
+	CALL	NEWLINE				; Formatting
+	PRTS("DS1501NVM: IO=0x$")
+	LD	A, DS1501NVM_BASE
+	CALL	PRTHEXBYTE
+
+    IN	A,(DS1501RTC_CONTROLB)      ;clear any pending interrupt flags
+
+	XOR	A				; Zero A
+    OR      DS1501RTC_TE            ;enable time updates
+    OUT	(DS1501RTC_CONTROLB), A
+
+	CALL	DS1501RTC_LOAD
+	; DISPLAY CURRENT TIME
+	PRTS("  $")
+	LD	A, (DS1501RTC_BUF_MON)
+	CALL	PRTHEXBYTE
+	PRTS("/$")
+	LD	A, (DS1501RTC_BUF_DAY)
+	CALL	PRTHEXBYTE
+	PRTS("/$")
+	LD	A, (DS1501RTC_BUF_YEAR)
+	CALL	PRTHEXBYTE
+	PRTS(" $")
+	LD	A, (DS1501RTC_BUF_HOUR)
+	CALL	PRTHEXBYTE
+	PRTS(":$")
+	LD	A, (DS1501RTC_BUF_MIN)
+	CALL	PRTHEXBYTE
+	PRTS(":$")
+	LD	A, (DS1501RTC_BUF_SEC)
+	CALL	PRTHEXBYTE
+
+	LD	BC,DS1501RTC_DISPATCH
+	CALL	RTC_SETDISP
+
+	XOR	A				; Signal success
+	RET
+
+; RTC Device Function Dispatch Entry
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   B: Function (IN)
+
+DS1501RTC_DISPATCH:
+	LD	A, B				; Get requested function
+	AND	$0F				; Isolate Sub-Function
+	JP	Z, DS1501RTC_GETTIM			; Get Time
+	DEC	A
+	JP	Z, DS1501RTC_SETTIM			; Set Time
+	DEC	A
+	JP	Z, DS1501RTC_GETBYT			; Get NVRAM Byte Value
+	DEC	A
+	JP	Z, DS1501RTC_SETBYT			; Set NVRAM Byte Value
+	DEC	A
+	JP	Z, DS1501RTC_GETBLK			; Get NVRAM Data Block Value
+	DEC	A
+	JP	Z, DS1501RTC_SETBLK			; Set NVRAM Data Block Value
+	DEC	A
+	JP	Z, DS1501RTC_GETALM			; Get Alarm
+	DEC	A
+	JP	Z, DS1501RTC_SETALM			; Set Alarm
+;
+; NVRAM FUNCTIONS ARE NOT IMPLEMENTED YET
+;
+DS1501RTC_GETBYT:
+DS1501RTC_SETBYT:
+DS1501RTC_GETBLK:
+DS1501RTC_SETBLK:
+	CALL	PANIC
+
+; RTC Get Time
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (OUT)
+; Buffer format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_GETTIM:
+	EX	DE, HL
+	CALL	DS1501RTC_LOAD
+	; Now copy to read destination (Interbank Save)
+	LD	A, BID_BIOS			; Copy from BIOS bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, (HB_INVBNK)			; Copy to current user bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+;
+	; CLEAN UP AND RETURN
+	XOR	A				; SIGNAL SUCCESS
+	RET					; AND RETURN
+;
+; RTC Set Time
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (IN)
+; Buffer Format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_SETTIM:
+;
+	; Copy incoming time data to our time buffer
+	LD	A, (HB_INVBNK)			; Copy from current user bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, BID_BIOS			; Copy to BIOS bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	DE, DS1501RTC_BUF			; Destination Address
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+	; Write to clock
+	LD	HL, DS1501RTC_BUF
+	CALL	DS1501RTC_SUSPEND
+	LD	A, (HL)
+	OUT	(DS1501RTC_YEAR), A			; Write Year
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_MONTH), A		; Write Month
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_DAY), A			; Write Day
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_HOUR), A			; Write Hour
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_MIN), A			; Write Minute
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_SEC), A			; Write Second
+	CALL	DS1501RTC_RESUME
+	; clean up and return
+	XOR	A				; Signal success
+	RET					; And return
+
+; RTC Get Alarm
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (OUT)
+; Buffer format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_GETALM:
+	EX	DE, HL
+	LD	HL, DS1501RTC_BUF
+	PUSH	HL				; Save address of source buffer
+	CALL	DS1501RTC_SUSPEND
+	XOR	A
+	LD	(HL), A				; Read Year
+	INC	HL
+	LD	(HL), A				; Read Month
+	INC	HL
+	IN	A, (DS1501RTC_DAY_ALM)		; Read Day
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_HOUR_ALM)		; Read Hour
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_MIN_ALM)		; Read Minute
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_SEC_ALM)		; Read Second
+	LD	(HL), A
+	CALL	DS1501RTC_RESUME
+	POP	HL				; Restore address of source buffer
+	; Now copy to read destination (Interbank Save)
+	LD	A, BID_BIOS			; Copy from BIOS bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, (HB_INVBNK)			; Copy to current user bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+;
+	; CLEAN UP AND RETURN
+	XOR	A				; SIGNAL SUCCESS
+	RET					; AND RETURN
+;
+; RTC Set Alarm
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (IN)
+; Buffer Format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_SETALM:
+	; Copy incoming time data to our time buffer
+	LD	A, (HB_INVBNK)			; Copy from current user bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, BID_BIOS			; Copy to BIOS bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	DE, DS1501RTC_BUF			; Destination Address
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+	; Write to clock
+	LD	HL, DS1501RTC_BUF_DAY
+	CALL	DS1501RTC_SUSPEND
+	LD	A, (HL)
+	OUT	(DS1501RTC_DAY_ALM), A		; Write Day
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_HOUR_ALM), A		; Write Hour
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_MIN_ALM), A		; Write Minute
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_SEC_ALM), A		; Write Second
+	CALL	DS1501RTC_RESUME
+	; clean up and return
+	XOR	A				; Signal success
+	RET					; And return
+
+DS1501RTC_SUSPEND:
+	IN	A, (DS1501RTC_CONTROLB)		; Suspend Clock
+	AND	~DS1501RTC_TE
+	OUT	(DS1501RTC_CONTROLB), A
+	RET
+
+DS1501RTC_RESUME:
+	IN	A, (DS1501RTC_CONTROLB)		; Resume Clock
+	OR	DS1501RTC_TE
+	OUT	(DS1501RTC_CONTROLB), A
+	RET
+
+DS1501RTC_LOAD:
+	LD	HL, DS1501RTC_BUF
+	PUSH	HL				; Save address of source buffer
+	CALL	DS1501RTC_SUSPEND
+	IN	A, (DS1501RTC_YEAR)			; Read Year
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_MONTH)		; Read Month
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_DAY)			; Read Day
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_HOUR)			; Read Hour
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_MIN)			; Read Minute
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_SEC)			; Read Second
+	LD	(HL), A
+	CALL	DS1501RTC_RESUME
+	POP	HL				; Restore address of source buffer
+	RET
+
+; Working Variables
+
+DS1501RTC_BUF:
+DS1501RTC_BUF_YEAR:	.DB	0		; Year
+DS1501RTC_BUF_MON:	.DB	0		; Month
+DS1501RTC_BUF_DAY:	.DB	0		; Day
+DS1501RTC_BUF_HOUR:	.DB	0		; Hour
+DS1501RTC_BUF_MIN:	.DB	0		; Minute
+DS1501RTC_BUF_SEC:	.DB	0		; Second

Source/HBIOS/ds7rtc.asm

@@ -100,9 +100,7 @@ DS7_DISPATCH:
 	JP	Z, DS7_SETALM			; SET ALARM
 	DEC	A
 	JP	Z, DS7_DEVICE			; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ;-----------------------------------------------------------------------------
@@ -269,9 +267,7 @@ DS7_GETBLK:
 DS7_SETBLK:
 DS7_SETALM
 DS7_GETALM
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;-----------------------------------------------------------------------------
 ; REPORT RTC DEVICE INFO
@@ -329,7 +325,7 @@ DS7_RL1:CALL	PCF_READI2C
 ;
 #IF (0)
 	LD	A,8
-	LD	DE,DS7_BUF	; DISLAY DATA READ
+	LD	DE,DS7_BUF	; DISPLAY DATA READ
 	CALL	PRTHEXBUF	; 
 	CALL   	NEWLINE
 #ENDIF

Source/HBIOS/dsky.asm

@@ -3,7 +3,7 @@
 ; DSKY (DISPLAY AND KEYBOARD) ROUTINES 
 ;==================================================================================================
 ;
-; THE DSKY MAY COSESIDE ON THE SAME PPI BUS AS A PPISD.  IT MAY NOT
+; THE DSKY MAY COINCIDE ON THE SAME PPI BUS AS A PPISD.  IT MAY NOT
 ; SHARE A PPI BUS WITH A PPIDE.  SEE PPI_BUS.TXT FOR MORE INFORMATION.
 ;
 ; LED SEGMENTS (BIT VALUES)

Source/HBIOS/dsrtc.asm

@@ -118,7 +118,7 @@ DS2d8k		.EQU	%10101011	; 2 DIODES 8K RESISTOR
 ;
 #IF (DSRTCMODE == DSRTCMODE_MFPIC)
 ;
-DSRTC_IO	.EQU	$43		; RTC PORT ON MF/PIC
+DSRTC_IO	.EQU	$13		; RTC PORT ON MF/PIC
 ;
 DSRTC_DATA	.EQU	%00000001	; BIT 0 IS RTC DATA OUT
 DSRTC_CLK	.EQU	%00000100	; BIT 2 IS RTC CLOCK (CLK)
@@ -247,9 +247,7 @@ DSRTC_DISPATCH:
 	JP	Z,DSRTC_SETALM	; SET ALARM
 	DEC	A
 	JP	Z,DSRTC_DEVICE	; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
@@ -258,9 +256,7 @@ DSRTC_GETBLK:
 DSRTC_SETBLK:
 DSRTC_GETALM:
 DSRTC_SETALM:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME

Source/HBIOS/fd.asm

@@ -490,9 +490,7 @@ FD_FNTBL:
 FD_VERIFY:
 FD_FORMAT:
 FD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;
@@ -1149,9 +1147,7 @@ FD_RUN1:
 	JR	Z,FC_WRITE
 	CP	DOP_READID
 	JR	Z,FC_READID
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 
 FD_RUNCHK:

Source/HBIOS/gdc.asm

@@ -157,9 +157,7 @@ GDC_VDADEV:	; VIDEO DEVICE INFORMATION
 	RET
 ;
 GDC_VDASCS:	; SET CURSOR STYLE
-	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 
 GDC_VDASCP:	; SET CURSOR POSITION

Source/HBIOS/hbios.asm

@@ -53,6 +53,8 @@
 ;    - build.inc
 ;      - config/<plt>_<cfg>.asm
 ;        - cfg_<plt>.asm
+;      - [z180.inc|z280.inc]
+;      - [eipc.inc]
 ;  - <drivers>.asm
 ;  - <fonts>.asm
 ;  - util.asm
@@ -61,7 +63,7 @@
 ;  - decode.asm
 ;  - encode.asm
 ;  - [xio|mio].asm
-;  - dsky.asm
+;  - [dsky.asm|dskyng.asm]
 ;  - unlzsa2s.asm
 ;
 ; INCLUDE GENERIC STUFF
@@ -90,7 +92,7 @@ MODCNT	.SET	MODCNT + 1
 ; SOME HARDWARE REQUIRES A SPECIFIC ROMSIZE (NOTABLY ZZRCC) OR THE
 ; RESULTING BUILD IMAGES WILL BE CORRUPT.  ROMSIZE_CHK IS SPECIFIED
 ; IN THE CONFIG FILE AND IS VERIFIED AGAINST THE ROMSIZE BEING USED
-; BY THE BUILD.  A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERFICATION
+; BY THE BUILD.  A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERIFICATION
 ; IS DISABLED (WHICH IT USUALLY IS).
 ;
 #IF (ROMSIZE_CHK != 0) & (ROMSIZE != ROMSIZE_CHK)
@@ -132,6 +134,11 @@ MODCNT	.SET	MODCNT + 1
 #DEFINE	LED(N)	\;
 #ENDIF
 ;
+#DEFINE SYSCHKERR(HB_ERR) \
+  #DEFCONT \	CALL	SYSCHKA
+  #DEFCONT \	LD	A,HB_ERR
+  #DEFCONT \	OR	A
+;
 ;
 ;
 #IF (INTMODE == 0)
@@ -219,6 +226,7 @@ RTCDEF		.SET	RTCDEF | %00001000	; INITIAL SPEED LOW
 ;
 	.FILL	(000H - $),0FFH		; RST 0
 	JP	HB_START
+	.DB	0			; SIG PTR STARTS AT $0004
 	.DW	ROM_SIG
 	.FILL	(008H - $),0FFH		; RST 8
 	JP	HB_INVOKE		; INVOKE HBIOS FUNCTION
@@ -1093,14 +1101,14 @@ HB_START:
 ;
 #IFDEF APPBOOT
   #IF (MEMMGR == MM_Z280)
-	LD	A,%00000001
+	LD	A,DIAG_01
 	OUT	(DIAGPORT),A
 	LD	DE,Z280_BOOTERR
 	LD	C,9
-	LD	A,%00000010
+	LD	A,DIAG_02
 	OUT	(DIAGPORT),A
 	CALL	$0005
-	LD	A,%00001000
+	LD	A,DIAG_04
 	OUT	(DIAGPORT),A
 	RET
 ;
@@ -1129,7 +1137,7 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 #ENDIF
 ;
 #IF (DIAGENABLE)
-	LD	A,%00000001
+	LD	A,DIAG_01
 	OUT	(DIAGPORT),A
 #ENDIF
 #IF (LEDENABLE)
@@ -1239,7 +1247,7 @@ Z280_INITZ:
 	LD	A,Z180_BASE
 	OUT0	($3F),A		; AT RESET, ICR IS AT $3F
 
-	DIAG(%00000010)
+	DIAG(DIAG_02)
 
 	; DISABLE REFRESH
 	XOR	A
@@ -1333,8 +1341,10 @@ Z280_INITZ:
 ; NOT WANT TO EFFECT RAM UNTIL AFTER THE BACKUP BATTERY STATUS CHECK
 ; IS PERFORMED NEXT.
 ;
-	LD	A,%00000011
+#IF (DIAGENABLE)
+	LD	A,DIAG_02
 	OUT	(DIAGPORT),A
+#ENDIF
 ;
 ; WE USE THE TWO BYTES IMMEDIATELY BELOW THE PROXY TO STORE A COUPLE
 ; VALUES TEMPORARILY BECAUSE WE MAY BE OPERATING IN ROM AT THIS POINT.
@@ -1353,7 +1363,7 @@ Z280_INITZ:
 ; WILL NOT START CORRECTLY WHEN THEY CHECK THE ROM ID VERSION BYTES.
 ; THE BATTERY CONDITION VALUE IS TEMPORARILY STORED AT HBX_LOC - 1
 ; BECAUSE WE ARE CURRENTLY RUNNING IN ROM.  AFTER WE TRANSITION HBIOS
-; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_BATCOND.
+; TO RAM, THE VALUE IS MOVED TO IT'S REAL LOCATION AT HB_BATCOND.
 ; IF THERE IS NO DS1210 IN THE SYSTEM, THE CODE BELOW DOES NO HARM.
 ;
 	LD	HL,HBX_LOC - 1		; POINT TO BYTE
@@ -1659,8 +1669,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	; THAT.
 	LD	SP,HBX_LOC - 2		; RESET STACK
 ;
-	; NOTIFY THAT WE MADE THE TRANSTION!
-	DIAG(%00000111)
+	; NOTIFY THAT WE MADE THE TRANSITION!
+	DIAG(DIAG_03)
 	LED(%00000010)
 ;
 	; SET THE IN-RAM FLAG
@@ -1787,7 +1797,7 @@ SAVE_REC_M:
   #ENDIF
 #ENDIF
 ;
-	DIAG(%00001111)
+	DIAG(DIAG_04)
 ;
 #IF (WBWDEBUG == USEMIO)		; BUFFER OUTPUT UNTIL
 	CALL	MIO_INIT		; WE GET TO BOOT MESSAGE
@@ -1876,7 +1886,7 @@ HB_CPU1:
 ;
 #ENDIF
 ;
-	DIAG(%00011111)
+	DIAG(DIAG_05)
 ;
 ; INIT OSCILLATOR SPEED FROM CONFIG
 ;
@@ -2168,7 +2178,7 @@ Z280_TC	.EQU	CPUOSC / 4 / 50 / 2	; TIME CONSTANT
 	LD	A,$FF			; FILL WITH $FF
 	CALL	FILL			; DO IT
 ;
-	DIAG(%00111111)
+	DIAG(DIAG_06)
 ;
 #IF FALSE
 ;
@@ -2224,9 +2234,24 @@ NOT_REC_M0:
 ;
 #ENDIF
 ;
-	DIAG(%01111111)
+	DIAG(DIAG_07)
 	LED(%00000011)
 ;
+;
+;
+;
+#IF (BOOT_DELAY > 100)
+	.ECHO	"*** ERROR: INVALID BOOT_DELAY (BOOT_DELAY > 100)!!!\n"
+	!!!	; FORCE AN ASSEMBLY ERROR
+#ENDIF
+;
+#IF (BOOT_DELAY > 0)
+	LD	B,BOOT_DELAY * 2	; SCALE TO 1/2 SEC
+HB_BOOTDLY:
+	CALL	LDELAY			; 1/2 SECOND DELAY
+	DJNZ	HB_BOOTDLY		; LOOP TILL DONE
+#ENDIF
+;
 ; PRIOR TO THIS POINT, CONSOLE I/O WAS NOT AVAILABLE UNLESS DIRECTED TO DEBUG OUTPUT I.E. XIO
 ; NOW THAT HBIOS IS READY, SET THE CONSOLE UNIT TO ACTIVATE CONSOLE I/O
 ; VIA HBIOS.
@@ -2285,7 +2310,19 @@ NXTMIO:	LD	A,(HL)
 	.TEXT	"HBIOS MUTEX ENABLED$"
 #ENDIF
 ;
-	DIAG(%11111111)
+; DISPLAY RECOVERY MODE MESSAGE
+;
+#IF (BT_REC_TYPE != BT_REC_NONE)
+	LD	A,(HB_BOOT_REC)		; IF WE ARE IN RECOVERY MODE
+	OR	A			; DISPLAY RECOVERY MODE MESSAGE
+	JR	Z,NOT_REC_M2
+	CALL	NEWLINE
+	CALL	PRTSTRD
+	.TEXT	"RECOVERY MODE$"
+#ENDIF
+NOT_REC_M2:
+;
+	DIAG(DIAG_08)
 ;
 ; IO PORT SCAN
 ;
@@ -2799,6 +2836,10 @@ INITSYS4:
 	LDCTL	(C),HL
 #ENDIF
 ;
+#IFDEF TESTING
+	CALL	SND_BEEP
+#ENDIF
+;
 #IFNDEF ROMBOOT
 ;
 	; COPY OS IMAGE: BID_USR:<IMG START> --> BID_USR:0
@@ -2904,8 +2945,8 @@ HB_PCINITTBL:
 #IF (PIOENABLE)
 	.DW	PIO_PREINIT
 #ENDIF
-#IF CENENABLE)
-	.DW	CEN_PREINIT
+#IF LPTENABLE)
+	.DW	LPT_PREINIT
 #ENDIF
 #IF (PIO_4P | PIO_ZP)
 	.DW	PIO_PREINIT
@@ -2938,6 +2979,9 @@ HB_INITTBL:
 #IF (SN76489ENABLE)
 	.DW	SN76489_INIT
 #ENDIF
+#IF (YM2612ENABLE)
+	.DW	YM2612_INIT
+#ENDIF
 #IF (SPKENABLE)
 	.DW	SP_INIT			; AUDIBLE INDICATOR OF BOOT START
 #ENDIF
@@ -2959,9 +3003,24 @@ HB_INITTBL:
 #IF (ACIAENABLE)
 	.DW	ACIA_INIT
 #ENDIF
+#IF (PIOENABLE)
+	.DW	PIO_INIT
+#ENDIF
+#IF (LPTENABLE)
+	.DW	LPT_INIT
+#ENDIF
+#IF (PIO_4P | PIO_ZP)
+	.DW	PIO_INIT
+#ENDIF
+#IF (UFENABLE)
+	.DW	UF_INIT
+#ENDIF
 #IF (DSRTCENABLE)
 	.DW	DSRTC_INIT
 #ENDIF
+#IF (DS1501RTCENABLE)
+	.DW	DS1501RTC_INIT
+#ENDIF
 #IF (BQRTCENABLE)
 	.DW	BQRTC_INIT
 #ENDIF
@@ -3026,19 +3085,6 @@ HB_INITTBL:
 #IF (PPPENABLE)
 	.DW	PPP_INIT
 #ENDIF
-#IF (PIOENABLE)
-	.DW	PIO_INIT
-#ENDIF
-#IF (CENENABLE)
-	.DW	CEN_INIT
-#ENDIF
-#IF (PIO_4P | PIO_ZP)
-	.DW	PIO_INIT
-#ENDIF
-#IF (UFENABLE)
-	.DW	UF_INIT
-#ENDIF
-
 ;
 HB_INITTBLLEN	.EQU	(($ - HB_INITTBL) / 2)
 ;
@@ -3091,7 +3137,7 @@ HB_DISPATCH:
 	PUSH	AF
 	LD	A,(HB_STACK - HB_STKSIZ + $08)
 	CP	$FF
-	CALL	SYSCHK
+	SYSCHKERR(ERR_INTERNAL)
 	LD	A,$FF
 	LD	(HB_STACK - HB_STKSIZ + $08),A
 	POP	AF
@@ -3119,9 +3165,7 @@ HB_DISPATCH1:
 	; FALL THRU
 ;
 HB_DISPERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ;==================================================================================================
@@ -3462,7 +3506,7 @@ HB_DSKFN:
 HB_DSKFNADR	.EQU	$+1
 	CALL	PANIC			; READ ONE SECTOR
 #IF (DIAGENABLE & DIAGDISKIO)
-	DIAG(0)				; CLEAR DIAG LEDS
+	DIAG(DIAG_00)				; CLEAR DIAG LEDS
 #ENDIF
 #IF (LEDENABLE & LEDDISKIO)
 	LED($00)
@@ -3583,9 +3627,7 @@ RTC_DISPATCH:
 	RET
 ;
 RTC_DISPERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOHW
-	OR	A
+	SYSCHKERR(ERR_NOHW)
 	RET
 ;
 ; SET RTC DISPATCH ADDRESS, USED BY RTC DRIVERS DURING INIT
@@ -3683,7 +3725,7 @@ SND_ADDENT:
 ;	WORD	UNIT SPECIFIC DATA (TYPICALLY A DEVICE INSTANCE DATA ADDRESS)
 ;
 SND_FNCNT	.EQU	8		; NUMBER OF SND FUNCS (FOR RANGE CHECK)
-SND_MAX		.EQU	3		; UP TO 2 UNITS
+SND_MAX		.EQU	4		; UP TO 4 UNITS
 SND_SIZ		.EQU	SND_MAX * 4	; EACH ENTRY IS 4 BYTES
 ;
 		.DB	SND_FNCNT	; SND FUNCTION COUNT (FOR RANGE CHECK)
@@ -3692,6 +3734,49 @@ SND_CNT		.DB	0		; ENTRY COUNT PREFIX
 SND_TBL		.FILL	SND_SIZ,0	; SPACE FOR ENTRIES
 ;
 ;==================================================================================================
+;   SPEAKER BEEP ROUTINE
+;==================================================================================================
+;
+; ROUTINE TO BEEP THE DEAULT SOUND UNIT
+; NEED TO CHECK FOR EXISTENCE OF SOUND UNIT
+; WHICH CHANNEL SHOULD BE USED?  IS THERE A GOOD DEFAULT CHANNEL?
+;
+SND_BEEP:
+	; CHECK FOR AT LEAST 1 SOUND DEVICE
+	LD	A,(SND_CNT)		; GET SOUND UNIT COUNT
+	OR	A			; CHECK FOR ZERO
+	RET	Z			; BAIL OUT IF NO SOUND UNITS
+	
+	; PLAY A BEEP ON SOUND DEVICE UNIT 0
+	LD	B,$50			; SOUND RESET FUNCTION
+	LD	C,0			; SOUND UNIT NUMBER
+	CALL	SND_DISPATCH		; DO IT
+	LD	B,$51			; VOLUME
+	LD	C,0			; SOUND UNIT NUMBER
+	LD	L,$FF			; MAX
+	CALL	SND_DISPATCH		; DO IT
+	LD	B,$53			; SELECT NOTE
+	LD	C,0			; SOUND UNIT NUMBER
+	;LD	HL,0			; A0#
+	LD	HL,244			; B5 (CLOSE TO 1 KHZ)
+	CALL	SND_DISPATCH		; DO IT
+	;LD	B,$56			; DURATION
+	;LD	C,0			; SOUND UNIT NUMBER
+	;LD	HL,500			; 1/2 SECOND
+	;CALL	SND_DISPATCH		; DO IT
+	LD	B,$54			; PLAY SOUND
+	LD	C,0			; SOUND UNIT NUMBER
+	LD	D,0			; CHANNEL 0
+	CALL	SND_DISPATCH		; DO IT
+	LD	DE,15625		; PLAY FOR 1/4 SECOND
+	CALL	VDELAY			; WAIT WHILE TONE IS PLAYED
+	;CALL	LDELAY			; LET SOUND PLAY 1/2 SECOND
+	LD	B,$50			; SOUND RESET FUNCTION
+	LD	C,0			; SOUND UNIT NUMBER
+	CALL	SND_DISPATCH		; DO IT
+	RET				; DONE
+;
+;==================================================================================================
 ;   SYSTEM FUNCTION DISPATCHER
 ;==================================================================================================
 ;
@@ -3740,9 +3825,7 @@ SYS_RESET:
 	JR	Z,SYS_RESCOLD
 	CP	BF_SYSRES_USER
 	JR	Z,SYS_RESUSER
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A			; SIGNAL ERROR
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; SOFT RESET HBIOS, RELEASE HEAP MEMORY NOT USED BY HBIOS
@@ -3946,9 +4029,7 @@ SYS_ALLOC:
 ; ALL OTHER REGISTERS PRESERVED
 ;
 SYS_FREE:
-	CALL	SYSCHK			; NOT YET IMPLEMENTED
-	LD	A,ERR_NOTIMPL		; NOT YET INMPLEMENTED
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOTIMPL)		; NOT YET INMPLEMENTED
 	RET
 ;
 ; GET SYSTEM INFORMATION
@@ -3988,9 +4069,7 @@ SYS_GET:
 	JP	Z,SYS_GETBNKINFO
 	CP	BF_SYSGET_CPUSPD
 	JP	Z,SYS_GETCPUSPD
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 ; GET TIMER
@@ -4077,7 +4156,7 @@ SYS_GETBNKINFO:
 	XOR	A
 	RET
 ;
-; GET SYSTEM CPU SPEED ORMANCE ATTRIBUTES
+; GET SYSTEM CPU SPEED PERFORMANCE ATTRIBUTES
 ;   RETURNS:
 ;     L: CLOCK MULT (0:HALF, 1:FULL, 2: DOUBLE)
 ;     D: MEMORY WAIT STATES
@@ -4087,10 +4166,10 @@ SYS_GETCPUSPD:
 ;
 #IF (((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) & (CPUSPDCAP==SPD_HILO))
 	LD	A,(HB_RTCVAL)
-	BIT	3,A
 #IF (PLATFORM == PLT_SBC)
 	XOR	%00001000		; SBC SPEED BIT IS INVERTED
 #ENDIF
+	BIT	3,A
 	LD	L,0			; ASSUME HALF SPEED
 	JR	Z,SYS_GETCPUSPD1
 	LD	L,1
@@ -4282,9 +4361,7 @@ SYS_SET:
 	JR	Z,SYS_SETBOOTINFO
 	CP	BF_SYSSET_CPUSPD
 	JR	Z,SYS_SETCPUSPD
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 ; SET BOOT INFORMATION
@@ -4645,9 +4722,7 @@ SYS_INT:
 	JR	Z,SYS_INTGET
 	CP	BF_SYSINT_SET
 	JR	Z,SYS_INTSET
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 ; GET INTERRUPT SYSTEM INFORMATION
@@ -4673,9 +4748,7 @@ SYS_INTINFO:
 ;
 SYS_INTVECADR:
 #IF (INTMODE == 0)
-	CALL	SYSCHK			; INVALID FOR INT MODE 0
-	LD	A,ERR_BADCFG		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_BADCFG)		; SIGNAL ERROR. INVALID FOR INT MODE 0
 	RET
 #ENDIF
 #IF (INTMODE == 1)
@@ -4689,9 +4762,7 @@ SYS_INTVECADR:
 	LD	A,E			; INCOMING INDEX POSITION TO A
 	CP	C			; COMPARE TO VECTOR COUNT
 	JR	C,SYS_INTGET1		; CONTINUE IF POSITION IN RANGE
-	CALL	SYSCHK			; ELSE ERROR
-	LD	A,ERR_RANGE		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_RANGE)		; ELSE ERROR
 	RET
 SYS_INTGET1:
 	OR	A			; CLEAR CARRY
@@ -5172,15 +5243,11 @@ HB_DISPCALC:
 	RET				; JUMP TO DRIVER FUNC ADR ON TOS
 ;
 HB_FUNCERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 HB_UNITERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOUNIT		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOUNIT)		; SIGNAL ERROR
 	RET
 ;
 ; ADD AN ENTRY TO THE UNIT TABLE AT ADDRESS IN HL
@@ -5218,7 +5285,7 @@ HB_ADDENT:
 ; ALL OTHER REGISTERS PRESERVED
 ;
 ; A 4 BYTE HEADER IS PLACED IN FRONT OF THE ALLOCATED MEMORY
-;  - DWORD: SIZE OF MEMROY ALLOCATED (DOES NOT INCLUDE 4 BYTE HEADER)
+;  - DWORD: SIZE OF MEMORY ALLOCATED (DOES NOT INCLUDE 4 BYTE HEADER)
 ;  - DWORD: ADDRESS WHERE ALLOC WAS CALLED (VALUE ON TOP OF STACK AT CALL)
 ;
 HB_ALLOC:
@@ -5267,9 +5334,7 @@ HB_ALLOC:
 HB_ALLOC1:
 	; ERROR RETURN
 	POP	DE			; RESTORE INCOMING DE
-	CALL	SYSCHK
-	LD	A,ERR_NOMEM		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOMEM)		; SIGNAL ERROR
 	RET
 ;
 HB_TMPSZ	.DW	0
@@ -5698,6 +5763,15 @@ SIZ_DSRTC	.EQU	$ - ORG_DSRTC
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
+#IF (DS1501RTCENABLE)
+ORG_DS1501RTC	.EQU	$
+  #INCLUDE "ds1501rtc.asm"
+SIZ_DS1501RTC	.EQU	$ - ORG_DS1501RTC
+		.ECHO	"DS1501RTC occupies "
+		.ECHO	SIZ_DS1501RTC
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (BQRTCENABLE)
 ORG_BQRTC	.EQU	$
   #INCLUDE "bqrtc.asm"
@@ -5758,6 +5832,15 @@ SIZ_ASCI	.EQU	$ - ORG_ASCI
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
+#IF (Z2UENABLE)
+ORG_Z2U	.EQU	$
+  #INCLUDE "z2u.asm"
+SIZ_Z2U	.EQU	$ - ORG_Z2U
+		.ECHO	"Z2U occupies "
+		.ECHO	SIZ_Z2U
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (UARTENABLE)
 ORG_UART	.EQU	$
   #INCLUDE "uart.asm"
@@ -5794,12 +5877,39 @@ SIZ_ACIA	.EQU	$ - ORG_ACIA
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
-#IF (Z2UENABLE)
-ORG_Z2U	.EQU	$
-  #INCLUDE "z2u.asm"
-SIZ_Z2U	.EQU	$ - ORG_Z2U
-		.ECHO	"Z2U occupies "
-		.ECHO	SIZ_Z2U
+#IF (PIOENABLE)
+ORG_PIO		.EQU	$
+  #INCLUDE "pio.asm"
+SIZ_PIO		.EQU	$ - ORG_PIO
+		.ECHO	"PIO occupies "
+		.ECHO	SIZ_PIO
+		.ECHO	" bytes.\n"
+#ENDIF
+;
+#IF (LPTENABLE)
+ORG_LPT		.EQU	$
+  #INCLUDE "lpt.asm"
+SIZ_LPT		.EQU	$ - ORG_LPT
+		.ECHO	"LPT occupies "
+		.ECHO	SIZ_LPT
+		.ECHO	" bytes.\n"
+#ENDIF
+;
+#IF (PIO_4P | PIO_ZP | PIO_SBC)
+ORG_PIO		.EQU	$
+  #INCLUDE "pio.asm"
+SIZ_PIO		.EQU	$ - ORG_PIO
+		.ECHO	"PIO occupies "
+		.ECHO	SIZ_PIO
+		.ECHO	" bytes.\n"
+#ENDIF
+;
+#IF (UFENABLE)
+ORG_UF	.EQU	$
+  #INCLUDE "uf.asm"
+SIZ_UF	.EQU	$ - ORG_UF
+		.ECHO	"UF occupies "
+		.ECHO	SIZ_UF
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
@@ -5908,7 +6018,7 @@ SIZ_FONTS	.EQU	$ - ORG_FONTS
 		.ECHO	SIZ_FONTS
 		.ECHO	" bytes.\n"
 ;
-#IF (CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & (TMSMODE == TMSMODE_RCKBD))
+#IF (CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC)))
 ORG_KBD		.EQU	$
   #INCLUDE "kbd.asm"
 SIZ_KBD		.EQU	$ - ORG_KBD
@@ -6034,42 +6144,6 @@ SIZ_SPK	.EQU	$ - ORG_SPK
 		.ECHO	SIZ_SPK
 		.ECHO	" bytes.\n"
 #ENDIF
-;
-#IF (PIOENABLE)
-ORG_PIO		.EQU	$
-  #INCLUDE "pio.asm"
-SIZ_PIO		.EQU	$ - ORG_PIO
-		.ECHO	"PIO occupies "
-		.ECHO	SIZ_PIO
-		.ECHO	" bytes.\n"
-#ENDIF
-;
-#IF (CENENABLE)
-ORG_CEN		.EQU	$
-  #INCLUDE "cen.asm"
-SIZ_CEN		.EQU	$ - ORG_CEN
-		.ECHO	"CEN occupies "
-		.ECHO	SIZ_CEN
-		.ECHO	" bytes.\n"
-#ENDIF
-;
-#IF (PIO_4P | PIO_ZP | PIO_SBC)
-ORG_PIO		.EQU	$
-  #INCLUDE "pio.asm"
-SIZ_PIO		.EQU	$ - ORG_PIO
-		.ECHO	"PIO occupies "
-		.ECHO	SIZ_PIO
-		.ECHO	" bytes.\n"
-#ENDIF
-;
-#IF (UFENABLE)
-ORG_UF	.EQU	$
-  #INCLUDE "uf.asm"
-SIZ_UF	.EQU	$ - ORG_UF
-		.ECHO	"UF occupies "
-		.ECHO	SIZ_UF
-		.ECHO	" bytes.\n"
-#ENDIF
 #IF (KIOENABLE)
 ORG_KIO	.EQU	$
   #INCLUDE "kio.asm"
@@ -6102,6 +6176,14 @@ SIZ_AY38910	.EQU	$ - ORG_AY38910
 		.ECHO	SIZ_AY38910
 		.ECHO	" bytes.\n"
 #ENDIF
+#IF (YM2612ENABLE)
+ORG_YM2612	.EQU	$
+  #INCLUDE "ym2612.asm"
+SIZ_YM2612	.EQU	$ - ORG_YM2612
+		.ECHO	"YM2612 occupies "
+		.ECHO	SIZ_YM2612
+		.ECHO	" bytes.\n"
+#ENDIF
 ;
 		.ECHO	"RTCDEF="
 		.ECHO	RTCDEF
@@ -6248,7 +6330,7 @@ HB_RDSEC:
 ;
 ; SYSTEM CHECK: DUMP MACHINE STATE AND CONTINUE?
 ;
-SYSCHK:
+SYSCHKA:
 	; CHECK DIAG LEVEL TO SEE IF WE SHOULD DISPLAY
 	PUSH	AF			; PRESERVE INCOMING AF VALUE
 	LD	A,(CB_DIAGLVL)		; GET DIAGNOSTIC LEVEL
@@ -6262,6 +6344,17 @@ SYSCHK:
 	CALL	WRITESTR		; PRINT IT
 	POP	DE			; RESTORE DE VALUE
 	CALL	XREGDMP			; DUMP REGISTERS
+
+	; DISPLAY ERROR CODE. IT IS AT RETURN ADDRESS+1 .. LD A,XX
+	EX	(SP),HL			; GET RETURN ADDRESS
+	INC	HL			; POINT TO THE ERROR CODE
+	PUSH	AF
+	LD	A,(HL)			; DISPLAY
+	CALL	PRTHEXBYTE
+	POP	AF
+	DEC	HL			; RESTORE RETURN ADDRESS
+	EX	(SP),HL
+;
 	JR	CONTINUE		; CHECK W/ USER
 ;
 SYSCHK1:
@@ -6802,7 +6895,7 @@ PS_PRTDEV:
 	CALL	PS_PAD			; PAD N SPACES (SPECIFIED IN A)
 	RET
 ;
-; PRINT DEVICE NMEMONIC, DEVTYP/NUM SPECIFIED IN DE
+; PRINT DEVICE MNEMONIC, DEVTYP/NUM SPECIFIED IN DE
 ;
 PS_PRTNUL:
 	LD	HL,PS_STRNUL
@@ -6894,7 +6987,7 @@ PS_FLP_DSTR:	.TEXT	"SD$"		; PS_FLPSD
 ;
 PS_SDSTRREF:
 	.DW	PS_SDUART, PS_SDASCI, PS_SDTERM, PS_SDPRPCON, PS_SDPPPCON
-	.DW	PS_SDSIO, PS_SDACIA, PS_SDPIO, PS_SDUF, PS_SDDUART, PS_SDZ2U, PS_SDCEN
+	.DW	PS_SDSIO, PS_SDACIA, PS_SDPIO, PS_SDUF, PS_SDDUART, PS_SDZ2U, PS_SDLPT
 ;
 PS_SDUART	.TEXT	"UART$"
 PS_SDASCI	.TEXT	"ASCI$"
@@ -6907,7 +7000,7 @@ PS_SDPIO	.TEXT	"PIO$"
 PS_SDUF		.TEXT	"UF$"
 PS_SDDUART	.TEXT	"DUART$"
 PS_SDZ2U	.TEXT	"Z2U$"
-PS_SDCEN	.TEXT	"CEN$"
+PS_SDLPT	.TEXT	"LPT$"
 ;
 ; CHARACTER SUB TYPE STRINGS
 ;

Source/HBIOS/hbios.inc

@@ -156,6 +156,111 @@ ERR_TIMEOUT		.EQU	-11	; DEVICE TIMEOUT
 ERR_BADCFG		.EQU	-12	; INVALID CONFIGURATION
 ERR_INTERNAL		.EQU	-13	; INTERNAL ERROR
 ;
+; HBIOS DIAG OPTIONS
+;
+DIAG_PROG	.EQU	0		; PROGRESS BAR
+DIAG_STEP	.EQU	1		; STEP BAR
+DIAG_ASCII	.EQU	2		; 8-BIT ASCII 30H - 39H
+DIAG_BINARY	.EQU	3		; BINARY 00H - 09H
+DIAG_7SEG	.EQU	4		; 7-SEGMENT
+DIAG_FLASH	.EQU	5		; FLASH
+DIAG_TRIG	.EQU	6		; TRIGGER
+;
+DIAG_DISP	.EQU	DIAG_PROG	; DEFAULT
+;
+#IF (DIAG_DISP == DIAG_PROG)
+DIAG_00 .EQU 00000000B	
+DIAG_01 .EQU 00000001B 
+DIAG_02 .EQU 00000011B 
+DIAG_03 .EQU 00000111B 
+DIAG_04 .EQU 00001111B 
+DIAG_05 .EQU 00011111B 
+DIAG_06 .EQU 00111111B 
+DIAG_07 .EQU 01111111B 
+DIAG_08 .EQU 11111111B 
+DIAG_09 .EQU 11111111B   
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_STEP)
+DIAG_00 .EQU 00000000B	
+DIAG_01 .EQU 00000001B 
+DIAG_02 .EQU 00000010B 
+DIAG_03 .EQU 00000100B 
+DIAG_04 .EQU 00001000B 
+DIAG_05 .EQU 00010000B 
+DIAG_06 .EQU 00100000B 
+DIAG_07 .EQU 01000000B 
+DIAG_08 .EQU 10000000B
+DIAG_09 .EQU 11111111B
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_ASCII)
+DIAG_00 .EQU '0'	
+DIAG_01 .EQU '1'
+DIAG_02 .EQU '2' 
+DIAG_03 .EQU '3' 
+DIAG_04 .EQU '4'
+DIAG_05 .EQU '5'
+DIAG_06 .EQU '6' 
+DIAG_07 .EQU '7'
+DIAG_08 .EQU '8' 
+DIAG_09 .EQU '9' 
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_BINARY)
+DIAG_00 .EQU 0	
+DIAG_01 .EQU 1
+DIAG_02 .EQU 2
+DIAG_03 .EQU 3
+DIAG_04 .EQU 4
+DIAG_05 .EQU 5
+DIAG_06 .EQU 6
+DIAG_07 .EQU 7
+DIAG_08 .EQU 8
+DIAG_09 .EQU 9 
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_7SEG)
+;             abcdefg
+DIAG_00 .EQU 00000000B ; BLANK
+DIAG_01 .EQU 01111110B ; 0
+DIAG_02 .EQU 00110000B ; 1
+DIAG_03 .EQU 01101101B ; 2
+DIAG_04 .EQU 01111001B ; 3 
+DIAG_05 .EQU 00110011B ; 4
+DIAG_06 .EQU 01011011B ; 5
+DIAG_07 .EQU 00011111B ; 6 
+DIAG_08 .EQU 01110000B ; 7
+DIAG_09 .EQU 01111111B ; 8
+DIAG_10 .EQU 01110011B ; 9
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_FLASH)
+DIAG_00 .EQU 00000000B ; OFF	
+DIAG_01 .EQU 11111111B ; ON
+DIAG_02 .EQU 00000000B ; OFF	
+DIAG_03 .EQU 11111111B ; ON
+DIAG_04 .EQU 00000000B ; OFF	
+DIAG_05 .EQU 11111111B ; ON
+DIAG_06 .EQU 00000000B ; OFF	
+DIAG_07 .EQU 11111111B ; ON
+DIAG_08 .EQU 00000000B ; OFF	
+DIAG_09 .EQU 11111111B ; ON 
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_TRIG)
+DIAG_00 .EQU 11111111B ; ON	
+DIAG_01 .EQU 11111111B ; ON
+DIAG_02 .EQU 11111111B ; ON
+DIAG_03 .EQU 11111111B ; ON
+DIAG_04 .EQU 11111111B ; ON
+DIAG_05 .EQU 11111111B ; ON
+DIAG_06 .EQU 11111111B ; ON
+DIAG_07 .EQU 11111111B ; ON
+DIAG_08 .EQU 11111111B ; ON
+DIAG_09 .EQU 11111111B ; ON 
+#ENDIF
+;
 ; MEDIA ID VALUES
 ;
 MID_NONE	.EQU	0
@@ -183,7 +288,7 @@ CIODEV_PIO	.EQU	$70
 CIODEV_UF	.EQU	$80
 CIODEV_DUART	.EQU	$90
 CIODEV_Z2U	.EQU	$A0
-CIODEV_CEN	.EQU	$B0
+CIODEV_LPT	.EQU	$B0
 ;
 ; SUB TYPES OF CHAR DEVICES
 ;

Source/HBIOS/hbios_env.asm

@@ -0,0 +1,82 @@
+;
+;==================================================================================================
+;   HBIOS ENVIRONMENT CONFIG VALUE EXPORT TOOL
+;==================================================================================================
+;
+; Do we need a private stack???
+;
+#include "std.asm"
+;
+; Macro to make it simple to print a config value
+;
+#define	prtval(tag,val) \
+#defcont \	call	PREFIX
+#defcont \	call	PRTSTRD
+#defcont \	.text	tag
+#defcont \	call	PRTEQ
+#defcont \	ld	hl,val
+#defcont \	call	PRTDEC
+#defcont \	call	EOL
+;
+; Program starts here
+;
+	.org	$100			; Normal CP/M start address
+;
+; Print all desired config values...
+;
+	prtval("ROMSIZE$", ROMSIZE)
+	prtval("CPUFAM$", CPUFAM)
+;
+	ret
+;
+; Output correct prefix for command/shell
+;
+PREFIX:
+#ifdef CMD
+	call	PRTSTRD
+	.text	"set $"
+#endif
+	ret
+;
+; Output an equal sign
+;
+PRTEQ:
+	ld	a,'='
+	call	COUT
+	ret
+;
+; Output end-of-line.  Handles differences between
+; DOS/Windows and Unix.
+;
+EOL:
+#ifdef CMD
+	ld	a,13
+	call	COUT
+#endif
+	ld	a,10
+	call	COUT
+	ret
+
+;
+; Print a single character from register A.
+; This routine is required by the utility routines included below.
+;
+COUT:
+	push	af
+	push	bc
+	push	de
+	push	hl
+	ld	e,a
+	ld	c,2
+	call	$0005
+	pop	hl
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+; Include the utility routines
+;
+#include "util.asm"
+;
+	.end

Source/HBIOS/hdsk.asm

@@ -121,9 +121,7 @@ HDSK_FNTBL:
 HDSK_VERIFY:
 HDSK_FORMAT:
 HDSK_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)			; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/ide.asm

@@ -461,9 +461,7 @@ IDE_FNTBL:
 IDE_VERIFY:
 IDE_FORMAT:
 IDE_DEFMED:
-	CALL	SYSCHK			; NOT IMPLEMENTED
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)			; NOT IMPLEMENTED
 	RET
 ;
 ;
@@ -1246,19 +1244,31 @@ IDE_INITDEV00:
 	CALL	DUMP_BUFFER		; DUMP IT IF DEBUGGING
 #ENDIF
 ;
-	XOR	A
 	LD	(IY+IDE_MED),0		; CLEAR FLAGS
-
-	; DETERMINE IF CF DEVICE
-	LD	HL,HB_WRKBUF		; FIRST WORD OF IDENTIFY DATA HAS CF FLAG
-	LD	A,$8A			; FIRST BYTE OF MARKER IS $8A
-	CP	(HL)			; COMPARE
-	JR	NZ,IDE_INITDEV1		; IF NO MATCH, NOT CF
-	INC	HL
-	LD	A,$84			; SECOND BYTE OF MARKER IS $84
-	CP	(HL)			; COMPARE
-	JR	NZ,IDE_INITDEV1		; IF NOT MATCH, NOT CF
-	SET	0,(IY+IDE_MED)		; SET FLAGS BIT FOR CF MEDIA
+;
+	; DETERMINE IF CF DEVICE BY TESTING FOR CF CARD SIGNATURES
+	; IN THEORY, THERE ARE SOME OTHER POSSIBLE VARIATIONS, BUT
+	; THEY ARE NOT RECOMMENDED BY THE CF CARD SPEC AND MIGHT
+	; OVERLAP WITH "REAL" HARD DISK SIGNATURES.  I HAVE NEVER
+	; SEEN A CF CARD THAT DID NOT USE ONE OF THE BELOW.
+	; CREDIT TO LASZLO SZOLNOKI 
+	LD	BC,$848A		; STANDARD CF CARD SIGNATURE
+	CALL	IDE_INITDEV000		; TEST & SET
+	LD	BC,$044A		; ALT SIG FOR NON-REMOVABLE
+	CALL	IDE_INITDEV000		; TEST & SET
+	LD	BC,$0040		; ALT SIG FOR NON-REMOVABLE
+	CALL	IDE_INITDEV000		; TEST & SET
+	JR	IDE_INITDEV1		; CONTINUE INIT
+;
+IDE_INITDEV000:
+	; CHECK IF FIRST WORD OF IDENTIFY DATA MATCHES VALUE IN BC
+	; AND SET CF FLAG IF SO
+	LD	HL,(HB_WRKBUF)		; FIRST WORD OF IDENTIFY DATA
+	OR	A			; CLEAR CARRY
+	SBC	HL,BC			; COMPARE
+	RET	NZ			; ABORT IF NOT EQUAL
+	SET	0,(IY+IDE_MED)		; ELSE SET FLAGS BIT FOR CF MEDIA
+	RET				; AND RETURN
 ;
 IDE_INITDEV1:
 	; DETERMINE IF LBA CAPABLE

Source/HBIOS/intrtc.asm

@@ -56,9 +56,7 @@ INTRTC_DISPATCH:
 	JP	Z,INTRTC_SETALM	; SET ALARM 
 	DEC	A
 	JP	Z,INTRTC_DEVICE	; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
@@ -69,9 +67,7 @@ INTRTC_GETBLK:
 INTRTC_SETBLK:
 INTRTC_GETALM:
 INTRTC_SETALM:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME
@@ -205,7 +201,7 @@ INTRTC_INT2:
 	JR	NZ,INTRTC_INTX		; NOPE, DONE
 	LD	(HL),0			; BACK TO YEAR ZERO
 INTRTC_INTX:
-	JP	SYSCHK
+	JP	PANIC
 INTRTC_VEC	.EQU	$-2
 ;
 ; CONVERT FROM BINARY BUF (HL) TO BCD BUF (DE)

Source/HBIOS/lpt.asm

@@ -1,10 +1,10 @@
 ;
 ;==================================================================================================
-; CENTRONICS INTERFACE DRIVER
+; CENTRONICS (LPT) INTERFACE DRIVER
 ;==================================================================================================
 ;
-; CENTRONICS-STYLE PARALLEL PRINTER DRIVER.  ASSUMES MBC PRINT BOARD
-; AS HARDWARE.
+; CENTRONICS-STYLE PARALLEL PRINTER DRIVER.  ASSUMES IBM STYLE
+; HARDWARE INTERFACE AS DESCRIBED BELOW.
 ;
 ; IMPLEMENTED AS A ROMWBW CHARACTER DEVICE.  CURRENTLY HANDLES OUPUT
 ; ONLY.
@@ -30,56 +30,56 @@
 ;     | STAT1 | STAT0 | ENBL  | PINT  | SEL   | RES   | LF    | STB   |
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
 ;
-CEN_NONE	.EQU	0
-CEN_MBC		.EQU	1
+LPT_NONE	.EQU	0		; NOT PRESENT
+LPT_IBM		.EQU	1		; IBM PC STYLE INTERFACE
 ;
 ; PRE-CONSOLE INITIALIZATION - DETECT AND INIT HARDWARE
 ;
-CEN_PREINIT:
+LPT_PREINIT:
 ;
 ; SETUP THE DISPATCH TABLE ENTRIES
 ; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN
 ; DISABLED.
 ;
-	LD	B,CEN_CFGCNT		; LOOP CONTROL
+	LD	B,LPT_CFGCNT		; LOOP CONTROL
 	XOR	A			; ZERO TO ACCUM
-	LD	(CEN_DEV),A		; CURRENT DEVICE NUMBER
-	LD	IY,CEN_CFG		; POINT TO START OF CFG TABLE
-CEN_PREINIT0:
+	LD	(LPT_DEV),A		; CURRENT DEVICE NUMBER
+	LD	IY,LPT_CFG		; POINT TO START OF CFG TABLE
+LPT_PREINIT0:
 	PUSH	BC			; SAVE LOOP CONTROL
-	CALL	CEN_INITUNIT		; HAND OFF TO UNIT INIT CODE
+	CALL	LPT_INITUNIT		; HAND OFF TO UNIT INIT CODE
 	POP	BC			; RESTORE LOOP CONTROL
 ;
-	LD	A,(IY+1)		; GET THE CEN TYPE DETECTED
+	LD	A,(IY+1)		; GET THE LPT TYPE DETECTED
 	OR	A			; SET FLAGS
-	JR	Z,CEN_PREINIT2		; SKIP IT IF NOTHING FOUND
+	JR	Z,LPT_PREINIT2		; SKIP IT IF NOTHING FOUND
 ;
 	PUSH	BC			; SAVE LOOP CONTROL
 	PUSH	IY			; CFG ENTRY ADDRESS
 	POP	DE			; ... TO DE
-	LD	BC,CEN_FNTBL		; BC := FUNCTION TABLE ADDRESS
-	CALL	NZ,CIO_ADDENT		; ADD ENTRY IF CEN FOUND, BC:DE
+	LD	BC,LPT_FNTBL		; BC := FUNCTION TABLE ADDRESS
+	CALL	NZ,CIO_ADDENT		; ADD ENTRY IF LPT FOUND, BC:DE
 	POP	BC			; RESTORE LOOP CONTROL
 ;
-CEN_PREINIT2:
-	LD	DE,CEN_CFGSIZ		; SIZE OF CFG ENTRY
+LPT_PREINIT2:
+	LD	DE,LPT_CFGSIZ		; SIZE OF CFG ENTRY
 	ADD	IY,DE			; BUMP IY TO NEXT ENTRY
-	DJNZ	CEN_PREINIT0		; LOOP UNTIL DONE
+	DJNZ	LPT_PREINIT0		; LOOP UNTIL DONE
 ;
-CEN_PREINIT3:
+LPT_PREINIT3:
 	XOR	A			; SIGNAL SUCCESS
 	RET				; AND RETURN
 ;
-; CEN INITIALIZATION ROUTINE
+; LPT INITIALIZATION ROUTINE
 ;
-CEN_INITUNIT:
-	CALL	CEN_DETECT		; DETERMINE CEN TYPE
+LPT_INITUNIT:
+	CALL	LPT_DETECT		; DETERMINE LPT TYPE
 	LD	(IY+1),A		; SAVE IN CONFIG TABLE
 	OR	A			; SET FLAGS
 	RET	Z			; ABORT IF NOTHING THERE
 ;
-	; UPDATE WORKING CEN DEVICE NUM
-	LD	HL,CEN_DEV		; POINT TO CURRENT DEVICE NUM
+	; UPDATE WORKING LPT DEVICE NUM
+	LD	HL,LPT_DEV		; POINT TO CURRENT DEVICE NUM
 	LD	A,(HL)			; PUT IN ACCUM
 	INC	(HL)			; INCREMENT IT (FOR NEXT LOOP)
 	LD	(IY),A			; UPDATE UNIT NUM
@@ -88,44 +88,44 @@ CEN_INITUNIT:
 	LD	DE,-1			; LEAVE CONFIG ALONE
 	; CALL INITDEV TO IMPLEMENT CONFIG, BUT NOTE THAT WE CALL
 	; THE INITDEV ENTRY POINT THAT DOES NOT ENABLE/DISABLE INTS!
-	JP	CEN_INITDEVX		; IMPLEMENT IT AND RETURN
+	JP	LPT_INITDEVX		; IMPLEMENT IT AND RETURN
 ;
 ;
 ;
-CEN_INIT:
-	LD	B,CEN_CFGCNT		; COUNT OF POSSIBLE CEN UNITS
-	LD	IY,CEN_CFG		; POINT TO START OF CFG TABLE
-CEN_INIT1:
+LPT_INIT:
+	LD	B,LPT_CFGCNT		; COUNT OF POSSIBLE LPT UNITS
+	LD	IY,LPT_CFG		; POINT TO START OF CFG TABLE
+LPT_INIT1:
 	PUSH	BC			; SAVE LOOP CONTROL
-	LD	A,(IY+1)		; GET CEN TYPE
+	LD	A,(IY+1)		; GET LPT TYPE
 	OR	A			; SET FLAGS
-	CALL	NZ,CEN_PRTCFG		; PRINT IF NOT ZERO
+	CALL	NZ,LPT_PRTCFG		; PRINT IF NOT ZERO
 	POP	BC			; RESTORE LOOP CONTROL
-	LD	DE,CEN_CFGSIZ		; SIZE OF CFG ENTRY
+	LD	DE,LPT_CFGSIZ		; SIZE OF CFG ENTRY
 	ADD	IY,DE			; BUMP IY TO NEXT ENTRY
-	DJNZ	CEN_INIT1		; LOOP TILL DONE
+	DJNZ	LPT_INIT1		; LOOP TILL DONE
 ;
 	XOR	A			; SIGNAL SUCCESS
 	RET				; DONE
 ;
 ; DRIVER FUNCTION TABLE
 ;
-CEN_FNTBL:
-	.DW	CEN_IN
-	.DW	CEN_OUT
-	.DW	CEN_IST
-	.DW	CEN_OST
-	.DW	CEN_INITDEV
-	.DW	CEN_QUERY
-	.DW	CEN_DEVICE
-#IF (($ - CEN_FNTBL) != (CIO_FNCNT * 2))
-	.ECHO	"*** INVALID CEN FUNCTION TABLE ***\n"
+LPT_FNTBL:
+	.DW	LPT_IN
+	.DW	LPT_OUT
+	.DW	LPT_IST
+	.DW	LPT_OST
+	.DW	LPT_INITDEV
+	.DW	LPT_QUERY
+	.DW	LPT_DEVICE
+#IF (($ - LPT_FNTBL) != (CIO_FNCNT * 2))
+	.ECHO	"*** INVALID LPT FUNCTION TABLE ***\n"
 	!!!	; FORCE AN ASSEMBLY ERROR
 #ENDIF
 ;
 ; BYTE INTPUT
 ;
-CEN_IN:
+LPT_IN:
 	; INPUT NOT SUPPORTED - RETURN NULL BYTE
 	LD	E,0			; NULL BYTE
 	XOR	A			; SIGNAL SUCCESS
@@ -133,20 +133,19 @@ CEN_IN:
 ;
 ; BYTE OUTPUT
 ;
-CEN_OUT:
-	CALL	CEN_OST			; READY TO SEND?
-	JR	Z,CEN_OUT		; LOOP IF NOT
-	; *** ADD CODE TO OUTPUT BYTE ***
+LPT_OUT:
+	CALL	LPT_OST			; READY TO SEND?
+	JR	Z,LPT_OUT		; LOOP IF NOT
 	LD	A,(IY+3)
 	LD	C,A			; PORT 0 (DATA)
  	OUT	(C),E			; OUTPUT DATA TO PORT
- 	call 	DELAY   		; ignore anything back after a reset
-        ld      A,%00001101             ; select & strobe, LEDS OFF
+ 	CALL 	DELAY   		; IGNORE ANYTHING BACK AFTER A RESET
+        LD      A,%00001101             ; SELECT & STROBE, LEDS OFF
 	INC 	C 			; PUT CONTROL PORT IN C
 	INC 	C
         OUT	(C),A			; OUTPUT DATA TO PORT
-  	call 	DELAY   		; ignore anything back after a reset
-        ld      A,%00001100             ; select, LEDS OFF
+  	CALL 	DELAY   		; IGNORE ANYTHING BACK AFTER A RESET
+        LD      A,%00001100             ; SELECT, LEDS OFF
         OUT	(C),A			; OUTPUT DATA TO PORT
 
 	XOR	A			; SIGNAL SUCCESS
@@ -154,14 +153,14 @@ CEN_OUT:
 ;
 ; INPUT STATUS
 ;
-CEN_IST:
+LPT_IST:
 	; INPUT NOT SUPPORTED - RETURN NOT READY
 	XOR	A			; ZERO BYTES AVAILABLE
 	RET				; DONE
 ;
 ; OUTPUT STATUS
 ;
-CEN_OST:
+LPT_OST:
 	LD	A,(IY+3)
 	LD	C,A			; PORT 0 (DATA)
 	INC 	C			; SELECT STATUS PORT
@@ -171,16 +170,16 @@ CEN_OST:
 ;
 ; INITIALIZE DEVICE
 ;
-CEN_INITDEV:
+LPT_INITDEV:
 	HB_DI				; AVOID CONFLICTS
-	CALL	CEN_INITDEVX		; DO THE REAL WORK
+	CALL	LPT_INITDEVX		; DO THE REAL WORK
 	HB_EI				; INTS BACK ON
 	RET				; DONE
 ;
 ; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY
 ; PREINIT ABOVE.  PREINIT IS NOT ALLOWED TO ENABLE INTS!
 ;
-CEN_INITDEVX:
+LPT_INITDEVX:
 	LD	A,(IY+3)
 	LD	C,A			; PORT 0 (DATA)
 	XOR	A			; CLEAR ACCUM
@@ -197,7 +196,7 @@ CEN_INITDEVX:
 ;
 ;
 ;
-CEN_QUERY:
+LPT_QUERY:
 	LD	E,(IY+4)		; FIRST CONFIG BYTE TO E
 	LD	D,(IY+5)		; SECOND CONFIG BYTE TO D
 	XOR	A			; SIGNAL SUCCESS
@@ -205,8 +204,8 @@ CEN_QUERY:
 ;
 ;
 ;
-CEN_DEVICE:
-	LD	D,CIODEV_CEN		; D := DEVICE TYPE
+LPT_DEVICE:
+	LD	D,CIODEV_LPT		; D := DEVICE TYPE
 	LD	E,(IY)			; E := PHYSICAL UNIT
 	LD	C,$40			; C := DEVICE TYPE, 0x40 IS PIO
 	LD	H,(IY+1)		; H := MODE
@@ -214,62 +213,71 @@ CEN_DEVICE:
 	XOR	A			; SIGNAL SUCCESS
 	RET
 ;
-; CEN DETECTION ROUTINE
+; LPT DETECTION ROUTINE
 ;
-CEN_DETECT:
+LPT_DETECT:
 	LD	A,(IY+3)		; BASE PORT ADDRESS
-	ADD	A,2			; USE PORT 2 FOR DETECT
 	LD	C,A			; PUT IN C FOR I/O
-	CALL	CEN_DETECT2		; CHECK IT
-	JR	Z,CEN_DETECT1		; FOUND IT, RECORD IT
-	LD	A,CEN_NONE		; NOTHING FOUND
+	CALL	LPT_DETECT2		; CHECK IT
+	JR	Z,LPT_DETECT1		; FOUND IT, RECORD IT
+	LD	A,LPT_NONE		; NOTHING FOUND
 	RET				; DONE
 ;
-CEN_DETECT1:
-	; CEN FOUND, RECORD IT
-	LD	A,CEN_MBC		; RETURN CHIP TYPE
+LPT_DETECT1:
+	; LPT FOUND, RECORD IT
+	LD	A,LPT_IBM		; RETURN CHIP TYPE
 	RET				; DONE
 ;
-CEN_DETECT2:
-	; LOOK FOR CEN AT PORT ADDRESS IN C
-	XOR	A			; DEFAULT VALUE
+LPT_DETECT2:
+	; LOOK FOR LPT AT BASE PORT ADDRESS IN C
+	INC	C			; PORT C FOR I/O
+	INC	C			; ...
+	XOR	A			; DEFAULT VALUE (TRI-STATE OFF)
 	OUT	(C),A			; SEND IT
-	IN	A,(C)			; READ IT
-	AND	%11000000		; ISOLATE STATUS BITS
-	CP	%00000000		; CORRECT VALUE?
-	RET	NZ			; IF NOT, RETURN
-	LD	A,%11000000		; STATUS BITS ON (LEDS OFF)
+;
+	;IN	A,(C)			; READ IT
+	;AND	%11000000		; ISOLATE STATUS BITS
+	;CP	%00000000		; CORRECT VALUE?
+	;RET	NZ			; IF NOT, RETURN
+	;LD	A,%11000000		; STATUS BITS ON (LEDS OFF)
+	;OUT	(C),A			; SEND IT
+	;IN	A,(C)			; READ IT
+	;AND	%11000000		; ISOLATE STATUS BITS
+	;CP	%11000000		; CORRECT VALUE?
+;
+	DEC	C			; BACK TO BASE PORT
+	DEC	C			; ...
+	LD	A,$A5			; TEST VALUE
 	OUT	(C),A			; SEND IT
-	IN	A,(C)			; READ IT
-	AND	%11000000		; ISOLATE STATUS BITS
-	CP	%11000000		; CORRECT VALUE?
+	IN	A,(C)			; READ IT BACK
+	CP	$A5			; CORRECT?
 	RET				; RETURN (ZF SET CORRECTLY)
 ;
 ;
 ;
-CEN_PRTCFG:
+LPT_PRTCFG:
 	; ANNOUNCE PORT
 	CALL	NEWLINE			; FORMATTING
-	PRTS("CEN$")			; FORMATTING
+	PRTS("LPT$")			; FORMATTING
 	LD	A,(IY)			; DEVICE NUM
 	CALL	PRTDECB			; PRINT DEVICE NUM
 	PRTS(": IO=0x$")		; FORMATTING
 	LD	A,(IY+3)		; GET BASE PORT
 	CALL	PRTHEXBYTE		; PRINT BASE PORT
 
-	; PRINT THE CEN TYPE
+	; PRINT THE LPT TYPE
 	CALL	PC_SPACE		; FORMATTING
-	LD	A,(IY+1)		; GET CEN TYPE BYTE
+	LD	A,(IY+1)		; GET LPT TYPE BYTE
 	RLCA				; MAKE IT A WORD OFFSET
-	LD	HL,CEN_TYPE_MAP		; POINT HL TO TYPE MAP TABLE
+	LD	HL,LPT_TYPE_MAP		; POINT HL TO TYPE MAP TABLE
 	CALL	ADDHLA			; HL := ENTRY
 	LD	E,(HL)			; DEREFERENCE
 	INC	HL			; ...
 	LD	D,(HL)			; ... TO GET STRING POINTER
 	CALL	WRITESTR		; PRINT IT
 ;
-	; ALL DONE IF NO CEN WAS DETECTED
-	LD	A,(IY+1)		; GET CEN TYPE BYTE
+	; ALL DONE IF NO LPT WAS DETECTED
+	LD	A,(IY+1)		; GET LPT TYPE BYTE
 	OR	A			; SET FLAGS
 	RET	Z			; IF ZERO, NOT PRESENT
 ;
@@ -280,41 +288,41 @@ CEN_PRTCFG:
 ;
 ;
 ;
-CEN_TYPE_MAP:
-		.DW	CEN_STR_NONE
-		.DW	CEN_STR_MBC
+LPT_TYPE_MAP:
+		.DW	LPT_STR_NONE
+		.DW	LPT_STR_IBM
 ;
-CEN_STR_NONE	.DB	"<NOT PRESENT>$"
-CEN_STR_MBC	.DB	"MBC$"
+LPT_STR_NONE	.DB	"<NOT PRESENT>$"
+LPT_STR_IBM	.DB	"IBM$"
 ;
 ; WORKING VARIABLES
 ;
-CEN_DEV		.DB	0		; DEVICE NUM USED DURING INIT
+LPT_DEV		.DB	0		; DEVICE NUM USED DURING INIT
 ;
-; CEN DEVICE CONFIGURATION TABLE
+; LPT DEVICE CONFIGURATION TABLE
 ;
-CEN_CFG:
+LPT_CFG:
 ;
-CEN0_CFG:
-	; CEN MODULE A CONFIG
+LPT0_CFG:
+	; LPT MODULE A CONFIG
 	.DB	0			; DEVICE NUMBER (SET DURING INIT)
-	.DB	0			; CEN TYPE (SET DURING INIT)
+	.DB	0			; LPT TYPE (SET DURING INIT)
 	.DB	0			; MODULE ID
-	.DB	CEN0BASE		; BASE PORT
+	.DB	LPT0BASE		; BASE PORT
 	.DW	0			; LINE CONFIGURATION
 ;
-CEN_CFGSIZ	.EQU	$ - CEN_CFG	; SIZE OF ONE CFG TABLE ENTRY
+LPT_CFGSIZ	.EQU	$ - LPT_CFG	; SIZE OF ONE CFG TABLE ENTRY
 ;
-#IF (CENCNT >= 2)
+#IF (LPTCNT >= 2)
 ;
-CEN1_CFG:
-	; CEN MODULE B CONFIG
+LPT1_CFG:
+	; LPT MODULE B CONFIG
 	.DB	0			; DEVICE NUMBER (SET DURING INIT)
-	.DB	0			; CEN TYPE (SET DURING INIT)
+	.DB	0			; LPT TYPE (SET DURING INIT)
 	.DB	1			; MODULE ID
-	.DB	CEN1BASE		; BASE PORT
+	.DB	LPT1BASE		; BASE PORT
 	.DW	0			; LINE CONFIGURATION
 ;
 #ENDIF
 ;
-CEN_CFGCNT	.EQU	($ - CEN_CFG) / CEN_CFGSIZ
+LPT_CFGCNT	.EQU	($ - LPT_CFG) / LPT_CFGSIZ

Source/HBIOS/md.asm

@@ -157,9 +157,7 @@ MD_FNTBL:
 MD_VERIFY:
 MD_FORMAT:
 MD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;
@@ -182,9 +180,7 @@ MD_CAP:					; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM
 	JR	Z,MD_CAP0		; UNIT 0
 	DEC	A			; TRY UNIT 1
 	JR	Z,MD_CAP1		; UNIT 1
-	CALL	SYSCHK			; INVALID UNIT
-	LD	A,ERR_NOUNIT
-	OR	A
+	SYSCHKERR(ERR_NOUNIT)		; INVALID UNIT
 	RET
 MD_CAP0:
 	LD	A,(HCB + HCB_RAMBANKS)	; POINT TO RAM BANK COUNT

Source/HBIOS/pio.asm

@@ -221,7 +221,7 @@ PIO_PROBE2:
 	RET
 ;
 PIO_PROBECHIP:
-	; PIO IS HRD TO DETECT DEFINITIVELY.  BEST I CAN THINK
+	; PIO IS HARD TO DETECT DEFINITIVELY.  BEST I CAN THINK
 	; OF IS TO CHECK THE VALUE READ FROM THE CONTROL PORT.
 	; IT APPEARS TO BE ZERO CONSISTENTLY IF CHIP EXISTS.
 	IN	A,(C)			; GET VALUE

Source/HBIOS/pio_ps.asm

@@ -605,7 +605,7 @@ PIOMIVT(PIO3IN,PI3_IST,PRTTAB+3)
 #DEFCONT ;\
 #DEFCONT ;	WAIT FOR SPACE FOR THE CHARACTER\
 #DEFCONT ;	IF WE ARE WAITING FOR A		\
-#DEFCONT ;	CHARACTRE THEN OUTPUT IT NOW	\
+#DEFCONT ;	CHARACTER THEN OUTPUT IT NOW	\
 #DEFCONT ;	OTHERWISE STORE IT UNTIL THE	\
 #DEFCONT ;	INTERRUPT CALLS FOR IT		\
 #DEFCONT ;\

Source/HBIOS/ppide.asm

@@ -470,9 +470,7 @@ PPIDE_FNTBL:
 PPIDE_VERIFY:
 PPIDE_FORMAT:
 PPIDE_DEFMED:
-	CALL	SYSCHK			; NOT IMPLEMENTED
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; NOT IMPLEMENTED
 	RET
 ;
 ;
@@ -1273,16 +1271,29 @@ PPIDE_INITDEV00:
 ;
 	LD	(IY+PPIDE_MED),0	; CLEAR MEDIA FLAGS
 ;
-	; DETERMINE IF CF DEVICE
-	LD	HL,HB_WRKBUF		; FIRST WORD OF IDENTIFY DATA HAS CF FLAG
-	LD	A,$8A			; FIRST BYTE OF MARKER IS $8A
-	CP	(HL)			; COMPARE
-	JR	NZ,PPIDE_INITDEV1	; IF NO MATCH, NOT CF
-	INC	HL
-	LD	A,$84			; SECOND BYTE OF MARKER IS $84
-	CP	(HL)			; COMPARE
-	JR	NZ,PPIDE_INITDEV1	; IF NOT MATCH, NOT CF
-	SET	0,(IY+PPIDE_MED)	; SET FLAGS BIT FOR CF MEDIA
+	; DETERMINE IF CF DEVICE BY TESTING FOR CF CARD SIGNATURES
+	; IN THEORY, THERE ARE SOME OTHER POSSIBLE VARIATIONS, BUT
+	; THEY ARE NOT RECOMMENDED BY THE CF CARD SPEC AND MIGHT
+	; OVERLAP WITH "REAL" HARD DISK SIGNATURES.  I HAVE NEVER
+	; SEEN A CF CARD THAT DID NOT USE ONE OF THE BELOW.
+	; CREDIT TO LASZLO SZOLNOKI 
+	LD	BC,$848A		; STANDARD CF CARD SIGNATURE
+	CALL	PPIDE_INITDEV000	; TEST & SET
+	LD	BC,$044A		; ALT SIG FOR NON-REMOVABLE
+	CALL	PPIDE_INITDEV000	; TEST & SET
+	LD	BC,$0040		; ALT SIG FOR NON-REMOVABLE
+	CALL	PPIDE_INITDEV000	; TEST & SET
+	JR	PPIDE_INITDEV1		; CONTINUE INIT
+;
+PPIDE_INITDEV000:
+	; CHECK IF FIRST WORD OF IDENTIFY DATA MATCHES VALUE IN BC
+	; AND SET CF FLAG IF SO
+	LD	HL,(HB_WRKBUF)		; FIRST WORD OF IDENTIFY DATA
+	OR	A			; CLEAR CARRY
+	SBC	HL,BC			; COMPARE
+	RET	NZ			; ABORT IF NOT EQUAL
+	SET	0,(IY+PPIDE_MED)	; ELSE SET FLAGS BIT FOR CF MEDIA
+	RET				; AND RETURN
 ;
 PPIDE_INITDEV1:
 	; DETERMINE IF LBA CAPABLE

Source/HBIOS/ppp.asm

@@ -338,9 +338,7 @@ PPPCON_OST:
 ;
 ;
 PPPCON_INITDEV:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ;
@@ -504,9 +502,7 @@ PPPSD_FNTBL:
 PPPSD_VERIFY:
 PPPSD_FORMAT:
 PPPSD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/prp.asm

@@ -211,9 +211,7 @@ PRPCON_OST1:
 ;
 ;
 PRPCON_INITDEV:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ;
@@ -401,9 +399,7 @@ PRPSD_FNTBL:
 PRPSD_VERIFY:
 PRPSD_FORMAT:
 PRPSD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/rf.asm

@@ -138,9 +138,7 @@ RF_FNTBL:
 RF_VERIFY:
 RF_FORMAT:
 RF_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/rp5rtc.asm

@@ -159,9 +159,7 @@ RP5RTC_DISPATCH:
 	JP	Z,RP5RTC_SETALM		; SET ALARM
 	DEC	A
 	JP	Z,RP5RTC_DEVICE		; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A, ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; RTC GET NVRAM BYTE
@@ -240,9 +238,7 @@ RP5RTC_GETBLK:
 RP5RTC_SETBLK:
 RP5RTC_GETALM:
 RP5RTC_SETALM:
-	LD	A, ERR_NOTIMPL
-	CALL	SYSCHK
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME

Source/HBIOS/sd.asm

@@ -128,6 +128,7 @@ SD_CLK		.EQU	%00000010	; RTC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; RTC:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%10000000	; RTC:7 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -143,6 +144,7 @@ SD_CLK		.EQU	%00000010	; RTC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; RTC:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%01000000	; RTC:6 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -156,6 +158,7 @@ SD_CS0		.EQU	%00000100	; RTC:2 IS SELECT
 SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -174,6 +177,7 @@ SD_CLK		.EQU	%00000010	; PPIC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; PPIC:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%10000000	; PPIB:7 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_PPIBASE	; IOBASE
+SD_INVCS	.EQU	TRUE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_UART)
@@ -187,6 +191,7 @@ SD_CLK		.EQU	%00000100	; UART MCR:2 IS CLOCK
 SD_DI		.EQU	%00000001	; UART MCR:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%00100000	; UART MSR:5 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	UARTIOB		; IOBASE
+SD_INVCS	.EQU	TRUE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_DSD)		; DUAL SD
@@ -201,6 +206,7 @@ SD_CLK		.EQU	%00000010	; RTC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; RTC:6 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%00000001	; RTC:0 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_MK4)		; MARK IV (CSIO STYLE INTERFACE)
@@ -211,6 +217,7 @@ SD_CS0		.EQU	%00000100	; SELECT ACTIVE
 SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_SC)		; SC
@@ -223,6 +230,7 @@ SD_CS1		.EQU	%00001000	; RTC:3 IS SELECT FOR SECONDARY SPI CARD
 SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	TRUE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -270,6 +278,30 @@ SD_CS0		.EQU	%00100000	; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
 SD_CS1		.EQU	%00010000	; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
   #ENDIF
 SD_IOBASE	.EQU	SD_BASE		; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
+#ENDIF
+;
+;
+#IF (SDMODE == SDMODE_USR)		; USER DEFINED HARDWARE CONFIGURATION
+;
+; THIS MODE IS INTENDED TO ALLOW A USER TO EASILY CONFIGURE A CUSTOM
+; SD CARD INTERFACE.  IT IS NOT YET COMPLETE OR TESTED AND PROBABLY DOES
+; NOT YET WORK.
+;
+SD_DEVMAX	.EQU	2		; NUMBER OF PHYSICAL UNITS (SOCKETS)
+SD_IOBASE	.EQU	$01		; IO BASE ADDRESS FOR SD INTERFACE
+SD_OPRREG	.EQU	SD_IOBASE	; OUTPUT PORT (OUTPUT: CS, CLK, DIN)
+SD_OPRDEF	.EQU	%00000101	; OUTPUT PORT DEFAULT STATE
+SD_OPRMSK	.EQU	%00001111	; OUTPUT PORT MASK
+SD_INPREG	.EQU	SD_IOBASE	; INPUT REGISTER
+SD_CS0		.EQU	%00001000	; SELECT
+SD_CLK		.EQU	%00000100	; CLOCK
+SD_DI		.EQU	%00000010	; DATA IN (CARD <- CPU) MOSI
+SD_DO		.EQU	%00000001	; DATA OUT (CARD -> CPU) MISO
+SD_CINIT	.EQU	TRUE		; INITIALIZE OUTPUT PORT
+SD_DDR		.EQU	$03		; DATA DIRECTION REGISTER
+SD_DDRVAL	.EQU	%00001101	; DATA DIRECTION REGISTER VALUE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 #ENDIF
 ;
 #IF (SD_DEVCNT > SD_DEVMAX)
@@ -477,6 +509,13 @@ SD_INIT:
 	LD	A,SD_BASE
 	CALL	PRTHEXBYTE
 #ENDIF
+;
+#IF (SDMODE == SDMODE_USR)
+	PRTS(" MODE=USER$")
+	PRTS(" IO=0x$")
+	LD	A,SD_IOBASE
+	CALL	PRTHEXBYTE
+#ENDIF
 ;
 	CALL	SD_PROBE		; CHECK FOR HARDWARE
 	JR	Z,SD_INIT00		; CONTINUE IF PRESENT
@@ -710,9 +749,7 @@ SD_FNTBL:
 SD_VERIFY:
 SD_FORMAT:
 SD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;
@@ -1131,7 +1168,9 @@ SD_INITCARD5:
 	JR	SD_INITCARD6		; HANDLE MMC OR SDSC
 ;	
 SD_INITCARD5A:
-	CALL	SYSCHK
+	PUSH	AF
+	SYSCHKERR(ERR_NOMEDIA)
+	POP	AF
 	JP	SD_NOMEDIA
 ;
 ; CAPACITY CALCULATION FOR MMC OR SDSC (V1) CARDS:
@@ -1695,6 +1734,22 @@ SD_SETUP:
 	LD	(SD_OPRVAL),A		; RECORD THE WORKING VALLUE
 	OUT	(SD_OPRREG),A		; OPRREG == SIO_MCR
 #ENDIF
+;
+#IF (SDMODE == SDMODE_USR)
+  #IF (SD_CINIT == TRUE)
+	LD	A,(SD_OPRMSK)		; GET OUTPUT PORT MASK
+	CPL				; INVERT ACCUMULATOR
+	LD	C,A			; SAVE IT FOR LATER
+	LD	A,(SD_DDR)		; GET DATA DIRECTION REGISTER VALUE
+	AND	C			; ZERO ALL INTERESTING BITS
+	OR	(SD_DDRVAL)		; ADD OUR VALUE
+	LD	(SD_DDR),A		; WRITE IT
+  #ENDIF
+;
+	LD	A,SD_OPRDEF
+	LD	(SD_OPRVAL),A
+	OUT	(SD_OPRREG),A
+#ENDIF
 ;
 	XOR	A
 	RET
@@ -1766,7 +1821,8 @@ SD_SELECT1:
 ;
 SD_SELECT2:
 ; ADJUST BIT(S) FOR INTERFACES USING INVERTED CS BITS
-#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
+;#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
+#IF (SD_INVCS)
   #IF ((SDMODE == SDMODE_SC) & (SD_DEVCNT > 1))
 	XOR	SD_CS0 | SD_CS1
   #ELSE

Source/HBIOS/simrtc.asm

@@ -55,9 +55,7 @@ SIMRTC_DISPATCH:
 	JP	Z,SIMRTC_SETALM	; SET ALARM 
 	DEC	A
 	JP	Z,SIMRTC_DEVICE	; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
@@ -68,9 +66,7 @@ SIMRTC_GETBLK:
 SIMRTC_SETBLK:
 SIMRTC_GETALM:
 SIMRTC_SETALM:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME

Source/HBIOS/sio.asm

@@ -843,9 +843,7 @@ SIO_INITGO:
 	LD	L,SIO1_VEC		; ASSUME CHIP 1
 	DEC	A			; CHIP 1?
 	JR	Z,SIO_INITIVT		; IF SO, DO IT
-	CALL 	SYSCHK			; IMPOSSIBLE SITUATION
-	LD	A,ERR_NOUNIT
-	OR	A
+	SYSCHKERR(ERR_NOUNIT)		; IMPOSSIBLE SITUATION
 	RET
 SIO_INITIVT:
 	LD	A,L			; VALUE TO A