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145 Commits

Author SHA1 Message Date
Wayne Warthen
3f23396536 Support for MG014 RCBus Parallel Port Module 2023-05-10 18:37:47 -07:00
Wayne Warthen
c628ba10f2 Workaround Z280 CPU Bug for LZSA2
The LZSA2 decompressor invoked a known Z280 CPU bug.  A small modification to the code resolves this.
2023-05-07 17:45:43 -07:00
Wayne Warthen
9358299f14 Z280 Workaround for VGARC
Z280 is having an issue with OTDR instruction when loading the font for VGARC.  For now, the use of OTDR has been eliminated.
2023-05-07 16:27:25 -07:00
Wayne Warthen
d445c4a015 Disable LZSA Compression for Z280
- The LZSA2 decompressor code is failing mysteriously on Z280 CPUs.  I have simply disabled it in the Z280 primary configuration file.
2023-05-04 14:14:36 -07:00
Wayne Warthen
e32002545b VGARC Improvements, Doc Fix
- Added ability to enable VGARC and front panel in default config without I/O conflicts (does **not** support having both types of hardware present at the same time).
- Fixed documentation error in issue #345 reported by @MorfeoMatrixx.
2023-05-03 15:58:12 -07:00
Wayne Warthen
7ac88efac1 Support for VGARC
Initial support for Bill Shen's VGARC video/keyboard module for RCBus.
2023-05-02 19:23:51 -07:00
Wayne Warthen
9f71fe05aa Cleanup IDE and PPIDE drivers
- The use of hardware reset has been improved such that it is generally only used at initial boot up.
- Minor improvements to CF card detection and initialization.
- Implement a simple wait mechanism to accommodate the startup time of the RC2014 SD Pico module.
- Front panel I/O port for SC series of systems has been moved to 0x00 which is consistent with all other systems and avoids some I/O conflicts.
2023-04-30 12:03:16 -07:00
Wayne Warthen
ad3c533145 Fix IDE Detection on Spinning Disks
Prior improvement to IDE device detection broke detection of spinning hard disks.  IDE registers cannot be used prior to device init completion (spin up).  Not a problem for CF, but special steps required to ensure devices are fully initialized before register testing.
2023-04-23 18:47:43 -07:00
Wayne Warthen
e43a939f54 Improve IDE Device Detection
Per issue #343, some systems could initially detect a non-existent IDE device which would cause a long time-out.  This should resolve the issue.
2023-04-21 17:08:18 -07:00
Wayne Warthen
e5b7409f44 Support Per-floppy Device Drive Types
- Floppy devices are now configured per-device so that each floppy drive can be different (e.g., first floppy is 3.5" and second floppy is 5.25").
- Removed need to use termination signal on floppy sector I/O.

Addresses issue #318
2023-04-20 16:24:14 -07:00
Wayne Warthen
9100f199b1 Z80-Retro SD Card Support (Alan Cox) 2023-04-18 11:40:22 -07:00
Wayne Warthen
bcc50a31a9 Fix SIO Ports in Z80R Mode 2023-04-17 19:22:37 -07:00
Wayne Warthen
c891ba2bad Support Z80-Retro Platform
Code provided by Alan Cox
2023-04-16 20:30:16 -07:00
Wayne Warthen
2f9e77ca13 Merge branch 'dev' of https://github.com/wwarthen/RomWBW into dev 2023-04-14 19:05:49 -07:00
Wayne Warthen
f346209c82 Front Panel Switch Support 2023-04-14 19:05:37 -07:00
Wayne Warthen
0742fb6188 Merge pull request #342 from wwarthen/master
Merge pull request #340 from wwarthen/dev
2023-04-14 19:00:02 -07:00
Wayne Warthen
94239866a5 Merge pull request #340 from wwarthen/dev
Dev
2023-04-14 18:29:17 -07:00
Wayne Warthen
2681b84a20 Finalize v3.2.1 2023-04-14 18:10:24 -07:00
Wayne Warthen
b5437c56e9 Suppress Serial HFC During Boot
If serial hardware flow control is enabled, but not working, then a system will appear dead because it won't send any data to the host computer.  This change suppresses hardware flow control during boot just to ensure that boot messages can make it to the serial console.  This will only be effective for serial interfaces that support dynamic management of HFC.
2023-04-11 13:09:22 -07:00
Wayne Warthen
f640630a06 CPU Speed Calc Tweek
- Exit CPU speed detection routine earlier if the clock is not ticking.
- Fix minor regression in the SBC_simh.asm config file.
2023-04-10 16:20:12 -07:00
Wayne Warthen
53e201bd28 Handle Overflow in CPUSPD
Edge case where the CPU speed detection routine would overflow in a fast emulator and return a speed of 0.000 MHz.  Modified to fail back to the default CPU speed from the config file if an overflow occurs.
2023-04-09 12:48:36 -07:00
Wayne Warthen
51d962aeab Finalize v3.2.1 2023-04-07 10:22:46 -07:00
Wayne Warthen
5f36cf9a12 Fix TUNE Delay Factor Handling 2023-04-03 13:44:52 -07:00
Wayne Warthen
d812066f2e Update Z80 Tests
Update Z80 CPU instruction test suite to v1.2.
2023-03-29 15:46:46 -07:00
Wayne Warthen
7563863be2 DOS/65 Refresh
- Refresh WIP files of DOS/65 from Dan Werner
- Another tweak to SURVEY
- Regen PDF docs
2023-03-27 14:44:54 -07:00
Wayne Warthen
9654d487ba Merge pull request #338 from b1ackmai1er/dev
VGMPLAY documentation and YM2151 support
2023-03-27 14:14:14 -07:00
b1ackmai1er
5b339aef3e Update vgmplay.txt 2023-03-27 23:39:26 +08:00
b1ackmai1er
47a7d81bb9 Update Applications.md
Add basic VGMPLAY information
2023-03-27 23:36:24 +08:00
b1ackmai1er
a92c44e53f ym2151 vgm files 2023-03-26 20:43:47 +08:00
b1ackmai1er
cc9f5dd516 Update vgmplay.asm
YM2151 updates
2023-03-26 19:31:52 +08:00
Wayne Warthen
6e34de0e02 Cosmetic
Minor cosmetic changes in source.
2023-03-25 12:05:57 -07:00
Wayne Warthen
5a6d7f853b Update HEXCOM.COM
Renamed HEXCOM.CPM -> HEXCOM.COM.
2023-03-25 11:57:26 -07:00
b1ackmai1er
a646f49866 Merge pull request #52 from wwarthen/dev
Dev
2023-03-24 17:06:35 +08:00
Wayne Warthen
98a33b8b50 CTC & CPU Speed
- Revamped CTC detection algorithm hoping to handle problem XRBR is having
- Fixed typo in dynamic CPU speed test that caused it to not be properly recorded/reported (credit XRBR)
- Allow use of DEL/RUBOUT keys as backspace in ROM Loader and Debug Monitor
2023-03-23 12:54:57 -07:00
Wayne Warthen
8aebaab3fe Fix SURVEY.COM (again)
- Previous fix to SURVEY.COM port survey broke the memory survey.  Everything should be OK now.
- Regenerated documentation.
2023-03-22 16:15:04 -07:00
Wayne Warthen
798d8c3ea3 Merge pull request #337 from wwarthen/master
Sync
2023-03-22 15:58:32 -07:00
Wayne Warthen
bbaf2b0714 Merge pull request #336 from elevendroids/master
Fix default ZETA V2 SBC configuration
2023-03-22 15:57:43 -07:00
Michal Potrzebicz
74a8283bba Fix default ZETA V2 SBC configuration
- Set the default CPUOSC to 8MHz (default value in the project's
  documentation), updated the User Guide
- Set the FDD controller to ZETA2 - regression introduced in bd664c3
2023-03-22 22:37:22 +00:00
Wayne Warthen
e869e55252 Prep v3.2.1 Development Branch 2023-03-21 14:48:28 -07:00
Wayne Warthen
e8a76817dc Merge pull request #335 from wwarthen/master
Catch-up
2023-03-18 20:09:02 -07:00
Wayne Warthen
e839c77844 Merge pull request #332 from wwarthen/dev
Fix Doc URL Path
2023-03-18 19:37:13 -07:00
Wayne Warthen
ada7254b84 Fix Doc URL Path 2023-03-18 19:20:48 -07:00
Wayne Warthen
cd96ea7e26 Merge pull request #331 from wwarthen/dev
Merge Final v3.2
2023-03-18 19:11:38 -07:00
Wayne Warthen
0098540cc9 Finalize 3.2.0 2023-03-18 18:50:46 -07:00
Wayne Warthen
b3e7e2ff62 Doc Updates 2023-03-18 17:57:44 -07:00
Wayne Warthen
582937de8e Merge branch 'dev' of https://github.com/wwarthen/RomWBW into dev 2023-03-18 17:13:01 -07:00
Wayne Warthen
5f5953edd8 Doc Tweaks 2023-03-18 17:12:46 -07:00
Wayne Warthen
50cd6ff955 Merge pull request #330 from b1ackmai1er/dev
Update dma.asm
2023-03-17 17:33:23 -07:00
Wayne Warthen
82c53bd20b Update to Small Computer Z50 Configurations
- Improve adherence to Z50 standard.
2023-03-17 15:53:58 -07:00
b1ackmai1er
0d0f5fb182 Update dma.asm
cp/m fails to boot with the dma driver included but no dma hardware installed. This is because the default "dma_fail_flag" indicates that the dma is good to go. But in safe mode the dma initialization never takes place to find no dma and set this flag, so the memory driver hangs. This change is to make the default status of the flag the failed state so the memory driver will fallback to software in recovery mode.
2023-03-18 02:13:00 +08:00
Wayne Warthen
3773c9c7fa Regen Docs
Regenerate pdf files based on Phil's updates.
2023-03-17 11:04:31 -07:00
Wayne Warthen
b7dc67b9c7 Merge pull request #329 from b1ackmai1er/dev
Update SystemGuide.md
2023-03-17 10:44:52 -07:00
b1ackmai1er
76c4209a5e Update ReadMe.md 2023-03-17 20:49:46 +08:00
b1ackmai1er
76d9a99758 Update SystemGuide.md 2023-03-17 20:15:55 +08:00
b1ackmai1er
1db858027e Update ROM_Applications.md
spelling and grammar
2023-03-17 20:11:14 +08:00
b1ackmai1er
d3fb3710ff Update UserGuide.md 2023-03-17 20:05:57 +08:00
b1ackmai1er
170cecd112 Update UserGuide.md 2023-03-17 20:04:12 +08:00
b1ackmai1er
f469699449 Update UserGuide.md
Spelling
2023-03-17 19:58:46 +08:00
b1ackmai1er
c4ff7315c9 Update Applications.md
Spelling corrections.
2023-03-17 19:20:14 +08:00
b1ackmai1er
ddbd338b6f Update SystemGuide.md
Spelling and grammer fixes
2023-03-17 19:02:38 +08:00
Wayne Warthen
77c6f934dc More Documentation Cleanup 2023-03-16 20:48:49 -07:00
Wayne Warthen
f72bf4e4c5 Documentation Cleanup 2023-03-16 16:23:14 -07:00
Wayne Warthen
dcc6bd2b62 Documentation Cleanup 2023-03-16 16:22:04 -07:00
Wayne Warthen
01fac79902 Merge pull request #328 from b1ackmai1er/dev
Some driver documentation updates and corrections
2023-03-15 10:56:26 -07:00
b1ackmai1er
70d3f54834 Some driver documentation updates and corrections 2023-03-15 20:57:51 +08:00
b1ackmai1er
650dcdb35f Merge pull request #51 from wwarthen/dev
Dev
2023-03-15 20:07:46 +08:00
Wayne Warthen
b27e14826a Allow Inaccurate CTC Divisor for Tick Frequency
See Issue #327.  This change makes an inaccurate CTC divisor a warning instead of an error.  Credit to Phillip Summers.
2023-03-14 12:53:15 -07:00
Wayne Warthen
d2b9333288 Merge pull request #326 from b1ackmai1er/dev
uart4 writing to port when not enabled. dmamon updates
2023-03-14 11:58:27 -07:00
b1ackmai1er
cbd60d02d9 Merge pull request #50 from wwarthen/dev
Dev
2023-03-14 20:49:19 +08:00
b1ackmai1er
93a1eade2a Update uart.asm
Make sure when UART4 is disabled, that the driver does not access the UART4 I/O ports.
2023-03-14 19:21:08 +08:00
Wayne Warthen
5073a9c506 Fix for Issue #324 ZPM Named Directory Handling Error
Credit to Jose Luis for discovering this bug and bringing it to my attention.  The fix is a small patch on top of the patches previously applied from Jon Saxton.  See the ZPM3 directory in Sources for  more information.
2023-03-12 21:02:08 -07:00
Wayne Warthen
86f8df03b6 Update release.yml 2023-03-11 15:13:36 -08:00
b1ackmai1er
a7ef76b9c4 Update dmamon.asm 2023-03-11 10:51:21 +08:00
Wayne Warthen
0a6719cf24 Minor Doc Updates 2023-03-10 16:33:05 -08:00
Wayne Warthen
0b0f68d579 GitHub Automation Tweaks 2023-03-10 14:55:27 -08:00
Wayne Warthen
c2d58ebe3a GitHub Automation Updates 2023-03-10 14:42:27 -08:00
Wayne Warthen
894898a75d Merge pull request #323 from wwarthen/master
Catch Up w/ Master Branch
2023-03-09 14:50:39 -08:00
Wayne Warthen
5da1f70b6c Update release.yml 2023-03-09 14:36:22 -08:00
Wayne Warthen
15e90c628a Update FLASH.DOC 2023-03-09 14:31:27 -08:00
Wayne Warthen
bc0d1ed5e8 Update release.yml 2023-03-08 16:15:15 -08:00
Wayne Warthen
fa12858bd3 Minor 2023-03-07 13:08:35 -08:00
Wayne Warthen
2f733ff1aa Merge pull request #322 from b1ackmai1er/dev
DMA updates
2023-03-07 12:39:16 -08:00
b1ackmai1er
ee0369c553 Update dmamon.asm 2023-03-06 17:01:59 +08:00
b1ackmai1er
d17f531d19 Update dmamon.asm 2023-03-06 15:56:44 +08:00
b1ackmai1er
0c4400920c Update dmamon.asm 2023-03-06 15:54:51 +08:00
b1ackmai1er
15b2dcb6b6 Update dbgmon.asm 2023-03-06 15:40:00 +08:00
b1ackmai1er
39f51a9620 Update fdu.doc 2023-03-06 15:32:37 +08:00
b1ackmai1er
632cc0e7db dma updates
Tidy up driver, standardize terminology half/full
Update dmamon so port address is not hardcoded.
2023-03-06 15:26:56 +08:00
Wayne Warthen
f5cb22da8f Minor Cosmetic Cleanup
No functional changes.
2023-03-05 07:10:22 -08:00
Wayne Warthen
7f186df54d Merge pull request #321 from b1ackmai1er/dev
Update dmamon.asm
2023-03-05 07:00:28 -08:00
b1ackmai1er
590f5cff9a Update dmamon.asm
Additional test enhancements
2023-03-05 14:18:04 +08:00
Wayne Warthen
e6908ee259 Merge pull request #320 from b1ackmai1er/dev
Minors
2023-02-26 06:56:45 -08:00
b1ackmai1er
5b7ca9d9e6 Update dmamon.asm
Stripped out all the speed selection stuff added an option for the velesoft datagear.
Speed selection can now be done from the command line. May add it back in later but will use HBIOS function call.
2023-02-26 14:58:32 +08:00
b1ackmai1er
93ac0ba5d0 Update SystemGuide.md
To match hbios
2023-02-26 14:09:49 +08:00
b1ackmai1er
5d3c1e2d4a Update util.asm 2023-02-26 11:42:23 +08:00
b1ackmai1er
f080f5b80a Merge pull request #49 from wwarthen/dev
Config File Fixes
2023-02-26 09:52:19 +08:00
Wayne Warthen
f1382b75ec Config File Fixes
I had accidentally set CRTACT to TRUE in a few standard configs inadvertently.
2023-02-25 12:56:44 -08:00
b1ackmai1er
d175981c71 Merge pull request #48 from wwarthen/dev
Dev
2023-02-24 16:00:37 +08:00
Wayne Warthen
5e42066874 Release Candidate for v3.2 2023-02-23 17:24:07 -08:00
Wayne Warthen
52a41663eb Regen Doc, Bump Version 2023-02-21 14:01:03 -08:00
Wayne Warthen
f0183bdd8a Merge pull request #319 from b1ackmai1er/dev
Update hbios.asm
2023-02-21 13:42:16 -08:00
b1ackmai1er
2398805617 Update HBIOS 2023-02-21 20:44:31 +08:00
b1ackmai1er
08168681b6 Update hbios.asm 2023-02-21 19:37:43 +08:00
b1ackmai1er
fa3874ec45 Update hbios.asm
Device display list improvements
2023-02-20 22:20:33 +08:00
Wayne Warthen
fc634380b0 Merge pull request #317 from b1ackmai1er/dev
vgmplay updates, romldr baud improvements, hbios/cbios low memory handling and other minors
2023-02-19 18:25:52 -08:00
b1ackmai1er
6b84dd36b0 Update vgmplay.asm
Cleanup, move init code so that memory can be reused.
2023-02-19 21:52:11 +08:00
b1ackmai1er
93245434c0 Device display optimizations 2023-02-19 21:47:51 +08:00
b1ackmai1er
06913144f8 Create ay-test.asm
From the archives ...
2023-02-19 18:52:19 +08:00
b1ackmai1er
04947015aa Update config.asm 2023-02-19 15:44:03 +08:00
b1ackmai1er
e7ab778929 Slightly better handling of low HBIOS heap memory
CBIOS reports *** HBIOS Heap Overflow, when the HBIOS is big (i.e. lots of included drivers)

Trigger build failure when CCP will not fit in heap.
Slightly more informative CBIOS error message
2023-02-19 15:42:59 +08:00
b1ackmai1er
147ab2ce4c minors 2023-02-19 13:55:07 +08:00
b1ackmai1er
af2a025cff AY-3-8910 MINORS 2023-02-19 13:06:45 +08:00
b1ackmai1er
2da5ba80ba Merge pull request #47 from wwarthen/dev
Dev
2023-02-19 10:53:10 +08:00
b1ackmai1er
d4700d0cdd Update vgmplay.asm 2023-02-19 10:50:37 +08:00
b1ackmai1er
e2426eff08 Update vgmplay.asm
Resync
2023-02-19 10:47:31 +08:00
Wayne Warthen
2b16617ea3 Fix Missing Files 2023-02-17 19:06:01 -08:00
Wayne Warthen
816234f0fa More Cleanup 2023-02-17 18:07:44 -08:00
b1ackmai1er
d960efdc4d Merge pull request #46 from wwarthen/dev
Dev
2023-02-17 17:57:18 +08:00
Wayne Warthen
bd664c3a1f More Cleanup 2023-02-16 13:59:15 -08:00
Wayne Warthen
dc151ad1a7 Rename PORTSWP -> PORTSCAN 2023-02-16 11:09:05 -08:00
Wayne Warthen
2f3fb51884 More Cleanup
- Tweaks to SURVEY and PORTSWP to improve port detection accuracy and handle Z280 better
- Recover a **lot** of wasted space in dbgmon using a few built-in utility routines instead of entire util.asm
- Improve the (D)evice command in romldr to use the HBIOS routine which is much more complete and saves space
2023-02-15 19:31:05 -08:00
b1ackmai1er
29c7f3a920 Merge pull request #45 from wwarthen/dev
Fix SURVEY.COM (again)
2023-02-15 17:46:24 +08:00
Wayne Warthen
36fe842bec Fix SURVEY.COM (again)
See Issue #316
2023-02-14 18:47:09 -08:00
b1ackmai1er
3a8a503c8e Merge pull request #44 from wwarthen/dev
Dev
2023-02-14 19:12:29 +08:00
b1ackmai1er
975656ef6f Merge pull request #43 from wwarthen/dev
Dev
2023-02-08 18:59:48 +08:00
b1ackmai1er
00158b0107 Merge pull request #42 from wwarthen/dev
Continuing Doc Update
2023-02-06 19:27:27 +08:00
b1ackmai1er
979276e0b5 Merge pull request #41 from wwarthen/dev
Another Iteration of Documentation Updates
2023-01-31 19:38:47 +08:00
b1ackmai1er
8656cf992e Merge pull request #40 from wwarthen/dev
First Round of Clean-up for Stable Release
2023-01-29 11:06:48 +08:00
b1ackmai1er
6dac01102d Merge pull request #39 from wwarthen/dev
Update CF Card Detection
2023-01-22 17:51:11 +08:00
b1ackmai1er
a9173c076b Update ReadMe.txt 2023-01-20 00:37:03 +08:00
b1ackmai1er
8ffe53ea68 Merge pull request #38 from wwarthen/dev
Support Serial Keyboard with Video Displays
2023-01-20 00:34:38 +08:00
b1ackmai1er
83ff343186 Merge pull request #37 from wwarthen/dev
Finalize p-System Implementation
2023-01-17 17:05:23 +08:00
b1ackmai1er
c51963529d Merge pull request #36 from wwarthen/dev
Introducing p-System IV.0 for RomWBW
2023-01-14 21:54:27 +08:00
b1ackmai1er
834f2d7682 Merge pull request #35 from wwarthen/dev
Audio Driver Cleanup
2023-01-10 21:37:21 +08:00
b1ackmai1er
ec5b19acad Merge pull request #34 from wwarthen/dev
Enable WAIT Signal for 9958 Video
2023-01-09 17:50:09 +08:00
b1ackmai1er
3603ef9c9d Update unlzsa2s.asm 2023-01-07 08:02:32 +08:00
b1ackmai1er
3aed60afe2 Merge pull request #33 from wwarthen/dev
Minor IDE/CF/SD Disk Handling Updates
2023-01-06 23:27:14 +08:00
b1ackmai1er
e1e2c2efa9 Update unlzsa2s.asm
ver.07 by spke (04-05/04/2022, 134(-5) bytes, +1% speed, using self-modifying code by default)
2023-01-06 23:24:53 +08:00
b1ackmai1er
55b4e1e26d Use new hbios routine for speed setting. 2023-01-05 20:56:49 +08:00
b1ackmai1er
cb336c9ba5 Update vgmplay.asm
Reorganize and clarify some configuration settings
2023-01-03 19:50:59 +08:00
b1ackmai1er
ad0a6af047 Update romldr.asm
Rorder table to eliminate need for translation
2023-01-03 19:14:34 +08:00
b1ackmai1er
22afb8333c Merge pull request #32 from wwarthen/dev
Dev
2023-01-02 10:27:44 +08:00
Wayne Warthen
25382b01e2 Create CODE_OF_CONDUCT.md 2022-03-25 08:58:41 -07:00
Wayne Warthen
d55587e341 Merge pull request #285 from wwarthen/add-license-1
Create LICENSE
2022-03-25 08:53:48 -07:00
Wayne Warthen
7d9ff0599b Create LICENSE 2022-03-25 08:53:03 -07:00
191 changed files with 9861 additions and 3477 deletions

View File

@@ -3,10 +3,9 @@ name: Commit Build
on:
push:
branches:
- master
- dev
- '**'
tags-ignore:
- v*
- '**'
jobs:
buildLinux:
@@ -14,14 +13,18 @@ jobs:
runs-on: ubuntu-latest
steps:
- uses: rlespinasse/github-slug-action@v4.4.0
- uses: actions/checkout@v3.1.0
- name: Checkout
uses: actions/checkout@v3.3.0
- name: Get Commit Ref
run: |
COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
echo "COMMIT_REF: $COMMIT_REF"
echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
- name: Build
run: |
export TZ='America/Los_Angeles'
sudo apt-get install libncurses-dev
sudo apt-get install srecord
make dist
rm -rf .git*
@@ -35,28 +38,21 @@ jobs:
- name: Upload Artifact
uses: actions/upload-artifact@v3.1.1
with:
name: RomWBW_Linux-${{env.GITHUB_REF_SLUG}}-${{env.GITHUB_SHA_SHORT}}
name: RomWBW-${{env.COMMIT_REF}}-Linux
path: .
- name: Create Package Archive
run: |
zip -r RomWBW-SnapShot-Package.zip .
- name: Post SnapShot
uses: wwarthen/actions/packages/automatic-releases@built-packages
with:
repo_token: "${{ secrets.GITHUB_TOKEN }}"
automatic_release_tag: "SnapShot"
prerelease: true
title: "RomWBW Development SnapShot Build"
files: |
RomWBW-SnapShot-Package.zip
buildMacOS:
runs-on: macOS-12
runs-on: macOS-latest
steps:
- uses: actions/checkout@v3.1.0
- name: Checkout
uses: actions/checkout@v3.3.0
- name: Get Commit Ref
run: |
COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
echo "COMMIT_REF: $COMMIT_REF"
echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
- name: Build
run: |
@@ -74,5 +70,5 @@ jobs:
- name: Upload Artifact
uses: actions/upload-artifact@v3.1.1
with:
name: RomWBW_MacOS
name: RomWBW-${{env.COMMIT_REF}}-MacOS
path: .

View File

@@ -1,8 +1,9 @@
name: Release Build
on:
release:
types: published
push:
tags:
- '**'
jobs:
build:
@@ -10,41 +11,99 @@ jobs:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
- name: Create Package Label
run: |
LABEL=`echo "$GITHUB_REF" | sed "s|^refs/tags/||"`
echo "::set-env name=PKGLBL::$LABEL"
- name: Display Diagnostics
run: |
echo PKGLBL: "$PKGLBL"
echo Upload URL: "${{github.event.release.upload_url}}"
echo GITHUB_TOKEN: "${{secrets.GITHUB_TOKEN}}"
- name: Checkout
uses: actions/checkout@v3.3.0
- name: Build
run: |
export TZ='America/Los_Angeles'
sudo apt-get install libncurses-dev
sudo apt-get install srecord
make dist
rm -rf .git*
- name: Upload Artifact
uses: actions/upload-artifact@v1
with:
name: RomWBW-${{env.PKGLBL}}-Package
path: .
- name: Create Package Archive
run: |
zip -r Package.zip .
- name: Upload Release Asset
uses: actions/upload-release-asset@v1
env:
GITHUB_TOKEN: ${{secrets.GITHUB_TOKEN}}
zip -r RomWBW-${{github.ref_name}}-Package.zip .
- name: Set Title
run: |
echo "Tag: ${{github.ref_name}}"
if grep -q "dev" <<< "${{github.ref_name}}"; then
TITLE="RomWBW Development Snapshot"
elif grep -q "pre" <<< "${{github.ref_name}}"; then
TITLE="RomWBW Prerelease"
elif grep -q "rc" <<< "${{github.ref_name}}"; then
TITLE="RomWBW Release Candidate"
else
TITLE="RomWBW"
fi
echo "Title: $TITLE"
echo "TITLE=$TITLE" >>$GITHUB_ENV
- name: Attach Package Archive
uses: wwarthen/actions/packages/automatic-releases@built-packages
with:
upload_url: ${{github.event.release.upload_url}}
asset_path: Package.zip
asset_name: RomWBW-${{env.PKGLBL}}-Package.zip
asset_content_type: application/zip
repo_token: "${{secrets.GITHUB_TOKEN}}"
draft: true
prerelease: true
title: "${{env.TITLE}} ${{github.ref_name}}"
files: |
RomWBW-${{github.ref_name}}-Package.zip
# - name: Upload Package Archive
# uses: AButler/upload-release-assets@v2.0.2
# with:
# repo-token: ${{secrets.github_token}}
# files: |
# RomWBW-${{env.PKGLBL}}-Package.zip
# - name: Post SnapShot
# uses: docker://antonyurchenko/git-release:latest
# env:
# GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
# RELEASE_NAME_PREFIX: "${{env.TITLE}} "
# CHANGELOG_FILE: "none"
# with:
# args: |
# RomWBW-SnapShot-Package.zip
# - name: Post SnapShot
# uses: cb80/pubrel@latest
# with:
# replace: true
# files: |
# RomWBW-SnapShot-Package.zip
# - name: Post SnapShot
# uses: wwarthen/actions/packages/automatic-releases@built-packages
# with:
# repo_token: "${{ secrets.GITHUB_TOKEN }}"
# prerelease: true
# title: "RomWBW Development SnapShot ${{env.GITHUB_REF_SLUG}}"
# files: |
# RomWBW-SnapShot-Package.zip
# - name: Remove Older Releases
# uses: wwarthen/delete-release-action@v1.2
# with:
# release-drop: true
# release-keep-count: 0
# release-drop-tag: true
# pre-release-drop: false
# pre-release-keep-count: 0
# pre-release-drop-tag: true
# draft-drop: true
# env:
# GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
# - name: Remove Older Releases
# uses: s00d/delete-older-releases@0.2.1
# with:
# keep_latest: 1
## delete_tag_pattern: beta # defaults to ""
# delete_type: 'release'
# delete_branch: 'main'
# env:
# GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

View File

@@ -1,173 +0,0 @@
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Binary") is part of the RomWBW System Software
distribution archive. Refer to the ReadMe.txt file in this
directory for more information on the overall contents of the
directory.
RomWBW includes a set of disk images that are ready to copy onto
a floppy or hard/CF/SD disk. You can use your modern computer
(Windows/Linux/Mac) to copy the disk image file onto your disk
media. The disk media will then be ready to use in your RomWBW
System.
WARNING: The hdnew_*.img disk images are part of a new disk
format that is a work in progress. Do not use these disk
images without knowing exactly what you are doing! The
hd_*.img disk images continue to be the images you should
be using under normal circumstances.
A description of the disk images is provided later in this file.
For more information on the creatioin of these images including
instructions for customizing them or creating your own, refer to
the ReadMe.txt file in the Source\Images directory.
Installing Images
-----------------
The following instructions apply to Windows computers. Alternatively,
you can use the "dd" command on Linux or Mac.
First of all, a MAJOR WARNING!!!! The tools described below are
quite capable of obliterating your running Windows system drive. Use
with extreme caution and make sure you have backups.
To install a floppy image on floppy media, you can use the tool
called RaWriteWin. This tool is included in the Tools directory of
the distribution. This tool will write your floppy image (fd_xxx.img)
to a floppy disk using a raw block transfer. The tool is GUI based
and it's operation is self explanatory.
To install a hard disk image on a CF card or SD card, you must have
the appropriate media card slot on your computer. If you do, you can
use the tool called Win32DiskImager. This tool is also included in
the Tools directory of the distribution. It will write your
hard disk image (hd_xxx.img) to the designated media card. This tool
is also GUI based and self explanatory.
The use of the SIMH emulator is outside of the scope of this document.
However, if you use SIMH, you will find that you can attach the hard
disk images to the emulator with lines such as the following in your
SIMH configuration file:
| attach hdsk0 hd_cpm22.img
| set hdsk0 format=HDSK
| set hdsk0 geom=T:2048/N:256/S:512
| set hdsk0 wrtenb
Making Disk Images Bootable
---------------------------
The Operating System disk images below are ready to boot by the
RomWBW Boot Loader. However, if you update your RomWBW ROM, then
you should also update the system tracks of your bootable disk
images. You would use SYSCOPY to do this. SYSCOPY can also be
used to make a disk bootable if it is not already bootable.
You would use a command like the following to make drive C bootable:
| B>SYSCOPY C:=CPM.SYS
The system file to use depends on the operating system you are trying
to boot from the slice you are initializing with SYSCOPY:
CP/M 2.2 - cpm.sys
ZSDOS 1.1 - zsys.sys
CP/M 3 - cpmldr.sys
ZPM3 - cpmldr.sys
Slices
------
A RomWBW CP/M filesystem is fixed at 8MB. This is because it is the
largest size filesystem supported by all common CP/M variants. Since
all modern hard disks (including SD Cards and CF Cards) are much
larger than 8MB, RomWBW supports the concept of "slices". This
simply means that you can concatenate multiple CP/M filesystems (up
to 256 of them) on a single physical hard disk and RomWBW will allow
you to assign drive letters to them and treat them as multiple
independent CP/M drives.
With the exception of the hd_combo image, each of the disk images
includes a single CP/M file system (i.e., a single slice). However,
you can easily create a multi-slice disk image by merely concatenating
multiple images together. For example, if you wanted to create a 2
slice disk image that has ZSDOS in the first slice and Wordstar in
the second slice, you could use the following command from a Windows
command prompt:
| C:\RomWBW\Binary>copy /b hd_zsdos.img + hd_ws.img hd_multi.img
You can now write hd_multi.img onto your SD or CF Card and you will
have ZSDOS in the first slice and Wordstar in the second slice.
The hd_combo disk image is an example of this. It contains several
slices in one image file. The contents of this special disk image
are described below.
The concept of slices applies ONLY to hard disks. Floppy disks are
not large enough to support multiple slices.
Disk Image Contents
-------------------
What follows is a brief description of the contents of the
disk images automatically provided in the RomWBW distribution.
Note that all of the OS images include the RomWBW custom
support apps.
cpm22 - DRI CP/M 2.2 (Bootable Floppy and Hard Disk)
Standard DRI CP/M 2.2 distribution files along with a few commonly
used utilities.
zsdos - ZCPR1 + ZSDOS 1.1 (Bootable Floppy and Hard Disk)
Contains ZCPR1 and ZSDOS 1.1. This is roughly equivalent to the
ROM boot contents, but provides a full set of the applications
and related files that would not all fit on the ROM drive.
nzcom - NZCOM (Bootable Floppy and Hard Disk)
Standard NZCOM distribution. Note that you will need to run the
NZCOM setup before this will run properly. You will need
to refer to the NZCOM documentation.
cpm3 - DRI CP/M3 (Bootable Floppy and Hard Disk)
Standard DRI CP/M 3 adaptation for RomWBW that is ready to run.
It can be started by running CPMLDR.
zpm3 - ZPM3 (Bootable Floppy and Hard Disk)
Simeon Cran's ZCPR 3 compatible OS for CP/M 3 adapted for RomWBW and
ready to run. It can be started by running CPMLDR (which seems
wrong, but ZPMLDR is somewhat broken).
ws4 - WordStar 4 (Floppy and Hard Disk)
Micropro Wordstar 4 full distribution. This image is not bootable
and is intended to be added as an additional slice to an OS image.
bp - BPBIOS (Hard Disk only)
Adaptation of BPBIOS for RomWBW. This is NOT complete and NOT
useable in it's current state.
combo - Multi-Boot Combination (Bootable Hard Disk)
A pre-created combo image that contains the following slices. The
slices are identical to the individual images listed above.
Slice 0: cpm22 (bootable)
Slice 1: zsdos (bootable)
Slice 2: nzcom (bootable)
Slice 3: cpm3 (bootable)
Slice 4: zpm3 (bootable)
Slice 5: ws4 (not bootable)

View File

@@ -49,7 +49,7 @@ The files with a ".upd" extension are binary images identical to the
.rom files, but they only have the first 128K bytes. The first 128K
is the system image without the ROM disk contents. These files can be
used to update the system image without modifying the ROM disk
contents. Refer to the Getting Started document for more information.
contents. Refer to the RomWBW User Guide for more information.
ROM Executable Images (<plt>_<cfg>.com)
---------------------------------------

View File

@@ -1,3 +1,25 @@
Version 3.3
-----------
- WBW: Support Front Panel switches
- A?C: Preliminary support for Z80-Retro
- A?C: Support for SD PIO
- A?C: Support for Z80-Retro SD interface
- WBW: Support per-drive floppy configuration
- WBW: Support for Bill Shen's VGARC
- WBW: Support for MG014 Parallel Port module + printer
Version 3.2.1
-------------
- M?P: Fixed Zeta 2 FDD and CPUSPD config settings
- WBW: Fixed SURVEY.COM (again)
- DDW: Updates to DOS/65 binaries in disk images
- PMS: Updates to VGMPLAY including support for YM2151
- WBW: Fix for quark delay adjustment being trashed
Version 3.2
-----------
- WBW: Version bump for release
Version 3.1.1
-------------
- WBW: Version bumped due to pervasive changes
@@ -9,7 +31,7 @@ Version 3.1.1
- HCS: ZRC memory manager support
- S?K: Support for Tiny Z80 by Sergey
- E?B: Support for v6 YM/AY sound card
- C?M: Support for RC2014 bus PropIO V2
- C?M: Support for RCBus bus PropIO V2
- W?S: Updated FLASH software to v1.3.4
- PMS: Preliminary support for writing to FLASH ROMs
- PMS: Creation of process to update ROM system area w/o updating ROM disk contents
@@ -75,7 +97,7 @@ Version 3.1
- WBW: Refactored ROM Loader
- WBW: INTRTC periodic timer based clock
- WBW: FDISK80 updated to allow reserving up to 256 slices
- WBW: Added support dual 16C550 UART on RC2014 platform
- WBW: Added support dual 16C550 UART on RCBus platform
- WBW: Made .com images smaller (contain only Z-System now)
- WBW: Support automatic clock hardware detection and fallback
- WBW: Support use of CTC for SIO baud rate divisors
@@ -113,8 +135,8 @@ Version 2.9.2
- WBW: Support two SIO modules w/ auto-detection
- PMS: Support ECB USB-FIFO board
- WBW: Fixed ASSIGN issue with incorrect DPB selection
- WBW: Add RC2014 Z180 AY sound support to TUNE app
- WBW: Add RC2014 AY sound support to AY driver
- WBW: Add RCBus Z180 AY sound support to TUNE app
- WBW: Add RCBus AY sound support to AY driver
- WBW: Add SC126 platform
- WBW: Config files cleanup
- WBW: Add interrupt support to ASCI driver
@@ -133,7 +155,7 @@ Version 2.9.2
- PMS: Add sound support to NASCOM BASIC
- WBW: Updated FAT to add MD and FORMAT commands
- WBW: Add CP/M 3 (experimental)
- M?T: Support Shift register SPI WIZNET for RC2014
- M?T: Support Shift register SPI WIZNET for RCBus
- PLS: Added seconds register in HBIOS
- WBW: More flexible table-driven config in TUNE.COM
- PMS: Added timer support for Zilog Peripherals ECB Board
@@ -161,7 +183,7 @@ Version 2.9.2
Version 2.9.1
-------------
- E?B: Added support for RC2014 RTC
- E?B: Added support for RCBus RTC
- WBW: Converted PTXPLAY to TUNE (now plays PT2/PT3/MYM sounds files)
- WBW: Updated Win32DiskImager to v1.0
- WBW: Implemented character attributes on Propeller based consoles
@@ -171,7 +193,7 @@ Version 2.9.1
- WBW: Update default IOBYTE so that LST:=LPT: by default
- WBW: Fixed missing drive/head setup for writes in PPIDE
- WBW: Fixed XModem HBIOS console driver for file send operations
- WBW: Preliminary support for RC180 platform (Z180 module in RC2014)
- WBW: Preliminary support for RC180 platform (Z180 module in RCBus)
- WBW: Added NZCOM distribution files to third slice of hard disk image
- WBW: Fixed getnum32 bug in MODE command (found by Phil Summers)
- PMS: Added serial support for Zilog Peripherals Baord
@@ -189,26 +211,26 @@ Version 2.9.1
- WBW: Added timer interrupt support for CTC under Zeta 2 and Easy Z80
- WBW: Support LBA style access in floppy driver
- WBW: Added beta version of FAT filesystem utility (copy, dir, del, ren)
- SCC: Added support for native memory addressing on Z180-based RC2014
- SCC: Added support for native memory addressing on Z180-based RCBus
- PMS: Dynamically discover and display processor type at boot
- J?L: Added German keyboard support to PPK and KBD drivers
Version 2.9.0
-------------
- WBW: Implemented multi-sector I/O in all disk drivers
- WBW: Added support for RC2014 SMB Floppy controller modules (SMC and WDC)
- WBW: Added support for RCBus SMB Floppy controller modules (SMC and WDC)
- WBW: New function dispatching for character/disk/video drivers
- WBW: Updated FDU app to support RC2014 floppy controllers
- WBW: Updated FDU app to support RCBus floppy controllers
- WBW: Added TIMER app to display system timer value
- WBW: Refactored interrupt management code
- WBW: Added PTXPLAY application and sample tunes
Version 2.8.6
-------------
- WBW: Added support for RC2014 (SIO and ACIA drivers primarily)
- WBW: Added support for RCBus (SIO and ACIA drivers primarily)
- WBW: Automatically detect and run PROFILE.SUB on boot drive if it exists
- WBW: Fixed Dual SD Board detection
- WBW: Added console support to XModem (for RC2014 primarily)
- WBW: Added console support to XModem (for RCBus primarily)
- E?B: Fixed IDE/PPIDE when used with non-CF drives
- WBW: Patched SUBMIT.COM so that it always puts temp file on A: for immediate execution
- WBW: Accommodate spin up time for true IDE hard disks (IDE or PPIDE)

View File

@@ -10,6 +10,26 @@ This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
the system.
ChangeLog.txt
-------------
Log of changes in RomWBW by version.
RomWBW User Guide ("RomWBW User Guide.pdf")
RomWBW System Guide ("RomWBW System Guide.pdf")
RomWBW Applications ("RomWBW Applications.pdf")
RomWBW ROM Applications ("RomWBW ROM Applications.pdf")
RomWBW Disk Catalog ("RomWBW Disk Catalog.pdf")
RomWBW Errata ("RomWBW Errata.pdf")
-------------------------------------------------------
Documentation set for RomWBW. The primary document is the
User Guide. The System Guide explains internal system operation
and has a reference for the HBIOS API. Use of included tools
and utilities are detailed in the Applications and
ROM Applications documents.
CPM Manual ("CPM Manual.pdf")
-----------------------------
@@ -43,12 +63,6 @@ The operational manual for John Coffman's hard disk partitioning
program. This program is included in RomWBW as FDISK80.
Floppy Disk Utility Documentation ("FDU.tst")
---------------------------------------------
Operational documentation for the RomWBW FDU application.
Hard Disk Anatomy ("Hard Disk Anatomy.pdf")
-------------------------------------------
@@ -61,17 +75,47 @@ NZCOM User's Manual ("NZCOM Users Manual.pdf")
NZCOM operating system operation manual.
RomWBW Architecture ("RomWBW Architecture.pdf")
-----------------------------------------------
ZCPR Manual ("ZCPR Manual.pdf")
-------------------------------
Document describing the architecture of the RomWBW HBIOS. It
includes reference information for the HBIOS calls.
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
ROM Applications ("ROM Applications.pdf")
-----------------------------------------
ZCPR D&J Manual ("ZCPR-DJ.doc")
-------------------------------
Breif instructions for the ROM based applications included in
in the boot ROM.
ZCPR D&J User Manual. This manual supplements the ZCPR Manual.
ZSDOS Manual ("ZSDOS Manual.pdf")
---------------------------------
ZSDOS is the DOS portion of Z-System. This is the manual for ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.
Microsoft Basic-80 Reference Manual v5.0 (Microsoft Basic-80 Reference Manual v5.0.pdf)
---------------------------------------------------------------------------------------
Official manual for Microsoft BASIC as included in RomWBW.
QP/M 2.7 Installation Guide and Supplements ("qpm27.pdf")
QP/M 2.7 Interface Guide ("qdos27.pdf")
QP/M 2.7 Features and Facilities ("qcp27.pdf")
--------------------------------------------
Official documentation set for QP/M 2.7 from original QP/M distribution.
SIO+CTC Baud Rate Options (SIO+CTC Baud Rate Options.pdf)
---------------------------------------------------------
Documents possible baud rates available based on different baud
clock rates for Zilog SIO using CTC for baud rate clock generation.
Z180 ASCI Baud Rate Options ("Z180 ASCI Baud Rate Options.pdf")
@@ -83,19 +127,10 @@ clock rate. This document provides a list of the possible
baud rates for typical CPU clock rates.
ZCPR Manual ("ZCPR Manual.pdf")
-------------------------------
UCSD p-System Users Manual ("UCSD p-System Users Manual.pdf")
-------------------------------------------------------------
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
Official user manual for p-System operating system included with
RomWBW.
ZSDOS Manual ("ZSDOS Manual.pdf")
---------------------------------
ZSDOS is the DOS portion of Z-System. This is the manual fo ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.
--WBW 5:18 PM 3/16/2023

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View File

@@ -23,7 +23,7 @@ Zeta 2 (X)
- Test FD driver
- Test FDU app
RC2014 (X)
RCBus (X)
------
- Test SIO driver (Serial Module)
- Test ACIA driver (Dual Serial Module)
@@ -40,7 +40,7 @@ N8-2312 (X)
- Test FDU app
- Test TMS driver (video & kbd)
N8-2511 ( )
N8-2511 (X)
-------
- Test ASCI driver
- Test SD driver (Juha mode)
@@ -139,27 +139,6 @@ GENERAL (X)
- ASSIGN app
- MODE app
- SYSCOPY app
- OSLDR app
- FDU app
- FDISK80 app
- TUNE app
RESULTS
-------
- Missing HBIOS startup banner (X)
- PANIC while printing Serial device inventory (X)
- Unexpected interrupt signals not handled well (X)
- Fix IT_??? usage (X)
- Fix HB_DI/HB_EI in PEEK/POKE/BNKCPY (X)
- Fix SIMH timer interrupt setup (X)
- Move DI/EI in PEEK/POKE/BNKCPY to API layer? (X)
- RETI vs. JP in page zero when INTMODE = 0 (X)
- Check interrupt stack space (X)
- If an early INT fires, we return with INTs enabled (not good) (X)
- PPPCON init should display ANSI 80x25 or similar (X)
- Add INT MODE X message to early boot messages (X)
- OSLDR fails when LDDS is loaded (X)
- Add "!!!" to force assembly error as needed ( )
- TIMER app should check for HBIOS active (X)
- Halt system after bad interrupt??? ( )
- Adapt and bundle PLAYER.COM (X)

View File

@@ -1,9 +1,9 @@
**RomWBW ReadMe** \
Version 3.1 Pre-release \
Version 3.3 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
13 Feb 2023
03 May 2023
# Overview
@@ -128,8 +128,8 @@ contributions. The list below is probably missing many names please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his code can still
be found in RomWBW.
became the first platform RomWBW supported. Some of his original code
can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and advice.
@@ -140,23 +140,30 @@ let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW including
the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included SD
Card driver.
- Ed Brindley contributed some of the code that supports the RC2014
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
- Spencer Owen created the RC2014 series of hobbyist kit computers which
has exponentially increased RomWBW usage.
has exponentially increased RomWBW usage. Some of his kits include
RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
@@ -197,14 +204,15 @@ Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen wwarthen@gmail.com
> Wayne Warthen
> <wwarthen@gmail.com>
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is

View File

@@ -1,6 +1,6 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
13 Feb 2023
03 May 2023
@@ -129,8 +129,8 @@ contributions. The list below is probably missing many names please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his code can
still be found in RomWBW.
became the first platform RomWBW supported. Some of his original
code can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
@@ -142,23 +142,30 @@ let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included
SD Card driver.
- Ed Brindley contributed some of the code that supports the RC2014
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
- Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage.
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
@@ -202,14 +209,15 @@ Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
Wayne Warthen wwarthen@gmail.com
Wayne Warthen
wwarthen@gmail.com
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is

View File

@@ -38,7 +38,7 @@
; DYNAMIC FDC SELECTION AT STARTUP
; DYNAMIC CPU SPEED ADJUSTMENT
; 2017-12-16: V5.1 IMPROVED POLLING READ/WRITE PERFORMANCE
; 2018-01-08: V5.2 ADDED RC2014 SUPPORT FOR:
; 2018-01-08: V5.2 ADDED RCBUS SUPPORT FOR:
; - SCOTT BAKER (SMB) SMC 9266 FDC
; - SCOTT BAKER (SMB) WDC 37C65 FDC
; 2018-09-05: v5.3 ADDED SUPPORT FOR SMALLZ80
@@ -91,7 +91,7 @@ FDC_MBC .EQU 11
_DIO .EQU $01 ; CUSTOM FOR DIO BOARD
_DIO3 .EQU $02 ; CUSTOM FOR DIO3 BOARD
_ZETA .EQU $04 ; CUSTOM FOR ZETA
_RCSMC .EQU $08 ; CUSTOM FOR RC2014 SMB SMC MODULE
_RCSMC .EQU $08 ; CUSTOM FOR RCBUS SMB SMC MODULE
_PCAT .EQU $10 ; PC/AT MODE IN NEWER CONTROLLERS
;
;===============================================================================
@@ -465,11 +465,11 @@ FSS_MENU:
.TEXT " (D) Zeta 2 SBC Onboard FDC\r\n"
.TEXT " (E) Dual IDE ECB Board\r\n"
.TEXT " (F) N8 Onboard FDC\r\n"
.TEXT " (G) RC2014 SMC (SMB)\r\n"
.TEXT " (H) RC2014 WDC (SMB)\r\n"
.TEXT " (G) RCBus SMC (SMB)\r\n"
.TEXT " (H) RCBus WDC (SMB)\r\n"
.TEXT " (I) SmallZ80 Expansion\r\n"
.TEXT " (J) Dyno-Card FDC, D1030\r\n"
.TEXT " (K) RC2014 EPFDC\r\n"
.TEXT " (K) RCBus EPFDC\r\n"
.TEXT " (L) Multi-Board Computer FDC\r\n"
.TEXT " (X) Exit\r\n"
.TEXT "=== OPTION ===> $\r\n"

View File

@@ -1,6 +1,6 @@
================================================================
Floppy Disk Utility (FDU) v5.3 for RetroBrew Computers
Disk IO / Zeta / Dual-IDE / N8 / RC2014 / SmallZ80 / Dyno
Disk IO / Zeta / Dual-IDE / N8 / RCBus / SmallZ80 / Dyno
================================================================
Updated January 5, 2020
@@ -33,7 +33,7 @@ like to acknowledge that much was derived from the previous
work of Andrew Lynch and Dan Werner. I also want to credit
Sergio Gimenez with testing the 5.25" drive support and Jim
Harre with testing the 8" drive support. Support for Zeta 2
comes from Segey Kiselev. Thanks!
comes from Sergey Kiselev. Thanks!
General Usage
-------------
@@ -74,7 +74,7 @@ supported:
- Zeta 2
- N8
- Mark IV
- RC2014
- RCBus
- SmallZ80
- Dyno
- MBC
@@ -89,8 +89,8 @@ You must have one of the following floppy disk controllers:
- Zeta SBC onboard FDC
- Zeta 2 SBC onboard FDC
- N8 SBC onboard FDC
- RC2014 Scott Baker SMC-based Floppy Module
- RC2014 Scott Baker WDC-based Floppy Module
- RCBus Scott Baker SMC-based Floppy Module
- RCBus Scott Baker WDC-based Floppy Module
- SmallZ80 FDC
- Dyno FDC
- MBC FDC
@@ -99,7 +99,7 @@ Finally, you will need a floppy drive connected via an
appropriate cable:
Disk IO - no twist in cable, drive unit 0/1 must be selected by jumper on drive
DISK IO 3, Zeta, Zeta 2, RC2014, Dyno - cable with twist, unit 0 after twist, unit 1 before twist
DISK IO 3, Zeta, Zeta 2, RCBus, Dyno - cable with twist, unit 0 after twist, unit 1 before twist
DIDE, N8, Mark IV, SmallZ80 - cable with twist, unit 0 before twist, unit 1 after twist
Note that FDU does not utilize your systems ROM or OS to
@@ -147,15 +147,15 @@ P5 (bd ID): 1-2, 3-4 (for $20-$3F port range)
There are no specific N8 jumper settings, but the default
I/O range starting at $80 is assumed in the published code.
The RC2014 Scott Baker SMC-based floppy module should be jumpered
The RCBus Scott Baker SMC-based floppy module should be jumpered
for I/O base address 0x50 (SV1: 11-12), JP1 (TS) shorted,
JP2 (/FAULT) shorted, JP3 (MINI): 2-3, JP4 (/DC/RDY): 2-3.
The RC2014 Scott Baker WDC-based floppy module should be jumpered
The RCBus Scott Baker WDC-based floppy module should be jumpered
for I/O base address 0x50 (SV1: 11-12), JP1 (/DACK): 1-2,
JP2 (TC): 2-3.
The RC2014 FDC by Alan Cox (Etched Pixels) needs to be strapped
The RCBus FDC by Alan Cox (Etched Pixels) needs to be strapped
for base I/O address 0x48.
SmallZ80 does not have any relevant jumper settings. The
@@ -506,7 +506,7 @@ Improved polling version of read/write to fix occasional overrun errors.
WW 1/8/2018: v5.2
Added support for RC2014 hardware:
Added support for RCBus hardware:
- Scott Baker SMC 9266 FDC module
- Scott Baker WDC 37C65 FDC module

View File

@@ -15,6 +15,13 @@
;
;VERSION LIST - Most recent version first.
;
;21/Mar/23 - Previous hack was worthless because it broke
; the memory survey. Rehacked to use HBIOS to
; detect if N8VEM SBC MPCL memory management is
; in use and bypass MPCL ports if so. HBIOS check
; should allow use in non-RomWBW systems again.
; Wayne Warthen
;
;10/Feb/23 - Total hack to avoid crash on ECB SBC
; RomWBW now required by this version
; Wayne Warthen
@@ -240,20 +247,6 @@ TABS EQU 9 ; Tab columns
;
;ORG 100H
;
;
;
.Z80
LD HL,IMGORG
LD DE,START
LD BC,IMGEND-IMGORG
LDIR
JP START
.8080
;
IMGORG:
;
.PHASE 8000H
;
START:
LXI H,0 ; Save stack pointer
DAD SP
@@ -261,9 +254,38 @@ START:
LXI SP,FINIS+64
CALL TYPE ; Type initial CRLF
DW CRLF,CRLF
DB TAB,'*** RomWBW System Survey (Feb 2023) ***'
DB TAB,'*** RomWBW System Survey (Mar 2023) ***'
DW CRLF,CRLFE
;
; Are we running an N8VEM SBC w/ MPCL on RomWBW???
;
.Z80
XOR A ; assume not
LD (ISMPCL),A ; save it
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,NOTMPCL ; Not HBIOS
INC HL ; Next byte of ident
LD A,NOT 'W' ; Second byte of ident
CP (HL) ; Compare
JR NZ,NOTMPCL ; Not HBIOS
;
LD B,0F1H ; HBIOS: VER function
LD C,0 ; required reserved value
RST 08 ; DE := version, L := platform id
LD A,L ; Platform ID
CP 01H ; SBC?
JR NZ,NOTMPCL ; Not SBC
LD A,0FFH ; Flag
LD (ISMPCL),A ; Set flag
;
.8080
;
NOTMPCL:
;
;DISK SURVEY
LXI H,8 ; Init drive counter
MVI C,24 ; Get login vector
@@ -445,20 +467,19 @@ MSURV:
ENDM
DB '|'
DW CRLF
db ' ' ; dmb 31-May-82
DB 'T'+EOL
DB 'TT','T'+EOL
LXI H,RAM
MVI M,LOW 1023 ; Init RAM counter
MVI M,LOW 2047 ; Init RAM counter
INX H
MVI M,HIGH 1023
MVI M,HIGH 2047
MVI B,4 ; Clear ROM, EMP
CLREG:
INX H
MVI M,0
DCR B
JNZ CLREG
LXI H,1024 ; Init memory pointer
MVI C,63 ; K to be checked
LXI H,2048 ; Init memory pointer
MVI C,62 ; K to be checked
;Start of analysis loop
BEGANA:
@@ -492,7 +513,7 @@ NOTEM:
INXI ROM
NEXT:
INX H ; Index next byte
DCX D ; Decrement K counter
DCX D ; DEC DE; Decrement K counter
XRA A
ORA D
ORA E
@@ -545,8 +566,19 @@ NEXTK:
; contents of first page
call type
db 'BIOS at',' '+eol
hexout bios+2
hexout bios+1
;hexout bios+2
;hexout bios+1
.z80
ld hl,(bios+1)
ld de,-3
add hl,de
push hl
ld a,h
call hexprn
pop hl
ld a,l
call hexprn
.8080
call type
db tab,'iobyte',' '+eol
hexout bios+3
@@ -555,8 +587,19 @@ NEXTK:
hexout bios+4
call type
db tab,'BDOS at',' '+eol
hexout bdos+2
hexout bdos+1
;hexout bdos+2
;hexout bdos+1
.z80
ld hl,(bdos+1)
ld de,-6
add hl,de
push hl
ld a,h
call hexprn
pop hl
ld a,l
call hexprn
.8080
call type
dw crlf,crlfe
;
@@ -572,6 +615,8 @@ NEXTK:
CALL TYPE
DB ' Bytes ROM',TAB,TAB+EOL
LHLD BDOS+1
LXI D,-6
DAD D
CALL BINDEC
CALL TYPE
DB ' Bytes in TPA'
@@ -607,9 +652,17 @@ PDLY:
JNZ PDLY
;
.Z80
; RECORD THE ACTIVE BANK
LD A,(0FFE0H) ; GET CURRENT HBIOS BANK ID
LD (BANK),A ; AND SAVE IT
; Check for Z180 CPU
xor a ; assume Z80
ld (IS180),a ; save it
ld de,0506H ; 5 x 6
db 0EDH,05CH ; MLT DE: de = 30 if z180
ld a,e ; result to A
cp 30 ; check if multiply happened
jr nz,z80 ; if invalid, then Z80
or 0ffH ; flag value for Z180
ld (IS180),a ; save it
z80:
.8080
;
LXI H,0 ; Init active port counter
@@ -623,28 +676,82 @@ PORTLP:
JZ ISPORT ; Print mask port
ENDIF
;
mov c,a ; port number to reg c
mvi b,0 ; for 16 bit port addressing
.Z80
;
ld a,(ISMPCL) ; MPCL?
or a ; set flags
jr z,PCONT ; if not, skip ahead
ld a,d ; get port to test
and 0F8H ; range of 8 ports
cp 078H ; starting at 78H
jr z,ISPORT ; if in range, assume real port
;
PCONT:
di ; interrupts off
ld a,(IS180) ; Z180?
or a
jr nz,rd180
;
; Z80 port read
; Read port using IN A,(C), push result
ld a,d
ld c,a
ld (pnum0a),a ; dynamic update
ld (pnum0b),a ; dynamic update
ld b,0
in a,(c)
.8080
;
.Z80
; MAKE SURE CORRECT BANK IS STILL SELECTED!
push af
ld a,(BANK)
call 0FFF3H
pop af
; Read port using IN A,(port), push result
in a,(0ffh) ; IN0
pnum0a equ $-1
push af
; Read port using IN A,(port), push result
in a,(0ffh) ; IN0
pnum0b equ $-1
push af
jr rdz
;
rd180:
; Z180 port read
; Read port using IN A,(C), push result
ld a,d
ld c,a
ld (pnum1a),a ; dynamic update
ld (pnum1b),a ; dynamic update
ld b,0
in a,(c)
push af
; Read port using IN0 A,(port), push result
db 0EDH,038H,0FFH ; IN0
pnum1a equ $-1
push af
; Read port using IN0 A,(port), push result
db 0EDH,038H,0FFH ; IN0
pnum1b equ $-1
push af
;
rdz:
;
ei ; interrupts back on now
;
; port is considered inactive if values read from different port
; read mechanisms differ or if the value $FF is read consistently,
; or if the value read is equal to the port number itself
;
pop bc ; second IN0 (port) value
pop af ; first IN0 (port) valule
cp b ; same?
pop bc ; IN (C) value
jr nz,ISPORT ; if no, active running ctr port
cp b ; same?
jr nz,NEXTPT ; if not, inactive port
cp 0FFh ; pullup value???
jr z,NEXTPT ; if so, consider not active
cp d ; value same as port num???
jr z,NEXTPT ; if so, consider not active
;
.8080
;
; inactive port could return 0xFF or 0x78 or the port address
;
cmp c
jz nextpt
cpi 0FFh
jz nextpt
cpi 078h
jz nextpt
ISPORT:
mov a,d ; got a live one, probably
ani 0f0h ; is port in same group as last ?
@@ -759,12 +866,9 @@ RAMF: DS 1 ; RAM good flag
EMPF: DS 1 ; Empty so far flag
BLKSHF: DS 1 ; block shift factor
MAXALL: DS 2 ; maximum block number
BANK: DS 1 ; saved HBIOS bank id
IS180: DS 1 ; non-zero for Z180 CPU
ISMPCL: DS 1 ; non-zero for N8VEM SBC MPCL
FINIS EQU $ ; End of program
;
.DEPHASE
;
IMGEND:
;
END


View File

@@ -23,6 +23,7 @@ pushd ps2info && call Build || exit /b & popd
pushd 2piotst && call Build || exit /b & popd
pushd piomon && call Build || exit /b & popd
pushd banktest && call Build || exit /b & popd
pushd portscan && call Build || exit /b & popd
goto :eof

View File

@@ -20,3 +20,4 @@ pushd ps2info && call Clean || exit /b 1 & popd
pushd 2piotst && call Clean || exit /b 1 & popd
pushd piomon && call Clean || exit /b 1 & popd
pushd banktest && call Clean || exit /b 1 & popd
pushd portscan && call Clean || exit /b 1 & popd

File diff suppressed because it is too large Load Diff

View File

@@ -1,5 +1,5 @@
OBJECTS =
SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info 2piotst piomon banktest
SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info 2piotst piomon banktest portscan
DEST = ../../../Binary/Apps/Test
TOOLS =../../../Tools

View File

@@ -27,11 +27,10 @@
runloc .equ $C000 ; Running location (upper memory required)
stksiz .equ $40 ; Working stack size
;
rmj .equ 3 ; intended HBIOS version - major
rmn .equ 1 ; intended HBIOS version - minor
;
restart .equ $0000 ; CP/M restart vector
;
#include "../../../ver.inc"
;
#include "../../../HBIOS/hbios.inc"
;
;===============================================================================

View File

@@ -0,0 +1,11 @@
@echo off
setlocal
set TOOLS=../../../../Tools
set PATH=%TOOLS%\tasm32;%PATH%
set TASMTABS=%TOOLS%\tasm32
tasm -t180 -g3 -fFF portscan.asm portscan.com portscan.lst || exit /b
copy /Y portscan.com ..\..\..\..\Binary\Apps\Test\ || exit /b

View File

@@ -0,0 +1,6 @@
@echo off
setlocal
if exist *.com del *.com
if exist *.lst del *.lst
if exist *.bin del *.bin

View File

@@ -0,0 +1,9 @@
OBJECTS = portscan.com
DEST = ../../../../Binary/Apps/Test
TOOLS =../../../../Tools
USETASM=1
include $(TOOLS)/Makefile.inc
TASM=$(BINDIR)/uz80as -t hd64180

View File

@@ -0,0 +1,602 @@
;===============================================================================
; PORTSCAN - Sweep Ports
;
;===============================================================================
;
; Author: Wayne Warthen (wwarthen@gmail.com)
;_______________________________________________________________________________
;
; Usage:
; PORTSCAN
;
; Operation:
; Reads all ports (multiple ways) and displays values read
;_______________________________________________________________________________
;
; Change Log:
; 2023-02-14 [WBW] Initial release
;_______________________________________________________________________________
;
; ToDo:
;_______________________________________________________________________________
;
;===============================================================================
; Definitions
;===============================================================================
;
runloc .equ $C000 ; Running location (upper memory required)
stksiz .equ $40 ; Working stack size
;
restart .equ $0000 ; CP/M restart vector
;
;
#include "../../../ver.inc"
;
#include "../../../HBIOS/hbios.inc"
;
;===============================================================================
; Code Section
;===============================================================================
;
.org $100
;
; relocate worker code to upper memory
ld hl,begin ; start of working code image
ld de,runloc ; running location
ld bc,size ; size of working code image
ldir ; copy to upper RAM
jp runloc ; and go
;
; Start of working code
;
begin .equ $ ; image loaded here
;
.org runloc ; now generate running location adresses
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
; process
call process ; do main processing
jr nz,exit ; abort on error
;
exit: ; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
;jp restart ; return to CP/M via restart
ret ; return to CP/M w/o restart
;
; Initialization
;
init:
call crlf2 ; formatting
ld de,msgban ; point to version message part 1
call prtstr ; print it
;
call idbio ; identify active BIOS
cp 1 ; check for HBIOS
jp nz,errbio ; handle BIOS error
;
ld a,rmj << 4 | rmn ; expected HBIOS ver
cp d ; compare with result above
jp nz,errbio ; handle BIOS error
;
initx
; initialization complete
xor a ; signal success
ret ; return
;
; Process
;
process:
call crlf
ld a,($FFE0) ; get current hbios bank id
ld (orgbnk),a ; and save it
ld a,0 ; start with port 0
ld (curport),a ; save it for use below
; Test for z180 using mlt
ld de,$0506 ; 5 x 6
mlt de ; de = 30 if z180
ld a,e ; result to A
cp 30 ; check if multiply happened
jr nz,prtcpu ; if invalid, then Z80
or $FF ; flag value for Z180
ld (is180),a ; save it
;
prtcpu:
ld de,msgcpu
call prtstr
ld a,(is180)
or a
ld de,msgz80
jr z,prtcpu1
ld de,msgz180
prtcpu1:
call prtstr
call crlf
;
loop:
call crlf
ld a,(curport)
call prthex
ld a,':'
call prtchr
;
di ; interrupts off
;
ld hl,vallist ; init value list pointer
call portread ; read the port
call portread ; do it again
;
; restore possibly corrupted bank registers
ld a,(orgbnk) ; get proper bank id
call $FFF3 ; restore it
;
ei ; interrupts safe now
;
ld hl,vallist ; re-init value list pointer
ld b,4 ; print 4 values
prtloop:
ld a,' '
call prtchr
ld a,(hl)
call prthex
inc hl
djnz prtloop
;
; update port and loop as needed
ld a,(curport) ; get current port
inc a ; move to next
ld (curport),a ; save it
jr z,done ; done on wraparound
jr loop ; loop until done
;
done:
;
call crlf2
ld de,msgdone ; message to print
call prtstr ; do it
ret ; all done
;
;
;
portread:
ld a,(is180)
or a
jr nz,portread_z180
;
portread_z80: ; use traditional "IN"
; read port using IN <portnum>
ld a,(curport) ; get current port
ld (pnum0),a ; modify IN instruction
nop ; defeat Z280 pipeline
nop
in a,($FF) ; read the port
pnum0 .equ $-1
ld (hl),a ; save it
inc hl ; bump value list pointer
jr portread1
;
portread_z180: ; use "IN0"
; read port using IN <portnum>
ld a,(curport) ; get current port
ld (pnum1),a ; modify IN instruction
in0 a,($FF) ; read the port
pnum1 .equ $-1
ld (hl),a ; save it
inc hl ; bump value list pointer
;
portread1:
; read port using IN (C)
ld a,(curport) ; get current port
ld b,0 ; in case 16 bits decoded
ld c,a ; move to reg C
in a,(c) ; read the port
ld (hl),a ; save it
inc hl ; bump value list pointer
ret
;
; Identify active BIOS. RomWBW HBIOS=1, UNA UBIOS=2, else 0
;
idbio:
;
; Check for UNA (UBIOS)
ld a,($FFFD) ; fixed location of UNA API vector
cp $C3 ; jp instruction?
jr nz,idbio1 ; if not, not UNA
ld hl,($FFFE) ; get jp address
ld a,(hl) ; get byte at target address
cp $FD ; first byte of UNA push ix instruction
jr nz,idbio1 ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $E5 ; second byte of UNA push ix instruction
jr nz,idbio1 ; if not, not UNA, check others
;
ld bc,$04FA ; UNA: get BIOS date and version
rst 08 ; DE := ver, HL := date
;
ld a,2 ; UNA BIOS id = 2
ret ; and done
;
idbio1:
; Check for RomWBW (HBIOS)
ld hl,(HB_IDENT) ; HL := HBIOS ident location
ld a,'W' ; First byte of ident
cp (hl) ; Compare
jr nz,idbio2 ; Not HBIOS
inc hl ; Next byte of ident
ld a,~'W' ; Second byte of ident
cp (hl) ; Compare
jr nz,idbio2 ; Not HBIOS
;
ld b,BF_SYSVER ; HBIOS: VER function
ld c,0 ; required reserved value
rst 08 ; DE := version, L := platform id
;
ld a,1 ; HBIOS BIOS id = 1
ret ; and done
;
idbio2:
; No idea what this is
xor a ; Setup return value of 0
ret ; and done
;
; Print character in A without destroying any registers
;
prtchr:
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld b,BF_CIOOUT ; HBIOS function to output a character
ld c,CIO_CONSOLE ; write to current console unit
call HB_INVOKE ; invoke HBIOS via call
pop hl ; restore registers
pop de
pop bc
ret
;
prtdot:
;
; shortcut to print a dot preserving all regs
push af ; save af
ld a,'.' ; load dot char
call prtchr ; print it
pop af ; restore af
ret ; done
;
prtspace:
;
; shortcut to print a space preserving all regs
push af ; save af
ld a,' ' ; load dot char
call prtchr ; print it
pop af ; restore af
ret ; done
;
prtcr:
;
; shortcut to print a dot preserving all regs
push af ; save af
ld a,13 ; load CR value
call prtchr ; print it
pop af ; restore af
ret ; done
;
; Print a zero terminated string at (DE) without destroying any registers
;
prtstr:
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
ret
;
; Print a block of memory nicely formatted
; de=buffer address
;
dump_buffer:
call crlf
push de
pop hl
inc d
inc d
db_blkrd:
push bc
push hl
pop bc
call prthexword ; print start location
pop bc
call prtspace ;
ld c,16 ; set for 16 locs
push hl ; save starting hl
db_nxtone:
ld a,(hl) ; get byte
call prthex ; print it
call prtspace ;
db_updh:
inc hl ; point next
dec c ; dec. loc count
jr nz,db_nxtone ; if line not done
; now print 'decoded' data to right of dump
db_pcrlf:
call prtspace ; space it
ld c,16 ; set for 16 chars
pop hl ; get back start
db_pcrlf0:
ld a,(hl) ; get byte
and 060h ; see if a 'dot'
ld a,(hl) ; o.k. to get
jr nz,db_pdot ;
db_dot:
ld a,2eh ; load a dot
db_pdot:
call prtchr ; print it
inc hl ;
ld a,d ;
cp h ;
jr nz,db_updh1 ;
ld a,e ;
cp l ;
jp z,db_end ;
db_updh1:
; if block not dumped, do next character or line
dec c ; dec. char count
jr nz,db_pcrlf0 ; do next
db_contd:
call crlf ;
jp db_blkrd ;
db_end:
ret
;
; Print the value in A in hex without destroying any registers
;
prthex:
push af ; save AF
push de ; save DE
call hexascii ; convert value in A to hex chars in DE
ld a,d ; get the high order hex char
call prtchr ; print it
ld a,e ; get the low order hex char
call prtchr ; print it
pop de ; restore DE
pop af ; restore AF
ret ; done
;
; print the hex word value in bc
;
prthexword:
push af
ld a,b
call prthex
ld a,c
call prthex
pop af
ret
;
; print the hex dword value in de:hl
;
prthex32:
push bc
push de
pop bc
call prthexword
push hl
pop bc
call prthexword
pop bc
ret
;
; Convert binary value in A to ascii hex characters in DE
;
hexascii:
ld d,a ; save A in D
call hexconv ; convert low nibble of A to hex
ld e,a ; save it in E
ld a,d ; get original value back
rlca ; rotate high order nibble to low bits
rlca
rlca
rlca
call hexconv ; convert nibble
ld d,a ; save it in D
ret ; done
;
; Convert low nibble of A to ascii hex
;
hexconv:
and $0F ; low nibble only
add a,$90
daa
adc a,$40
daa
ret
;
; Print value of A or HL in decimal with leading zero suppression
; Use prtdecb for A or prtdecw for HL
;
prtdecb:
push hl
ld h,0
ld l,a
call prtdecw ; print it
pop hl
ret
;
prtdecw:
push af
push bc
push de
push hl
call prtdec0
pop hl
pop de
pop bc
pop af
ret
;
prtdec0:
ld e,'0'
ld bc,-10000
call prtdec1
ld bc,-1000
call prtdec1
ld bc,-100
call prtdec1
ld c,-10
call prtdec1
ld e,0
ld c,-1
prtdec1:
ld a,'0' - 1
prtdec2:
inc a
add hl,bc
jr c,prtdec2
sbc hl,bc
cp e
ret z
ld e,0
call prtchr
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Get the next non-blank character from (HL).
;
nonblank:
ld a,(hl) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc hl ; if blank, increment character pointer
jr nonblank ; and loop
;
; Convert character in A to uppercase
;
ucase:
cp 'a' ; if below 'a'
ret c ; ... do nothing and return
cp 'z' + 1 ; if above 'z'
ret nc ; ... do nothing and return
res 5,a ; clear bit 5 to make lower case -> upper case
ret ; and return
;
; Add the value in A to HL (HL := HL + A)
;
addhl:
add a,l ; A := A + L
ld l,a ; Put result back in L
ret nc ; if no carry, we are done
inc h ; if carry, increment H
ret ; and return
;
; Jump indirect to address in HL
;
jphl:
jp (hl)
;
; Short delay functions. No clock speed compensation, so they
; will run longer on slower systems. The number indicates the
; number of call/ret invocations. a single call/ret is
; 27 t-states on a z80, 25 t-states on a z180
;
; ; Z80 Z180
; ; ---- ----
dly64: call dly32 ; 1728 1600
dly32: call dly16 ; 864 800
dly16: call dly8 ; 432 400
dly8: call dly4 ; 216 200
dly4: call dly2 ; 108 100
dly2: call dly1 ; 54 50
dly1: ret ; 27 25
;
; Errors
;
erruse: ; command usage error (syntax)
ld de,msguse
jr err
;
errprm: ; command parameter error (syntax)
ld de,msgprm
jr err
;
errbio: ; invalid BIOS or version
ld de,msgbio
jr err
;
err: ; print error string and return error signal
call crlf2 ; print newline
;
err1: ; without the leading crlf
call prtstr ; print error string
;
err2: ; without the string
; call crlf ; print newline
or $FF ; signal error
ret ; done
;
;===============================================================================
; Storage Section
;===============================================================================
;
is180 .db 0 ; non-zero for z180
orgbnk .db 0 ; original bank id
curport .db 0 ; current port being processed
vallist .fill 8,0 ; port values read
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
; Messages
;
msgban .db "PORTSCAN v1.0, 16-Feb-2023",13,10
.db "Copyright (C) 2023, Wayne Warthen, GNU GPL v3",0
msguse .db "Usage: PORTSCAN",13,10
msgprm .db "Parameter error (PORTSCAN /? for usage)",0
msgbio .db "Incompatible BIOS or version, "
.db "HBIOS v", '0' + rmj, ".", '0' + rmn, " required",0
str_sep .db ": ",0
;
msgcpu .db "CPU is ",0
msgz80 .db "Z80",0
msgz180 .db "Z180",0
msgdone .db "End of Port Sweep",0
;
;
;
size .equ $ - runloc
;
.end

View File

@@ -0,0 +1,201 @@
;*****************************************************************************
;*****************************************************************************
;** **
;** AY-3-8910 Sound Test Program **
;** Author: Wayne Warthen -- 10/8/2017 **
;** **
;*****************************************************************************
;*****************************************************************************
;
;=============================================================================
; Constants Section
;=============================================================================
;
; Hardware port addresses
;
rsel .equ $9A ; Register seelection port address
rdat .equ $9B ; Register data port address
acr .equ $9C ; Aux control register port address
;
; CPU speed for delay scaling
;
cpuspd .equ 4 ; CPU speed in MHz
;
; BDOS invocation constants
;
bdos .equ $0005 ; BDOS invocation vector
print .equ 9 ; BDOS print function number
conwrt .equ 2 ; BDOS console write char
;
;=============================================================================
; Code Section
;=============================================================================
;
.org $100
;
ld (stksav),sp ; save incoming stack frame
ld sp,stack ; setup our private stack
;
ld de,banner ; load banner string address
ld c,print ; BDOS print function number
call bdos ; do it
;
ld a,$FF ; SCG board activation value
out (acr),a ; write value to ACR
;
xor a ; zero accum
ld (chan),a ; init channel number
;
chloop:
; Test each channel
call tstchan ; test the current channel
ld hl,chan ; point to channel number
ld a,(chan) ; get current channel
inc a ; bump to next
ld (chan),a ; save it
cp 3 ; end of channels?
jr nz,chloop ; loop if not done
;
ld de,crlf ; newline
ld c,print ; BDOS print function
call bdos ; do it
;
ld sp,(stksav) ; restore stack
;
ret ; end of program
;
tstchan:
; Display channel being tested
ld de,chmsg ; point to channel message
ld c,print ; BDOS print function number
call bdos ; do it
ld a,(chan) ; get current channel number
add a,'A' ; offset to print as alpha
ld e,a ; put in E
ld c,conwrt ; BDOS console out function number
call bdos ; do it
ld de,chmsg2 ; point to channel message
ld c,print ; BDOS print function number
call bdos ; do it
;
ld hl,0 ; initial pitch value
ld (pitch),hl ; save it
;
; Setup mixer register
ld a,(chan) ; get channel num (0-2)
inc a ; adjust index (1-3)
ld b,a ; and use as loop counter
xor a ; clear accum
scf ; set carry
mixloop:
rla ; rotate bit
djnz mixloop ; loop based on channel num
cpl ; invert bits
and $FF ; so only target bit is cleared
push af ; save value
ld a,7 ; mixer register
out (rsel),a ; select it
pop af ; recover value
out (rdat),a ; and set register value
;
; Set channel volume to max
ld a,(chan) ; get channel
add a,8 ; adjust for start of vol regs
out (rsel),a ; select register
ld a,$0F ; max volume
out (rdat),a ; write it
;
pitloop:
; Pitch loop
ld a,(chan) ; get channel
sla a ; A := channel pitch reg, 2 bytes per chan
out (rsel),a ; select low byte register
push af ; save register
ld a,l ; get low byte of pitch value
out (rdat),a ; and write it to register
pop af ; recover register index
inc a ; inc to high byte pitch register
out (rsel),a ; select high byte register
ld a,h ; get high byte of pitch value
out (rdat),a ; and write it to register
;
; Delay
ld b,cpuspd ; cpu speed scalar
dlyloop:
call dly64 ; arbitrary delay
djnz dlyloop ; loop based on cpu speed
;
; Next pitch value
ld hl,(pitch) ; get current pitch
inc hl ; increment
ld (pitch),hl ; save new value
ld a,h ; get high byte
;cp 16 ; end of max range?
cp 4 ; end of max range?
jr nz,pitloop ; loop till done
;
; Clean up
call clrpsg ; shut down psg
;
ret ; done
;
; Clear PSG registers to default
;
clrpsg:
ld b,16 ; loop for 18 registers
ld c,0 ; init register index
clrpsg1:
ld a,c ; register num to accum
out (rsel),a ; select it
xor a ; clear accum
out (rdat),a ; and write to register
inc c ; next register
djnz clrpsg1 ; loop through all registers
ret ; return
;
; Program PSG registers from list at HL
;
setpsg:
ld a,(hl) ; get psg reg number
inc hl ; bump index
cp $FF ; check for end
ret z ; return if end marker $FF
out (rsel),a ; select psg register
ld a,(hl) ; get register value
inc hl ; bump index
out (rdat),a ; set register value
jr setpsg ; loop till done
;
; Short delay functions. No clock speed compensation, so they
; will run longer on slower systems. The number indicates the
; number of call/ret invocations. A single call/ret is
; 27 t-states on a z80, 25 t-states on a z180
;
dly256: call dly128
dly128: call dly64
dly64: call dly32
dly32: call dly16
dly16: call dly8
dly8: call dly4
dly4: call dly2
dly2: call dly1
dly1: ret
;
;=============================================================================
; Data Section
;=============================================================================
;
chan .db 0 ; active audio channel
pitch .dw 0 ; current pitch
;
banner .text "\r\nRetroBrew Computers SCG AY-3-8910 Sound Test\r\n"
.text "Set SCG board base I/O address to 0x98\r\n$"
chmsg .text "\r\nPlaying descending tones on channel $"
chmsg2 .text "...$"
crlf .text "\r\n$"
;
stksav .dw 0 ; saved stack frame
.fill 80,$FF ; 40 level private stack
stack .equ $ ; start of stack
;
.end

View File

@@ -1,8 +1,5 @@
IDENT .EQU $FFFE ; loc of RomWBW HBIOS ident ptr
;
RMJ .EQU 3 ; intended CBIOS version - major
RMN .EQU 1 ; intended CBIOS version - minor
;
BF_SYSVER .EQU $F1 ; BIOS: VER function
BF_SYSGET .EQU $F8 ; HBIOS: SYSGET function
;

View File

@@ -45,6 +45,7 @@
; 2021-08-13 [WBW] Add support for LiNC Z50 Sound Card
; 2021-08-17 [WBW] When playing via HBIOS, call BF_SNDRESET at end
; 2022-03-20 [DDW] Add support for MBC PSG module
; 2023-03-30 [WBW] Fix for quark delay adjustment being trashed
;_______________________________________________________________________________
;
; ToDo:
@@ -55,6 +56,7 @@
; Main program
;===============================================================================
;
#include "../../ver.inc"
#include "hbios.inc"
#include "cpm.inc"
#include "tune.inc"
@@ -300,6 +302,11 @@ GOPT3 LD A,0 ; SETUP value to PT3 sound files
JR GOPTX ; Play PTx file
GOPTX
LD HL,(QDLY) ; Get basic quark delay
OR A ; Clear carry
SBC HL,DE ; Adjust for file type
LD (QDLY),HL ; Save updated quark delay factor
CALL CRLF2
LD DE, MSGSONGNAME ; Print song name message
CALL PRTSTR
@@ -321,10 +328,6 @@ GOPTX2 LD A,(DE)
CALL CRLF2 ; Formatting
LD DE,MSGPLY ; Playing message
CALL PRTSTR ; Print message
LD HL,(QDLY) ; Get basic quark delay
OR A ; Clear carry
SBC HL,DE ; Adjust for file type
LD (QDLY),HL ; Save updated quark delay factor
CALL START ; Do initialization
PTXLP CALL START+5 ; Play one quark
LD A,(START+10) ; Get setup byte
@@ -654,8 +657,8 @@ TMP .DB 0 ; work around use of undocumented Z80
HBIOSMD .DB 0 ; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE
OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN
MSGBAN .DB "Tune Player for RomWBW v3.5, 20-Mar-2022",0
MSGUSE .DB "Copyright (C) 2021, Wayne Warthen, GNU GPL v3",13,10
MSGBAN .DB "Tune Player for RomWBW v3.5a, 30-Mar-2023",0
MSGUSE .DB "Copyright (C) 2023, Wayne Warthen, GNU GPL v3",13,10
.DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
.DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10
.DB "Usage: TUNE <filename>.[PT2|PT3|MYM] [--hbios] [+tn|-tn]",0
@@ -674,9 +677,9 @@ MSGERR .DB "App Error", 0
;
HWSTR_SCG .DB "SCG ECB Board",0
HWSTR_N8 .DB "N8 Onboard Sound",0
HWSTR_RCEB .DB "RC2014 Sound Module (EB)",0
HWSTR_RCEB6 .DB "RC2014 Sound Module (EBv6)",0
HWSTR_RCMF .DB "RC2014 Sound Module (MF)",0
HWSTR_RCEB .DB "RCBus Sound Module (EB)",0
HWSTR_RCEB6 .DB "RCBus Sound Module (EBv6)",0
HWSTR_RCMF .DB "RCBus Sound Module (MF)",0
HWSTR_LINC .DB "Z50 LiNC Sound Module",0
HWSTR_MBC .DB "NHYODYNE Sound Module",0

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View File

@@ -21,8 +21,8 @@ Supported platforms
===================
VGM Player is currently being developed on the ROMWBW platform using the Retrobrew computers
EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612 and 2xSN76489) board.
It can be configured to run with other hardware such as RC2014, P8X180 and nhyodyne MBC.
EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612,YM2151 2xSN76489) board.
It can be configured to run with other hardware such as RCBus, P8X180 and nhyodyne MBC.
VGM files can be very big and are limited in size by the available TPA space, which is typically 52k.
@@ -50,13 +50,15 @@ FIELDMAP.VGM - SN76489+YM2612 - Taikou Risshiden: Field Map: Summer
ITSGAMOV.VGM - SN76489+YM2612 - Puyo Puyo Tsuu: It's Game Over! : 16K
STARTDEM.VGN - 2xSN76489+AY-3-8910 * Exed Exes / Savage Bees: Start Demo ~Main BGM : 32K
INCHINA.VGM - YM2612 * Double Dragon 3: The Rosetta Stone: In China : 44K
SURE.VGM - YM2151 - Martial Age: Sure?? : 36K
SABERDAN.VGM - YM2151 - Road Runner: Sabre Dance (Attract Mode - Stage 4) : 28K
* Included in disk images
VGM sources
===========
https://www.smspower.org/forums/15359-VGMPacksGameGearMegaCollection
https://vgmrips.net/packs/chip/ym2612
https://vgmrips.net/packs/chip/ym2151
https://project2612.org/
VGM Tools
@@ -67,8 +69,8 @@ https://github.com/vgmrips/vgmtools
References
==========
http://www.primrosebank.net/computers/mtx/tools/PD/vgmplayer.zip - Paul Daniels MTX SN76489 interrupt version with embedded VGM tune.
https://github.com/jblang/SN76489/blob/master/examples/vgmplayer.asm - J.B. Langston RC2014 polled version with file loading.
https://github.com/jblang/SN76489/blob/master/examples/vgmplayer.asm - J.B. Langston RCBus polled version with file loading.
https://groups.google.com/g/rc2014-z80/c/9nHnETJzGKU - Marco Maccaferri P8X180 & AY-3-8910 support
https://github.com/electrified/rc2014-ym2151/tree/main/software/vgmplay - Ed Brindly RC2014 & YM2151 support
https://github.com/electrified/rc2014-ym2151/tree/main/software/vgmplay - Ed Brindly RCBus & YM2151 support
ROMWBW version by Phil Summers. VGM Player is still in development. The ECB-VGM is also still under development.

View File

@@ -4,7 +4,7 @@
;
; Wayne Warthen - wwarthen@gmail.com
;
; 2018-06-06 WBW Added support for RC2014 w/ Z180
; 2018-06-06 WBW Added support for RCBus w/ Z180
; 2019-08-17 WBW Refactored and merged Phil's ECB-FIFO support
; 2019-08-28 WBW Refactored ASCI support
;
@@ -575,7 +575,7 @@ A_SPEED:
;=======================================================================
;
; Currently assumes the port address and ordering conventions of the
; official RC2014 SIO module. Will not work with others such as EZZ80
; official RCBus SIO module. Will not work with others such as EZZ80
; or ZP.
;
; SIO port constants

View File

@@ -10,6 +10,8 @@
;
#include "../../HBIOS/hbios.inc"
;
#include "../../ver.inc"
;
; General operational equates (should not requre adjustment)
;
stksiz .equ $40 ; Working stack size
@@ -23,9 +25,6 @@ bdos .equ $0005 ; BDOS invocation vector
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
;
rmj .equ 3 ; intended CBIOS version - major
rmn .equ 1 ; intended CBIOS version - minor
;
;=======================================================================
;
.org $100 ; standard CP/M executable
@@ -192,7 +191,7 @@ show_spd:
rst 08
jp nz,err_not_sup
call crlf2
push de ; save CPU speed for now
ld (cpu_spd),de ; save CPU speed for now
push bc ; Oscillator speed to HL
pop hl
ld de,str_spacer
@@ -204,7 +203,7 @@ show_spd:
ld c,BF_SYSGET_CPUSPD
rst 08
jp nz,err_not_sup
push de
push de ; save wait states for now
ld a,l
ld de,str_slow
cp 0
@@ -219,9 +218,7 @@ show_spd:
show_spd1:
call crlf
call prtstr
pop bc ; recover wait states
pop hl ; recover CPU speed
push bc ; resave wait states
ld hl,(cpu_spd) ; recover CPU speed
call prtd3m
ld de,str_cpuspd
call prtstr
@@ -696,6 +693,7 @@ stack .equ $ ; stack top
;
;
tmpstr .fill 9,0 ; temp string (8 chars, 0 term)
cpu_spd .dw 0 ; current cpu speed
new_cpu_spd .db $FF ; new CPU speed
new_ws_mem .db $FF ; new memory wait states
new_ws_io .db $FF ; new I/O wait states

View File

@@ -37,6 +37,8 @@
; 1) Implement flow control settings
;_______________________________________________________________________________
;
#include "../ver.inc"
;
;===============================================================================
; Definitions
;===============================================================================
@@ -48,9 +50,6 @@ bdos .equ $0005 ; BDOS invocation vector
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
;
rmj .equ 3 ; intended CBIOS version - major
rmn .equ 1 ; intended CBIOS version - minor
;
bf_cioinit .equ $04 ; HBIOS: CIOINIT function
bf_cioquery .equ $05 ; HBIOS: CIOQUERY function
bf_ciodevice .equ $06 ; HBIOS: CIODEVICE function

View File

@@ -19,7 +19,7 @@
;
;[2018/11/8] v1.2 PMS Add boot option. Code optimization.
;
;[2019/06/21] v1.3 Finalized RC2014 Z180 support.
;[2019/06/21] v1.3 Finalized RCBus Z180 support.
;
;[2019/08/11] v1.4 Support SCZ180 platform.
;
@@ -41,8 +41,8 @@ mask_rst .EQU %00010000 ; De-activate RTC reset line
PORT_SBC .EQU $70 ; RTC port for SBC/ZETA
PORT_N8 .EQU $88 ; RTC port for N8
PORT_MK4 .EQU $8A ; RTC port for MK4
PORT_RCZ80 .EQU $C0 ; RTC port for RC2014
PORT_RCZ180 .EQU $0C ; RTC port for RC2014
PORT_RCZ80 .EQU $C0 ; RTC port for RCBus
PORT_RCZ180 .EQU $0C ; RTC port for RCBus
PORT_EZZ80 .EQU $C0 ; RTC port for EZZ80 (actually does not have one!!!)
PORT_SCZ180 .EQU $0C ; RTC port for SCZ180
PORT_DYNO .EQU $0C ; RTC port for DYNO
@@ -1097,12 +1097,12 @@ HINIT:
;
LD C,PORT_RCZ80
LD DE,PLT_RCZ80
CP $07 ; RC2014 w/ Z80
CP $07 ; RCBus w/ Z80
JR Z,RTC_INIT2
;
LD C,PORT_RCZ180
LD DE,PLT_RCZ180
CP $08 ; RC2014 w/ Z180
CP $08 ; RCBus w/ Z180
JR Z,RTC_INIT2
;
LD C,PORT_EZZ80
@@ -1752,12 +1752,12 @@ BOOTMSG .TEXT "\r\n\r\nRebooting...$"
PLT_SBC .TEXT ", SBC/Zeta RTC Latch Port 0x70\r\n$"
PLT_N8 .TEXT ", N8 RTC Latch Port 0x88\r\n$"
PLT_MK4 .TEXT ", Mark 4 RTC Latch Port 0x8A\r\n$"
PLT_RCZ80 .TEXT ", RC2014 Z80 RTC Module Latch Port 0xC0\r\n$"
PLT_RCZ180 .TEXT ", RC2014 Z180 RTC Module Latch Port 0x0C\r\n$"
PLT_RCZ80 .TEXT ", RCBus Z80 RTC Module Latch Port 0xC0\r\n$"
PLT_RCZ180 .TEXT ", RCBus Z180 RTC Module Latch Port 0x0C\r\n$"
PLT_EZZ80 .TEXT ", Easy Z80 RTC Module Latch Port 0xC0\r\n$"
PLT_SCZ180 .TEXT ", SC Z180 RTC Module Latch Port 0x0C\r\n$"
PLT_DYNO .TEXT ", DYNO RTC Module Latch Port 0x0C\r\n$"
PLT_RCZ280 .TEXT ", RC2014 Z280 RTC Module Latch Port 0xC0\r\n$"
PLT_RCZ280 .TEXT ", RCBus Z280 RTC Module Latch Port 0xC0\r\n$"
PLT_MBC .TEXT ", MBC RTC Latch Port 0x70\r\n$"
PLT_RPH .TEXT ", RHYOPHYRE RTC Latch Port 0x84\r\n$"

View File

@@ -25,6 +25,8 @@
; ToDo:
;_______________________________________________________________________________
;
#include "../ver.inc"
;
;===============================================================================
; Definitions
;===============================================================================
@@ -36,9 +38,6 @@ bdos .equ $0005 ; BDOS invocation vector
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
;
rmj .equ 3 ; intended CBIOS version - major
rmn .equ 1 ; intended CBIOS version - minor
;
bf_sysver .equ $F1 ; BIOS: VER function
bf_sysget .equ $F8 ; HBIOS: SYSGET function
bf_sysset .equ $F9 ; HBIOS: SYSGET function

View File

@@ -2381,7 +2381,7 @@ INIT3:
;
ERR_BIOMEM:
CALL NEWLINE2 ; FORMATTING
LD DE,STR_BIOMEM ; HBIOS HEAP MEM OVERFLOW
LD DE,STR_HEAPOVF ; HBIOS HEAP MEM OVERFLOW
CALL WRITESTR ; TELL THE USER
CALL PANIC ; AND GRIND TO A SCREACHING HALT
;
@@ -3436,7 +3436,7 @@ STR_INITRAMDISK .DB "Formatting RAMDISK...$"
STR_LDR2 .DB "\r\n"
STR_LDR .DB "\r\n $"
STR_DPHINIT .DB "Configuring Drives...$"
STR_HEAPOVF .DB " *** Insufficient Memory ***$"
STR_HEAPOVF .DB " *** Insufficient HBIOS Heap Memory ***$"
STR_INVMED .DB " *** Invalid Device ID ***$"
STR_VERMIS .DB 7,"*** WARNING: HBIOS/CBIOS Version Mismatch ***$"
STR_MEMFREE .DB " Disk Buffer Bytes Free$"
@@ -3444,7 +3444,6 @@ STR_CPM .DB "CP/M-80 v2.2$"
STR_ZSDOS .DB "ZSDOS v1.1$"
STR_TPA1 .DB ", $"
STR_TPA2 .DB "K TPA$"
STR_BIOMEM .DB "*** HBIOS Heap Overflow ***$"
#IFDEF PLTUNA
INIBUF .FILL 512,0 ; LOCATION OF TEMP WORK BUF DURING INIT (512 BYTES)

View File

@@ -104,7 +104,7 @@ The `ASSIGN` command supports "stacking" of instructions. For example,
two slices of IDE 0 and will unassign E:.
When the command runs it will echo the resultant assignments to the
console to confirm it's actions. It will also display the remaining
console to confirm its actions. It will also display the remaining
space available in disk buffers.
## Notes
@@ -158,7 +158,7 @@ should only be specified for hard disk devices (SD, IDE, PPIDE).
Only one drive letter may be assigned to a specific device/unit/slice
at a time. Attempts to assign a duplicate drive letter will fail and
display an error. If you wish to assign a different drive letter to a
device/unit/slice, unassign the the existing drive letter first.
device/unit/slice, unassign the existing drive letter first.
Be aware that this command will allow you to reassign or remove the
assignment of your system drive letter. This can cause your operating
@@ -235,8 +235,8 @@ confusing that ZPM3 is in the file called CPM3.SYS, but it is normal
for ZPM3.
For the purposes of booting an operating system, each disk slice is
considered it's own operating system. Each slice can be made bootable
with it's own system tracks.
considered its own operating system. Each slice can be made bootable
with its own system tracks.
`SYSCOPY` uses drive letters to specify where to read/write the system
boot images. However, at startup, the boot loaded will require you to
@@ -246,7 +246,7 @@ to a drive letter so you will know what to enter at the boot loader
prompt. By way of explanation, the boot loader does not know about
drive letters because the operating system is not loaded yet.
If you want to put a a boot system image on a device and slice that is
If you want to put a boot system image on a device and slice that is
not currently assigned to a drive letter, you will need to assign a
drive letter first.
@@ -466,7 +466,7 @@ control is fully functional (end to end).
The `XM` application provided in RomWBW is an adaptation of a
pre-existing XModem application. Based on the source code comments, it
was originally adapted from Ward Christensen's MODEM2 by Keith
Petersen and is labeled version 12.5.
Petersen and is labelled version 12.5.
The original source of the application was found in the Walnut Creek
CD-ROM and is called XMDM125.ARK dated 7/15/86.
@@ -529,14 +529,14 @@ manually perform a verification function with the `FLASH VERIFY` form
of the command.
The author's documentation for the application is found in the RomWBW
distribution in the Doc\\Contrib directory.
distribution in the Doc/Contrib directory.
## Notes
The application supports a significant number of EEPROM parts. It
should automatically detect your part. If it does not recognize your
chip, make sure that you do not have a write protect jumper set --
this jumper will cause the ROM chip type to be unrecognized.
this jumper can prevent the ROM chip from being recognized.
Reprogramming a ROM chip in-place is inherently dangerous. If anything
goes wrong, you will be left with a non-functional system and no
@@ -557,12 +557,17 @@ GitHub repository](https://github.com/willsowerbutts/flash4).
# FDISK80
RomWBW supports disk media with MS-DOS FAT filesystems (see FAT
application). If you wish to put a FAT filesystem on your media, the
FDISK80 application can be used to partition your media which is
required in order to add a FAT filesystem.
`FDISK80` allows you to create and manage traditional partitions on
your hard disk media. Depending on the hard disk format and features
you are using, RomWBW may need hard disk partitions defined.
This application is provided by John Coffman.
Please refer to the $doc_user$ for more information on the use of
partitions within RomWBW. It is very important to understand that
RomWBW slices are completely different from disk partitions.
This application is provided by John Coffman. The primary
documentation is in the file "FDisk Manual.pdf" found in the
Doc directory of the RomWBW distribution.
## Usage
@@ -577,20 +582,15 @@ applications. Please refer to the file called "FDisk Manual.pdf" in
the Doc directory of the RomWBW distribution for further instructions.
There is also more information on using FAT partitions with RomWBW in
the "RomWBW Getting Started.pdf" document in the Doc directory of the
distribution.
the $doc_user$ document in the Doc directory of the distribution.
## Notes
Partitioning of RomWBW media is **only** required if you want to add a
FAT filesystem to your media. Do not partition your media if you are
simply using it for RomWBW. To be clear, RomWBW slices do not require
partitioning.
As described in "RomWBW Getting Started.pdf", you should be careful
when adding a FAT partition to your media that the partition does not
overlap with the area of the media being used for RomWBW slices. The
"(R)eserve" function in `FDISK80` can help prevent this.
Hard disk partition tables allow a maximum of 1024 cylinders when
defining partitions. However, RomWBW uses exclusively Logical Block
Addressing (LBA) which does not have this limitation. When defining
partitions is usually best to define the start and size of of the
partition using bytes or sectors.
## Etymology
@@ -661,7 +661,7 @@ After startup, the application provides the following options:
| `R)aw` | will read the minute/second of the RTC clock iteratively every time the space key is pressed. Press enter to end. |
| `L)oop` | will read the full date/time of the RTC clock iteratively every time the space key is pressed. Press enter to end. |
| `C)harge` | will enable the battery charging function of the RTC. |
| `N)ocharge` | will disable the battery charging functino of the RTC. |
| `N)ocharge` | will disable the battery charging function of the RTC. |
| `D)elay` | allows you to test the built-in timing delay in the program. It is not unusual for it to be wrong. |
| `I)nit` | allows you to enter a date/time value for subsequent programming of the RTC using the S)et option. |
| `G)et` | allows you to read the value of a non-volatile register in the RTC. |
@@ -683,7 +683,7 @@ bypassing HBIOS.
## Etymology
The `RTC` application was originally written by Andrew Lync as part of
The `RTC` application was originally written by Andrew Lynch as part of
the original ECB SBC board development. It has since been modified to
support most of the hardware variations included with RomWBW.
@@ -922,7 +922,7 @@ for the hardware found. If no hardware is detected, it will abort with
an error message.
On Z180 systems, I/O wait states are added when writing to the sound
chip to avoid exceeding it's speed limitations. On Z80 systems, you
chip to avoid exceeding its speed limitations. On Z80 systems, you
will need to ensure that the CPU clock speed of your system does not
exceed the timing limitations of your sound chip.
@@ -939,7 +939,7 @@ By default the application will attempt to interface directly to the sound
chip. The optional argument `--hbios` supplied after the filename, will
enable the application to use the HBIOS sound driver.
The HBIOS mode also support other switch as desribed below.
The HBIOS mode also support other switch as described below.
| Switch | Description |
| ----------- | ------------------------------------------------------ |
@@ -1012,9 +1012,9 @@ speed will actually work on the current hardware. Setting a CPU
speed that exceeds the capabilities of the system will result in
unstable operation or a system stall.
Some peripherals are dependant on the CPU speed. For example, the Z180
Some peripherals are dependent on the CPU speed. For example, the Z180
ASCI baud rate and system timer are derived from the CPU speed. The
CPUSPD applicastion will attempt to adjust these peripherals for
CPUSPD application will attempt to adjust these peripherals for
correct operation after modifying the CPU speed. However, in some
cases this may not be possible. The baud rate of ASCI ports have a
limited set of divisors. If there is no satisfactory divisor to
@@ -1028,3 +1028,81 @@ hardware interface code is specific to RomWBW and the application will
not operate correctly on non-RomWBW systems.
The source code is provided in the RomWBW distribution.
`\clearpage`{=latex}
# VGMPLAY
This application will allow you to play Video Game Music files. VGM
files contain music samples from a range of different sound chips
that were used in arcade games, game consoles and personal computer
systems.
Video Game Music files have a .VGM file extension and each file
contains an embedded header that identifies the hardware it is
intended for and also the title of the music.
All RomWBW operating system boot disks include a selection of sound
files in user area 3. Additional music files can be found at:
[VGMRIPS website](https://vgmrips.net)
[PROJECT2612 website](https://project2612.org/)
Sound files are loaded into memory for playback, so the maximum size
file that can be played is around 52Kb.
Sound chips currently supported are:
* AY-3-8190 (and equivalent YM2149)
* YM2612 (and equivalent YM3848)
* SN76489 (single chip mono and dual chip stereo)
* YM2151
VGMPLAY supports playback of files with multiple combinations of these
chips.
## Syntax
`VGMPLAY `*`<filename>`*
*`<filename>`* is the name of a sound file ending in .VGM
## Usage
VGMPLAY does not automatically detect the hardware platform or sound
hardware that you are using. This means a version customized for your
system must be assembled before use.
To play a sound file, just use the VGMPLAY command and specify the file
to play after the command. So, for example, `VGMPLAY TEDDY` will load
the TEDDY.VGM sound file into memory and begin playing it.
Playback can be stopped by pressing a key. There may be a delay before
playback stops.
## Notes
The default build configuration for VGMPLAY is:
CPU speed: Autodetected
| chip | number | port | notes
| --------- | ------- | -------- | ----------
| AY-3-8910 | 1st | 09ah | stereo
| AY-3-8910 | 2nd | not set | stereo
| YM2612 | 1st | 0c0h | stereo
| YM2612 | 2nd | 0c4h | stereo
| SN76489 | 1st | 0c8h | mono/left
| SN76489 | 2nd | 0c9h | mono/right
| YM2151 | 1st | 0cah | stereo
| YM2151 | 2nd | 0cbh | stereo
Inconsistant, garbled or distorted playback can be an indication that
your CPU clock speed is too high for your sound chip. In this case, if
your platform supports speed switching, then the CPUSPD application
can be used to reduce your processor speed.
VGMPLAY is still under development. The source code is provided in the
RomWBW distribution.

View File

@@ -1,4 +1,4 @@
$define{doc_ver}{Version 3.1 Pre-release}$
$define{doc_ver}{Version 3.3}$
$define{doc_product}{RomWBW}$
$define{doc_root}{https://github.com/wwarthen/RomWBW/raw/dev/Doc}$
$ifndef{doc_title}$ $define{doc_title}{Document Title}$ $endif$

View File

@@ -11,12 +11,13 @@ toc-depth: 2
numbersections: true
secnumdepth: 2
header-includes:
- \setlength{\headheight}{15pt}
- |
```{=latex}
\setlength{\headheight}{15pt}
\usepackage{fancyhdr}
\usepackage{xcolor}
\usepackage{xhfill}
\usepackage{tocloft}
\renewcommand*{\familydefault}{\sfdefault}
\renewcommand{\maketitle}{
\begin{titlepage}
@@ -44,6 +45,7 @@ include-before:
```{=latex}
\pagestyle{fancyplain}
\fancyhf{}
\lhead{\fancyplain{}{\nouppercase{\bfseries \leftmark \hfill $doc_product$ $doc_title$}}}
\lfoot{\small RetroBrew Computing Group ~~ {\xrfill[3pt]{1pt}[cyan]} ~~ \thepage}
\pagenumbering{roman}
```
@@ -52,5 +54,4 @@ include-before:
```{=latex}
\clearpage
\pagenumbering{arabic}
\lhead{\fancyplain{}{\nouppercase{\bfseries \leftmark \hfill $doc_product$ $doc_title$}}}
```

Binary file not shown.

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After

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@@ -246,7 +246,7 @@ memory starting at location xxxx.
protocol.
If the monitor is assembled with the DSKY functionality,
this feature will be exclude due to space limitions.
this feature will be exclude due to space limitations.
## NOTES:
@@ -492,6 +492,8 @@ When your console is the serial device used for the transfer, no progress inform
Due to different platform processor speeds, serials speeds and flow control capabilities the default console or serial device speed may need to be reduced for a successful transfer and flash to occur. The **Set Console Interface/Baud code** option at the Boot Loader can be used to change the speed if required. Additionally, the Updater has options to set to and revert from a recommended speed.
See the ROMWBW Applications guide for additional information on performing upgrades.
## Console Options
Option ( C ) - Set Console Device
@@ -622,7 +624,7 @@ Feedback to the ROMWBW developers on these guidelines would be appreciated.
## Notes:
All testing was done with Teraterm x-modem, Forcing checksum mode using macros was found to give the most reliable transfer.
Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before before being written.
Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before being written.
An SBC V2-005 MegaFlash or Z80 MBC required for 1mb flash support. The Updater assumes both chips are same type
Failure handling has not been tested.
Timing broadly calibrated on a Z80 SBC-v2

View File

@@ -117,7 +117,7 @@ please let me know if I missed you!
* Andrew Lynch started it all when he created the N8VEM Z80 SBC
which became the first platform RomWBW supported. Some of his
code can still be found in RomWBW.
original code can still be found in RomWBW.
* Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
@@ -129,23 +129,30 @@ please let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
* Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
* David Giles created support for the Z180 CSIO which is now included
SD Card driver.
* Ed Brindley contributed some of the code that supports the RC2014
* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
* Ed Brindley contributed some of the code that supports the RCBus
platform.
* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
* Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage.
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
* Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW
with many of them.
* Alan Cox has contributed some driver code and has provided a great
deal of advice.
* The CP/NET client files were developed by Douglas Miller.
* Phillip Stevens contributed support for FreeRTOS.
@@ -186,15 +193,15 @@ Portions of RomWBW were created by, contributed by, or derived from
the work of others. It is believed that these works are being used
in accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of it's intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen
> wwarthen@gmail.com
> $doc_author$ \
> [$doc_authmail$](mailto:$doc_authmail$)
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as
a cohesive system. Each program may have it's own licensing which
a cohesive system. Each program may have its own licensing which
may be different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is

View File

@@ -182,7 +182,7 @@ not know anything about what is being loaded (the image is usually an
operating system, but could be any executable code image). Once the Boot
Loader has loaded the image at the selected location, it will transfer
control to it. Assuming the typical situation where the image was an
operating system, the loaded operating system will then perform it's own
operating system, the loaded operating system will then perform its own
initialization and begin normal operation.
## Application Boot
@@ -207,8 +207,8 @@ the previously running operating system starting at $0100. Note that the
program image contains a full copy of the HBIOS to be installed and run. Once
the Application Boot program is loaded by the previous operating system,
control is passed to it and it performs a system initialization similar
to the ROM Boot, but using the image loaded in RAM. Once te new
HBIOS completes it's initialization, it will launch the Boot Loader
to the ROM Boot, but using the image loaded in RAM. Once the new
HBIOS completes its initialization, it will launch the Boot Loader
just like a ROM boot.
The Application Boot program actually contains two other components
@@ -228,7 +228,7 @@ they have a small hardware bootstrap that loads a chunk of code from a
disk device directly into RAM at system startup.
The startup then proceeds very much like the Application Boot
process described above. HBIOS is installed in it's operating bank
process described above. HBIOS is installed in its operating bank
and control is passed to the Boot Loader.
# Driver Model
@@ -245,7 +245,7 @@ layout expected by the operating system and application.
Drivers do need to be aware of the bank switching if a buffer address
is being used in the function call.
* If the buffer address is in the lower 32K of RAM, then the memroy
* If the buffer address is in the lower 32K of RAM, then the memory
it points to will be from the User Bank, not the HBIOS bank which
is now active. In this case, the driver must use an inter-bank
copy to access the data.
@@ -363,7 +363,7 @@ HBIOS functions. Most function calls will return a result in register A.
| -1 | undefined error |
| -2 | function not implemented |
| -3 | invalid function |
| -4 | invalid unit numberr |
| -4 | invalid unit number |
| -5 | out of memory |
| -6 | parameter out of range |
| -7 | media not present |
@@ -617,7 +617,7 @@ Returns the driver specific Status (A) of the specified disk device unit
The return value in register A is used as both a device status and a
standard HBIOS result code. Negative values (bit 7 set) indicate a
standard HBIOS result (error) code. Otherwise, the return value
represents a driver-specific device status. In call cases, the value 0
represents a driver-specific device status. In all cases, the value 0
means OK.
### Function 0x11 -- Disk Reset (DIORESET)
@@ -1241,7 +1241,7 @@ The Status (A) is a standard HBIOS result code.
Assign the specified character Attribute (E) code to be used for all
subsequent character writes/fills on the specified Video Unit (C). This
attribute is used to fill new lines generated by scroll operations. The
character attributes values are listed abovev. Note that a given video
character attributes values are listed above. Note that a given video
display may or may not support any/all attributes. The Status (A) is a
standard HBIOS result code.
@@ -1619,7 +1619,7 @@ Status (A) is a standard HBIOS result code.
| E: 0x04 | HL: Ports |
| | DE: Ports |
This subfunction reports detailed device informatoin for the specified
This subfunction reports detailed device information for the specified
Sound Unit (C).
Driver Identity (B) reports the audio device type. Ports (HL & DE)
@@ -1652,7 +1652,7 @@ the duration, the actual duration is applied in the SNDPLAY function.
If the Duration (HL) is set to zero, then the SNDPLAY function will
operate in a non-blocking mode. i.e. a tone will start playing and the
play function will return. The tone will continue to play until the next
tone is played. If the Duration (HL) is greater than zero, the the
tone is played. If the Duration (HL) is greater than zero, the
sound will play for the duration defined in HL and then return.
**\*\*\* Function Not Implemented \*\*\**
@@ -2024,7 +2024,7 @@ lookup.
Return the value of the global system timer Tick Count (DEHL). This is
a double-word binary value. The frequency of the system timer in Hertz
is returned in Frequncy (C). The returned Status (A) is a standard HBIOS
is returned in Frequency (C). The returned Status (A) is a standard HBIOS
result code.
Note that not all hardware configuration have a system timer. You
@@ -2116,13 +2116,24 @@ result code.
This function will return the running CPU speed attributes of a system.
The Clock Mult (L) returned indicates the frequency multiple being
applied to the raw oscillator clock. If is defined as: 0=Half, 2=Full,
and 3=Double. The wait states for the system are also provided as
applied to the raw oscillator clock. If is defined as: 0=Half, 1=Full,
and 2=Double. The wait states for the system are also provided as
Memory Wait States (D) and I/O Wait States (E). The value of Memory
Wait States (D) is the actual number of wait states, not the number
of wait states added. The returned Status (A) is a standard HBIOS
result code.
#### SYSGET Subfunction 0xF4 -- Get Front Panel Swithes (PANEL)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF8 | A: Status |
| C: 0xF4 | L: Switches |
This function will return the current value of the switches (L) from the
front panel of the system. If no front panel is available in the
system, the returned Status (A) will indicate a No Hardware error.
### Function 0xF9 -- System Set (SYSSET)
| **Entry Parameters** | **Returned Values** |
@@ -2197,7 +2208,7 @@ Wait States (E) will be set if possible. The value of Memory Wait
States (D) is the actual number of wait states, not the number of wait
states added.
Some peripherals are dependant on the CPU speed. For example, the Z180
Some peripherals are dependent on the CPU speed. For example, the Z180
ASCI baud rate and system timer are derived from the CPU speed. The
Set CPU Speed function will attempt to adjust these peripherals for
correct operation after modifying the CPU speed. However, in some
@@ -2206,6 +2217,18 @@ limited set of divisors. If there is no satisfactory divisor to
retain the existing baud rate under the new CPU speed, then the baud
rate of the ASCI port(s) will be affected.
#### SYSSET Subfunction 0xF4 -- Set Front Panel LEDs (PANEL)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF9 | A: Status |
| C: 0xF4 | |
| L: LEDs | |
This function will set the front panel LEDs based on the bits in L. If
no front panel is available in the system, the returned Status (A) will
indicate a No Hardware error.
### Function 0xFA -- System Peek (SYSPEEK)
| **Entry Parameters** | **Returned Values** |
@@ -2389,7 +2412,7 @@ are not reported to the console.
If the diagnosis level is set to display the diagnosis information, then
memory address, register dump and error code is displayed.
A key differance with the PANIC error is that execution may be continued.
A key difference with the PANIC error is that execution may be continued.
Example error message:

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View File

@@ -11,8 +11,8 @@ echo Preparing compressed font files...
lzsa -f2 -r font8x8u.bin font8x8c.bin || exit /b
lzsa -f2 -r font8x11u.bin font8x11c.bin || exit /b
lzsa -f2 -r font8x16u.bin font8x16c.bin || exit /b
lzsa -f2 -r fontcgau.bin fontcgac.bin || exit /b
lzsa -f2 -r fontvgarcu.bin fontvgarcc.bin || exit /b
fonttool font8x8u.bin > font8x8u.asm || exit /b
fonttool font8x11u.bin > font8x11u.asm || exit /b
@@ -20,6 +20,7 @@ fonttool font8x16u.bin > font8x16u.asm || exit /b
fonttool font8x8c.bin > font8x8c.asm || exit /b
fonttool font8x11c.bin > font8x11c.asm || exit /b
fonttool font8x16c.bin > font8x16c.asm || exit /b
fonttool fontcgau.bin > fontcgau.asm || exit /b
fonttool fontcgac.bin > fontcgac.asm || exit /b
fonttool fontvgarcu.bin > fontvgarcu.asm || exit /b
fonttool fontvgarcc.bin > fontvgarcc.asm || exit /b

View File

@@ -1,8 +1,8 @@
OBJECTS = \
font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm \
font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm
font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm fontvgarcu.asm \
font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm fontvgarcc.asm
OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin
OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin fontvgarcc.bin
TOOLS = ../../Tools
@@ -26,5 +26,8 @@ font8x16c.bin: font8x16u.bin
fontcgac.bin: fontcgau.bin
$(BINDIR)/lzsa -f2 -r $< $@
fontvgarcc.bin: fontvgarcu.bin
$(BINDIR)/lzsa -f2 -r $< $@
%.asm: %.bin
$(BINDIR)/bin2asm $< > $@

BIN
Source/Fonts/fontvgarcu.bin Normal file

Binary file not shown.

View File

@@ -117,7 +117,11 @@ GET ($F8):
L=Clock Mult (0:Half, 1:Full, 2: Double)
D=Memory Wait States
E=I/O Wait States
PANEL ($F4):
BC=Function/Subfunction A=Result
L=Switch Values
SET ($F9):
BC=Function/Subfunction A=Result
@@ -142,6 +146,11 @@ SET ($F9):
E=I/O Wait States
PANEL ($F4):
BC=Function/Subfunction A=Result
L=LED Values
PEEK ($FA):
B=Function A=Result
D=Bank E=Byte Value

View File

@@ -215,12 +215,14 @@ call Build RCZ280 ext || exit /b
call Build RCZ280 nat || exit /b
call Build RCZ280 zz80mb || exit /b
call Build RCZ280 zzrc || exit /b
call Build RCZ180 126 || exit /b
call Build RCZ180 130 || exit /b
call Build RCZ180 131 || exit /b
call Build RCZ180 140 || exit /b
call Build SCZ180 sc126 || exit /b
call Build SCZ180 sc130 || exit /b
call Build SCZ180 sc131 || exit /b
call Build SCZ180 sc140 || exit /b
call Build SCZ180 sc503 || exit /b
call Build DYNO std || exit /b
call Build UNA std || exit /b
call Build RPH std || exit /b
call Build Z80RETRO std || exit /b
goto :eof

View File

@@ -27,7 +27,7 @@ $ErrorAction = 'Stop'
# UNA BIOS is simply imbedded, it is not built here.
#
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "UNA"
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "UNA"
$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
$PlatformListZ280 = "RCZ280"

View File

@@ -32,11 +32,13 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="126"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="130"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="131"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="140"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc126"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc130"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc131"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh
exit

View File

@@ -48,6 +48,8 @@ DSKYMODE .SET DSKYMODE_NG ; DSKY VERSION: DSKYMODE_[V1|NG]
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)

View File

@@ -26,23 +26,31 @@
;
#include "cfg_mk4.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTCAS .SET TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .SET TRUE ; UART: AUTO-DETECT MF/PIC UART
UART4 .SET TRUE ; UART: AUTO-DETECT 4UART UART
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .SET TRUE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
;

View File

@@ -26,12 +26,19 @@
;
#include "cfg_n8.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDMODE .SET SDMODE_CSIO ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
;
SDMODE .SET SDMODE_CSIO ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z180 STANDARD CONFIGURATION (EXTERNAL MMU ON 512K RAM/ROM BANKED MEMORY MODULE)
; RCBUS Z180 STANDARD CONFIGURATION (EXTERNAL MMU ON 512K RAM/ROM BANKED MEMORY MODULE)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -29,6 +29,9 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -44,8 +47,9 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z180 STANDARD CONFIGURATION (NATIVE Z180 MMU W/ LINEAR MEMORY MODULE)
; RCBUS Z180 STANDARD CONFIGURATION (NATIVE Z180 MMU W/ LINEAR MEMORY MODULE)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -29,6 +29,9 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -44,11 +47,11 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (EXTERNAL MMU ON 512K RAM/ROM BANKED MEMORY MODULE)
; RCBUS Z280 STANDARD CONFIGURATION (EXTERNAL MMU ON 512K RAM/ROM BANKED MEMORY MODULE)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -30,6 +30,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -43,8 +46,9 @@ ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY)
; RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -30,6 +30,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -43,8 +46,9 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZ80MB)
; RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZ80MB)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -32,6 +32,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMLOC .SET 23 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -49,9 +52,10 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
; RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -32,6 +32,9 @@ CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMSIZE .SET 256 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -57,9 +60,10 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

View File

@@ -28,15 +28,17 @@
;
#include "cfg_rcz80.asm"
;
PLATFORM .SET PLT_EZZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
@@ -57,8 +59,9 @@ DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z80 STANDARD CONFIGURATION W/ KIO
; RCBUS Z80 STANDARD CONFIGURATION W/ KIO
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -30,6 +30,9 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
@@ -53,8 +56,9 @@ SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z80 STANDARD CONFIGURATION W/ SERGEY KISELEV Z80 + 512K CPU
; RCBUS Z80 STANDARD CONFIGURATION W/ SERGEY KISELEV Z80 + 512K CPU
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -29,6 +29,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
SKZENABLE .SET TRUE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .SET DIV_12 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .SET WDOG_SKZ ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
@@ -48,8 +51,9 @@ DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z80 STANDARD CONFIGURATION
; RCBUS Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -29,6 +29,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
@@ -37,10 +40,13 @@ ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -53,6 +59,7 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -28,15 +28,18 @@
;
#include "cfg_rcz80.asm"
;
PLATFORM .SET PLT_EZZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;
@@ -62,8 +65,9 @@ DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z80 ZRC CONFIGURATION
; RCBUS Z80 ZRC CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -30,6 +30,9 @@
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 1536 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
@@ -40,9 +43,10 @@ DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z80 ZRC CONFIGURATION
; RCBUS Z80 ZRC CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -31,6 +31,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 2048 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
@@ -44,8 +47,9 @@ DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -35,7 +35,8 @@ USELZSA2 .SET TRUE ; ENABLE FONT COMPRESSION
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSKYENABLE .SET TRUE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

View File

@@ -33,6 +33,7 @@ HTIMENABLE .SET TRUE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .SET TRUE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
;
HDSKENABLE .SET TRUE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTSBCFORCE .SET TRUE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
;
HDSKENABLE .SET TRUE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)

View File

@@ -26,19 +26,29 @@
;
#include "cfg_sbc.asm"
;
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTCAS .SET TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .SET TRUE ; UART: AUTO-DETECT MF/PIC UART
UART4 .SET TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .SET FALSE ; UART: AUTO-DETECT RC UART
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .SET TRUE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC]
;

View File

@@ -26,7 +26,7 @@
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -35,8 +35,9 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPLED_IO .SET $0D ; FP: PORT ADDRESS FOR FP LEDS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -48,8 +49,9 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -26,7 +26,7 @@
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -35,8 +35,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -48,11 +50,12 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;

View File

@@ -26,7 +26,7 @@
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
@@ -34,8 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

View File

@@ -26,7 +26,7 @@
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
@@ -34,9 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -59,3 +60,5 @@ SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS

View File

@@ -0,0 +1,64 @@
;
;==================================================================================================
; SC503 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "Small Computer SC503", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS

View File

@@ -0,0 +1,35 @@
;
;==================================================================================================
; ZETA2 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_z80retro.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -26,12 +26,18 @@
;
#include "cfg_zeta2.asm"
;
;UARTCFG .SET UARTCFG | SER_RTS
;
CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;UARTCFG .SET UARTCFG | SER_RTS
UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
PPPENABLE .SET TRUE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)

View File

@@ -26,10 +26,18 @@
;
#include "cfg_zeta.asm"
;
CPUOSC .SET 20000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;UARTCFG .SET UARTCFG | SER_RTS
UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
PPPENABLE .SET TRUE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)

View File

@@ -24,7 +24,8 @@ endif
include $(TOOLS)/Makefile.inc
FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm \
fontcgac.asm fontcgau.asm fontvgarcc.asm fontvgarcu.asm
ifeq ($(CPUFAM),2)
TASM=$(BINDIR)/uz80as -t hd64180

View File

@@ -634,9 +634,9 @@ ANSI_BEL:
ANSI_BS:
LD A,(ANSI_COL) ; GET CURRENT COLUMN
DEC A ; BACK IT UP BY ONE
RET C ; IF CARRY, MARGIN EXCEEDED, ABORT
RET M ; IF CARRY, MARGIN EXCEEDED, ABORT
LD (ANSI_COL),A ; SAVE NEW COLUMN
JP ANSI_XY ; UDPATE CUSROR AND RETURN
JP ANSI_XY ; UDPATE CURSOR AND RETURN
;
ANSI_CR:
XOR A ; ZERO ACCUM

View File

@@ -53,7 +53,7 @@
; ASEXT:
; 7 6 5 4 3 2 1 0
; R D C X B F D S
; 0 1 1 0 0 1 1 0 DEFAULT VALUES
; 0 1 1 0 0 0 0 0 DEFAULT VALUES
; | | | | | | | |
; | | | | | | | +-- SEND BREAK
; | | | | | | +---- BREAK DETECT (RO)
@@ -64,6 +64,10 @@
; | +-------------- DCD0 DISABLE
; +---------------- RDRF INT INHIBIT
;
ASCI_DEF_CNTLA .EQU $64
ASCI_DEF_CNTLB .EQU $20
ASCI_DEF_ASEXT .EQU $60
;
ASCI_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE
;
ASCI_NONE .EQU 0 ; NOT PRESENT
@@ -513,17 +517,29 @@ ASCI_INITDEV3:
SET 4,C ; SET CNTLB BIT 4 FOR ODD PARITY
;
ASCI_INITDEV4:
; SETUP ASEXT
LD A,D ; CONFIG HIGH BYTE
AND %00100000 ; BIT 5 IS RTS
CPL ; INVERT FOR ASEXT
LD L,A ; MOVE TO L
LD A,ASCI_DEF_ASEXT ; GET ASEXT DEFAULT
AND L ; COMBINE
LD L,A ; AND LEAVE IN L
;
; SAVE CONFIG PERMANENTLY NOW
LD (IY+4),E ; SAVE LOW WORD
LD (IY+5),D ; SAVE HI WORD
JR ASCI_INITGO
;
ASCI_INITSAFE:
LD B,$64 ; CNTLA FAILSAFE VALUE
LD C,$20 ; CNTLB FAILSAFE VALUE
LD B,ASCI_DEF_CNTLA ; CNTLA FAILSAFE VALUE
LD C,ASCI_DEF_CNTLB ; CNTLB FAILSAFE VALUE
LD L,ASCI_DEF_ASEXT ; ASEXT FAILSAFE VALUE
;
ASCI_INITGO:
; IMPLEMENT CONFIGURATION
; B = CNTLA, C=CNTLB, L=ASEXT
PUSH HL ; SAVE ASEXT
LD H,B ; H := CNTLA VAL
LD L,C ; L := CNTLB VAL
LD B,0 ; MSB OF PORT MUST BE ZERO!
@@ -532,6 +548,7 @@ ASCI_INITGO:
INC C ; BUMP TO
INC C ; ... CNTLB REG, B IS STILL 0
OUT (C),L ; WRITE CNTLB VALUE
POP HL ; RECOVER ASEXT
INC C ; BUMP TO
INC C ; ... STAT REG, B IS STILL 0
#IF ((ASCIINTS) & (INTMODE > 0))
@@ -543,8 +560,11 @@ ASCI_INITGO:
LD A,$0E ; BUMP TO
ADD A,C ; ... ASEXT REG
LD C,A ; PUT IN C FOR I/O, B IS STILL 0
LD A,$66 ; STATIC VALUE FOR ASEXT
OUT (C),A ; WRITE ASEXT REG
BIT 0,C ; IS C ADDRESSING AN ODD NUMBERED PORT?
JR NZ,ASCI_INITGOZ ; IF SO, THIS IS SEC SERIAL, NO CTS!
OUT (C),L ; WRITE ASEXT REG
;
ASCI_INITGOZ:
;
#IF ((ASCIINTS) & (INTMODE > 0))
;

View File

@@ -11,6 +11,13 @@
; @1.7897725 OCTAVE RANGE IS 2 - 7 (Bb2/A#2 .. A7)
; @2.0000000 OCTAVE RANGE IS 2 - 7 (B2 .. A7)
;
; DIFFENCES BETWEEN AY-3-8910 AND YM2149
; THE AY-3-8910 HAS 16 ENVELOPE LEVELS, YM2149 HAS 32.
; THIS AFFECTS AUDIO OUTPUT ONLY. THERE IS NO PROGRAMMING IMPACT.
; UNUSED BITS IN REGISTERS ARE READ AS ZERO ON AY-3-8910.
; UNUSED BITS CAN BE READ BACK AND WRITTEN ON YM.
; VOLTAGE LEVEL OUTPUT ON A AY-3-8910 IS LOW AND AROUND 2V ON YM2149.
;
AY_RCSND .EQU 0 ; 0 = EB MODULE, 1=MF MODULE
;
#IF (AYMODE == AYMODE_SCG)
@@ -101,8 +108,8 @@ AY_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS
;AY_SCALE .EQU 3 ; DATA TO MAINTAIN MAXIMUM
;#ENDIF ; RANGE AND ACCURACY
;
.ECHO "SN76489 CLOCK: "
.ECHO SN7CLK
.ECHO "AY38910 CLOCK: "
.ECHO AY_CLK
.ECHO "\n"
;
#INCLUDE "audio.inc"

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -146,7 +149,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +157,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -169,9 +172,10 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +187,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DYNO ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,7 +229,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

View File

@@ -12,7 +12,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -95,9 +95,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -194,7 +197,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -202,7 +205,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -222,10 +225,11 @@ GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
GDCMODE .EQU GDCMODE_RPH ; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
GDCMON .EQU GDCMON_EGA ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -237,9 +241,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -280,7 +284,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -307,7 +311,9 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -60,9 +60,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED
@@ -132,7 +135,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -150,10 +153,11 @@ CVDUMODE .EQU CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
CVDUMON .EQU CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -166,9 +170,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_MBC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -209,7 +213,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -230,8 +234,10 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_IBM ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -140,6 +143,17 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -150,10 +164,11 @@ CVDUMODE .EQU CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
CVDUMON .EQU CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -165,9 +180,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -208,7 +223,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -233,7 +248,9 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;

View File

@@ -11,11 +11,11 @@
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "N8", " [", CONFIG, "]"
#DEFINE PLATFORM_NAME "RetroBrew N8", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -68,9 +68,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -142,6 +145,17 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -152,10 +166,11 @@ CVDUMODE .EQU CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
CVDUMON .EQU CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -167,9 +182,9 @@ FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -210,7 +225,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 Z180 CPU
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -11,11 +11,11 @@
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "RC2014", " [", CONFIG, "]"
#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,18 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -146,7 +155,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +163,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -169,9 +178,10 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +193,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,7 +235,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -247,6 +257,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 Z280 CPU
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -11,11 +11,11 @@
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "RC2014", " [", CONFIG, "]"
#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z280 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -156,7 +159,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -164,7 +167,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -179,9 +182,10 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -193,9 +197,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -235,7 +239,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -257,6 +261,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 Z80
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z80
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -11,11 +11,11 @@
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "RC2014", " [", CONFIG, "]"
#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -65,9 +65,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6E ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -84,8 +87,8 @@ VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
@@ -150,7 +153,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -158,7 +161,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -173,9 +176,10 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -187,9 +191,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -229,7 +233,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -251,6 +255,11 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

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