Add Boot Loader Menu Entry for S100 Z180 Monitor Invocation

- PIO mode of sd.asm driver modified to setup shadow register (Issue #352).
- Relocated Z280 IVT to improve space utilization in HBIOS bank.

.github/pull_request_template.md

@@ -0,0 +1,11 @@
+<!--
+BEFORE YOU CREATE A PULL REQUEST:
+
+- Please base all pull requests against the dev branch
+- Include a clear description of your change
+- Reference related Issue(s) (e.g., "Resolves Issue #123")
+
+Thank you for contributing to RomWBW!  I will review your pull request as soon as possible.
+
+DELETE EVERYTHING IN THIS COMMENT BLOCK AND REPLACE WITH YOUR COMMENTS
+-->

.github/workflows/commit.yml

@@ -3,10 +3,9 @@ name: Commit Build
 on:
   push:
     branches: 
-      - master
-      - dev
+      - '**'
     tags-ignore:
-      - v*
+      - '**'
 
 jobs:
   buildLinux:
@@ -14,14 +13,18 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-      - uses: rlespinasse/github-slug-action@v4.4.0
-        
-      - uses: actions/checkout@v3.1.0
+      - name: Checkout
+        uses: actions/checkout@v3.3.0
+
+      - name: Get Commit Ref
+        run: |
+          COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
+          echo "COMMIT_REF: $COMMIT_REF"
+          echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
 
       - name: Build
         run: |
           export TZ='America/Los_Angeles'
-          sudo apt-get install libncurses-dev
           sudo apt-get install srecord
           make dist
           rm -rf .git*
@@ -35,28 +38,21 @@ jobs:
       - name: Upload Artifact
         uses: actions/upload-artifact@v3.1.1
         with:
-          name: RomWBW_Linux-${{env.GITHUB_REF_SLUG}}-${{env.GITHUB_SHA_SHORT}}
+          name: RomWBW-${{env.COMMIT_REF}}-Linux
           path: .
 
-      - name: Create Package Archive
-        run: |
-            zip -r RomWBW-SnapShot-Package.zip .
- 
-      - name: Post SnapShot
-        uses: wwarthen/actions/packages/automatic-releases@built-packages
-        with:
-          repo_token: "${{ secrets.GITHUB_TOKEN }}"
-          automatic_release_tag: "SnapShot"
-          prerelease: true
-          title: "RomWBW Development SnapShot Build"
-          files: |
-            RomWBW-SnapShot-Package.zip
-
   buildMacOS:
-    runs-on: macOS-12
+    runs-on: macOS-latest
 
     steps:
-      - uses: actions/checkout@v3.1.0
+      - name: Checkout
+        uses: actions/checkout@v3.3.0
+
+      - name: Get Commit Ref
+        run: |
+          COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
+          echo "COMMIT_REF: $COMMIT_REF"
+          echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
 
       - name: Build
         run: |
@@ -74,5 +70,5 @@ jobs:
       - name: Upload Artifact
         uses: actions/upload-artifact@v3.1.1
         with:
-          name: RomWBW_MacOS
+          name: RomWBW-${{env.COMMIT_REF}}-MacOS
           path: .

.github/workflows/release.yml

@@ -1,8 +1,9 @@
 name: Release Build
 
 on:
-  release:
-    types: published
+  push:
+    tags:
+      - '**'
 
 jobs:
   build:
@@ -10,41 +11,99 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-      - uses: actions/checkout@v2
-      
-      - name: Create Package Label
-        run: |
-          LABEL=`echo "$GITHUB_REF" | sed "s|^refs/tags/||"`
-          echo "::set-env name=PKGLBL::$LABEL"
-         
-      - name: Display Diagnostics
-        run: |
-          echo PKGLBL: "$PKGLBL"
-          echo Upload URL: "${{github.event.release.upload_url}}"
-          echo GITHUB_TOKEN: "${{secrets.GITHUB_TOKEN}}"
-          
+      - name: Checkout
+        uses: actions/checkout@v3.3.0
+
       - name: Build
         run: |
+          export TZ='America/Los_Angeles'
           sudo apt-get install libncurses-dev
+          sudo apt-get install srecord
           make dist
           rm -rf .git*
       
-      - name: Upload Artifact
-        uses: actions/upload-artifact@v1
-        with:
-          name: RomWBW-${{env.PKGLBL}}-Package
-          path: .
-      
       - name: Create Package Archive
         run: |
-            zip -r Package.zip .
-          
-      - name: Upload Release Asset
-        uses: actions/upload-release-asset@v1
-        env:
-          GITHUB_TOKEN: ${{secrets.GITHUB_TOKEN}}
+          zip -r RomWBW-${{github.ref_name}}-Package.zip .
+
+      - name: Set Title
+        run: |
+          echo "Tag: ${{github.ref_name}}"
+          if grep -q "dev" <<< "${{github.ref_name}}"; then
+            TITLE="RomWBW Development Snapshot"
+          elif grep -q "pre" <<< "${{github.ref_name}}"; then
+            TITLE="RomWBW Prerelease"
+          elif grep -q "rc" <<< "${{github.ref_name}}"; then
+            TITLE="RomWBW Release Candidate"
+          else
+            TITLE="RomWBW"
+          fi
+          echo "Title: $TITLE"
+          echo "TITLE=$TITLE" >>$GITHUB_ENV
+
+      - name: Attach Package Archive
+        uses: wwarthen/actions/packages/automatic-releases@built-packages
         with:
-          upload_url: ${{github.event.release.upload_url}}
-          asset_path: Package.zip
-          asset_name: RomWBW-${{env.PKGLBL}}-Package.zip
-          asset_content_type: application/zip
+          repo_token: "${{secrets.GITHUB_TOKEN}}"
+          draft: true
+          prerelease: true
+          title: "${{env.TITLE}} ${{github.ref_name}}"
+          files: |
+            RomWBW-${{github.ref_name}}-Package.zip
+      
+#      - name: Upload Package Archive
+#        uses: AButler/upload-release-assets@v2.0.2
+#        with:
+#          repo-token: ${{secrets.github_token}}
+#          files: |
+#            RomWBW-${{env.PKGLBL}}-Package.zip
+
+
+#      - name: Post SnapShot
+#        uses: docker://antonyurchenko/git-release:latest
+#        env:
+#          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+#          RELEASE_NAME_PREFIX: "${{env.TITLE}} "
+#          CHANGELOG_FILE: "none"
+#        with:
+#          args: |
+#            RomWBW-SnapShot-Package.zip
+            
+#      - name: Post SnapShot
+#        uses: cb80/pubrel@latest
+#        with:
+#          replace: true
+#          files: |
+#            RomWBW-SnapShot-Package.zip
+
+#      - name: Post SnapShot
+#        uses: wwarthen/actions/packages/automatic-releases@built-packages
+#        with:
+#          repo_token: "${{ secrets.GITHUB_TOKEN }}"
+#          prerelease: true
+#          title: "RomWBW Development SnapShot ${{env.GITHUB_REF_SLUG}}"
+#          files: |
+#            RomWBW-SnapShot-Package.zip
+
+#      - name: Remove Older Releases
+#        uses: wwarthen/delete-release-action@v1.2
+#        with:
+#          release-drop: true
+#          release-keep-count: 0
+#          release-drop-tag: true
+#          pre-release-drop: false
+#          pre-release-keep-count: 0
+#          pre-release-drop-tag: true
+#          draft-drop: true
+#        env:
+#          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+#      - name: Remove Older Releases
+#        uses: s00d/delete-older-releases@0.2.1
+#        with:
+#          keep_latest: 1
+##          delete_tag_pattern: beta # defaults to ""
+#          delete_type: 'release'
+#          delete_branch: 'main'
+#        env:
+#          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

Binary/DiskList.txt

@@ -1,173 +0,0 @@
-***********************************************************************
-***                                                                 ***
-***                          R o m W B W                            ***
-***                                                                 ***
-***                    Z80/Z180 System Software                     ***
-***                                                                 ***
-***********************************************************************
-
-This directory ("Binary") is part of the RomWBW System Software 
-distribution archive.  Refer to the ReadMe.txt file in this 
-directory for more information on the overall contents of the 
-directory.
-
-RomWBW includes a set of disk images that are ready to copy onto
-a floppy or hard/CF/SD disk.  You can use your modern computer
-(Windows/Linux/Mac) to copy the disk image file onto your disk
-media.  The disk media will then be ready to use in your RomWBW
-System.
-
-WARNING: The hdnew_*.img disk images are part of a new disk
-format that is a work in progress.  Do not use these disk
-images without knowing exactly what you are doing!  The
-hd_*.img disk images continue to be the images you should
-be using under normal circumstances.
-
-A description of the disk images is provided later in this file.
-For more information on the creatioin of these images including
-instructions for customizing them or creating your own, refer to
-the ReadMe.txt file in the Source\Images directory.
-
-Installing Images
------------------
-
-The following instructions apply to Windows computers.  Alternatively,
-you can use the "dd" command on Linux or Mac.
-
-First of all, a MAJOR WARNING!!!!  The tools described below are 
-quite capable of obliterating your running Windows system drive.  Use 
-with extreme caution and make sure you have backups.
-
-To install a floppy image on floppy media, you can use the tool 
-called RaWriteWin.  This tool is included in the Tools directory of 
-the distribution. This tool will write your floppy image (fd_xxx.img) 
-to a floppy disk using a raw block transfer.  The tool is GUI based 
-and it's operation is self explanatory.
-
-To install a hard disk image on a CF card or SD card, you must have 
-the appropriate media card slot on your computer. If you do, you can 
-use the tool called Win32DiskImager. This tool is also included in 
-the Tools directory of the distribution.  It will write your 
-hard disk image (hd_xxx.img) to the designated media card.  This tool 
-is also GUI based and self explanatory.
-
-The use of the SIMH emulator is outside of the scope of this document.  
-However, if you use SIMH, you will find that you can attach the hard 
-disk images to the emulator with lines such as the following in your 
-SIMH configuration file:
-
-  | attach hdsk0 hd_cpm22.img
-  | set hdsk0 format=HDSK
-  | set hdsk0 geom=T:2048/N:256/S:512
-  | set hdsk0 wrtenb
-  
-Making Disk Images Bootable
----------------------------
-
-The Operating System disk images below are ready to boot by the
-RomWBW Boot Loader.  However, if you update your RomWBW ROM, then
-you should also update the system tracks of your bootable disk
-images.  You would use SYSCOPY to do this.  SYSCOPY can also be
-used to make a disk bootable if it is not already bootable.
-
-You would use a command like the following to make drive C bootable:
-
-  | B>SYSCOPY C:=CPM.SYS
-
-The system file to use depends on the operating system you are trying
-to boot from the slice you are initializing with SYSCOPY:
-
-  CP/M 2.2 - cpm.sys
-  ZSDOS 1.1 - zsys.sys
-  CP/M 3 - cpmldr.sys
-  ZPM3 - cpmldr.sys
-  
-Slices
-------
-
-A RomWBW CP/M filesystem is fixed at 8MB.  This is because it is the 
-largest size filesystem supported by all common CP/M variants. Since 
-all modern hard disks (including SD Cards and CF Cards) are much 
-larger than 8MB, RomWBW supports the concept of "slices".  This 
-simply means that you can concatenate multiple CP/M filesystems (up 
-to 256 of them) on a single physical hard disk and RomWBW will allow 
-you to assign drive letters to them and treat them as multiple 
-independent CP/M drives.
-
-With the exception of the hd_combo image, each of the disk images
-includes a single CP/M file system (i.e., a single slice).  However,
-you can easily create a multi-slice disk image by merely concatenating 
-multiple images together.  For example, if you wanted to create a 2 
-slice disk image that has ZSDOS in the first slice and Wordstar in 
-the second slice, you could use the following command from a Windows 
-command prompt:
-
-  | C:\RomWBW\Binary>copy /b hd_zsdos.img + hd_ws.img hd_multi.img
-
-You can now write hd_multi.img onto your SD or CF Card and you will 
-have ZSDOS in the first slice and Wordstar in the second slice.
-
-The hd_combo disk image is an example of this.  It contains several
-slices in one image file.  The contents of this special disk image
-are described below.
-
-The concept of slices applies ONLY to hard disks.  Floppy disks are 
-not large enough to support multiple slices.
-
-Disk Image Contents
--------------------
-
-What follows is a brief description of the contents of the
-disk images automatically provided in the RomWBW distribution.
-Note that all of the OS images include the RomWBW custom
-support apps.
-
-cpm22 - DRI CP/M 2.2 (Bootable Floppy and Hard Disk)
-
-  Standard DRI CP/M 2.2 distribution files along with a few commonly
-  used utilities.
-
-zsdos - ZCPR1 + ZSDOS 1.1 (Bootable Floppy and Hard Disk)
-
-  Contains ZCPR1 and ZSDOS 1.1.  This is roughly equivalent to the
-  ROM boot contents, but provides a full set of the applications
-  and related files that would not all fit on the ROM drive.
-
-nzcom - NZCOM (Bootable Floppy and Hard Disk)
-
-  Standard NZCOM distribution.  Note that you will need to run the
-  NZCOM setup before this will run properly.  You will need
-  to refer to the NZCOM documentation.  
-
-cpm3 - DRI CP/M3 (Bootable Floppy and Hard Disk)
-
-  Standard DRI CP/M 3 adaptation for RomWBW that is ready to run.
-  It can be started by running CPMLDR.
-
-zpm3 - ZPM3 (Bootable Floppy and Hard Disk)
-
-  Simeon Cran's ZCPR 3 compatible OS for CP/M 3 adapted for RomWBW and 
-  ready to run.  It can be started by running CPMLDR (which seems 
-  wrong, but ZPMLDR is somewhat broken).
-
-ws4 - WordStar 4 (Floppy and Hard Disk)
-
-  Micropro Wordstar 4 full distribution.  This image is not bootable
-  and is intended to be added as an additional slice to an OS image.
-
-bp - BPBIOS (Hard Disk only)
-
-  Adaptation of BPBIOS for RomWBW.  This is NOT complete and NOT
-  useable in it's current state.
-
-combo - Multi-Boot Combination (Bootable Hard Disk)
-
-  A pre-created combo image that contains the following slices.  The
-  slices are identical to the individual images listed above.
-
-    Slice 0: cpm22 (bootable)
-    Slice 1: zsdos (bootable)
-    Slice 2: nzcom (bootable)
-    Slice 3: cpm3 (bootable)
-    Slice 4: zpm3 (bootable)
-    Slice 5: ws4 (not bootable)

Binary/ReadMe.txt

@@ -49,7 +49,7 @@ The files with a ".upd" extension are binary images identical to the
 .rom files, but they only have the first 128K bytes.  The first 128K
 is the system image without the ROM disk contents.  These files can be
 used to update the system image without modifying the ROM disk
-contents.  Refer to the Getting Started document for more information.
+contents.  Refer to the RomWBW User Guide for more information.
 
 ROM Executable Images (<plt>_<cfg>.com)
 ---------------------------------------

Doc/ChangeLog.txt

@@ -1,3 +1,35 @@
+Version 3.3
+-----------
+- WBW: Support Front Panel switches
+- A?C: Preliminary support for Z80-Retro
+- A?C: Support for SD PIO
+- A?C: Support for Z80-Retro SD interface
+- WBW: Support per-drive floppy configuration
+- WBW: Support for Bill Shen's VGARC
+- WBW: Support for MG014 Parallel Port module + printer
+- WBW: Support for EMM Zip Drive on PPI interface (much inspiration from Alan Cox)
+- WBW: Support for PPA Zip Drive on PPI interface (much inspiration from Alan Cox)
+- WBW: Support for SyQuest SparQ Drive on PPI interface (much inspiration from Alan Cox)
+- WBW: Support for ATAPI Disk Drives (not CD-ROMs) on IDE and PPIDE interfaces
+- R?P: Added new disk images: Aztec C, MS BASIC Compiler, MS Fortran, Games, HiTech-C, Turbo Pascal, SLR Z80ASM
+- JBL: Added RCZ80 configuration for ColecoVision
+- WBW: Support for Z180 running interrupt mode 1
+- WBW: Preliminary support for S100 Computers Z180
+- WBW: Preliminary support for Dan Werner's ESP32 MBC Module
+- WBW: Early support for Duodyne base system (CPU/UART/ROM/RAM/RTC/SPK)
+
+Version 3.2.1
+-------------
+- M?P: Fixed Zeta 2 FDD and CPUSPD config settings
+- WBW: Fixed SURVEY.COM (again)
+- DDW: Updates to DOS/65 binaries in disk images
+- PMS: Updates to VGMPLAY including support for YM2151
+- WBW: Fix for quark delay adjustment being trashed
+
+Version 3.2
+-----------
+- WBW: Version bump for release
+
 Version 3.1.1
 -------------
 - WBW: Version bumped due to pervasive changes

Doc/ReadMe.txt

@@ -6,17 +6,37 @@
 ***                                                                 ***
 ***********************************************************************
 
-This directory ("Doc") is part of the RomWBW System Software 
-distribution archive.  It contains documentation for components of 
+This directory ("Doc") is part of the RomWBW System Software
+distribution archive.  It contains documentation for components of
 the system.
 
+ChangeLog.txt
+-------------
+
+Log of changes in RomWBW by version.
+
+
+RomWBW User Guide ("RomWBW User Guide.pdf")
+RomWBW System Guide ("RomWBW System Guide.pdf")
+RomWBW Applications ("RomWBW Applications.pdf")
+RomWBW ROM Applications ("RomWBW ROM Applications.pdf")
+RomWBW Disk Catalog ("RomWBW Disk Catalog.pdf")
+RomWBW Errata ("RomWBW Errata.pdf")
+-------------------------------------------------------
+
+Documentation set for RomWBW.  The primary document is the
+User Guide.  The System Guide explains internal system operation
+and has a reference for the HBIOS API.  Use of included tools
+and utilities are detailed in the  Applications and
+ROM Applications documents.
+
 
 CPM Manual ("CPM Manual.pdf")
 -----------------------------
 
-The original DRI CP/M 2.x Operating System Manual.  This should be 
-considered the primary reference for system operation.  The section 
-on CP/M 2 Alteration can be ignored since this work has already been 
+The original DRI CP/M 2.x Operating System Manual.  This should be
+considered the primary reference for system operation.  The section
+on CP/M 2 Alteration can be ignored since this work has already been
 completed as part of the RomWBW distribution.
 
 
@@ -39,16 +59,10 @@ Manual for the DDTZ v2.7 debug tool included on the ROM drive.
 FDisk Manual ("FDisk Manual.pdf")
 ---------------------------------
 
-The operational manual for John Coffman's hard disk partitioning 
+The operational manual for John Coffman's hard disk partitioning
 program.  This program is included in RomWBW as FDISK80.
 
 
-Floppy Disk Utility Documentation ("FDU.tst")
----------------------------------------------
-
-Operational documentation for the RomWBW FDU application.
-
-
 Hard Disk Anatomy ("Hard Disk Anatomy.pdf")
 -------------------------------------------
 
@@ -61,17 +75,46 @@ NZCOM User's Manual ("NZCOM Users Manual.pdf")
 NZCOM operating system operation manual.
 
 
-RomWBW Architecture ("RomWBW Architecture.pdf")
------------------------------------------------
+ZCPR Manual ("ZCPR Manual.pdf")
+-------------------------------
 
-Document describing the architecture of the RomWBW HBIOS.  It 
-includes reference information for the HBIOS calls.
+ZCPR is the command proccessor portion of Z-System.  This is the
+manual for ZCPR 1.x as included in RomWBW.  The installation
+instructions can be ignored since that work has already been
+completed as part of the RomWBW distribution.
 
-ROM Applications ("ROM Applications.pdf")
------------------------------------------
+ZCPR D&J Manual ("ZCPR-DJ.doc")
+-------------------------------
 
-Breif instructions for the ROM based applications included in
-in the boot ROM.
+ZCPR D&J User Manual.  This manual supplements the ZCPR Manual.
+
+
+ZSDOS Manual ("ZSDOS Manual.pdf")
+---------------------------------
+
+ZSDOS is the DOS portion of Z-System.  This is the manual for ZSDOS
+1.x as included in RomWBW.  The installation instructions can be
+ignored since that work has already been completed as part of the
+RomWBW distribution.
+
+Microsoft Basic-80 Reference Manual v5.0 (Microsoft Basic-80 Reference Manual v5.0.pdf)
+---------------------------------------------------------------------------------------
+
+Official manual for Microsoft BASIC as included in RomWBW.
+
+
+QP/M 2.7 Installation Guide and Supplements ("qpm27.pdf")
+QP/M 2.7 Interface Guide ("qdos27.pdf")
+QP/M 2.7 Features and Facilities ("qcp27.pdf")
+--------------------------------------------
+
+Official documentation set for QP/M 2.7 from original QP/M distribution.
+
+SIO+CTC Baud Rate Options (SIO+CTC Baud Rate Options.pdf)
+---------------------------------------------------------
+
+Documents possible baud rates available based on different baud
+clock rates for Zilog SIO using CTC for baud rate clock generation.
 
 
 Z180 ASCI Baud Rate Options ("Z180 ASCI Baud Rate Options.pdf")
@@ -83,19 +126,43 @@ clock rate.  This document provides a list of the possible
 baud rates for typical CPU clock rates.
 
 
-ZCPR Manual ("ZCPR Manual.pdf")
--------------------------------
+UCSD p-System Users Manual ("UCSD p-System Users Manual.pdf")
+-------------------------------------------------------------
 
-ZCPR is the command proccessor portion of Z-System.  This is the 
-manual for ZCPR 1.x as included in RomWBW.  The installation 
-instructions can be ignored since that work has already been 
-completed as part of the RomWBW distribution.
+Official user manual for p-System operating system included with
+RomWBW.
 
 
-ZSDOS Manual ("ZSDOS Manual.pdf")
----------------------------------
+Z80 Assembler User Manual (z80asm (SLR Systems).pdf)
+----------------------------------------------------
 
-ZSDOS is the DOS portion of Z-System.  This is the manual fo ZSDOS 
-1.x as included in RomWBW.  The installation instructions can be 
-ignored since that work has already been completed as part of the 
-RomWBW distribution.
+Official user manual for the Z80 Macro Assembler by SLR Systems
+included in the z80asm disk image.
+
+
+HI-TECH C Compiler User Manual (HI-TECH Z80 C Compiler Manual.txt)
+------------------------------------------------------------------
+
+Official user manual for the HI-TECH C Compiler included in the
+hitechc disk image.
+
+
+Borland TurboPascal User Manual (Turbo_Pascal_Version_3.0_Reference_Manual_1986.pdf)
+------------------------------------------------------------------------------------
+
+Official user manual Borland TurboPascal included in the pascal disk image.
+
+
+Aztec C Compiler User Manual (Aztec_C_1.06_User_Manual_Mar84.pdf)
+-----------------------------------------------------------------
+
+Official user manual for the Aztec C Compiler included in the aztecc disk image.
+
+
+FORTRAN-80 User Manual (Microsoft_FORTRAN-80_Users_Manual_1977.pdf)
+---------------------------------------------------------------
+
+Official user manual for Microsoft's FORTRAN-80 compiler included in the fortran
+disk image.
+
+--WBW 5:18 PM 6/14/2023

Doc/Testing Notes.txt

@@ -40,7 +40,7 @@ N8-2312 (X)
 - Test FDU app
 - Test TMS driver (video & kbd)
 
-N8-2511 ( )
+N8-2511 (X)
 -------
 - Test ASCI driver
 - Test SD driver (Juha mode)
@@ -139,27 +139,6 @@ GENERAL (X)
 - ASSIGN app
 - MODE app
 - SYSCOPY app
-- OSLDR app
 - FDU app
 - FDISK80 app
 - TUNE app
-
-RESULTS
--------
-- Missing HBIOS startup banner (X)
-- PANIC while printing Serial device inventory (X)
-- Unexpected interrupt signals not handled well (X)
-- Fix IT_??? usage (X)
-- Fix HB_DI/HB_EI in PEEK/POKE/BNKCPY (X)
-- Fix SIMH timer interrupt setup (X)
-- Move DI/EI in PEEK/POKE/BNKCPY to API layer? (X)
-- RETI vs. JP in page zero when INTMODE = 0 (X)
-- Check interrupt stack space (X)
-- If an early INT fires, we return with INTs enabled (not good) (X)
-- PPPCON init should display ANSI 80x25 or similar (X)
-- Add INT MODE X message to early boot messages (X)
-- OSLDR fails when LDDS is loaded (X)
-- Add "!!!" to force assembly error as needed ( )
-- TIMER app should check for HBIOS active (X)
-- Halt system after bad interrupt??? ( )
-- Adapt and bundle PLAYER.COM (X)

ReadMe.md

@@ -1,9 +1,9 @@
 
 
 **RomWBW ReadMe** \
-Version 3.2 \
+Version 3.3 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-23 Feb 2023
+07 Jul 2023
 
 # Overview
 
@@ -128,8 +128,8 @@ contributions. The list below is probably missing many names – please
 let me know if I missed you!
 
 - Andrew Lynch started it all when he created the N8VEM Z80 SBC which
-  became the first platform RomWBW supported. Some of his code can still
-  be found in RomWBW.
+  became the first platform RomWBW supported. Some of his original code
+  can still be found in RomWBW.
 
 - Dan Werner wrote much of the code from which RomWBW was originally
   derived and he has always been a great source of knowledge and advice.
@@ -140,23 +140,30 @@ let me know if I missed you!
   due to internal changes within RomWBW. As of RomWBW 2.6, these
   applications are no longer provided.
 
+- Sergey Kiselev created several hardware platforms for RomWBW including
+  the very popular Zeta.
+
 - David Giles created support for the Z180 CSIO which is now included SD
   Card driver.
 
+- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver, DMA support, and a long list of general code
+  and documentation enhancements.
+
 - Ed Brindley contributed some of the code that supports the RCBus
   platform.
 
-- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-  AY-3-8910 sound driver as well as a long list of general code
-  enhancements.
-
 - Spencer Owen created the RC2014 series of hobbyist kit computers which
-  has exponentially increased RomWBW usage.
+  has exponentially increased RomWBW usage. Some of his kits include
+  RomWBW.
 
 - Stephen Cousins has likewise created a series of hobbyist kit
   computers at Small Computer Central and is distributing RomWBW with
   many of them.
 
+- Alan Cox has contributed some driver code and has provided a great
+  deal of advice.
+
 - The CP/NET client files were developed by Douglas Miller.
 
 - Phillip Stevens contributed support for FreeRTOS.
@@ -176,6 +183,10 @@ let me know if I missed you!
 
 - The RomWBW Disk Catalog document was produced by Mykl Orders.
 
+- Rob Prouse has created many of the supplemental disk images including
+  Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
+  Microsoft Fortran Compiler, and a Games compendium.
+
 Contributions of all kinds to RomWBW are very welcome.
 
 # Licensing
@@ -197,14 +208,15 @@ Portions of RomWBW were created by, contributed by, or derived from the
 work of others. It is believed that these works are being used in
 accordance with the intentions and/or licensing of their creators.
 
-If anyone feels their work is being used outside of it’s intended
+If anyone feels their work is being used outside of its intended
 licensing, please notify:
 
-> Wayne Warthen wwarthen@gmail.com
+> Wayne Warthen  
+> <wwarthen@gmail.com>
 
 RomWBW is an aggregate work. It is composed of many individual,
 standalone programs that are distributed as a whole to function as a
-cohesive system. Each program may have it’s own licensing which may be
+cohesive system. Each program may have its own licensing which may be
 different from other programs within the aggregate.
 
 In some cases, a single program (e.g., CP/M Operating System) is

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-23 Feb 2023
+07 Jul 2023
 
 
 
@@ -129,8 +129,8 @@ contributions. The list below is probably missing many names – please
 let me know if I missed you!
 
 -   Andrew Lynch started it all when he created the N8VEM Z80 SBC which
-    became the first platform RomWBW supported. Some of his code can
-    still be found in RomWBW.
+    became the first platform RomWBW supported. Some of his original
+    code can still be found in RomWBW.
 
 -   Dan Werner wrote much of the code from which RomWBW was originally
     derived and he has always been a great source of knowledge and
@@ -142,23 +142,30 @@ let me know if I missed you!
     due to internal changes within RomWBW. As of RomWBW 2.6, these
     applications are no longer provided.
 
+-   Sergey Kiselev created several hardware platforms for RomWBW
+    including the very popular Zeta.
+
 -   David Giles created support for the Z180 CSIO which is now included
     SD Card driver.
 
+-   Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+    AY-3-8910 sound driver, DMA support, and a long list of general code
+    and documentation enhancements.
+
 -   Ed Brindley contributed some of the code that supports the RCBus
     platform.
 
--   Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-    AY-3-8910 sound driver as well as a long list of general code
-    enhancements.
-
 -   Spencer Owen created the RC2014 series of hobbyist kit computers
-    which has exponentially increased RomWBW usage.
+    which has exponentially increased RomWBW usage. Some of his kits
+    include RomWBW.
 
 -   Stephen Cousins has likewise created a series of hobbyist kit
     computers at Small Computer Central and is distributing RomWBW with
     many of them.
 
+-   Alan Cox has contributed some driver code and has provided a great
+    deal of advice.
+
 -   The CP/NET client files were developed by Douglas Miller.
 
 -   Phillip Stevens contributed support for FreeRTOS.
@@ -178,6 +185,10 @@ let me know if I missed you!
 
 -   The RomWBW Disk Catalog document was produced by Mykl Orders.
 
+-   Rob Prouse has created many of the supplemental disk images
+    including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
+    BASIC Compiler, Microsoft Fortran Compiler, and a Games compendium.
+
 Contributions of all kinds to RomWBW are very welcome.
 
 
@@ -202,14 +213,15 @@ Portions of RomWBW were created by, contributed by, or derived from the
 work of others. It is believed that these works are being used in
 accordance with the intentions and/or licensing of their creators.
 
-If anyone feels their work is being used outside of it’s intended
+If anyone feels their work is being used outside of its intended
 licensing, please notify:
 
-  Wayne Warthen wwarthen@gmail.com
+  Wayne Warthen
+  wwarthen@gmail.com
 
 RomWBW is an aggregate work. It is composed of many individual,
 standalone programs that are distributed as a whole to function as a
-cohesive system. Each program may have it’s own licensing which may be
+cohesive system. Each program may have its own licensing which may be
 different from other programs within the aggregate.
 
 In some cases, a single program (e.g., CP/M Operating System) is

Source/Apps/FDU/fdu.doc

@@ -33,7 +33,7 @@ like to acknowledge that much was derived from the previous
 work of Andrew Lynch and Dan Werner.  I also want to credit 
 Sergio Gimenez with testing the 5.25" drive support and Jim 
 Harre with testing the 8" drive support.  Support for Zeta 2 
-comes from Segey Kiselev.  Thanks!
+comes from Sergey Kiselev.  Thanks!
 
 General Usage
 -------------

Source/Apps/Survey/survey.mac

@@ -15,6 +15,13 @@
 ;
 ;VERSION LIST - Most recent version first.
 ;
+;21/Mar/23 - Previous hack was worthless because it broke
+;            the memory survey.  Rehacked to use HBIOS to
+;            detect if N8VEM SBC MPCL memory management is
+;            in use and bypass MPCL ports if so.  HBIOS check
+;            should allow use in non-RomWBW systems again.
+;            Wayne Warthen
+;
 ;10/Feb/23 - Total hack to avoid crash on ECB SBC
 ;            RomWBW now required by this version
 ;            Wayne Warthen
@@ -240,20 +247,6 @@ TABS	EQU	9		; Tab columns
 ;
 	;ORG	100H
 ;
-;
-;
-	.Z80
-	LD	HL,IMGORG
-	LD	DE,START
-	LD	BC,IMGEND-IMGORG
-	LDIR
-	JP	START
-	.8080
-;
-IMGORG:
-;
-	.PHASE	8000H
-;
 START:
 	LXI	H,0			; Save stack pointer
 	DAD	SP
@@ -261,9 +254,38 @@ START:
 	LXI	SP,FINIS+64
 	CALL	TYPE			; Type initial CRLF
 	DW	CRLF,CRLF
-	DB	TAB,'*** RomWBW System Survey (Feb 2023) ***'
+	DB	TAB,'*** RomWBW System Survey (Mar 2023) ***'
 	DW	CRLF,CRLFE
+;
+; Are we running an N8VEM SBC w/ MPCL on RomWBW???
+;
+	.Z80
+	XOR	A		; assume not
+	LD	(ISMPCL),A	; save it
 
+	; Check for RomWBW (HBIOS)
+	LD	HL,(0FFFEH)	; HL := HBIOS ident location
+	LD	A,'W'		; First byte of ident
+	CP	(HL)		; Compare
+	JR	NZ,NOTMPCL	; Not HBIOS
+	INC	HL		; Next byte of ident
+	LD	A,NOT 'W'	; Second byte of ident
+	CP	(HL)		; Compare
+	JR	NZ,NOTMPCL	; Not HBIOS
+;
+	LD	B,0F1H		; HBIOS: VER function
+	LD	C,0		; required reserved value
+	RST	08		; DE := version, L := platform id
+	LD	A,L		; Platform ID
+	CP	01H		; SBC?
+	JR	NZ,NOTMPCL	; Not SBC
+	LD	A,0FFH		; Flag
+	LD	(ISMPCL),A	; Set flag
+;
+	.8080
+;
+NOTMPCL:
+;
 ;DISK SURVEY
 	LXI	H,8			; Init drive counter
 	MVI	C,24			; Get login vector
@@ -445,20 +467,19 @@ MSURV:
 	ENDM
 	DB	'|'
 	DW	CRLF
-	db	' '			; dmb 31-May-82
-	DB	'T'+EOL
+	DB	'TT','T'+EOL
 	LXI	H,RAM
-	MVI	M,LOW 1023		; Init RAM counter
+	MVI	M,LOW 2047		; Init RAM counter
 	INX	H
-	MVI	M,HIGH 1023
+	MVI	M,HIGH 2047
 	MVI	B,4			; Clear ROM, EMP
 CLREG:
 	INX	H
 	MVI	M,0
 	DCR	B
 	JNZ	CLREG
-	LXI	H,1024			; Init memory pointer
-	MVI	C,63			; K to be checked
+	LXI	H,2048			; Init memory pointer
+	MVI	C,62			; K to be checked
 
 ;Start of analysis loop
 BEGANA:
@@ -492,7 +513,7 @@ NOTEM:
 	INXI	ROM
 NEXT:
 	INX	H			; Index next byte
-	DCX	D			; Decrement K counter
+	DCX	D			; DEC DE; Decrement K counter
 	XRA	A
 	ORA	D
 	ORA	E
@@ -545,8 +566,19 @@ NEXTK:
 ; contents of first page
 	call	type
 	db	'BIOS at',' '+eol
-	hexout	bios+2
-	hexout	bios+1
+	;hexout	bios+2
+	;hexout	bios+1
+	.z80
+	ld	hl,(bios+1)
+	ld	de,-3
+	add	hl,de
+	push	hl
+	ld	a,h
+	call	hexprn
+	pop	hl
+	ld	a,l
+	call	hexprn
+	.8080
 	call	type
 	db	tab,'iobyte',' '+eol
 	hexout	bios+3
@@ -555,8 +587,19 @@ NEXTK:
 	hexout	bios+4
 	call	type
 	db	tab,'BDOS at',' '+eol
-	hexout	bdos+2
-	hexout	bdos+1
+	;hexout	bdos+2
+	;hexout	bdos+1
+	.z80
+	ld	hl,(bdos+1)
+	ld	de,-6
+	add	hl,de
+	push	hl
+	ld	a,h
+	call	hexprn
+	pop	hl
+	ld	a,l
+	call	hexprn
+	.8080
 	call	type
 	dw	crlf,crlfe
 ;
@@ -572,6 +615,8 @@ NEXTK:
 	CALL	TYPE
 	DB	' Bytes ROM',TAB,TAB+EOL
 	LHLD	BDOS+1
+	LXI	D,-6
+	DAD	D
 	CALL	BINDEC
 	CALL	TYPE
 	DB	' Bytes in TPA'
@@ -607,9 +652,6 @@ PDLY:
 	JNZ	PDLY
 ;
 	.Z80
-	; record the active bank
-	ld	a,(0ffe0h)		; get current hbios bank id
-	ld	(BANK),a		; and save it
 	; Check for Z180 CPU
 	xor	a			; assume Z80
 	ld	(IS180),a		; save it
@@ -635,6 +677,17 @@ PORTLP:
 	ENDIF
 ;
 	.Z80
+;
+	ld	a,(ISMPCL)		; MPCL?
+	or	a			; set flags
+	jr	z,PCONT			; if not, skip ahead
+	ld	a,d			; get port to test
+	and	0F8H			; range of 8 ports
+	cp	078H			; starting at 78H
+	jr	z,ISPORT		; if in range, assume real port
+;
+PCONT:
+
 	di				; interrupts off
 	ld	a,(IS180)		; Z180?
 	or	a
@@ -679,11 +732,6 @@ pnum1b	equ	$-1
 	push	af
 ;
 rdz:
-	; Make sure correct bank is still selected!
-	push	af
-	ld	a,(BANK)
-	call	0FFF3H
-	pop	af
 ;
 	ei				; interrupts back on now
 ;
@@ -818,13 +866,9 @@ RAMF:	DS	1			; RAM good flag
 EMPF:	DS	1			; Empty so far flag
 BLKSHF:	DS	1			; block shift factor
 MAXALL:	DS	2			; maximum block number
-BANK:	DS	1			; saved HBIOS bank id
 IS180:	DS	1			; non-zero for Z180 CPU
+ISMPCL:	DS	1			; non-zero for N8VEM SBC MPCL
 FINIS	EQU	$			; End of program
-;
-	.DEPHASE
-;
-IMGEND:
 ;
 	END
 

Source/Apps/Tune/tune.asm

@@ -45,6 +45,7 @@
 ;   2021-08-13 [WBW] Add support for LiNC Z50 Sound Card
 ;   2021-08-17 [WBW] When playing via HBIOS, call BF_SNDRESET at end
 ;   2022-03-20 [DDW] Add support for MBC PSG module
+;   2023-03-30 [WBW] Fix for quark delay adjustment being trashed
 ;_______________________________________________________________________________
 ;
 ; ToDo:
@@ -301,6 +302,11 @@ GOPT3	LD	A,0			; SETUP value to PT3 sound files
 	JR	GOPTX			; Play PTx file
 
 GOPTX
+	LD	HL,(QDLY)		; Get basic quark delay
+	OR	A			; Clear carry
+	SBC	HL,DE			; Adjust for file type
+	LD	(QDLY),HL		; Save updated quark delay factor
+
 	CALL	CRLF2
 	LD	DE, MSGSONGNAME         ; Print song name message
 	CALL	PRTSTR
@@ -322,10 +328,6 @@ GOPTX2	LD	A,(DE)
 	CALL	CRLF2			; Formatting
 	LD	DE,MSGPLY		; Playing message
 	CALL	PRTSTR			; Print message
-	LD	HL,(QDLY)		; Get basic quark delay
-	OR	A			; Clear carry
-	SBC	HL,DE			; Adjust for file type
-	LD	(QDLY),HL		; Save updated quark delay factor
 	CALL	START			; Do initialization
 PTXLP	CALL	START+5			; Play one quark
 	LD	A,(START+10)		; Get setup byte
@@ -627,6 +629,9 @@ CFGTBL:	;	PLT	RSEL	RDAT	RIN	Z180	ACR
 ;
 	.DB	13,	$A0,	$A1,	$A0,	$FF,	$A2	; MBC
 	.DW	HWSTR_MBC
+;
+	.DB	17,	$A0,	$A1,	$A0,	$FF,	$A2	; DUODYNE
+	.DW	HWSTR_DUO
 ;
 	.DB	$FF					; END OF TABLE MARKER
 ;
@@ -655,8 +660,8 @@ TMP		.DB	0	; work around use of undocumented Z80
 HBIOSMD		.DB	0	; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE
 OCTAVEADJ	.DB	0	; AMOUNT TO ADJUST OCTAVE UP OR DOWN
 
-MSGBAN		.DB	"Tune Player for RomWBW v3.5, 20-Mar-2022",0
-MSGUSE		.DB	"Copyright (C) 2021, Wayne Warthen, GNU GPL v3",13,10
+MSGBAN		.DB	"Tune Player for RomWBW v3.5a, 30-Mar-2023",0
+MSGUSE		.DB	"Copyright (C) 2023, Wayne Warthen, GNU GPL v3",13,10
 		.DB	"PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
 		.DB	"MYMPlay by Marq/Lieves!Tuore",13,10,13,10
 		.DB	"Usage: TUNE <filename>.[PT2|PT3|MYM] [--hbios] [+tn|-tn]",0
@@ -680,6 +685,7 @@ HWSTR_RCEB6	.DB	"RCBus Sound Module (EBv6)",0
 HWSTR_RCMF	.DB	"RCBus Sound Module (MF)",0
 HWSTR_LINC	.DB	"Z50 LiNC Sound Module",0
 HWSTR_MBC	.DB	"NHYODYNE Sound Module",0
+HWSTR_DUO	.DB	"DUODYNE Sound Module",0
 
 MSGUNSUP	.db	"MYM files not supported with HBIOS yet!\r\n", 0
 

Source/Apps/VGM/vgmplay.asm

@@ -12,14 +12,12 @@
 ; default file type, basic file size checking, polled CTC mode
 ; added by Phil Summers
 ;
-; Bugs: YM2151 playback untested & no mute.
-;       CTC polled timing - predicted 44100 divider is too slow
+; Bugs: CTC polled timing - predicted 44100 divider is too slow
 ;
 ; Assemble with:
 ;
 ;   TASM -80 -b VGMPLAY.ASM VGMPLAY.COM
 ;
-;
 ; A VGM file can play 44100 samples a second. This may be sound chip
 ; register commands or PCM data. This player does not support PCM playback
 ; due to the high processor speed and file size required. Typical VGM files
@@ -31,60 +29,59 @@
 ; Device and system specific definitions
 ;------------------------------------------------------------------------------
 ;
-custom		.equ	0           	        ; System configurations
+custom		.equ	0           	; System configurations
 P8X180          .equ    1
 RCBUS           .equ    2
-sbcecb		.equ	3			
+sbcecb		.equ	3		
 MBC		.equ	4
 ;
-plt_romwbw	.equ	1			; Build for ROMWBW?
-plt_type	.equ	sbcecb			; Select build configuration
-debug		.equ	0			; Display port, register, config info
+plt_romwbw	.equ	1		; Build for ROMWBW?
+plt_type	.equ	sbcecb		; Select build configuration
+debug		.equ	0		; Display port, register, config info
 ;
 ;------------------------------------------------------------------------------
 ; Platform specific definitions. If building for ROMWBW, these may be overridden
 ;------------------------------------------------------------------------------
 
 #IF (plt_type=custom)
-RSEL            .equ    09AH			; Primary AY-3-8910 Register selection
-RDAT            .equ    09BH			; Primary AY-3-8910 Register data
-RSEL2           .equ    88H			; Secondary AY-3-8910 Register selection
-RDAT2           .equ    89H			; Secondary AY-3-8910 Register data
+RSEL            .equ    09AH		; Primary AY-3-8910 Register selection
+RDAT            .equ    09BH		; Primary AY-3-8910 Register data
+RSEL2           .equ    88H		; Secondary AY-3-8910 Register selection
+RDAT2           .equ    89H		; Secondary AY-3-8910 Register data
 VGMBASE		.equ	$C0
-YMSEL		.equ	VGMBASE+00H		; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	VGMBASE+01H		; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	VGMBASE+02H		; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	VGMBASE+03H		; Secondary YM2162 11000011 a1=1 a0=1
-PSG1REG         .equ    VGMBASE+08H		; Primary SN76489
-PSG2REG         .equ    VGMBASE+09H		; Secondary SN76489
-ctcbase		.equ	VGMBASE+0CH		; CTC base address
-YM2151_SEL1	.equ	0FEH			; Primary YM2151 register selection
-YM2151_DAT1	.equ	0FFH			; Primary YM2151 register data
-YM2151_SEL2	.equ	0FEH			; Secondary YM2151 register selection
-YM2151_DAT2	.equ	0FFH			; Secondary YM2151 register data
-plt_cpuspd	.equ	6;000000		; Non ROMWBW cpu speed default
-FRAME_DLY       .equ    10  			; Frame delay (~ 1/44100)
-
+YMSEL		.equ	VGMBASE+00H	; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.equ	VGMBASE+01H	; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.equ	VGMBASE+02H	; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.equ	VGMBASE+03H	; Secondary YM2162 11000011 a1=1 a0=1
+PSG1REG         .equ    VGMBASE+04H	; Primary SN76489
+PSG2REG         .equ    VGMBASE+05H	; Secondary SN76489
+YM2151_SEL1	.equ	VGMBASE+08H	; Primary YM2151 register selection
+YM2151_DAT1	.equ	VGMBASE+09H	; Primary YM2151 register data
+YM2151_SEL2	.equ	VGMBASE+0AH	; Secondary YM2151 register selection
+YM2151_DAT2	.equ	VGMBASE+0BH	; Secondary YM2151 register data
+ctcbase		.equ	VGMBASE+0CH	; CTC base address
+plt_cpuspd	.equ	6;000000	; Non ROMWBW cpu speed default
+FRAME_DLY       .equ    10  		; Frame delay (~ 1/44100)
 #ENDIF
 ;
 #IF (plt_type=P8X180)
-RSEL            .equ    82H			; Primary AY-3-8910 Register selection
-RDAT            .equ    83H			; Primary AY-3-8910 Register data
-RSEL2           .equ    88H			; Secondary AY-3-8910 Register selection
-RDAT2           .equ    89H			; Secondary AY-3-8910 Register data
-PSG1REG         .equ    84H			; Primary SN76489
-PSG2REG         .equ    8AH			; Secondary SN76489
-YM2151_SEL1	.equ	0B0H			; Primary YM2151 register selection
-YM2151_DAT1	.equ	0B1H			; Primary YM2151 register data
-YM2151_SEL2	.equ	0B2H			; Secondary YM2151 register selection
-YM2151_DAT2	.equ	0B3H			; Secondary YM2151 register data
-ctcbase		.equ	000H			; CTC base address
-YMSEL		.equ	000H			; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	000H			; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	000H			; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	000H			; Secondary YM2162 11000011 a1=1 a0=1
-FRAME_DLY       .equ    48			; Frame delay (~ 1/44100)
-plt_cpuspd	.equ	20			; Non ROMWBW cpu speed default
+RSEL            .equ    82H		; Primary AY-3-8910 Register selection
+RDAT            .equ    83H		; Primary AY-3-8910 Register data
+RSEL2           .equ    88H		; Secondary AY-3-8910 Register selection
+RDAT2           .equ    89H		; Secondary AY-3-8910 Register data
+PSG1REG         .equ    84H		; Primary SN76489
+PSG2REG         .equ    8AH		; Secondary SN76489
+YM2151_SEL1	.equ	0B0H		; Primary YM2151 register selection
+YM2151_DAT1	.equ	0B1H		; Primary YM2151 register data
+YM2151_SEL2	.equ	0B2H		; Secondary YM2151 register selection
+YM2151_DAT2	.equ	0B3H		; Secondary YM2151 register data
+ctcbase		.equ	000H		; CTC base address
+YMSEL		.equ	000H		; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.equ	000H		; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.equ	000H		; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.equ	000H		; Secondary YM2162 11000011 a1=1 a0=1
+FRAME_DLY       .equ    48		; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	20		; Non ROMWBW cpu speed default
 #ENDIF
 ;
 #IF (plt_type=RCBUS)
@@ -103,7 +100,7 @@ YMSEL		.equ	000H		; UNDEFINED	; Primary YM2162 11000000 a1=0 a0=0
 YMDAT		.equ	000H		; UNDEFINED	; Primary YM2162 11000001 a1=0 a0=1
 YM2SEL		.equ	000H		; UNDEFINED	; Secondary YM2162 11000010 a1=1 a0=0
 YM2DAT		.equ	000H		; UNDEFINED	; Secondary YM2162 11000011 a1=1 a0=1
-plt_cpuspd	.equ	7;372800	; CPUOSC		; Non ROMWBW cpu speed default
+plt_cpuspd	.equ	7;372800	; CPUOSC	; Non ROMWBW cpu speed default
 FRAME_DLY       .equ    12				; Frame delay (~ 1/44100)
 #ENDIF
 ;
@@ -184,7 +181,7 @@ RTCIO		.equ	070H
 ; YM2162 Register write macros - with wait and timeout
 ;------------------------------------------------------------------------------
 ;
-#DEFINE	setreg(reg,val) \
+#DEFINE	s2612reg(reg,val) \
 #DEFCONT \	ld	a,reg 
 #DEFCONT \	out	(YMSEL),a 
 #DEFCONT \	ld	a,val 
@@ -195,7 +192,7 @@ RTCIO		.equ	070H
 #DEFCONT \	jp	nc,$+5
 #DEFCONT \	djnz	$-6
 ;
-#DEFINE	setreg2(reg,val) \
+#DEFINE	s2612reg2(reg,val) \
 #DEFCONT \	ld	a,reg 
 #DEFCONT \	out	(YM2SEL),a 
 #DEFCONT \	ld	a,val 
@@ -205,9 +202,30 @@ RTCIO		.equ	070H
 #DEFCONT \	rlca
 #DEFCONT \	jp	nc,$+5
 #DEFCONT \	djnz	$-6
-
+;
 ;------------------------------------------------------------------------------
-; VGM Codes - see vgmrips.net/wiki/VGM_specification
+; YM2151 Register write macros - with wait and timeout
+;------------------------------------------------------------------------------
+;
+; Status Byte: 	Bit
+;		7       Busy Flag (1=Busy)
+;		6-2     Not Used
+;		1       Timer B Overflow (0=No Overflow, 1=Overflow)
+;		0       Timer A Overflow (0=No Overflow, 1=Overflow)
+;
+#DEFINE	s2151reg(reg,val) \
+#DEFCONT \	ld	a,reg 
+#DEFCONT \	out	(YM2151_SEL1),a 
+#DEFCONT \	ld	a,val 
+#DEFCONT \	out	(YM2151_DAT1),a 
+#DEFCONT \	ld	b,0
+#DEFCONT \	in	a,(YM2151_SEL1)
+#DEFCONT \	rlca
+#DEFCONT \	jp	nc,$+5
+#DEFCONT \	djnz	$-6
+;
+;------------------------------------------------------------------------------
+; VGM Codes - see vgmrips.net/wiki/VGM_Specification
 ;------------------------------------------------------------------------------
 
 VGM_GG_W	.equ	04FH			; GAME GEAR PSG STEREO. WRITE DD TO PORT 0X06
@@ -219,8 +237,8 @@ VGM_WNS		.equ	061H			; WAIT N SAMPLES
 VGM_W735	.equ	062H			; WAIT 735 SAMPLES (1/60TH SECOND)
 VGM_W882	.equ	063H			; WAIT 882 SAMPLES (1/50TH SECOND)
 VGM_ESD		.equ	066H			; END OF SOUND DATA
-VGM_YM21511_W	.equ	054H			; YM2612 #1 WRITE VALUE DD
-VGM_YM21512_W	.equ	0A4H			; YM2612 #2 WRITE VALUE DD
+VGM_YM21511_W	.equ	054H			; YM2151 #1 WRITE VALUE DD
+VGM_YM21512_W	.equ	0A4H			; YM2151 #2 WRITE VALUE DD
 
 ;------------------------------------------------------------------------------
 ; Generic CP/M definitions
@@ -490,7 +508,7 @@ YM2162_2	CP      VGM_YM26122_W
 ;	YM2151 SECTION
 ;
 YM2151_1	CP      VGM_YM21511_W
-                JR      NZ,YM2151_2
+		JR      NZ,YM2151_2
 		LD	A,(HL)
 		OUT	(YM2151_SEL1),A
 		INC	HL
@@ -759,252 +777,254 @@ SKIP1:		LD	A,(IX+0)
                 XOR     A
                 OUT     (RDAT), A
                 OUT     (RDAT2), A
+#IFDEF SBCV2004
 		CALL	FASTIO
+#ENDIF
 
 SKIP2:		LD	A,(IX+0)		; mute all channels on ym2612
 		AND	%00110000
 		JP	Z,SKIP3
 
-		setreg($22,$00)			; lfo off
+		s2612reg($22,$00)		; lfo off
 
-		setreg($27,$00)			; Disable independant Channel 3
-		setreg($28,$00)			; note off ch 1
-		setreg($28,$01)			; note off ch 2
-		setreg($28,$02)			; note off ch 3
-		setreg($28,$04)			; note off ch 4
-		setreg($28,$05)			; note off ch 5
-		setreg($28,$06)			; note off ch 6
-		setreg($2b,$00)			; dac off
+		s2612reg($27,$00)		; Disable independant Channel 3
+		s2612reg($28,$00)		; note off ch 1
+		s2612reg($28,$01)		; note off ch 2
+		s2612reg($28,$02)		; note off ch 3
+		s2612reg($28,$04)		; note off ch 4
+		s2612reg($28,$05)		; note off ch 5
+		s2612reg($28,$06)		; note off ch 6
+		s2612reg($2b,$00)		; dac off
 
-		setreg($b4,$00)			; sound off ch 1-3
-		setreg($b5,$00)
-		setreg($b6,$00)
-		setreg2($b4,$00)		; sound off ch 4-6
-		setreg2($b5,$00)
-		setreg2($b6,$00)
+		s2612reg($b4,$00)		; sound off ch 1-3
+		s2612reg($b5,$00)
+		s2612reg($b6,$00)
+		s2612reg2($b4,$00)		; sound off ch 4-6
+		s2612reg2($b5,$00)
+		s2612reg2($b6,$00)
 
-		setreg($40,$7f)			; ch 1-3 total level minimum
-		setreg($41,$7f)
-		setreg($42,$7f)
-		setreg($44,$7f)
-		setreg($45,$7f)
-		setreg($46,$7f)
-		setreg($48,$7f)
-		setreg($49,$7f)
-		setreg($4a,$7f)
-		setreg($4c,$7f)
-		setreg($4d,$7f)
-		setreg($4e,$7f)
+		s2612reg($40,$7f)		; ch 1-3 total level minimum
+		s2612reg($41,$7f)
+		s2612reg($42,$7f)
+		s2612reg($44,$7f)
+		s2612reg($45,$7f)
+		s2612reg($46,$7f)
+		s2612reg($48,$7f)
+		s2612reg($49,$7f)
+		s2612reg($4a,$7f)
+		s2612reg($4c,$7f)
+		s2612reg($4d,$7f)
+		s2612reg($4e,$7f)
 
-		setreg2($40,$7f)		; ch 4-6 total level minimum
-		setreg2($41,$7f)
-		setreg2($42,$7f)
-		setreg2($44,$7f)
-		setreg2($45,$7f)
-		setreg2($46,$7f)
-		setreg2($48,$7f)
-		setreg2($49,$7f)
-		setreg2($4a,$7f)
-		setreg2($4c,$7f)
-		setreg2($4d,$7f)
-		setreg2($4e,$7f)
+		s2612reg2($40,$7f)		; ch 4-6 total level minimum
+		s2612reg2($41,$7f)
+		s2612reg2($42,$7f)
+		s2612reg2($44,$7f)
+		s2612reg2($45,$7f)
+		s2612reg2($46,$7f)
+		s2612reg2($48,$7f)
+		s2612reg2($49,$7f)
+		s2612reg2($4a,$7f)
+		s2612reg2($4c,$7f)
+		s2612reg2($4d,$7f)
+		s2612reg2($4e,$7f)
 
 #if (0)
 
-		setreg($2a,$00)			; dac value
+		s2612reg($2a,$00)		; dac value
 
-		setreg($24,$00)			; timer A frequency
-		setreg($25,$00)			; timer A frequency
-		setreg($26,$00)			; time B frequency
+		s2612reg($24,$00)		; timer A frequency
+		s2612reg($25,$00)		; timer A frequency
+		s2612reg($26,$00)		; time B frequency
 
-		setreg($30,$00)			; ch 1-3 multiply & detune
-		setreg($31,$00)
-		setreg($32,$00)
-		setreg($34,$00)
-		setreg($35,$00)
-		setreg($36,$00)
-		setreg($38,$00)
-		setreg($39,$00)
-		setreg($3a,$00)
-		setreg($3c,$00)
-		setreg($3d,$00)
-		setreg($3e,$00)
+		s2612reg($30,$00)		; ch 1-3 multiply & detune
+		s2612reg($31,$00)
+		s2612reg($32,$00)
+		s2612reg($34,$00)
+		s2612reg($35,$00)
+		s2612reg($36,$00)
+		s2612reg($38,$00)
+		s2612reg($39,$00)
+		s2612reg($3a,$00)
+		s2612reg($3c,$00)
+		s2612reg($3d,$00)
+		s2612reg($3e,$00)
 
-		setreg2($30,$00)		; ch 4-6 multiply & detune
-		setreg2($31,$00)
-		setreg2($32,$00)
-		setreg2($34,$00)
-		setreg2($35,$00)
-		setreg2($36,$00)
-		setreg2($38,$00)
-		setreg2($39,$00)
-		setreg2($3a,$00)
-		setreg2($3c,$00)
-		setreg2($3d,$00)
-		setreg2($3e,$00)
+		s2612reg2($30,$00)		; ch 4-6 multiply & detune
+		s2612reg2($31,$00)
+		s2612reg2($32,$00)
+		s2612reg2($34,$00)
+		s2612reg2($35,$00)
+		s2612reg2($36,$00)
+		s2612reg2($38,$00)
+		s2612reg2($39,$00)
+		s2612reg2($3a,$00)
+		s2612reg2($3c,$00)
+		s2612reg2($3d,$00)
+		s2612reg2($3e,$00)
 
-		setreg($50,$00)			; ch 1-3 attack rate and scaling
-		setreg($51,$00)
-		setreg($52,$00)
-		setreg($54,$00)
-		setreg($55,$00)
-		setreg($56,$00)
-		setreg($58,$00)
-		setreg($59,$00)
-		setreg($5a,$00)
-		setreg($5c,$00)
-		setreg($5d,$00)
-		setreg($5e,$00)
+		s2612reg($50,$00)		; ch 1-3 attack rate and scaling
+		s2612reg($51,$00)
+		s2612reg($52,$00)
+		s2612reg($54,$00)
+		s2612reg($55,$00)
+		s2612reg($56,$00)
+		s2612reg($58,$00)
+		s2612reg($59,$00)
+		s2612reg($5a,$00)
+		s2612reg($5c,$00)
+		s2612reg($5d,$00)
+		s2612reg($5e,$00)
 
-		setreg2($50,$00)		; ch 4-6 attack rate and scaling
-		setreg2($51,$00)
-		setreg2($52,$00)
-		setreg2($54,$00)
-		setreg2($55,$00)
-		setreg2($56,$00)
-		setreg2($58,$00)
-		setreg2($59,$00)
-		setreg2($5a,$00)
-		setreg2($5c,$00)
-		setreg2($5d,$00)
-		setreg2($5e,$00)
+		s2612reg2($50,$00)		; ch 4-6 attack rate and scaling
+		s2612reg2($51,$00)
+		s2612reg2($52,$00)
+		s2612reg2($54,$00)
+		s2612reg2($55,$00)
+		s2612reg2($56,$00)
+		s2612reg2($58,$00)
+		s2612reg2($59,$00)
+		s2612reg2($5a,$00)
+		s2612reg2($5c,$00)
+		s2612reg2($5d,$00)
+		s2612reg2($5e,$00)
 
-		setreg($60,$00)			; ch 1-3 decay rate and am enable
-		setreg($61,$00)
-		setreg($62,$00)
-		setreg($64,$00)
-		setreg($65,$00)
-		setreg($66,$00)
-		setreg($68,$00)
-		setreg($69,$00)
-		setreg($6a,$00)
-		setreg($6c,$00)
-		setreg($6d,$00)
-		setreg($6e,$00)
+		s2612reg($60,$00)		; ch 1-3 decay rate and am enable
+		s2612reg($61,$00)
+		s2612reg($62,$00)
+		s2612reg($64,$00)
+		s2612reg($65,$00)
+		s2612reg($66,$00)
+		s2612reg($68,$00)
+		s2612reg($69,$00)
+		s2612reg($6a,$00)
+		s2612reg($6c,$00)
+		s2612reg($6d,$00)
+		s2612reg($6e,$00)
 
-		setreg2($60,$00)		; ch 4-6 decay rate and am enable
-		setreg2($61,$00)
-		setreg2($62,$00)
-		setreg2($64,$00)
-		setreg2($65,$00)
-		setreg2($66,$00)
-		setreg2($68,$00)
-		setreg2($69,$00)
-		setreg2($6a,$00)
-		setreg2($6c,$00)
-		setreg2($6d,$00)
-		setreg2($6e,$00)
+		s2612reg2($60,$00)		; ch 4-6 decay rate and am enable
+		s2612reg2($61,$00)
+		s2612reg2($62,$00)
+		s2612reg2($64,$00)
+		s2612reg2($65,$00)
+		s2612reg2($66,$00)
+		s2612reg2($68,$00)
+		s2612reg2($69,$00)
+		s2612reg2($6a,$00)
+		s2612reg2($6c,$00)
+		s2612reg2($6d,$00)
+		s2612reg2($6e,$00)
 
-		setreg($70,$00)			; ch 1-3 sustain rate
-		setreg($71,$00)
-		setreg($72,$00)
-		setreg($74,$00)
-		setreg($75,$00)
-		setreg($76,$00)
-		setreg($78,$00)
-		setreg($79,$00)
-		setreg($7a,$00)
-		setreg($7c,$00)
-		setreg($7d,$00)
-		setreg($7e,$00)
+		s2612reg($70,$00)		; ch 1-3 sustain rate
+		s2612reg($71,$00)
+		s2612reg($72,$00)
+		s2612reg($74,$00)
+		s2612reg($75,$00)
+		s2612reg($76,$00)
+		s2612reg($78,$00)
+		s2612reg($79,$00)
+		s2612reg($7a,$00)
+		s2612reg($7c,$00)
+		s2612reg($7d,$00)
+		s2612reg($7e,$00)
 
-		setreg2($70,$00)		; ch 4-6 sustain rate
-		setreg2($71,$00)
-		setreg2($72,$00)
-		setreg2($74,$00)
-		setreg2($75,$00)
-		setreg2($76,$00)
-		setreg2($78,$00)
-		setreg2($79,$00)
-		setreg2($7a,$00)
-		setreg2($7c,$00)
-		setreg2($7d,$00)
-		setreg2($7e,$00)
+		s2612reg2($70,$00)		; ch 4-6 sustain rate
+		s2612reg2($71,$00)
+		s2612reg2($72,$00)
+		s2612reg2($74,$00)
+		s2612reg2($75,$00)
+		s2612reg2($76,$00)
+		s2612reg2($78,$00)
+		s2612reg2($79,$00)
+		s2612reg2($7a,$00)
+		s2612reg2($7c,$00)
+		s2612reg2($7d,$00)
+		s2612reg2($7e,$00)
 
-		setreg($80,$00)			; ch 1-3 release rate and sustain level
-		setreg($81,$00)
-		setreg($82,$00)
-		setreg($84,$00)
-		setreg($85,$00)
-		setreg($86,$00)
-		setreg($88,$00)
-		setreg($89,$00)
-		setreg($8a,$00)
-		setreg($8c,$00)
-		setreg($8d,$00)
-		setreg($8e,$00)
+		s2612reg($80,$00)		; ch 1-3 release rate and sustain level
+		s2612reg($81,$00)
+		s2612reg($82,$00)
+		s2612reg($84,$00)
+		s2612reg($85,$00)
+		s2612reg($86,$00)
+		s2612reg($88,$00)
+		s2612reg($89,$00)
+		s2612reg($8a,$00)
+		s2612reg($8c,$00)
+		s2612reg($8d,$00)
+		s2612reg($8e,$00)
 
-		setreg2($80,$00)		; ch 4-6 release rate and sustain level
-		setreg2($81,$00)
-		setreg2($82,$00)
-		setreg2($84,$00)
-		setreg2($85,$00)
-		setreg2($86,$00)
-		setreg2($88,$00)
-		setreg2($89,$00)
-		setreg2($8a,$00)
-		setreg2($8c,$00)
-		setreg2($8d,$00)
-		setreg2($8e,$00)
+		s2612reg2($80,$00)		; ch 4-6 release rate and sustain level
+		s2612reg2($81,$00)
+		s2612reg2($82,$00)
+		s2612reg2($84,$00)
+		s2612reg2($85,$00)
+		s2612reg2($86,$00)
+		s2612reg2($88,$00)
+		s2612reg2($89,$00)
+		s2612reg2($8a,$00)
+		s2612reg2($8c,$00)
+		s2612reg2($8d,$00)
+		s2612reg2($8e,$00)
 
-		setreg($90,$00)			; ch 1-3 ssg-eg
-		setreg($91,$00)
-		setreg($92,$00)
-		setreg($94,$00)
-		setreg($95,$00)
-		setreg($96,$00)
-		setreg($98,$00)
-		setreg($99,$00)
-		setreg($9a,$00)
-		setreg($9c,$00)
-		setreg($9d,$00)
-		setreg($9e,$00)
+		s2612reg($90,$00)		; ch 1-3 ssg-eg
+		s2612reg($91,$00)
+		s2612reg($92,$00)
+		s2612reg($94,$00)
+		s2612reg($95,$00)
+		s2612reg($96,$00)
+		s2612reg($98,$00)
+		s2612reg($99,$00)
+		s2612reg($9a,$00)
+		s2612reg($9c,$00)
+		s2612reg($9d,$00)
+		s2612reg($9e,$00)
 
-		setreg2($90,$00)		; ch 4-6 ssg-eg
-		setreg2($91,$00)
-		setreg2($92,$00)
-		setreg2($94,$00)
-		setreg2($95,$00)
-		setreg2($96,$00)
-		setreg2($98,$00)
-		setreg2($99,$00)
-		setreg2($9a,$00)
-		setreg2($9c,$00)
-		setreg2($9d,$00)
-		setreg2($9e,$00)
+		s2612reg2($90,$00)		; ch 4-6 ssg-eg
+		s2612reg2($91,$00)
+		s2612reg2($92,$00)
+		s2612reg2($94,$00)
+		s2612reg2($95,$00)
+		s2612reg2($96,$00)
+		s2612reg2($98,$00)
+		s2612reg2($99,$00)
+		s2612reg2($9a,$00)
+		s2612reg2($9c,$00)
+		s2612reg2($9d,$00)
+		s2612reg2($9e,$00)
 
-		setreg($a0,$00)			; ch 1-3 frequency
-		setreg($a1,$00)
-		setreg($a2,$00)
-		setreg($a4,$00)
-		setreg($a5,$00)
-		setreg($a6,$00)
-;		setreg($a8,$00)			; ch 3 special mode
-;		setreg($a9,$00)
-;		setreg($aa,$00)
-;		setreg($ac,$00)
-;		setreg($ad,$00)
-;		setreg($ae,$00)
+		s2612reg($a0,$00)		; ch 1-3 frequency
+		s2612reg($a1,$00)
+		s2612reg($a2,$00)
+		s2612reg($a4,$00)
+		s2612reg($a5,$00)
+		s2612reg($a6,$00)
+;		s2612reg($a8,$00)		; ch 3 special mode
+;		s2612reg($a9,$00)
+;		s2612reg($aa,$00)
+;		s2612reg($ac,$00)
+;		s2612reg($ad,$00)
+;		s2612reg($ae,$00)
 
-		setreg2($a0,$00)		; ch 4-6 frequency
-		setreg2($a1,$00)
-		setreg2($a2,$00)
-		setreg2($a4,$00)
-		setreg2($a5,$00)
-		setreg2($a6,$00)
-;		setreg2($a8,$00)		; ch 3 special mode
-;		setreg2($a9,$00)
-;		setreg2($aa,$00)
-;		setreg2($ac,$00)
-;		setreg2($ad,$00)
-;		setreg2($ae,$00)
+		s2612reg2($a0,$00)		; ch 4-6 frequency
+		s2612reg2($a1,$00)
+		s2612reg2($a2,$00)
+		s2612reg2($a4,$00)
+		s2612reg2($a5,$00)
+		s2612reg2($a6,$00)
+;		s2612reg2($a8,$00)		; ch 3 special mode
+;		s2612reg2($a9,$00)
+;		s2612reg2($aa,$00)
+;		s2612reg2($ac,$00)
+;		s2612reg2($ad,$00)
+;		s2612reg2($ae,$00)
 
-		setreg($b0,$00)			; ch 1-3 algorith + feedback
-		setreg($b1,$00)
-		setreg($b2,$00)
-		setreg2($b0,$00)		; ch 4-6 algorith + feedback
-		setreg2($b1,$00)
-		setreg2($b2,$00)
+		s2612reg($b0,$00)		; ch 1-3 algorith + feedback
+		s2612reg($b1,$00)
+		s2612reg($b2,$00)
+		s2612reg2($b0,$00)		; ch 4-6 algorith + feedback
+		s2612reg2($b1,$00)
+		s2612reg2($b2,$00)
 
 #endif
 		
@@ -1014,6 +1034,64 @@ SKIP3:		LD	A,(IX+0)		; For YM2151 ... Unimplemented
 
 		; MUTE YM2151
 
+		s2151reg($14,$30)		; disable timer %00110000		
+
+		s2151reg($0f,$00)		; disable noise
+;
+		s2151reg($1b,$00)		; CTx output off, LFO waveform
+
+		s2151reg($08,$00)		; key off all channels
+		s2151reg($08,$01)
+		s2151reg($08,$02)
+		s2151reg($08,$03)
+		s2151reg($08,$04)
+		s2151reg($08,$05)
+		s2151reg($08,$06)
+		s2151reg($08,$07)
+
+		s2151reg($60,$7f)		; total level = silent
+		s2151reg($61,$7f)
+		s2151reg($62,$7f)
+		s2151reg($63,$7f)
+		s2151reg($64,$7f)
+		s2151reg($65,$7f)
+		s2151reg($66,$7f)
+		s2151reg($67,$7f)
+		s2151reg($68,$7f)
+		s2151reg($69,$7f)
+		s2151reg($6A,$7f)
+		s2151reg($6B,$7f)
+		s2151reg($6C,$7f)
+		s2151reg($6D,$7f)
+		s2151reg($6E,$7f)
+		s2151reg($6F,$7f)
+		s2151reg($70,$7f)
+		s2151reg($71,$7f)
+		s2151reg($72,$7f)
+		s2151reg($73,$7f)
+		s2151reg($74,$7f)
+		s2151reg($75,$7f)
+		s2151reg($76,$7f)
+		s2151reg($77,$7f)
+		s2151reg($78,$7f)
+		s2151reg($79,$7f)
+		s2151reg($7A,$7f)
+		s2151reg($7B,$7f)
+		s2151reg($7C,$7f)
+		s2151reg($7D,$7f)
+		s2151reg($7E,$7f)
+		s2151reg($7F,$7f)
+
+		s2151reg($20,$00)		; channel output off, no feedback
+		s2151reg($21,$00)
+		s2151reg($22,$00)
+		s2151reg($23,$00)
+		s2151reg($24,$00)
+		s2151reg($25,$00)
+		s2151reg($26,$00)
+		s2151reg($27,$00)
+;
+
 SKIP4		RET
 ;
 ;------------------------------------------------------------------------------

Source/Apps/VGM/vgmplay.txt

@@ -21,7 +21,7 @@ Supported platforms
 ===================
 
 VGM Player is currently being developed on the ROMWBW platform using the Retrobrew computers
-EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612 and 2xSN76489) board. 
+EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612,YM2151 2xSN76489) board. 
 It can be configured to run with other hardware such as RCBus, P8X180 and nhyodyne MBC.
 
 VGM files can be very big and are limited in size by the available TPA space, which is typically 52k.
@@ -50,13 +50,15 @@ FIELDMAP.VGM - SN76489+YM2612      - Taikou Risshiden: Field Map: Summer
 ITSGAMOV.VGM - SN76489+YM2612      - Puyo Puyo Tsuu: It's Game Over!                              : 16K
 STARTDEM.VGN - 2xSN76489+AY-3-8910 * Exed Exes / Savage Bees: Start Demo ~Main BGM                : 32K
 INCHINA.VGM  - YM2612              * Double Dragon 3: The Rosetta Stone: In China                 : 44K
-
+SURE.VGM     - YM2151              - Martial Age: Sure??                                          : 36K
+SABERDAN.VGM - YM2151              - Road Runner: Sabre Dance (Attract Mode - Stage 4)            : 28K
 * Included in disk images
 
 VGM sources
 ===========
 https://www.smspower.org/forums/15359-VGMPacksGameGearMegaCollection
 https://vgmrips.net/packs/chip/ym2612
+https://vgmrips.net/packs/chip/ym2151 
 https://project2612.org/
 
 VGM Tools

Source/Apps/assign.asm

@@ -30,11 +30,11 @@
 ;   2021-12-06 [WBW] Fix inverted ROM/RAM DPB mapping in buffer alloc
 ;   2022-02-28 [WBW] Use HBIOS to swap banks under CP/M 3
 ;                    Use CPM3 BDOS direct BIOS call to get DRVTBL adr
+;   2023-06-19 [WBW] Update for revised DIODEVICE API
 ;_______________________________________________________________________________
 ;
 ; ToDo:
-;  1) Do something to prevent assigning slices when device does not support them
-;  2) ASSIGN C: causes drive map to be reinstalled unnecessarily
+;  1) ASSIGN C: causes drive map to be reinstalled unnecessarily
 ;_______________________________________________________________________________
 ;
 ;===============================================================================
@@ -1405,12 +1405,11 @@ chkdev:		; HBIOS variant
 	; get device/unit info
 	ld	b,$17		; hbios func: diodevice
 	ld	c,a		; unit to C
-	rst	08		; call hbios, D := device, E := unit
-	ld	a,d		; device to A
+	rst	08		; call hbios, C := device attributes
 ;
 	; check slice support
-	cp	$30		; A has device/unit, in hard disk range?
-	jr	c,chkdev1	; if not hard disk, check slice val
+	bit	5,c		; high capacity device?
+	jr	z,chkdev1	; if not high cap, check slice val
 	xor	a		; otherwise, signal OK
 	ret
 ;
@@ -1918,9 +1917,9 @@ dev06	.db	"SD",0
 dev07	.db	"PRPSD",0
 dev08	.db	"PPPSD",0
 dev09	.db	"HDSK",0
-dev10	.equ	devunk
-dev11	.equ	devunk
-dev12	.equ	devunk
+dev10	.db	"PPA",0
+dev11	.db	"IMM",0
+dev12	.db	"SYQ",0
 dev13	.equ	devunk
 dev14	.equ	devunk
 dev15	.equ	devunk
@@ -1943,10 +1942,10 @@ stack	.equ	$		; stack top
 ; Messages
 ;
 indent	.db	"   ",0
-msgban1	.db	"ASSIGN v1.5 for RomWBW CP/M ",0
+msgban1	.db	"ASSIGN v1.6 for RomWBW CP/M ",0
 msg22	.db	"2.2",0
 msg3	.db	"3",0
-msbban2	.db	", 28-Feb-2022",0
+msbban2	.db	", 16-Jun-2023",0
 msghb	.db	" (HBIOS Mode)",0
 msgub	.db	" (UBIOS Mode)",0
 msgban3	.db	"Copyright 2021, Wayne Warthen, GNU GPL v3",0

Source/Apps/rtc.asm

@@ -31,6 +31,8 @@
 ;
 ;[2022/03/27] v1.8 Support RHYOPHYRE
 ;
+;[2023/07/07] v1.9 Support DUODYNE
+;
 ; Constants
 ;
 mask_data	.EQU	%10000000	; RTC data line
@@ -49,6 +51,7 @@ PORT_DYNO	.EQU	$0C		; RTC port for DYNO
 PORT_RCZ280	.EQU	$C0		; RTC port for RCZ280
 PORT_MBC	.EQU	$70		; RTC port for MBC
 PORT_RPH	.EQU	$84		; RTC port for RHYOPHYRE
+PORT_DUO	.EQU	$94		; RTC port for DUODYNE
 
 
 BDOS		.EQU	5		; BDOS invocation vector
@@ -1079,61 +1082,66 @@ HINIT:
 	LD	C,PORT_SBC
 	LD	DE,PLT_SBC
 	CP	$01		; SBC
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 	CP	$02		; ZETA
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 	CP	$03		; ZETA 2
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_N8
 	LD	DE,PLT_N8
 	CP	$04		; N8
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_MK4
 	LD	DE,PLT_MK4
 	CP	$05		; Mark IV
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ80
 	LD	DE,PLT_RCZ80
 	CP	$07		; RCBus w/ Z80
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ180
 	LD	DE,PLT_RCZ180
 	CP	$08		; RCBus w/ Z180
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_EZZ80
 	LD	DE,PLT_EZZ80
 	CP	$09		; Easy Z80
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_SCZ180
 	LD	DE,PLT_SCZ180
 	CP	$0A		; SCZ180
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_DYNO
 	LD	DE,PLT_DYNO
 	CP	11		; DYNO
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ280
 	LD	DE,PLT_RCZ280
 	CP	12		; RCZ280
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_MBC
 	LD	DE,PLT_MBC
 	CP	13		; MBC
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RPH
 	LD	DE,PLT_RPH
 	CP	14		; RHYOPHYRE
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
+;
+	LD	C,PORT_DUO
+	LD	DE,PLT_DUO
+	CP	17		; DUODYNE
+	JP	Z,RTC_INIT2
 ;
 	; Unknown platform
 	LD	DE,PLTERR	; BIOS error message
@@ -1630,7 +1638,7 @@ TESTING_BIT_DELAY_OVER:
 
 RTC_HELP_MSG:
 	.DB	0Ah, 0Dh		; line feed and carriage return
-	.TEXT	"RTC: Version 1.8"
+	.TEXT	"RTC: Version 1.9"
 	.DB	0Ah, 0Dh		; line feed and carriage return
 	.TEXT	"Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot W)arm-start H)elp"
 	.DB	0Ah, 0Dh		; line feed and carriage return
@@ -1760,6 +1768,7 @@ PLT_DYNO	.TEXT	", DYNO RTC Module Latch Port 0x0C\r\n$"
 PLT_RCZ280	.TEXT	", RCBus Z280 RTC Module Latch Port 0xC0\r\n$"
 PLT_MBC		.TEXT	", MBC RTC Latch Port 0x70\r\n$"
 PLT_RPH		.TEXT	", RHYOPHYRE RTC Latch Port 0x84\r\n$"
+PLT_DUO		.TEXT	", DUODYNE RTC Latch Port 0x70\r\n$"
 
 ;
 ; Generic FOR-NEXT loop algorithm

Source/CBIOS/cbios.asm

@@ -2291,8 +2291,8 @@ INIT2:
 	LD	C,(HL)		; PUT UNIT NUM IN C
 	RST	08		; CALL HBIOS
 	LD	A,C		; GET ATTRIBUTES
-	AND	%00111000	; ISOLATE TYPE BITS
-	CP	%00101000	; TYPE = RAM?
+	AND	%10001111	; ISOLATE TYPE BITS
+	CP	%00000101	; NOT FLOPPY, TYPE = RAM?
 	JR	NZ,INIT2X	; IF NOT THEN DONE
 ;
 	; CHECK IF SECOND UNIT IS ROM OR FLASH
@@ -2303,10 +2303,10 @@ INIT2:
 	LD	C,(HL)		; PUT UNIT NUM IN C
 	RST	08		; CALL HBIOS
 	LD	A,C		; GET ATTRIBUTES
-	AND	%00111000	; ISOLATE TYPE BITS
-	CP	%00100000	; TYPE = ROM?
+	AND	%10001111	; ISOLATE TYPE BITS
+	CP	%00000100	; NOT FLOPPY, TYPE = ROM?
 	JR	Z,INIT2A	; IF SO, ADJUST DEF DRIVE
-	CP	%00111000	; TYPE = FLASH?
+	CP	%00000111	; NOT FLOPPY, TYPE = FLASH?
 	JR	NZ,INIT2X	; IF NOT THEN DONE
 ;
 INIT2A:
@@ -2904,52 +2904,51 @@ DRV_INIT:
 	LD	HL,DRVLST		; INIT HL PTR TO DRIVE LIST
 ;
 DRV_INIT2:
+	PUSH	BC			; SAVE LOOP CNT & UNIT
 	CALL	DRV_INIT3		; CHECK DRIVE
+	POP	BC			; RECOVER LOOP CNT & UNIT
 	INC	C			; NEXT UNIT
 	DJNZ	DRV_INIT2		; LOOP
-	LD	A,D			; TOTAL DEVICE COUNT TO D
+	LD	A,D			; TOTAL DEVICE COUNT TO A
 	LD	(DRVLSTC),A		; SAVE THE COUNT
 	JR	DRV_INIT4		; CONTINUE
 ;
 DRV_INIT3:
+	; GET DEVICE ATTRIBUTES
 	PUSH	DE			; SAVE DE (HARD DISK VOLUME COUNTER)
 	PUSH	HL			; SAVE DRIVE LIST PTR
 	PUSH	BC			; SAVE LOOP CONTROL
 	LD	B,BF_DIODEVICE		; HBIOS FUNC: REPORT DEVICE INFO
 	RST	08			; CALL HBIOS, UNIT TO C
-	LD	A,D			; DEVICE TYPE TO A
+	LD	A,C			; DEVICE ATTRIBUTES TO A
 	POP	BC			; RESTORE LOOP CONTROL
 	POP	HL			; RESTORE DRIVE LIST PTR
 	POP	DE			; RESTORE DE
-	CP	DIODEV_IDE		; HARD DISK DEVICE?
-	JR	NC,DRV_INIT3A		; IF SO, HANDLE SPECIAL
-	LD	(HL),C			; SAVE UNIT NUM IN LIST
-	INC	HL			; BUMP PTR
-	INC	D			; INC TOTAL DEVICE COUNT
-	RET
+	LD	B,A			; ATTRIBUTES TO B
 ;
-DRV_INIT3A:
-	; CHECK FOR ACTIVE AND RETURN IF NOT
+	; IF DEVICE IS NOT REMOVABLE, THEN CHECK TO ENSURE IT IS
+	; ACTUALLY ONLINE.  IF NOT, SKIP UNIT ENTIRELY.
+	BIT	6,B			; REMOVABLE?
+	JR	NZ,DRV_INIT3A		; IF SO, SKIP MEDIA CHECK
 	PUSH	DE			; SAVE DE (HARD DISK VOLUME COUNTER)
 	PUSH	HL			; SAVE DRIVE LIST PTR
 	PUSH	BC			; SAVE LOOP CONTROL
-
 	LD	B,BF_DIOMEDIA		; HBIOS FUNC: SENSE MEDIA
 	LD	E,1			; PERFORM MEDIA DISCOVERY
-	RST	08
-
+	RST	08			; DO IT
 	POP	BC			; RESTORE LOOP CONTROL
 	POP	HL			; RESTORE DRIVE LIST PTR
 	POP	DE			; RESTORE DE
-
-	RET	NZ			; IF NO MEDIA, JUST RETURN
-
-	; IF ACTIVE...
+	RET	NZ			; OFFLINE, SKIP ENTIRE UNIT
+;
+DRV_INIT3A:
 	LD	(HL),C			; SAVE UNIT NUM IN LIST
 	INC	HL			; BUMP PTR
 	INC	D			; INC TOTAL DEVICE COUNT
+	BIT	5,B			; HIGH CAPACITY?
+	RET	Z			; DONE IF NOT
 	INC	E			; INCREMENT HARD DISK COUNT
-	RET				; AND RETURN
+	RET				; DONE
 ;
 DRV_INIT4:	; SET SLICES PER VOLUME (HDSPV) BASED ON HARD DISK VOLUME COUNT
 	LD	A,E			; HARD DISK VOLUME COUNT TO A
@@ -2978,7 +2977,8 @@ DRV_INIT6:	; LOOP THRU ALL UNITS AVAILABLE
 	LD	C,(HL)			; GET UNIT NUM FROM LIST
 	PUSH	BC			; PRESERVE LOOP CONTROL
 	LD	B,BF_DIODEVICE		; HBIOS FUNC: REPORT DEVICE INFO
-	RST	08			; CALL HBIOS, D := DEVICE TYPE
+	RST	08			; CALL HBIOS, C := DEVICE ATTRIBUTES
+	LD	A,C			; DEVICE ATTRIBUTES TO A
 	POP	BC			; GET UNIT INDEX BACK IN C
 	PUSH	BC			; RESAVE LOOP CONTROL
 	CALL	DRV_INIT7		; MAKE DRIVE MAP ENTRY(S)
@@ -2992,10 +2992,9 @@ DRV_INIT6:	; LOOP THRU ALL UNITS AVAILABLE
 DRV_INIT7:	; PROCESS UNIT
 	LD	E,0			; INITIALIZE SLICE INDEX
 	LD	B,1			; DEFAULT LOOP COUNTER
-	LD	A,D			; DEVICE TYPE TO ACCUM
 	LD	D,C			; UNIT NUMBER TO D
-	CP	DIODEV_IDE		; HARD DISK DEVICE?
-	JR	C,DRV_INIT8		; NOPE, LEAVE LOOP COUNT AT 1
+	BIT	5,A			; HIGH CAPACITY DEVICE?
+	JR	Z,DRV_INIT8		; NOPE, LEAVE LOOP COUNT AT 1
 	LD	A,(HDSPV)		; GET SLICES PER VOLUME TO ACCUM
 	LD	B,A			; MOVE TO B FOR LOOP COUNTER
 ;
@@ -3392,9 +3391,9 @@ DEV06	.DB	"SD$"
 DEV07	.DB	"PRPSD$"
 DEV08	.DB	"PPPSD$"
 DEV09	.DB	"HDSK$"
-DEV10	.EQU	DEVUNK
-DEV11	.EQU	DEVUNK
-DEV12	.EQU	DEVUNK
+DEV10	.DB	"PPA$"
+DEV11	.DB	"IMM$"
+DEV12	.DB	"SYQ$"
 DEV13	.EQU	DEVUNK
 DEV14	.EQU	DEVUNK
 DEV15	.EQU	DEVUNK
@@ -3406,7 +3405,7 @@ DIRBUF	.DW	0			; DIR BUF POINTER
 HEAPTOP	.DW	BUFPOOL			; CURRENT TOP OF HEAP
 BOOTVOL	.DW	0			; BOOT VOLUME, MSB=BOOT UNIT, LSB=BOOT SLICE
 HDSPV	.DB	2			; SLICES PER VOLUME FOR HARD DISKS (MUST BE >= 1)
-DRVLST	.FILL	32			; ACTIVE DRIVE LIST USED DURINT DRV_INIT
+DRVLST	.FILL	32			; ACTIVE DRIVE LIST USED DURING DRV_INIT
 DRVLSTC	.DB	0			; ENTRY COUNT FOR ACTIVE DRIVE LIST
 ;
 #IFDEF PLTWBW

Source/CPM3/boot.z80

@@ -156,7 +156,9 @@ dinit:
 	ld	hl,drvlst		; init hl ptr to drive list
 ;
 dinit2:
+	push	bc			; save loop cnt & unit
 	call	dinit3			; check drive
+	pop	bc			; recover loop cnt & unit
 	inc	c			; next unit
 	djnz	dinit2			; loop
 	ld	a,d			; total device count to d
@@ -169,39 +171,35 @@ dinit3:
 	push	bc			; save loop control
 	ld	b,17h			; hbios func: report device info
 	rst	08			; call hbios, unit to c
-	ld	a,d			; device type to a
+	ld	a,c			; device attributes to a
 	pop	bc			; restore loop control
 	pop	hl			; restore drive list ptr
 	pop	de			; restore de
-	cp	30h			; hard disk device?
-	jr	nc,dinit3a		; if so, handle special
-	ld	(hl),c			; save unit num in list
-	inc	hl			; bump ptr
-	inc	d			; inc total device count
-	ret
+	ld	b,a			; attributes to b
 ;
-dinit3a:
-	; check for active and return if not
+	; if device is not removable, then check to ensure it is
+	; actually online.  if not, skip unit entirely.
+	bit	6,b			; removable?
+	jr	nz,dinit3a		; if so, skip media check
 	push	de			; save de (hard disk volume counter)
 	push	hl			; save drive list ptr
 	push	bc			; save loop control
-	
 	ld	b,18h			; hbios func: sense media
 	ld	e,1			; perform media discovery
-	rst	08
-
+	rst	08			; do it
 	pop	bc			; restore loop control
 	pop	hl			; restore drive list ptr
 	pop	de			; restore de
-	
-	ret	nz			; if no media, just return
-	
-	; if active...
+	ret	nz			; offline, skip entire unit
+;
+dinit3a:
 	ld	(hl),c			; save unit num in list
 	inc	hl			; bump ptr
 	inc	d			; inc total device count
+	bit	5,b			; high capacity?
+	ret	z			; done if not
 	inc	e			; increment hard disk count
-	ret				; and return
+	ret				; done
 
 dinit4:	; set slices per volume (hdspv) based on hard disk volume count
 	ld	a,e			; hard disk volume count to a
@@ -238,7 +236,8 @@ dinit6:
 	push	bc			; preserve loop control
 	push	hl			; preserve dph pointer
 	ld	b,17h			; hbios func: report device info
-	rst	08			; call hbios, d := device type
+	rst	08			; call hbios, a := device attributes
+	ld	a,c			; device attributes to a
 	pop	hl			; restore dph pointer
 	pop	bc			; get unit index back in c
 	push	bc			; resave loop control
@@ -253,10 +252,9 @@ dinit6:
 dinit7:	; process a unit (all slices)
 	ld	e,0			; initialize slice index
 	ld	b,1			; default loop counter
-	ld	a,d			; device type to accum
 	ld	d,c			; unit number to d
-	cp	030h			; hard disk device?
-	jr	c,dinit8		; nope, leave loop count at 1
+	bit	5,a			; high capacity device?
+	jr	z,dinit8		; nope, leave loop count at 1
 	ld	a,(hdspv)		; get slices per volume to accum
 	ld	b,a			; move to b for loop counter
 

Source/Doc/Applications.md

@@ -51,6 +51,7 @@ found:
 | INTTEST     | No       | Yes        | Yes      |
 | FAT         | No       | Yes        | Yes      |
 | TUNE        | No       | Yes        | Yes      |
+| WDATE       | No       | Yes        | Yes      |
 
 `\clearpage`{=latex}
 
@@ -104,7 +105,7 @@ The `ASSIGN` command supports "stacking" of instructions. For example,
 two slices of IDE 0 and will unassign E:.
 
 When the command runs it will echo the resultant assignments to the
-console to confirm it's actions. It will also display the remaining
+console to confirm its actions. It will also display the remaining
 space available in disk buffers.
 
 ## Notes
@@ -158,7 +159,7 @@ should only be specified for hard disk devices (SD, IDE, PPIDE).
 Only one drive letter may be assigned to a specific device/unit/slice
 at a time. Attempts to assign a duplicate drive letter will fail and
 display an error. If you wish to assign a different drive letter to a
-device/unit/slice, unassign the the existing drive letter first.
+device/unit/slice, unassign the existing drive letter first.
 
 Be aware that this command will allow you to reassign or remove the
 assignment of your system drive letter. This can cause your operating
@@ -235,8 +236,8 @@ confusing that ZPM3 is in the file called CPM3.SYS, but it is normal
 for ZPM3.
 
 For the purposes of booting an operating system, each disk slice is
-considered it's own operating system. Each slice can be made bootable
-with it's own system tracks.
+considered its own operating system. Each slice can be made bootable
+with its own system tracks.
 
 `SYSCOPY` uses drive letters to specify where to read/write the system
 boot images. However, at startup, the boot loaded will require you to
@@ -246,7 +247,7 @@ to a drive letter so you will know what to enter at the boot loader
 prompt. By way of explanation, the boot loader does not know about
 drive letters because the operating system is not loaded yet.
 
-If you want to put a a boot system image on a device and slice that is
+If you want to put a boot system image on a device and slice that is
 not currently assigned to a drive letter, you will need to assign a
 drive letter first.
 
@@ -466,7 +467,7 @@ control is fully functional (end to end).
 The `XM` application provided in RomWBW is an adaptation of a
 pre-existing XModem application. Based on the source code comments, it
 was originally adapted from Ward Christensen's MODEM2 by Keith
-Petersen and is labeled version 12.5.
+Petersen and is labelled version 12.5.
 
 The original source of the application was found in the Walnut Creek
 CD-ROM and is called XMDM125.ARK dated 7/15/86.
@@ -529,14 +530,14 @@ manually perform a verification function with the `FLASH VERIFY` form
 of the command.
 
 The author's documentation for the application is found in the RomWBW
-distribution in the Doc\\Contrib directory.
+distribution in the Doc/Contrib directory.
 
 ## Notes
 
 The application supports a significant number of EEPROM parts. It
 should automatically detect your part. If it does not recognize your
 chip, make sure that you do not have a write protect jumper set --
-this jumper will cause the ROM chip type to be unrecognized.
+this jumper can prevent the ROM chip from being recognized.
 
 Reprogramming a ROM chip in-place is inherently dangerous. If anything
 goes wrong, you will be left with a non-functional system and no
@@ -557,12 +558,17 @@ GitHub repository](https://github.com/willsowerbutts/flash4).
 
 # FDISK80
 
-RomWBW supports disk media with MS-DOS FAT filesystems (see FAT
-application). If you wish to put a FAT filesystem on your media, the
-FDISK80 application can be used to partition your media which is
-required in order to add a FAT filesystem.
+`FDISK80` allows you to create and manage traditional partitions on
+your hard disk media.  Depending on the hard disk format and features
+you are using, RomWBW may need hard disk partitions defined.
 
-This application is provided by John Coffman.
+Please refer to the $doc_user$ for more information on the use of
+partitions within RomWBW.  It is very important to understand that
+RomWBW slices are completely different from disk partitions.
+
+This application is provided by John Coffman.  The primary
+documentation is in the file "FDisk Manual.pdf" found in the
+Doc directory of the RomWBW distribution.
 
 ## Usage
 
@@ -577,20 +583,15 @@ applications. Please refer to the file called "FDisk Manual.pdf" in
 the Doc directory of the RomWBW distribution for further instructions.
 
 There is also more information on using FAT partitions with RomWBW in
-the "RomWBW Getting Started.pdf" document in the Doc directory of the
-distribution.
+the $doc_user$ document in the Doc directory of the distribution.
 
 ## Notes
 
-Partitioning of RomWBW media is **only** required if you want to add a
-FAT filesystem to your media. Do not partition your media if you are
-simply using it for RomWBW. To be clear, RomWBW slices do not require
-partitioning.
-
-As described in "RomWBW Getting Started.pdf", you should be careful
-when adding a FAT partition to your media that the partition does not
-overlap with the area of the media being used for RomWBW slices. The
-"(R)eserve" function in `FDISK80` can help prevent this.
+Hard disk partition tables allow a maximum of 1024 cylinders when
+defining partitions.  However, RomWBW uses exclusively Logical Block
+Addressing (LBA) which does not have this limitation.  When defining
+partitions is usually best to define the start and size of of the
+partition using bytes or sectors.
 
 ## Etymology
 
@@ -661,7 +662,7 @@ After startup, the application provides the following options:
 | `R)aw`      | will read the minute/second of the RTC clock iteratively every time the space key is pressed.  Press enter to end. |
 | `L)oop`     | will read the full date/time of the RTC clock iteratively every time the space key is pressed.  Press enter to end. |
 | `C)harge`   | will enable the battery charging function of the RTC.  |
-| `N)ocharge` | will disable the battery charging functino of the RTC. |
+| `N)ocharge` | will disable the battery charging function of the RTC. |
 | `D)elay`    | allows you to test the built-in timing delay in the program.  It is not unusual for it to be wrong. |
 | `I)nit`     | allows you to enter a date/time value for subsequent programming of the RTC using the S)et option. |
 | `G)et`      | allows you to read the value of a non-volatile register in the RTC. |
@@ -683,7 +684,7 @@ bypassing HBIOS.
 
 ## Etymology
 
-The `RTC` application was originally written by Andrew Lync as part of
+The `RTC` application was originally written by Andrew Lynch as part of
 the original ECB SBC board development.  It has since been modified to
 support most of the hardware variations included with RomWBW.
 
@@ -889,6 +890,28 @@ written in C and requires SDCC to compile. As such it is not part of
 the RomWBW build process. However, the full project and source code is
 found in the [FAT GitHub Repository](https://github.com/wwarthen/FAT).
 
+## Known Issues
+
+CP/M (and workalike) OSes have significant restrictions on filename
+characters.  The FAT application will block any attempt to create a
+file on the CP/M filesystem containing any of these prohibited
+characters:
+
+|         `< > . , ; : = ? * [ ] _ % | ( ) / \`
+
+The operation will be aborted with "`Error: Invalid Path Name`" if such
+a filename character is encountered.
+
+Since MS-DOS does allow some of these characters, you can have
+issues when copying files from MS-DOS to CP/M if the MS-DOS filenames
+use these characters.  Unfortunately, FAT is not yet smart enough to
+substitute illegal characters with legal ones.  So, you will need to
+clean the filenames before trying to copy them to CP/M.
+
+The FAT application does try to detect the scenario where you are
+copying a file to itself.  However, this detection is not perfect and
+can corrupt a file if it occurs.  Be careful to avoid this.
+
 `\clearpage`{=latex}
 
 # TUNE
@@ -922,7 +945,7 @@ for the hardware found. If no hardware is detected, it will abort with
 an error message.
 
 On Z180 systems, I/O wait states are added when writing to the sound
-chip to avoid exceeding it's speed limitations. On Z80 systems, you
+chip to avoid exceeding its speed limitations. On Z80 systems, you
 will need to ensure that the CPU clock speed of your system does not
 exceed the timing limitations of your sound chip.
 
@@ -939,7 +962,7 @@ By default the application will attempt to interface directly to the sound
 chip.  The optional argument `--hbios` supplied after the filename, will
 enable the application to use the HBIOS sound driver.
 
-The HBIOS mode also support other switch as desribed below.
+The HBIOS mode also support other switch as described below.
 
 | Switch      | Description                                            |
 | ----------- | ------------------------------------------------------ |
@@ -1012,9 +1035,9 @@ speed will actually work on the current hardware.  Setting a CPU
 speed that exceeds the capabilities of the system will result in
 unstable operation or a system stall.
 
-Some peripherals are dependant on the CPU speed.  For example, the Z180
+Some peripherals are dependent on the CPU speed.  For example, the Z180
 ASCI baud rate and system timer are derived from the CPU speed.  The
-CPUSPD applicastion will attempt to adjust these peripherals for
+CPUSPD application will attempt to adjust these peripherals for
 correct operation after modifying the CPU speed.  However, in some
 cases this may not be possible.  The baud rate of ASCI ports have a
 limited set of divisors.  If there is no satisfactory divisor to
@@ -1028,3 +1051,163 @@ hardware interface code is specific to RomWBW and the application will
 not operate correctly on non-RomWBW systems.
 
 The source code is provided in the RomWBW distribution.
+
+
+`\clearpage`{=latex}
+
+# VGMPLAY
+
+This application will allow you to play Video Game Music files. VGM 
+files contain music samples from a range of different sound chips 
+that were used in arcade games, game consoles and personal computer 
+systems.
+
+Video Game Music files have a .VGM file extension and each file 
+contains an embedded header that identifies the hardware it is 
+intended for and also the title of the music.
+
+All RomWBW operating system boot disks include a selection of sound
+files in user area 3. Additional music files can be found at:
+
+[VGMRIPS website](https://vgmrips.net)
+
+[PROJECT2612 website](https://project2612.org/)
+
+Sound files are loaded into memory for playback, so the maximum size
+file that can be played is around 52Kb.
+
+Sound chips currently supported are:
+
+* AY-3-8190 (and equivalent YM2149)
+* YM2612 (and equivalent YM3848)
+* SN76489 (single chip mono and dual chip stereo)
+* YM2151 
+
+VGMPLAY supports playback of files with multiple combinations of these
+chips.
+
+## Syntax
+
+`VGMPLAY `*`<filename>`*
+
+*`<filename>`* is the name of a sound file ending in .VGM
+
+## Usage
+
+VGMPLAY does not automatically detect the hardware platform or sound
+hardware that you are using. This means a version customized for your
+system must be assembled before use.
+
+To play a sound file, just use the VGMPLAY command and specify the file
+to play after the command. So, for example, `VGMPLAY TEDDY` will load
+the TEDDY.VGM sound file into memory and begin playing it.
+
+Playback can be stopped by pressing a key. There may be a delay before
+playback stops.
+
+## Notes
+
+The default build configuration for VGMPLAY is:
+
+CPU speed: Autodetected
+
+| chip      | number  | port     | notes
+| --------- | ------- | -------- | ----------
+| AY-3-8910 |  1st    | 09ah     | stereo
+| AY-3-8910 |  2nd    | not set  | stereo
+| YM2612    |  1st    | 0c0h     | stereo
+| YM2612    |  2nd    | 0c4h     | stereo
+| SN76489   |  1st    | 0c8h     | mono/left
+| SN76489   |  2nd    | 0c9h     | mono/right
+| YM2151    |  1st    | 0cah     | stereo
+| YM2151    |  2nd    | 0cbh     | stereo
+
+Inconsistant, garbled or distorted playback can be an indication that
+your CPU clock speed is too high for your sound chip. In this case, if 
+your platform supports speed switching, then the CPUSPD application 
+can be used to reduce your processor speed.
+
+VGMPLAY is still under development. The source code is provided in the 
+RomWBW distribution.
+
+`\clearpage`{=latex}
+
+# WDATE
+
+`wdate` is a utility for CP/M systems that have Wayne Warthen's
+ROMWBW firmware. It reads or sets the real-time clock, using function
+calls in the BIOS. It should work on any RTC device that is supported by
+ROMWBW, including the internal interrupt-driven timer that is is available
+on some systems. 
+
+`wdate` differs from the `rtc.com` utility that is provided with the
+ROMWBW version of CP/M in that it only gets and sets the date/time. 
+`rtc.com` can also manipulate the nonvolatile RAM in certain clock
+devices, and modify the charge controller. However, `wdate` is (I would
+argue) easier to use, as it takes its input from the command line, which
+can be edited, and it's less fussy about the format. It doesn't require
+the date to be set if you only want to change the time, for example.
+ In addition, `wdate` has at least some error checking.
+
+`wdate` displays the day-of-week and month as English text, not 
+numbers. It calculates the day-of-week from the year, month, and day.
+RTC chips usually store a day-of-week value, but it's useless in this
+application for two reasons: first, the BIOS does not expose it. Second,
+there is no universally-accepted way to interpret it (which day does
+the week start on? Is '0' a valid day of the week?)
+
+## Syntax
+
+| `WDATE`
+| `WDATE ` *`<hr> <min>`*
+| `WDATE ` *`<hr> <min> <sec>`*
+| `WDATE ` *`<year> <month> <day> <hr> <min> <sec>`*
+
+## Usage
+
+    A> wdate
+    Saturday 27 May 13:14:39 2023
+
+With no arguments, displays the current date and time. 
+
+    A> wdate hr min
+
+With two arguments, sets the time in hours and minutes, without changing date
+or seconds
+
+    A> wdate hr min sec
+
+With three arguments, sets the time in hours, minutes, and seconds, without
+changing date
+
+    A> wdate year month day hr min sec
+
+With six arguments, sets date and time. All numbers are one or two digits.  The
+two-digit year starts at 2000. 
+
+    A> wdate /?
+
+Show a summary of the command-line usage.
+
+## Notes
+
+I've tested this utility with the DS1302 clock board designed by Ed 
+Brindly, and on the interrupt-driven timer built into my Z180 board. 
+However, it does not interact with hardware, only BIOS; I would expect 
+it to work with other hardware.
+
+wdate checks for the non-existence of ROMWBW, and also for failing 
+operations on the RTC. It will display the terse "No RTC" message in 
+both cases.
+
+The ROMWBW functions that manipulate the date and time operate on BCD 
+numbers, as RTC chips themselves usually do. wdate works in decimal, so 
+that it can check that the user input makes sense. A substantial part of
+the program's code is taken up by number format conversion and range 
+checking.
+
+## Etymology
+
+The `WDATE` application was written and contributed by Kevin Boone.
+The source code is available on GitHub at
+[https://github.com/kevinboone/wdate-cpm/blob/main/README.md](https://github.com/kevinboone/wdate-cpm/blob/main/README.md).

Source/Doc/Basic.h

@@ -1,4 +1,4 @@
-$define{doc_ver}{Version 3.2}$
+$define{doc_ver}{Version 3.3}$
 $define{doc_product}{RomWBW}$
 $define{doc_root}{https://github.com/wwarthen/RomWBW/raw/dev/Doc}$
 $ifndef{doc_title}$ $define{doc_title}{Document Title}$ $endif$

Source/Doc/Book.h

@@ -11,12 +11,13 @@ toc-depth: 2
 numbersections: true
 secnumdepth: 2
 header-includes:
-- \setlength{\headheight}{15pt}
 - |
   ```{=latex}
+  \setlength{\headheight}{15pt}
   \usepackage{fancyhdr}
   \usepackage{xcolor}
   \usepackage{xhfill}
+  \usepackage{tocloft}
   \renewcommand*{\familydefault}{\sfdefault}
   \renewcommand{\maketitle}{
     \begin{titlepage}
@@ -44,6 +45,7 @@ include-before:
   ```{=latex}
   \pagestyle{fancyplain}
   \fancyhf{}
+  \lhead{\fancyplain{}{\nouppercase{\bfseries \leftmark \hfill $doc_product$  $doc_title$}}}
   \lfoot{\small RetroBrew Computing Group ~~ {\xrfill[3pt]{1pt}[cyan]} ~~ \thepage}
   \pagenumbering{roman}
   ```
@@ -52,5 +54,4 @@ include-before:
 ```{=latex}
 \clearpage
 \pagenumbering{arabic}
-\lhead{\fancyplain{}{\nouppercase{\bfseries \leftmark \hfill $doc_product$  $doc_title$}}}
 ```

Source/Doc/ROM_Applications.md

@@ -246,7 +246,7 @@ memory starting at location xxxx.
 protocol.
 
 If the monitor is assembled with the DSKY functionality,
-this feature will be exclude due to space limitions.
+this feature will be exclude due to space limitations.
 
 
 ## NOTES:
@@ -624,7 +624,7 @@ Feedback to the ROMWBW developers on these guidelines would be appreciated.
 
 ## Notes:
 All testing was done with Teraterm x-modem, Forcing checksum mode using macros was found to give  the most reliable transfer.
-Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before before being written.
+Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before being written.
 An SBC V2-005 MegaFlash or Z80 MBC required for 1mb flash support. The Updater assumes both chips are same type
 Failure handling has not been tested.
 Timing broadly calibrated on a Z80 SBC-v2

Source/Doc/ReadMe.md

@@ -117,7 +117,7 @@ please let me know if I missed you!
 
 * Andrew Lynch started it all when he created the N8VEM Z80 SBC
   which became the first platform RomWBW supported.  Some of his
-  code can still be found in RomWBW.
+  original code can still be found in RomWBW.
 
 * Dan Werner wrote much of the code from which RomWBW was originally
   derived and he has always been a great source of knowledge and
@@ -129,23 +129,30 @@ please let me know if I missed you!
   due  to internal changes within RomWBW. As of RomWBW 2.6, these
   applications are no longer provided.
 
+* Sergey Kiselev created several hardware platforms for RomWBW
+  including the very popular Zeta.
+
 * David Giles created support for the Z180 CSIO which is now included
   SD Card driver.
 
+* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver, DMA support, and a long list of general code
+  and documentation enhancements.
+
 * Ed Brindley contributed some of the code that supports the RCBus
   platform.
 
-* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-  AY-3-8910 sound driver as well as a long list of general code
-  enhancements.
-
 * Spencer Owen created the RC2014 series of hobbyist kit computers
-  which has exponentially increased RomWBW usage.
+  which has exponentially increased RomWBW usage.  Some of his kits
+  include RomWBW.
 
 * Stephen Cousins has likewise created a series of hobbyist kit
   computers at Small Computer Central and is distributing RomWBW
   with many of them.
 
+* Alan Cox has contributed some driver code and has provided a great
+  deal of advice.
+
 * The CP/NET client files were developed by Douglas Miller.
 
 * Phillip Stevens contributed support for FreeRTOS.
@@ -165,6 +172,11 @@ please let me know if I missed you!
 
 * The RomWBW Disk Catalog document was produced by Mykl Orders.
 
+* Rob Prouse has created many of the supplemental disk images
+  including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
+  BASIC Compiler, Microsoft Fortran Compiler, and a Games
+  compendium.
+
 Contributions of all kinds to RomWBW are very welcome.
 
 # Licensing
@@ -186,15 +198,15 @@ Portions of RomWBW were created by, contributed by, or derived from
 the work of others.  It is believed that these works are being used
 in accordance with the intentions and/or licensing of their creators.
 
-If anyone feels their work is being used outside of it's intended
+If anyone feels their work is being used outside of its intended
 licensing, please notify:
 
-> Wayne Warthen
-> wwarthen@gmail.com
+> $doc_author$ \
+> [$doc_authmail$](mailto:$doc_authmail$)
 
 RomWBW is an aggregate work.  It is composed of many individual,
 standalone programs that are distributed as a whole to function as
-a cohesive system.  Each program may have it's own licensing which
+a cohesive system.  Each program may have its own licensing which
 may be different from other programs within the aggregate.
 
 In some cases, a single program (e.g., CP/M Operating System) is

Source/Doc/SystemGuide.md

@@ -182,7 +182,7 @@ not know anything about what is being loaded (the image is usually an
 operating system, but could be any executable code image). Once the Boot
 Loader has loaded the image at the selected location, it will transfer
 control to it. Assuming the typical situation where the image was an
-operating system, the loaded operating system will then perform it's own
+operating system, the loaded operating system will then perform its own
 initialization and begin normal operation.
 
 ## Application Boot
@@ -207,8 +207,8 @@ the previously running operating system starting at $0100. Note that the
 program image contains a full copy of the HBIOS to be installed and run. Once
 the Application Boot program is loaded by the previous operating system,
 control is passed to it and it performs a system initialization similar
-to the ROM Boot, but using the image loaded in RAM.  Once te new
-HBIOS completes it's initialization, it will launch the Boot Loader
+to the ROM Boot, but using the image loaded in RAM.  Once the new
+HBIOS completes its initialization, it will launch the Boot Loader
 just like a ROM boot.
 
 The Application Boot program actually contains two other components
@@ -228,7 +228,7 @@ they have a small hardware bootstrap that loads a chunk of code from a
 disk device directly into RAM at system startup.
 
 The startup then proceeds very much like the Application Boot
-process described above.  HBIOS is installed in it's operating bank
+process described above.  HBIOS is installed in its operating bank
 and control is passed to the Boot Loader.
 
 # Driver Model
@@ -245,7 +245,7 @@ layout expected by the operating system and application.
 Drivers do need to be aware of the bank switching if a buffer address
 is being used in the function call.
 
-* If the buffer address is in the lower 32K of RAM, then the memroy
+* If the buffer address is in the lower 32K of RAM, then the memory
   it points to will be from the User Bank, not the HBIOS bank which
   is now active.  In this case, the driver must use an inter-bank
   copy to access the data.
@@ -363,7 +363,7 @@ HBIOS functions. Most function calls will return a result in register A.
 | -1       | undefined error                        |
 | -2       | function not implemented               |
 | -3       | invalid function                       |
-| -4       | invalid unit numberr                   |
+| -4       | invalid unit number                    |
 | -5       | out of memory                          |
 | -6       | parameter out of range                 |
 | -7       | media not present                      |
@@ -617,7 +617,7 @@ Returns the driver specific Status (A) of the specified disk device unit
 The return value in register A is used as both a device status and a 
 standard HBIOS result code. Negative values (bit 7 set) indicate a 
 standard HBIOS result (error) code.  Otherwise, the return value 
-represents a driver-specific device status.  In call cases, the value 0 
+represents a driver-specific device status.  In all cases, the value 0 
 means OK.
 
 ### Function 0x11 -- Disk Reset (DIORESET)
@@ -757,28 +757,36 @@ of memory because it avoids a double copy.
 Reports device information about the specified Disk Unit (C).  The 
 Status (A) is a standard HBIOS result code.
 
-Bit 7 of the Device Attribute (C) value returned indicates whether the 
-device is a floppy disk.  If it is a floppy disk, the Device Attribute 
-(C) value is encoded as follows:
+The Device Attribute (C) value returned indicates various
+feature indicators related to the device being referenced
+by the specified Disk Unit (C).  The high 3 bits apply to
+all devices.  The definition of the low 5 bits depends on
+whether the device is a Floppy (indicated by bit 5).
+
+The common bits are:
 
 | **Bits** | **Definition**                                   |
 |---------:|--------------------------------------------------|
-| 7        | = 1 (Floppy Disk)                                |
-| 6-5      | Form Factor: 0=8", 1=5.25", 2=3.5", 3=Other      |
-| 4        | Sides: 0=SS, 1=DS                                |
-| 3-2      | Density: 0=SD, 1=DD, 2=HD, 3=ED                  |
-| 1-0      | Reserved                                         |
-
-If the Disk Unit (C) specified is a not floppy disk, then the Device 
-Attribute (C) encoding is as follows:
-
-| **Bits** | **Definition**                                   |
-|---------:|--------------------------------------------------|
-| 7        | = 0 (not Floppy Disk)                            |
+| 7        | Floppy                                           |
 | 6        | Removable                                        |
-| 5-3      | Type: 0=Hard, 1=CF, 2=SD, 3=USB,                 |
-|          | 4=ROM, 5=RAM, 6=RAMF, 7=FLASH                    |
-| 2-0      | Reserved                                         |
+| 5        | High Capacity (>8 MB)                            |
+
+The Floppy specific bits are:
+
+| **Bits** | **Definition**                                   |
+|---------:|--------------------------------------------------|
+| 4-3      | Form Factor: 0=8", 1=5.25", 2=3.5", 3=Other      |
+| 2        | Sides: 0=SS, 1=DS                                |
+| 1-0      | Density: 0=SD, 1=DD, 2=HD, 3=ED                  |
+
+The non-Floppy specific bits are:
+
+| **Bits** | **Definition**                                   |
+|---------:|--------------------------------------------------|
+| 4        | LBA Capable                                      |
+| 3-0      | Media Type: 0=Hard Disk, 1=CF, 2=SD, 3=USB,      |
+|          |   4=ROM, 5=RAM, 6=RAMF, 7=FLASH, 8=CD-ROM,       |
+|          |   9=Cartridge                                    |
 
 Device Type (D) indicates the specific hardware driver that handles the 
 specified Disk Unit (C).  Values are listed at the start of this 
@@ -1001,6 +1009,198 @@ used.
 
 `\clearpage`{=latex}
 
+## Display Keypad (DSKY)
+
+The Display Keypad functions provide read/write access to a segment
+style display and associated hex keypad.
+
+HBIOS only supports a single DSKY device since there is no reason to have
+more than one at a time.  The DSKY unit is assigned a Device Type ID 
+which indicates the specific hardware device driver that handles the 
+unit.  The table below enumerates these values.
+
+| **Device Type** | **ID** | **Description**                          | **Driver** |
+|-----------------|-------:|------------------------------------------|------------|
+| DSKYDEV_ICM     | 0x00   | Original ICM7218 based DSKY              | icm.asm    |
+| DSKYDEV_PKD     | 0x10   | Next Gen Intel P8279 based DSKY          | pkd.asm    |
+
+When segment display function encodes the display data in a byte per
+character format.  Currently, all segment displays are exactly
+8 charadcters and this is assumed in API calls.  The encoding of each
+byte is as shown below:
+
+```
+  +---01---+
+  |        |
+  20      02
+  |        |
+  +---40---+
+  |        |
+  10      04
+  |        |
+  +---08---+  80
+```
+
+The keypad keys are identified by the following key ids.  Not all
+keypads will contain all keys.
+
+| **Key Id** | **Key Definition** | **Key Id** | **Key Definition** |
+|------------|--------------------|------------|--------------------|
+| $00        | Hex Numeric 0      | $10        | Forward            |
+| $01        | Hex Numeric 1      | $11        | Backward           |
+| $02        | Hex Numeric 2      | $12        | Clear              |
+| $03        | Hex Numeric 3      | $13        | Enter              |
+| $04        | Hex Numeric 4      | $14        | Deposit            |
+| $05        | Hex Numeric 5      | $15        | Examine            |
+| $06        | Hex Numeric 6      | $16        | Go                 |
+| $07        | Hex Numeric 7      | $17        | Boot               |
+| $08        | Hex Numeric 8      | $18        | F4                 |
+| $09        | Hex Numeric 9      | $19        | F3                 |
+| $0A        | Hex Numeric A      | $1A        | F2                 |
+| $0B        | Hex Numeric B      | $1B        | F1                 |
+| $0C        | Hex Numeric C      |            |                    |
+| $0D        | Hex Numeric D      |            |                    |
+| $0E        | Hex Numeric E      |            |                    |
+| $0F        | Hex Numeric F      |            |                    |
+
+### Function 0x30 -- DSKY Reset (DSKYRESET)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x30                                | A: Status                              |
+
+This function performs a device dependent reset operation on the DSKY.
+The display will be cleared, keyboard queue will be flushed, and
+chip will be reinitialized.  The returned Status (A) is a standard 
+HBIOS result code.
+
+### Function 0x31 -- DSKY (DSKYSTATUS)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x31                                | A: Status / Characters Pending         |
+
+Return the count of Characters Pending (A) in the input buffer of the 
+DSKY.  If the unit has no input buffer or the 
+buffer utilization is not available, the function may return simply 0 or
+1 where 0 means there is no character available and 1 means there is at
+least one character available.
+
+The value returned in register A is used as both a Status (A) code and 
+the return value. Negative values (bit 7 set) indicate a standard HBIOS 
+result (error) code.  Otherwise, the return value represents the number 
+of characters in the buffer.
+
+### Function 0x32 -- DSKY Get Key (DSKYGETKEY)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x32                                | A: Status                              |
+|                                        | E: Character Value                     |
+
+Read and return a Character (E) from the DSKY.
+If no character(s) are available in the unit's input buffer, this 
+function will wait indefinitely.  The returned Status (A) is a standard 
+HBIOS result code.
+
+The Character Value (E) returned is not ASCII.  It is a keypad key
+id.  The possible id values are listed at the start of this section.
+
+### Function 0x33 -- DSKY Show HEX (RTCSHOWHEX)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x33                                | A: Status                              |
+| DE:HL=Binary Value                     |                                        |
+
+Display the 32-bit binary value (DE:HL) in hex on the DSKY segment
+display.  All decimal points of the display will be off.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x34 -- DSKY Show Segments (DSKYSHOWSEG)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x34                                | A: Status                              |
+| HL: Buffer Address                     |                                        |
+
+Display the segment-encoded values on the segment display.  The encoding
+is defined at the start of this section.  The entire displa is updated
+and it is assumed that an 8 character buffer will be pointed to by HL.
+The buffer must reside in high memory.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x35 -- DSKY Keypad LEDs (DSKYKEYLEDS)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x35                                | A: Status                              |
+| HL: Buffer Address                     |                                        |
+
+Light the LEDs for the keypad keys according to the
+bitmap contained in the buffer pointed to by HL.  The buffer
+must be located in high memory and is assumed to be 8 bytes.
+
+At this time, the bitmap is specific to the PKD hardware.
+This function is ignored by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x36 -- DSKY Status LED (DSKYSTATLED)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x36                                | A: Status                              |
+| D: LED Number                          |                                        |
+| E: LED State                           |                                        |
+
+Set or clear the status LED specified in D.  The state of
+the LED is contained in E.  If E=0, the LED will be turned
+off.  If E=1, the LED will be turned on.
+
+This function is specific to the PKD hardware.  It will be ignored
+by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x37 -- DSKY Beep (DSKYBEEP)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x37                                | A: Status                              |
+
+Beep the onboard speaker of the DSKY.
+This function is specific to the PKD hardware.  It will be ignored
+by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x38 -- DSKY Device (DSKYDEVICE)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x38                                | A: Status                              |
+|                                        | C: Device Attributes                   |
+|                                        | D: Device Type                         |
+|                                        | E: Device Number                       |
+|                                        | H: Device Unit Mode                    |
+|                                        | L: Device I/O Base Address             |
+
+Returns device information for the DSKY unit.  The Status (A) is a 
+standard HBIOS result code.
+
+Device Attribute (C) values are not yet defined.  Device Type (D) 
+indicates the specific hardware driver that handles the specified 
+character unit.  Values are listed at the start of this section. Device 
+Number (E) indicates the physical device number assigned per driver 
+which is always 0 for DSKY.
+
+Device Mode (H) is used to indicate the variant of the chip or circuit 
+that is used by the specified unit.  The Device I/O Base Address (L) 
+indicates the starting port address of the hardware interface that is 
+servicing the specified unit.  Both of these values are considered 
+driver specific.  Refer to the associated hardware driver for the values
+used.
+
+`\clearpage`{=latex}
+
 ## Video Display Adapter (VDA)
 
 The VDA functions are provided as a common interface to Video Display
@@ -1619,7 +1819,7 @@ Status (A) is a standard HBIOS result code.
 | E: 0x04                                | HL: Ports                              |
 |                                        | DE: Ports                              |
 
-This subfunction reports detailed device informatoin for the specified 
+This subfunction reports detailed device information for the specified 
 Sound Unit (C).
 
 Driver Identity (B) reports the audio device type.  Ports (HL & DE) 
@@ -1652,7 +1852,7 @@ the duration, the actual duration is applied in the SNDPLAY function.
 If the Duration (HL) is set to zero, then the SNDPLAY function will 
 operate in a non-blocking mode. i.e. a tone will start playing and the 
 play function will return. The tone will continue to play until the next
- tone is played.  If the Duration (HL) is greater than zero, the the 
+ tone is played.  If the Duration (HL) is greater than zero, the 
 sound will play for the duration defined in HL and then return.
 
 **\*\*\* Function Not Implemented \*\*\**
@@ -1752,6 +1952,9 @@ The hardware Platform (L) is identified as follows:
 | PLT_RCZ280    |12      | RCBUS W/ Z280                           |
 | PLT_MBC       |13      | NHYODYNE MULTI-BOARD COMPUTER           |
 | PLT_RPH       |14      | RHYOPHYRE GRAPHICS SBC                  |
+| PLT_Z80RETRO  |15      | Z80 RETRO COMPUTER                      |
+| PLT_S100      |16      | S100 COMPUTERS Z180                     |
+| PLT_DUO       |17      | DUODYNE Z80 SYSTEM                      |
 
 ### Function 0xF2 -- System Set Bank (SYSSETBNK)
 
@@ -2024,7 +2227,7 @@ lookup.
 
 Return the value of the global system timer Tick Count (DEHL).  This is 
 a double-word binary value.  The frequency of the system timer in Hertz 
-is returned in Frequncy (C). The returned Status (A) is a standard HBIOS
+is returned in Frequency (C). The returned Status (A) is a standard HBIOS
 result code.
 
 Note that not all hardware configuration have a system timer.  You
@@ -2116,13 +2319,24 @@ result code.
 
 This function will return the running CPU speed attributes of a system. 
 The Clock Mult (L) returned indicates the frequency multiple being 
-applied to the raw oscillator clock.  If is defined as: 0=Half, 2=Full, 
-and 3=Double.  The wait states for the system are also provided as 
+applied to the raw oscillator clock.  If is defined as: 0=Half, 1=Full, 
+and 2=Double.  The wait states for the system are also provided as 
 Memory Wait States (D) and I/O Wait States (E).  The value of Memory
 Wait States (D) is the actual number of wait states, not the number
 of wait states added.  The returned Status (A) is a standard HBIOS 
 result code.
 
+#### SYSGET Subfunction 0xF4 -- Get Front Panel Swithes (PANEL)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0xF8                                | A: Status                              |
+| C: 0xF4                                | L: Switches                            |
+
+This function will return the current value of the switches (L) from the
+front panel of the system.  If no front panel is available in the
+system, the returned Status (A) will indicate a No Hardware error.
+
 ### Function 0xF9 -- System Set (SYSSET)
 
 | **Entry Parameters**                   | **Returned Values**                    |
@@ -2197,7 +2411,7 @@ Wait States (E) will be set if possible.  The value of Memory Wait
 States (D) is the actual number of wait states, not the number of wait 
 states added.
 
-Some peripherals are dependant on the CPU speed.  For example, the Z180
+Some peripherals are dependent on the CPU speed.  For example, the Z180
 ASCI baud rate and system timer are derived from the CPU speed.  The
 Set CPU Speed function will attempt to adjust these peripherals for
 correct operation after modifying the CPU speed.  However, in some
@@ -2206,6 +2420,18 @@ limited set of divisors.  If there is no satisfactory divisor to
 retain the existing baud rate under the new CPU speed, then the baud
 rate of the ASCI port(s) will be affected.
 
+#### SYSSET Subfunction 0xF4 -- Set Front Panel LEDs (PANEL)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0xF9                                | A: Status                              |
+| C: 0xF4                                |                                        |
+| L: LEDs                                |                                        |
+
+This function will set the front panel LEDs based on the bits in L. If 
+no front panel is available in the system, the returned Status (A) will 
+indicate a No Hardware error.
+
 ### Function 0xFA -- System Peek (SYSPEEK)
 
 | **Entry Parameters**                   | **Returned Values**                    |
@@ -2389,7 +2615,7 @@ are not reported to the console.
 
 If the diagnosis level is set to display the diagnosis information, then
 memory address, register dump and error code is displayed.
-A key differance with the PANIC error is that execution may be continued. 
+A key difference with the PANIC error is that execution may be continued. 
 
 Example error message:
 

Source/Doc/UserGuide.md

@@ -133,7 +133,7 @@ contributions are very welcome.
 #### Distribution Directory Layout
 
 The RomWBW distribution is a compressed zip archive file organized in
-a set of directories. Each of these directories has it's own
+a set of directories. Each of these directories has its own
 ReadMe.txt file describing the contents in detail. In summary, these
 directories are:
 
@@ -201,6 +201,9 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | [Z80 ZRC CPU Module]^7^                                        | RCBus   | RCZ80_zrc.rom      | 115200        |
 | [Z280 ZZRCC CPU Module]^7^                                     | RCBus   | RCZ280_zzrc.rom    | 115200        |
 | [Z280 ZZ80MB SBC]^7^                                           | RCBus   | RCZ280_zz80mb.rom  | 115200        |
+| [Z80-Retro SBC]^8^                                             | -       | Z80RETRO_std.rom   | 38400         |
+| [S100 Computers Z180]^9^                                       | S100    | S100_std.rom       | 38400         |
+| [Duodyne Z80 System]^1^                                        | Duo     | DUO_std.rom        | 38400         |
 
 | ^1^Designed by Andrew Lynch
 | ^2^Designed by Sergey Kiselev
@@ -209,6 +212,8 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | ^5^Designed by Stephen Cousins
 | ^6^Designed by Steve Garcia
 | ^7^Designed by Bill Shen
+| ^8^Designed by Peter Wilson
+| ^9^Designed by John Monahan
 
 RCBus refers to Spencer Owen's RC2014 bus specification and derivatives
 including RC26, RC40, RC80, and BP80.
@@ -405,8 +410,9 @@ to your system that is not automatically identified, you may need
 to build a custom ROM to add support for it.  Building a custom ROM
 is covered later.
 
-[Appendix A - Device Summary] contains a list of the RomWBW hardware devices which may
-help you identify the hardware discovered in your system.
+[Appendix B - Device Summary] contains a list of the RomWBW hardware
+devices which may help you identify the hardware discovered in your
+system.
 
 ## Device Unit Assignments
 
@@ -529,7 +535,7 @@ ROM Applications:
 
 To start a ROM application you just enter the corresponding letter at
 the Boot Loader prompt.  In the following example, we launch the
-built-in Micrsosoft BASIC interpreter.  From within BASIC, we use the
+built-in Microsoft BASIC interpreter.  From within BASIC, we use the
 `BYE` command to return to the Boot Loader:
 
 ```
@@ -620,7 +626,7 @@ Boot [H=Help]: 4
 
 Booting Disk Unit 4, Slice 0, Sector 0x00000800...
 
-Volume "Unlabeled" [0xD000-0xFE00, entry @ 0xE600]...
+Volume "Unlabelled" [0xD000-0xFE00, entry @ 0xE600]...
 
 CBIOS v3.1.1-pre.194 [WBW]
 
@@ -660,7 +666,7 @@ Boot [H=Help]: 4.3
 
 Booting Disk Unit 4, Slice 3, Sector 0x0000C800...
 
-Volume "Unlabeled" [0x0100-0x1000, entry @ 0x0100]...
+Volume "Unlabelled" [0x0100-0x1000, entry @ 0x0100]...
 
 CP/M V3.0 Loader
 Copyright (C) 1998, Caldera Inc.
@@ -720,7 +726,7 @@ The 'R' command within the Boot Loader performs a software reset of
 the system.  It is the software equivalent of pressing the reset
 button.
 
-There is generallhy no need to do this, but it can be convenient when
+There is generally no need to do this, but it can be convenient when
 you want to see the boot messages again or ensure your system is in
 a clean state.
 
@@ -735,7 +741,7 @@ Restarting System...
 Your system can support a number of devices for the console. They may
 be VDU type devices or serial devices. If you want to change which
 device is the console, the ***I*** menu option can be used to choose
-the unit and it's speed.
+the unit and its speed.
 
 The command format is ```I <unit> [<baudrate>]```
 
@@ -781,6 +787,55 @@ The use of diagnostic levels above 4 are really intended only for
 software developers.  I do not recommend changing this under
 normal circumstances.
 
+## Front Panel
+
+RomWBW supports the concept of a simple front panel.  The following 
+image is a conceptual view of such a front panel.  If your system has a 
+front panel, it should look similar to the [RomWBW Front Panel](#panel).
+
+![RomWBW Front Panel](Graphics/Panel){#panel width=50% }
+
+The LEDs in the top row of the panel are used for multiple purposes.
+They are initially used to display the progress of the
+system boot.  This may help in diagnosing a hardware or configuration
+issue in a system that does not progress far enough to display text
+output on the console.  The meaning of the LEDs is:
+
+|            |                              |
+|------------|------------------------------|
+| `O-------` | System Boot has started      |
+| `OO------` | Common RAM bank activated    |
+| `OOO-----` | HBIOS transitioned to RAM    |
+| `OOOO----` | Basic initialization done    |
+| `OOOOO---` | CPU detection complete       |
+| `OOOOOO--` | System timer configured      |
+| `OOOOOOO-` | Pre-console device init done |
+| `OOOOOOOO` | Console activation           |
+
+Once the system has booted, the LEDs are used to indicate disk device
+activity.  Each LED numbered 7-0 represents disk units 7-0.  As each
+disk device performs I/O, the LED will light.
+
+The second row of the front panel is composed of switches that allow
+you to control a few aspects of the system startup.
+
+The first two switches affect the device used as the console initially.
+Setting the CRT/Serial switch will cause the system to boot directly 
+to an attached CRT device (if available).  Setting the Pri/Sec switch 
+will cause the system to boot to the secondary Serial or CRT device 
+(depending on the setting of the first switch).
+
+The final six switches allow you to cause the system to automatically
+boot into a desired function.  The Auto/Menu switch must be set to
+enable this, otherwise the normal ROM Loader prompt will be used.
+If the Disk/ROM switch is not set, then you can use the last 3
+switches to select a ROM app to auto-start.  If the Disk/ROM switch is
+set, then the system will attempt a disk boot based on the following
+switches.  The Floppy/Hard switch can be used to boot to a Floppy or
+Hard Disk.  In either case, the first Floppy or Hard Disk will be used
+for the boot.  If a Hard Disk boot is selected, then the last three
+switches can be used to select any of the first 8 slices.
+
 # Disk Management
 
 The systems supported by RomWBW all have the ability to use persistent
@@ -823,11 +878,11 @@ The messages you see will vary depending on your hardware and the
 media you have installed. But, they will all have the same general
 format as the example above.
 
-Once your your system has working disk devices, they will be accessible
+Once your system has working disk devices, they will be accessible
 from any operating system you choose to run.  Disk storage is available
 whether you boot your OS from ROM or from the disk media itself.
 
-Refering back to the Boot Loader section on "Launching from ROM", you
+Referring back to the Boot Loader section on "Launching from ROM", you
 could start CP/M 2.2 using the 'C' command.  As the operating system
 starts up, you should see a list of drive letters assigned to the disk
 media you have installed. Here is an example of this:
@@ -1071,7 +1126,7 @@ PROGRESS: TRACK=4F HEAD=01 SECTOR=01
 ```
 
 Since the physical format of floppy media is the same as that used
-in a standard MS-DOS/Windows computer, you can also physicall format
+in a standard MS-DOS/Windows computer, you can also physical format
 floppy media in a modern computer.  However, the directory format
 itself will not be compatible with CP/M OSes.  In this case, you
 can use the `CLRDIR` application supplied with RomWBW to reformat
@@ -1091,7 +1146,7 @@ after inserting a new floppy disk.
 
 Under RomWBW, a hard disk is similar to a floppy disk in that it is
 considered a disk unit.  However, RomWBW has multiple features that
-allow it's legacy operating systems to take advantage of modern
+allow its legacy operating systems to take advantage of modern
 mass storage media.
 
 To start with, the concept of a hard disk in RomWBW applies to any
@@ -1340,7 +1395,7 @@ B>stat e:dsk:
 ```
 
 It is critical that you include "dsk:" after the drive letter in the
-`STAT` command line.  The important line to look at is labeled "32 Byte
+`STAT` command line.  The important line to look at is labelled "32 Byte
 Directory Entries".  In this case, the value is 1024 which implies that
 this drive is located on a modern (hd1k) disk layout.  If the value
 was 512, it would indicate a legacy (hd512) disk layout.
@@ -1366,7 +1421,7 @@ Essentially, this means you are creating a set of blank directories on
 your disk so that files can be saved there.  This process is described
 below under Disk Initialization. In this scenario, you will need to
 subsequently copy any files you want to use onto the newly initialized
-disk (see Transferring Files).
+disk (see [Transferring Files]).
 
 You will notice that in the following instructions there is no mention
 of specific hardware.  Because the RomWBW firmware provides a 
@@ -1402,6 +1457,7 @@ The following table shows the disk images available.
 | xxx_cpm3.img    | DRI CP/M 3 Operating System            | Yes      |
 | xxx_zpm3.img    | ZPM3 Operating System                  | Yes      |
 | xxx_qpm.img     | QPM Operating System                   | Yes      |
+| xxx_dos65.img   | DOS/65 Operating System                | Yes      |
 | xxx_ws4.img     | WordStar v4 & ZDE Applications         | No       |
 
 You will find 3 sets of these .img files in the distribution.  The
@@ -1411,8 +1467,8 @@ layout hard disk image.
 
 There is also an image file called "psys.img" which contains a bootable 
 p-System hard disk image.  It contains 6 p-System filesystem slices, but
- these are not interoperable with the CP/M slices described above.  This
- file is discussed separately under p-System in the Operating Systems 
+these are not interoperable with the CP/M slices described above.  This
+file is discussed separately under p-System in the [Operating Systems] 
 section.
 
 ### Floppy Disk Images
@@ -1462,7 +1518,7 @@ hard disk image with the specific slice contents you choose.
 #### Combo Hard Disk Image
 
 The combo disk image is essentially just a single image that has several
- of the individual filesystem images already concatenated together. The 
+of the individual filesystem images already concatenated together. The 
 combo disk image contains the following 6 slices in the positions 
 indicated:
 
@@ -1516,6 +1572,9 @@ In all of the examples above, the resulting file (hd.img) would now be
 written to your hard disk media and would be ready to use in a RomWBW 
 system.
 
+If you wish to further customize or create new disk image definitions,
+please refer to the ReadMe.txt file in the Source/Images directory.
+
 #### Writing Hard Disk Images
 
 Once you have chosen a combo hard disk image file or prepared your own 
@@ -1539,7 +1598,7 @@ image that you write to your hard disk media.  You can use additional
 slices as long your media has room for them.  However, writing the disk 
 image will not initialize the additional slices.  If these additional 
 slices were previously initialized, they will not be corrupted when you 
-write the new image and will still contain their prvious contents.  If 
+write the new image and will still contain their previous contents.  If 
 the additional slices were not previously initialized, you can use 
 `CLRDIR` to do so and optionally `SYSCOPY` if you want them to be 
 bootable.
@@ -1770,7 +1829,7 @@ less likely to encounter compatibility issues.
 
 #### Boot Disk
 
-To make make a bootable CP/M disk, use the RomWBW `SYSCOPY` tool
+To make a bootable CP/M disk, use the RomWBW `SYSCOPY` tool
 to place a copy of the operating system on the boot track of
 the disk.  The RomWBW ROM disk has a copy of the boot track
 call "CPM.SYS".  For example:
@@ -1786,7 +1845,7 @@ call "CPM.SYS".  For example:
 
 * `SUBMIT.COM` has been patched per DRI to always place submit
   files on A:.  This ensures the submitted file will always be
-  properlly executed.
+  properly executed.
 
 * The original versions of DDT, DDTZ, and ZSID used the RST 38
   vector which conflicts with interrupt mode 1 use of this vector.
@@ -1818,7 +1877,7 @@ via the NZ-COM adaptation (see below).
 
 #### Boot Disk
 
-To make make a bootable Z-System disk, use the RomWBW `SYSCOPY` tool
+To make a bootable Z-System disk, use the RomWBW `SYSCOPY` tool
 to place a copy of the operating system on the boot track of
 the disk.  The RomWBW ROM disk has a copy of the boot track
 call "ZSYS.SYS".  For example:
@@ -1896,7 +1955,7 @@ configured in the most basic way possible.  You should refer to the
 documentation and use `MKZCM` as desired to customize your system.
 
 NZCOM has substantially more functionality than CP/M or basic
-Z-System.  It is important to read the the "NZCOM Users
+Z-System.  It is important to read the "NZCOM Users
 Manual.pdf" document in order to use this operating system effectively.
 
 #### Documentation
@@ -1933,29 +1992,48 @@ has a new suite of support tools and help system.
 
 #### Boot Disk
 
-To make a CP/M 3 boot disk, you actually place CPMLDR.SYS
-on the system tracks of the disk. You do not place CPM3.SYS on the
-system tracks.  `CPMLDR.SYS` chain loads `CPM3.SYS` which must
-exist as a file on the disk.
-  
-CP/M 3 uses a multi-step boot process involving multiple files.
+To create (or update) a CP/M 3 boot drive, you must place `CPMLDR.SYS` on
+the system track of the disk.  You must also place `CPM3.SYS` and 
+`CCP.COM` on the target drive as regular files.  Do **not** place 
+CPM3.SYS on the boot track.  `CPMLDR.SYS` chain loads `CPM3.SYS` which 
+must exist as a regular file on the disk.  Subsequently, `CPM3.SYS` 
+loads `CCP.COM`.
+
 The CP/M 3 boot files are not included on the ROM disk due to
-space constraints.  You will need to transfer the files to your
-system from the RomWBW distribution directory Binary\\CPM3.
+space constraints.  You will need to transfer the following files to
+your system from the RomWBW distribution directory Binary/CPM3.  You
+can use XModem for this (or any of the mechanisms in [Transferring
+Files].
 
-After this is done, you will need to use `SYSCOPY` to place
-the CP/M 3 loader image on the boot tracks of all CP/M 3
-boot disks/slices.  The loader image is called `CPMLDR.SYS`.
-You must then copy (at a minimum) `CPM3.SYS` and `CCP.COM`
-onto the disk/slice.  Assuming you copied the CP/M 3 boot files
-onto your RAM disk at A:, you would use:
+- `CPMLDR.SYS`
+- `CPM3.SYS` or `CPM3BNK.SYS`
+- `CCP.COM`
+
+The `CPM3.SYS` boot file is provided in 2 versions.  In the Binary/CPM3 
+distribution directory, `CPM3.SYS` is the "non-banked" version of
+CP/M 3.  The `CPM3BNK.SYS` file is the "banked" version of CP/M 3.  You 
+almost certainly want to transfer the banked `CPM3BNK.SYS` version.
+
+After transferring the boot files to your RomWBW system, you will
+need to use `SYSCOPY` to place `CPMLDR.SYS` on the boot track of the
+target drive.  `CPM3.SYS` and `CCP.COM` can be copied to the target
+drive using any standard file copy tool such as `PIP` or `COPY`.
+
+You do not need to be booted into CP/M 3 to create or update a CP/M 3 
+disk.  The recommended approach is to boot CP/M 2.2 or Z-System from 
+ROM.  Transfer the boot files to the RAM disk.  Then simply copy the 
+files onto the CP/M 3 disk.  Assuming the target CP/M 3 disk is F:, you 
+can use the following commands to place the files on the target drive:
 
 ```
-SYSCOPY C:=CPMLDR.SYS
-PIP C:=CPM3.SYS
-PIP C:=CCP.COM
+SYSCOPY F:=A:CPMLDR.SYS
+COPY A:CPM3BNK.SYS F:CPM3.SYS
+COPY A:CCP.COM F:
 ```
 
+Note in the example above that `CPM3BNK.SYS` is renamed to `CPM3.SYS`
+in the copy command.
+
 #### Notes
 
 - The `COPYSYS` command described in the DRI CP/M 3 documentation is
@@ -1968,16 +2046,29 @@ PIP C:=CCP.COM
   program   of CP/M 3 is completely different/incompatible from the
   `SUBMIT` program of CP/M 2.2.
 
-* RomWBW fully suppoerts CP/M 3 file date/time stamping, but this 
+- RomWBW fully supports CP/M 3 file date/time stamping, but this 
   requires that the disk be properly initialized for it.  This process 
   has not been performed on the CP/M 3 disk image.  Follow the 
-  CP/M 3 documentation to complete this process.
+  CP/M 3 documentation to complete this process, if desired.
 
-## Simeon Cran's ZPM3
+## ZPM3
 
-ZPM3 is an interesting combination of the features of both CP/M 3 and
-ZCPR 3. Essentially, it has the features of and compatibility with
-both.
+Simeon Cran's ZPM3 is an interesting combination of the features of both
+CP/M 3 and ZCPR3. Essentially, it has the features of and 
+compatibility with both.
+
+Due to this dual compatibility, the ZPM3 distribution image contains 
+most of the standard CP/M 3 files as well as a variety of common ZCPR3 
+applications.  However, you will notice that user area 0 of the disk has
+only a few files.  Most of the files are distributed among other user 
+areas which is standard practice for ZCPR3.  Most importantly, you will 
+see most of the applications in user area 15.  The applications can be 
+executed from any user area because ZPM3 has a default search path that 
+includes User 15.
+
+The ZPM3 distribution comes with essentially no utility programs at
+all.  In addition to the standard CP/M 3 utilities, RomWBW includes
+a variety of common ZCPR3 utilities.
 
 #### Documentation
 
@@ -1986,31 +2077,55 @@ CP/M 3 and ZCPR 3.
 
 #### Boot Disk
 
-ZPM3 uses a multi-step boot process involving multiple files. The ZPM3 
-boot files are not included on the ROM disk due to space constraints.  
-You will need to transfer the files to your system from the RomWBW 
-distribution directory Binary\\ZPM3.
+To create (or update) a ZPM3 boot drive, you must place `ZPMLDR.SYS` on 
+the system track of the disk.  You must also place `CPM3.SYS`, 
+`ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM` on the target drive as 
+regular files.  Do **not** place CPM3.SYS on the boot track.  
+`ZPMLDR.SYS` chain loads `CPM3.SYS` which must exist as a regular file 
+on the disk.  Subsequently, `CPM3.SYS` loads `CCP.COM`.
 
-After this is done, you will need to use `SYSCOPY` to place the ZPM3 
-loader image on the boot tracks of the disk. The loader image is called 
-`ZPMLDR.SYS`. You must then copy (at a minimum) `CPM3.SYS`, `ZCCP.COM`, 
-`ZINSTAL.ZPM`, and `STARTZPM.COM` onto the disk/slice. Assuming you 
-copied the ZPM3 boot files onto your RAM disk at A:, you would use:
+The CP/M 3 boot files are not included on the ROM disk due to space 
+constraints.  You will need to transfer the following files to your 
+system from the RomWBW distribution directory Binary/ZPM3.  You can use 
+XModem for this (or any of the mechanisms in [Transferring Files].
+
+- `ZPMLDR.SYS`
+- `CPM3.SYS`
+- `ZCCP.COM`
+- `ZINSTAL.ZPM`
+- `STARTZPM.COM`
+
+You may be surprised to see the file called `CPM3.SYS`.  This is not a 
+typo. Although it is called `CPM3.SYS`, it is ZPM and not the same as 
+`CPM3.SYS` in the CPM3 directory.  Also, unlike CP/M 3, ZPM3 is always 
+banked, so you will not find two versions of the file.  `CPM3.SYS` is a 
+banked implementation of ZPM3.
+
+After transferring the boot files to your RomWBW system, you will
+need to use `SYSCOPY` to place `ZPMLDR.SYS` on the boot track of the
+target drive.  The remaining boot files can be copied to the target
+drive using any standard file copy tool such as `PIP` or `COPY`.
+
+You do not need to be booted into ZPM3 to create or update a ZPM3 
+disk.  The recommended approach is to boot CP/M 2.2 or Z-System from 
+ROM.  Transfer the boot files to the RAM disk.  Then simply copy the 
+files onto the ZPM disk.  Assuming the target ZPM3 disk is F:, you 
+can use the following commands to place the files on the target drive:
 
 ```
-A>B:SYSCOPY C:=ZPMLDR.SYS
-A>B:COPY CPM3.SYS C:
-A>B:COPY ZCCP.COM C:
-A>B:COPY ZINSTAL.ZPM C:
-A>B:COPY STARTZPM.COM C:
+SYSCOPY F:=A:ZPMLDR.SYS
+COPY A:CPM3.SYS F:CPM3.SYS
+COPY A:CCP.COM F:
+COPY A:ZINSTAL.ZPM F:
+COPY A:STARTZPM.COM F:
 ```
 
 #### Notes
 
-* The ZPM operating system is contained in the file called CPM3.SYS
+- The ZPM3 operating system is contained in the file called CPM3.SYS 
   which is confusing, but this is as intended by the ZPM3 distribution.
-  I believe it was done this way to make it easier for users to transition
-  from CP/M 3 to ZPM3.
+  I believe it was done this way to make it easier for users to
+  transition from CP/M 3 to ZPM3.
 
 ## QP/M
 
@@ -2029,18 +2144,27 @@ regarding the RomWBW adaptation and customizations.
 #### Boot Disk
 
 There is no RomWBW-specific boot disk creation procedure.  QP/M
-comes with a QINSTALL tool for this purpose.  You can use the
-tool if you want to perform a fresh installation.
+comes with a QINSTALL which is used to install QPM over an existing
+CP/M 2 installation or to update an existing QPM disk.  `QINSTALL.COM`
+is included with the RomWBW distribution.
 
 #### Notes
 
-* QPM is not available as source.  This implementation was based
+- QPM is not available as source.  This implementation was based
   on the QPM binary distribution and has been minimally customized
   for RomWBW.
- 
-* QINSTALL is used to customize QPM.  It is included on the
+
+- QINSTALL is used to customize QPM.  It is included on the
   disk image.  You should review the notes in the ReadMe.txt
-  file in Source/Image/d_qpm before making changes.
+  file in Source/Images/d_qpm before making changes.
+
+- In addition to the QPM disk image, all of the QPM distribution
+  files can be found in the RomWBW distribution in the
+  Source/Images/d_qpm/u0 directory.
+
+- The QPM disk image is not included as one of the slices on the
+  RomWBW combo disk image.  If you want to include QPM, you can do
+  so by following the directions in Source/Images/Readme.txt.
 
 ## UCSD p-System
 
@@ -2053,7 +2177,7 @@ some other distributions, this implements a native p-System
 Z80 Extended BIOS, it does not rely on a CP/M BIOS layer.
 
 The p-System is provided on a hard disk image file called
-psys.img.  This must be copied to it's own dedicated hard
+psys.img.  This must be copied to its own dedicated hard
 disk media (CF Card, SD Card, etc.).  It is booted by
 selecting slice 0 of the corresponding hard disk unit at
 the RomWBW Boot Loader prompt.  Do not attempt to use
@@ -2092,18 +2216,23 @@ file which is bootable.
   output will be garbled if no such terminal or emulator
   is used for console output.
 
-* There is no straightforward mechanism to move files in
+* There is no built-in mechanism to move files in
   and out of p-System.  However, the .vol files in Source/pSys
   can be read and modified by CiderPress.  CiderPress is able
   to add and remove individual files.
 
+  Andrew Davidson has created a Python script that can extract p-System 
+  volumes from an existing disk image file.  The script is also capable
+  of inserting a modified volume back into the disk image file.
+  This tool is available at
+  <https://github.com/robosnacks/psysimg>.
+
 ## FreeRTOS
 
 Phillip Stevens has ported FreeRTOS to run under RomWBW. FreeRTOS is
 not provided in the RomWBW distribution. FreeRTOS is available under
-the
-[MIT licence](https://www.freertos.org/a00114.html) and further general
-information is available at
+the [MIT licence](https://www.freertos.org/a00114.html)
+and further general information is available at
 [FreeRTOS](https://www.freertos.org/RTOS.html).
 
 You can also contact Phillip for detailed information on the Z180
@@ -2153,7 +2282,7 @@ therefore, globally available.
 | CPUSPD          | Change the running CPU speed and wait states of the system.                                          |
 
 Some custom applications do not fit on the ROM disk. They are found on the
-disk image files or the individual files can be found in the Binary\\Apps
+disk image files or the individual files can be found in the Binary/Apps
 directory of the distribution.
 
 | **Application** | **Description**                                                    |
@@ -2207,7 +2336,7 @@ default FAT partition.
 You can confirm the existence of the FAT partition with `FDISK80` by 
 using the 'P' command to show the current partition table.  Here is an 
 example of a partition table listing from `FDISK80` that includes the 
-FAT partition (labeled "FAT16"):
+FAT partition (labelled "FAT16"):
 
 ```
 Capacity of disk 4:  (  4G)  7813120      Geom 77381010
@@ -2221,7 +2350,7 @@ Nr  ---Type- A --      Start         End   LBA start  LBA count  Size
 If your hard disk media does not have a FAT partition already defined,
 you will need to define one using FDISK80 by using the 'N' command.
 Ensure that the location and size of the FAT partition does not
-overlap any of the CP/M slice area and that it fits within the szie
+overlap any of the CP/M slice area and that it fits within the size
 of your media.
 
 Once the partition is defined, you will still need to format it.  Just
@@ -2246,7 +2375,7 @@ If your RomWBW system has multiple disk drives/slots, you can also just
 create a disk with your modern computer that is a dedicated FAT 
 filesystem disk.  You can use your modern computer to format the disk 
 (floppy, CF Card, SD Card, etc.), then insert the disk in your RomWBW 
-computer and access if using `FAT` based on it's RomWBW unit number.
+computer and access if using `FAT` based on its RomWBW unit number.
 
 ## FAT Application Usage
 
@@ -2334,7 +2463,7 @@ Copying...
 SAMPLE.TXT ==> 4:/SAMPLE.TXT Overwrite? (Y/N) ... [OK]
 SAMPLE2.TXT ==> 4:/SAMPLE2.TXT ... [OK]
 
-    2 File(s) Copiedd
+    2 File(s) Copied
 ```
 
 # CP/NET Networking
@@ -2719,7 +2848,7 @@ usage documents.
 Note that the build scripts for RomWBW create the default disk images
 supplied with RomWBW. It is relatively easy to customize the contents
 of the disk images that are part of RomWBW. This is described in more
-detail in the Source\\Images directory of the distribution.
+detail in the Source/Images directory of the distribution.
 
 ## FAT Filesystem Transfers
 
@@ -2779,7 +2908,7 @@ boot. To customize this file, you use the ZCPR ALIAS facility. You
 will need to refer to ZCPR documentation for more information on the
 ALIAS facility.
 
-p-System has it's own startup command processing mechanism that is
+p-System has its own startup command processing mechanism that is
 covered in the p-System documentation.
 
 ## ROM Customization
@@ -2815,7 +2944,7 @@ built into the ROM.
 # UNA Hardware BIOS
 
 John Coffman has produced a new generation of hardware BIOS called
-UNA. The standard RomWBW distribution includes it's own hardware
+UNA. The standard RomWBW distribution includes its own hardware
 BIOS. However, RomWBW can alternatively be constructed with UNA as
 the hardware BIOS portion of the ROM. If you wish to use the UNA
 variant of RomWBW, then just program your ROM with the ROM image
@@ -2845,6 +2974,31 @@ Please refer to the
 [UNA BIOS Firmware Page](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:una:start)
 for more information on UNA.
 
+## UNA Usage Notes
+
+- At startup, UNA will display a prompt similar to this:
+
+  `Boot UNA unit number or ROM? [R,X,0..3] (R):`
+
+  You generally want to choose 'R' which will then launch the RomWBW
+  loader.  Attempting to boot from a disk using a number at the UNA
+  prompt will only work for the legacy (hd512) disk format.  However,
+  if you go to the RomWBW loader, you will be able to perform a disk
+  boot on either disk format.
+
+- The disk images created and distributed with RomWBW do not have the
+  correct system track code for UNA.  In order to boot to disk under
+  UNA, you must first use SYSCOPY to update the system track of the
+  target disk.  The UNA ROM disk has the correct system track files
+  for UNA: `CPM.SYS` and `ZSYS.SYS`.  So, you can boot a ROM OS and
+  then use one of these files to update the system track.
+
+- Only Z-System and CP/M 2 are available OSes under UNA at this time.
+  Since NZ-COM launches from CP/M 2, it is usable.  p-System is not
+  usable under UNA.
+
+- Some of the RomWBW-specific applications are not UNA compatible.
+
 # Upgrading
 
 Upgrading to a newer release of RomWBW is essentially just a matter of
@@ -2915,7 +3069,7 @@ occurred.
 
 Similar to using the Flash utility, the system ROM can be updated
 or upgraded through the ROM based updater utility. This works by
-by reprogrammed the flash ROM as the file is being transfered.
+by reprogrammed the flash ROM as the file is being transferred.
 
 This has the advantage that secondary storage is not required to
 hold the new image.
@@ -2937,7 +3091,7 @@ firmware, you are likely to have odd problems.
 
 The simplest way to update your disk media is to just use your modern
 computer to overwrite the entire media with the latest disk image of
-your choice. This process is described below in the Disk Images
+your choice. This process is described below in the [Disk Images]
 section. If you wish to update existing disk media in your system, you
 need to perform the following steps.
 
@@ -2953,7 +3107,7 @@ them over any older versions of the app on your disk:
 * ASSIGN.COM
 * SYSCOPY.COM
 * MODE.COM
-* FDU.COM (was FDTST.COM)
+* FDU.COM
 * FORMAT.COM
 * XM.COM
 * FLASH.COM
@@ -2961,14 +3115,13 @@ them over any older versions of the app on your disk:
 * TALK.COM
 * RTC.COM
 * TIMER.COM
-* INTTEST.COM
 
 For example: `B>COPY ASSIGN.COM C:`
 
 Some RomWBW custom applications are too large to fit on the ROM disk.
 If you are using any of these you will need to transfer them to your
 system and then update all copies. These applications are found in
-the Binary\\Apps directory of the distribution and in all of the disk
+the Binary/Apps directory of the distribution and in all of the disk
 images.
 
 * FAT.COM
@@ -2976,33 +3129,77 @@ images.
 
 ## System Update
 
-If the system running ROMWBW utilizes the SST39SF040 Flash chip then it
-is possible to do a System Update in place of a System Upgrade in some
-cases.
+As previously described, a RomWBW ROM contains ROM applications as well 
+as a ROM disk image.  If you are upgrading your ROM with a new patch 
+level release, you may wish to upgrade just the application portion of 
+the ROM.  This is referred to as a System Update.
 
-A System Update would involve only updating the BIOS, ROM applications
-and CP/M system.
+If the system running ROMWBW utilizes the SST39SF040 Flash chip then it 
+is possible to do a System Update in place of a System Upgrade in some 
+cases.  A System Update would involve only updating the BIOS, ROM 
+applications and ROM-hosted operating systems.
 
 A System Update may be more favorable than a System Upgrade in cases
 such as:
 
- - Overwriting of the ROM drive is not desired.
- - Space is unavailable to hold a full ROMWBW ROM.
- - To mimimize time taken to transfer and flash a full ROM.
- - Configuration changes are only minor and do not impact disk applications.
+ - Overwriting of the ROM drive contents is not desired.
+ - Temporary disk space is unavailable to hold a full ROM image.
+ - To reduce the time taken to transfer and flash a full ROM.
+ - Configuration changes are only minor and do not impact disk
+   applications.
 
-The ROMWBW build process generates a system upgrade file along with
+The RomWBW build process generates a system update file along with
 the normal ROM image and can be identified by the extension ".upd". It
 will be 128Kb in size. In comparison the normal ROM image will have
 the extension ".rom" and be 512Kb or 1024Kb in size.
 
-Transferring and flashing the System Update is accomplished in the
-same manner as described above in *Upgrading* with the required
-difference being that the flash application needs to be directed to
-complete a partial flash using the /P command line switch.
+Transferring and flashing the System Update is accomplished in the same 
+manner as described above in [Upgrading via Flash Utility] with the 
+required difference being that the flash application needs to be 
+directed to complete a partial flash using the /P command line switch.
 
 `E>FLASH WRITE ROM.UPD /P`
 
+# Related Projects
+
+Outside of the hardware platforms adapted to RomWBW, there are a variety 
+of software projects that either target RomWBW specifically or provide
+a RomWBW-specific variation.
+
+## Z88DK
+
+Z88DK is a software powerful development kit for Z80 computers
+supporting both C and assembly language.  This kit now provides
+specific library support for RomWBW HBIOS.  The Z88DK project is
+hosted at <https://github.com/z88dk/z88dk>.
+
+## Paleo Editor
+
+Steve Garcia has created a Windows-hosted IDE that is tailored to
+development of RomWBW.  The project can be found at
+<https://github.com/alloidian/PaleoEditor>.
+
+## p-System Volume Management Script
+
+Andrew Davidson has created a Python script to automate the insertion
+and deletion of volumes within the p-System disk image.  These scripts
+are hosted at <https://github.com/robosnacks/psysimg>.
+
+## Z80 fig-FORTH
+
+Dimitri Theulings' implementation of fig-FORTH for the Z80 has a
+RomWBW-specific variant.  This fig-FORTH is built into the RomWBW
+ROM.  However, the project itself is hosted at
+<https://github.com/dimitrit/figforth>.
+
+## RomWBW Date/Time Utility
+
+Kevin Boone has created a generic application that will display or
+set the date/time of an RTC on RomWBW.  The application runs on all of
+the CP/M OS variants.  This tool (`WDATE`) is included on the RomWBW
+OS disk images.  The project is hosted at
+<https://github.com/kevinboone/wdate-cpm>.
+
 # Acknowledgments
 
 I want to acknowledge that a great deal of the code and inspiration
@@ -3013,7 +3210,7 @@ please let me know if I missed you!
 
 * Andrew Lynch started it all when he created the N8VEM Z80 SBC
   which became the first platform RomWBW supported.  Some of his
-  code can still be found in RomWBW.
+  original code can still be found in RomWBW.
 
 * Dan Werner wrote much of the code from which RomWBW was originally
   derived and he has always been a great source of knowledge and
@@ -3025,23 +3222,30 @@ please let me know if I missed you!
   due  to internal changes within RomWBW. As of RomWBW 2.6, these
   applications are no longer provided.
 
+* Sergey Kiselev created several hardware platforms for RomWBW
+  including the very popular Zeta.
+
 * David Giles created support for the Z180 CSIO which is now included
   SD Card driver.
 
+* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver, DMA support, and a long list of general code
+  and documentation enhancements.
+
 * Ed Brindley contributed some of the code that supports the RCBus
   platform.
 
-* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-  AY-3-8910 sound driver as well as a long list of general code
-  enhancements.
-
 * Spencer Owen created the RC2014 series of hobbyist kit computers
-  which has exponentially increased RomWBW usage.
+  which has exponentially increased RomWBW usage.  Some of his kits
+  include RomWBW.
 
 * Stephen Cousins has likewise created a series of hobbyist kit
   computers at Small Computer Central and is distributing RomWBW
   with many of them.
 
+* Alan Cox has contributed some driver code and has provided a great
+  deal of advice.
+
 * The CP/NET client files were developed by Douglas Miller.
 
 * Phillip Stevens contributed support for FreeRTOS.
@@ -3061,6 +3265,11 @@ please let me know if I missed you!
 
 * The RomWBW Disk Catalog document was produced by Mykl Orders.
 
+* Rob Prouse has created many of the supplemental disk images
+  including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
+  BASIC Compiler, Microsoft Fortran Compiler, and a Games
+  compendium.
+
 Contributions of all kinds to RomWBW are very welcome.
 
 # Licensing
@@ -3082,15 +3291,15 @@ Portions of RomWBW were created by, contributed by, or derived from
 the work of others.  It is believed that these works are being used
 in accordance with the intentions and/or licensing of their creators.
 
-If anyone feels their work is being used outside of it's intended
+If anyone feels their work is being used outside of its intended
 licensing, please notify:
 
-> Wayne Warthen
-> wwarthen@gmail.com
+> $doc_author$ \
+> [$doc_authmail$](mailto:$doc_authmail$)
 
 RomWBW is an aggregate work.  It is composed of many individual,
 standalone programs that are distributed as a whole to function as
-a cohesive system.  Each program may have it's own licensing which
+a cohesive system.  Each program may have its own licensing which
 may be different from other programs within the aggregate.
 
 In some cases, a single program (e.g., CP/M Operating System) is
@@ -3248,7 +3457,7 @@ the RomWBW HBIOS configuration.
 | Interrupts        | Mode 2        |
 
  - CPU speed is detected at startup if DS1302 RTC is active
-   - Otherwise 20.000 MHz assumed
+   - Otherwise 8.000 MHz assumed
  - System timer is generated by onboard CTC
  - Hardware auto-detected:
    - Onboard DS1302 RTC
@@ -3652,6 +3861,7 @@ the RomWBW HBIOS configuration.
    - WDC Floppy Disk Controller w/ 3.5" HD Drives
    - Onboard IDE Hard Disk Interface Module
    - PPIDE Hard Disk Interface Module
+   - VGARC Video & Keyboard Module
  - Serial baud rate is usually determined by hardware for ACIA and
    SIO interfaces
 
@@ -3675,6 +3885,7 @@ the RomWBW HBIOS configuration.
    - WDC Floppy Disk Controller w/ 3.5" HD Drives
    - Onboard IDE Hard Disk Interface Module
    - PPIDE Hard Disk Interface Module
+   - VGARC Video & Keyboard Module
  - Serial baud rate is usually determined by hardware for ACIA and
    SIO interfaces
 
@@ -3698,11 +3909,73 @@ the RomWBW HBIOS configuration.
    - WDC Floppy Disk Controller w/ 3.5" HD Drives
    - Onboard IDE Hard Disk Interface Module
    - PPIDE Hard Disk Interface Module
+   - VGARC Video & Keyboard Module
  - Serial baud rate is usually determined by hardware for ACIA and
    SIO interfaces
 
 `\clearpage`{=latex}
 
+### Z80-Retro SBC
+
+|                   |                  |
+|-------------------|------------------|
+| ROM Image File    | Z80RETRO_std.rom |
+| Console Baud Rate | 38400            |
+| Interrupts        | Mode 2           |
+
+ - CPU speed is assumed to be 14.7456 MHz
+ - Hardware auto-detected:
+   - SIO Serial Interface Module
+   - Onboard CTC
+
+`\clearpage`{=latex}
+
+### S100 Computers Z180
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | S100_std.rom  |
+| Console Baud Rate | 38400         |
+| Interrupts        | Mode 2        |
+
+ - CPU speed assumed to be 18.432 MHz
+ - System timer is generated by Z180 CPU
+ - Hardware auto-detected:
+   - Interrupt-driven RTC
+   - Z180 ASCI Serial Ports
+   - Onboard SD Card Interface
+
+`\clearpage`{=latex}
+
+### Duodyne Z80 System
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | DUO_std.rom   |
+| Console Baud Rate | 38400         |
+| Interrupts        | None          |
+
+ - CPU speed is detected at startup if DS1302 RTC is active
+   - Otherwise 8.000 MHz assumed
+ - System timer is generated by CTC if available
+ - Hardware auto-detected:
+   - DS1302 RTC
+   - Zilog CTC
+   - Zilog DMA Module
+   - UART Serial Adapter
+   - SIO Serial Interface
+   - LPT Printer Interface
+   - Zilog Parallel Interface
+   - CVDU Display Adapter
+   - TMS9938/58 Display Adapter
+   - PS/2 Keyboard Interface
+   - AY-3-8910/YM2149 Sound Module
+   - Floppy Disk Controller w/ 3.5" HD Drives
+   - PPIDE Hard Disk Interface
+ - Interrupts may be enabled in build options
+
+`\clearpage`{=latex}
+
 ## Appendix B - Device Summary
 
 The table below briefly describes each of the possible devices that
@@ -3719,13 +3992,15 @@ may be discovered by RomWBW in your system.
 | DMA       | System   | Zilog DMA Controller                                   |
 | DS1307    | RTC      | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM          |
 | DS1501RTC | RTC      | Maxim DS1501/DS1511 Watchdog Real-Time Clock           |
-| DSKY      | System   | Keypad & Display                                       |
 | DSRTC     | RTC      | Maxim DS1302 Real-Time Clock w/ NVRAM                  |
 | DUART     | Char     | SCC2681 or compatible Dual UART                        |
-| FD        | Disk     | 8272 of compatible Floppy Disk Controller              |
+| EMM       | Disk     | Disk drive on Parallel Port emm interface (Zip Drive)  |
+| FD        | Disk     | 8272 or compatible Floppy Disk Controller              |
 | GDC       | Video    | uPD7220 Video Display Controller                       |
 | HDSK      | Disk     | SIMH Simulator Hard Disk                               |
 | IDE       | Disk     | IDE/ATA Hard Disk Interface                            |
+| ICM       | DsKy     | ICM7218-based Display/Keypad on PPI                    |
+| IMM       | Disk     | IMM Zip Drive on PPI                                   |
 | INTRTC    | RTC      | Interrupt-based Real Time Clock                        |
 | KBD       | Kbd      | 8242 PS/2 Keyboard Controller                          |
 | KIO       | System   | Zilog Serial/ Parallel Counter/Timer                   |
@@ -3734,7 +4009,9 @@ may be discovered by RomWBW in your system.
 | MSXKYB    | Kbd      | MSX Compliant Matrix Keyboard                          |
 | I2C       | System   | I2C Interface                                          |
 | PIO       | Char     | Zilog Parallel Interface Controller                    |
+| PKD       | DsKy     | P8279-based Display/Keypad on PPI                      |
 | PPIDE     | Disk     | 8255 IDE/ATA Hard Disk Interface                       |
+| PPA       | Disk     | PPA Zip Drive on PPI                                   |
 | PPK       | Kbd      | Matrix Keyboard                                        |
 | PPPSD     | Disk     | ParPortProp SD Card Interface                          |
 | PPPCON    | Serial   | ParPortProp Serial Console Interface                   |
@@ -3747,10 +4024,12 @@ may be discovered by RomWBW in your system.
 | SIO       | Char     | Zilog Serial Port Interface                            |
 | SN76489   | Sound    | SN76489 Programmable Sound Generator                   |
 | SPK       | Sound    | Bit-bang Speaker                                       |
+| SYQ       | Disk     | Iomega SparQ Drive on PPI                              |
 | TMS       | Video    | TMS9918/38/58 Video Display Controller                 |
 | UART      | Char     | 16C550 Family Serial Interface                         |
 | USB-FIFO  | Char     | FT232H-based ECB USB FIFO                              |
 | VDU       | Video    | MC6845 Family Video Display Controller                 |
 | VGA       | Video    | HD6445CP4-based Video Display Controller               |
+| VRC       | Video    | VGARC Video Display Controller                         |
 | YM        | Audio    | YM2612 Programmable Sound Generator                    |
 | Z2U       | Char     | Zilog Z280 CPU Built-in Serial Ports                   |

Source/Fonts/Build.cmd

@@ -11,8 +11,8 @@ echo Preparing compressed font files...
 lzsa -f2 -r font8x8u.bin font8x8c.bin || exit /b
 lzsa -f2 -r font8x11u.bin font8x11c.bin || exit /b
 lzsa -f2 -r font8x16u.bin font8x16c.bin || exit /b
-
 lzsa -f2 -r fontcgau.bin fontcgac.bin || exit /b
+lzsa -f2 -r fontvgarcu.bin fontvgarcc.bin || exit /b
 
 fonttool font8x8u.bin > font8x8u.asm || exit /b
 fonttool font8x11u.bin > font8x11u.asm || exit /b
@@ -20,6 +20,7 @@ fonttool font8x16u.bin > font8x16u.asm || exit /b
 fonttool font8x8c.bin > font8x8c.asm || exit /b
 fonttool font8x11c.bin > font8x11c.asm || exit /b
 fonttool font8x16c.bin > font8x16c.asm || exit /b
-
 fonttool fontcgau.bin > fontcgau.asm || exit /b
 fonttool fontcgac.bin > fontcgac.asm || exit /b
+fonttool fontvgarcu.bin > fontvgarcu.asm || exit /b
+fonttool fontvgarcc.bin > fontvgarcc.asm || exit /b

Source/Fonts/Makefile

@@ -1,8 +1,8 @@
 OBJECTS = \
-	font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm \
-	font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm
+	font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm fontvgarcu.asm \
+	font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm fontvgarcc.asm
 
-OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin
+OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin fontvgarcc.bin
 
 TOOLS = ../../Tools
 
@@ -26,5 +26,8 @@ font8x16c.bin: font8x16u.bin
 fontcgac.bin: fontcgau.bin
 	$(BINDIR)/lzsa -f2 -r $< $@
 
+fontvgarcc.bin: fontvgarcu.bin
+	$(BINDIR)/lzsa -f2 -r $< $@
+
 %.asm: %.bin
 	$(BINDIR)/bin2asm $< > $@

Source/HBIOS/API.txt

@@ -117,7 +117,11 @@ GET ($F8):
 						L=Clock Mult (0:Half, 1:Full, 2: Double)
 						D=Memory Wait States
 						E=I/O Wait States
-						
+
+    PANEL ($F4):
+      BC=Function/Subfunction			A=Result
+						L=Switch Values
+
 
 SET ($F9):
   BC=Function/Subfunction                       A=Result
@@ -142,6 +146,11 @@ SET ($F9):
 						E=I/O Wait States
 						
 
+    PANEL ($F4):
+      BC=Function/Subfunction			A=Result
+						L=LED Values
+
+
 PEEK ($FA):
   B=Function                       		A=Result
   D=Bank					E=Byte Value
@@ -475,3 +484,93 @@ TERM_ATTACH: (C=VIDEO UNIT, DE=<VDA>_DISPATCH)
   - QUERY ATTACHED VDA FOR SCREEN SIZE (VIA <EMU>_VDADISP)
   - INITIALIZE ALL WORKING VARIABLES AND EMULATOR STATE
   - RETURN (A=STATUS)
+
+
+==============
+DSKY Functions
+==============
+
+RESET ($30):
+  B=Function				A=Result
+
+STAT ($31):
+  B=Function				A=Result / Bytes Pending
+
+  A=Number of characters waiting or error code if negative
+
+GETKEY ($32):
+  B=Function				A=Result
+					E=Key Code
+
+  A=DSKY key value or error code if negative
+
+SHOWHEX ($33):
+  B=Function				A=Result
+  DE:HL=Value (32-bit)
+
+  Display value of DE:HL in hex on display.  It is not
+  possible to show decimal points.
+
+SHOWSEG ($34):
+  B=Function				A=Result
+  HL=Buffer (raw segment encoded)
+  
+  Display raw segment values.  Each byte represents one
+  character.  Each segment of the character is represented
+  by a bit.  The buffer must be located in high memory.
+  The segments are encoded as shown below:
+  
+  +--01--+
+  20    02
+  +--40--+
+  10    04
+  +--08--+  80
+  
+KEYLEDS ($35):
+  B=Function				A=Result
+  HL=Buffer (LED bitmap)
+  
+  Light the LEDs for the keypad keys according to the
+  bitmap contained in the buffer pointed to by HL.  The buffer
+  must be located in high memory.
+  
+  At this time, the bitmap is specific to the DSKYNG hardware.
+  This function is ignored by the original DSKY.
+
+STATLED ($36):
+  B=Function				A=Result
+  D=LED Number
+  E=LED State (0/1)
+  
+  Set or clear the status LED specified in D.  The state of
+  the LED is contained in E.  If E=0, the LED will be turned
+  off.  If E=1, the LED will be turned on.
+
+BEEP ($37):
+  B=Function				A=Result
+
+  Beep the onboard speaker of the DSKY.  Only the DSKYNG hardware
+  has a speaker.  This function will be ignored by the original
+  DSKY.
+
+DEVICE ($38):
+  B=Function				A=Result
+					D=Device Type
+					E=Device Number
+					C=Device Attributes
+					H=Device Mode
+					L=Base I/O Adr
+
+  Returns device information for the DSKY unit. The Status (A) is a 
+  standard HBIOS result code. Device Attribute (C) values are not yet 
+  defined. Device Type (D) indicates the specific hardware driver that 
+  handles the specified character unit. Values are listed at the start
+  of this section. Device Number (E) indicates the physical device
+  number assigned per driver which is always 0 for DSKY.
+
+  Device Mode (H) is used to indicate the variant of the chip or circuit 
+  that is used by the specified unit. The Device I/O Base Address (L) 
+  indicates the starting port address of the hardware interface that is 
+  servicing the specified unit. Both of these values are considered 
+  driver specific. Refer to the associated hardware driver for the
+  values used.

Source/HBIOS/Build.cmd

@@ -93,7 +93,14 @@ call :asm imgpad2 || exit /b
 
 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin + ..\cpm22\cpm_wbw.bin osimg.bin || exit /b
 copy /b ..\Forth\camel80.bin + nascom.bin + ..\tastybasic\src\tastybasic.bin + game.bin + eastaegg.bin + netboot.mod + updater.bin + usrrom.bin osimg1.bin || exit /b
-copy /b imgpad2.bin osimg2.bin || exit /b
+
+if %Platform%==S100 (
+    zxcc slr180 -s100mon/fh
+    zxcc mload25 -s100mon || exit /b
+    copy /b s100mon.com osimg2.bin || exit /b
+) else (
+    copy /b imgpad2.bin osimg2.bin || exit /b
+)
 
 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit /b
 
@@ -223,5 +230,8 @@ call Build SCZ180 sc503 || exit /b
 call Build DYNO std || exit /b
 call Build UNA std || exit /b
 call Build RPH std || exit /b
+call Build Z80RETRO std || exit /b
+call Build S100 std || exit /b
+call Build DUO std || exit /b
 
 goto :eof

Source/HBIOS/Build.ps1

@@ -27,8 +27,8 @@ $ErrorAction = 'Stop'
 # UNA BIOS is simply imbedded, it is not built here.
 #
 
-$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "UNA"
-$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
+$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "DUO", "UNA"
+$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100"
 $PlatformListZ280 = "RCZ280"
 
 #

Source/HBIOS/Build.sh

@@ -32,12 +32,15 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
 	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="DUO"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc126"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc130"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc131"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
+	ROM_PLATFORM="S100"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh
 	exit

Source/HBIOS/Clean.cmd

@@ -11,6 +11,7 @@ if exist *.exp del *.exp
 if exist *.tmp del *.tmp
 if exist *.mrk del *.mrk
 if exist *.sys del *.sys
+if exist *.hex del *.hex
 if exist build.inc del build.inc
 if exist font*.asm del font*.asm
 if exist build_env.cmd del build_env.cmd

Source/HBIOS/Config/DUO_std.asm

@@ -0,0 +1,44 @@
+;
+;==================================================================================================
+;   DUODYNE STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_duo.asm"
+;
+CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+;
+BATCOND		.SET	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
+;
+ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+;
+MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+;UARTCFG	.SET	UARTCFG | SER_RTS

Source/HBIOS/Config/MBC_std.asm

@@ -42,12 +42,17 @@ RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-DSKYENABLE	.SET	FALSE		; ENABLES DSKY
-DSKYMODE	.SET	DSKYMODE_NG	; DSKY VERSION: DSKYMODE_[V1|NG]
+DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
+ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 ;
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ;UARTCFG	.SET	UARTCFG | SER_RTS
 ;
+ESPENABLE	.SET	TRUE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
 CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)

Source/HBIOS/Config/RCZ180_ext.asm

@@ -29,6 +29,9 @@
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -44,8 +47,9 @@ ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 ;

Source/HBIOS/Config/RCZ180_nat.asm

@@ -29,6 +29,9 @@
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 MEMMGR		.SET	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -44,11 +47,11 @@ ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER

Source/HBIOS/Config/RCZ280_ext.asm

@@ -30,6 +30,9 @@ CPUOSC		.SET	12000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -43,8 +46,9 @@ ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/RCZ280_nat.asm

@@ -30,6 +30,9 @@ CPUOSC		.SET	12000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -43,8 +46,9 @@ ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/RCZ280_zz80mb.asm

@@ -28,10 +28,13 @@
 ;
 #include "cfg_rcz280.asm"
 ;
-CPUOSC		.SET	12000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
 RAMLOC		.SET	23		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -49,9 +52,10 @@ ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

Source/HBIOS/Config/RCZ280_zzrc.asm

@@ -32,6 +32,9 @@ CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
 RAMSIZE		.SET	256		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -57,9 +60,10 @@ ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

Source/HBIOS/Config/RCZ80_easy.asm

@@ -33,11 +33,12 @@ CPUOSC		.SET	10000000	; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
-DIAGENABLE	.SET	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 ;
@@ -58,8 +59,9 @@ DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -73,5 +75,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_jbl.asm

@@ -0,0 +1,79 @@
+;
+;==================================================================================================
+;   RCBUS Z80 COLECOVISION-COMPATIBLE CONFIGURATION FOR J.B. LANGSTON'S GAME BOARDS
+;==================================================================================================
+;
+; THIS CONFIGURATION ENABLES DRIVERS FOR THE TMS9918 AND SN76489 BOARDS BY J.B. LANGSTON
+; AND THE YM2149 BOARD BY ED BRINDLEY. THE TMS9918 IS CONFIGURED TO USE THE COLECOVISION
+; PORTS AND HAS INTERRUPTS DISABLED BECAUSE COLECOVISION USES NMI, WHICH WOULD BREAK CP/M
+; WHEN ENABLED. IT IS CONFIGURED FOR A 3.686MHZ CPU CLOCK IN ORDER TO BE COMPATIBLE WITH
+; COLECOVISION GAMES. THE FIRST SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE CPU
+; RUNNING AT THIS SPEED. THE SECOND SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE
+; SECOND CLOCK SET TO 7.373MHZ. LOWER BAUD RATES CAN BE ACHIEVED ON THE SECOND PORT BY
+; MOVING THE SECONDARY CLOCK DIVIDER JUMPER (E.G., 38400 @ 2.458MHZ). THE BAUD RATE DOES
+; NOT NEED TO BE CHANGED IN THIS CONFIGURATION FILE IN ORDER TO DO THIS, BUT THE DEVICE
+; LIST WILL INCORRECTLY SHOW THE PORT RUNNING AT 115200 REGARDLESS OF THE CLOCK DIVIDER.
+; UNCOMMENT THE LINE THAT SETS BOOTCON TO 1 TO BOOT ON THE SECOND SIO PORT BY DEFAULT.
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"Z"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz80.asm"
+;
+CPUOSC		.SET	3686400		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;BOOTCON         .SET    1               ; BOOT CONSOLE DEVICE
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.SET	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.SET	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+TMSMODE		.SET	TMSMODE_COLECO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VDAEMU_SERKBD	.SET	1		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_kio.asm

@@ -30,6 +30,9 @@ CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
@@ -53,8 +56,9 @@ SIO0BCTCC	.SET	1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -68,5 +72,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_skz.asm

@@ -29,6 +29,9 @@
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 SKZENABLE	.SET	TRUE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_12		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 WDOGMODE	.SET	WDOG_SKZ	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
@@ -48,8 +51,9 @@ DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -63,5 +67,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_std.asm

@@ -29,6 +29,9 @@
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 ;
@@ -37,10 +40,13 @@ ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -53,6 +59,8 @@ FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_tiny.asm

@@ -33,11 +33,13 @@ CPUOSC		.SET	16000000	; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 EIPCENABLE	.SET	TRUE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
-DIAGENABLE	.SET	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
 LEDPORT		.SET	$6E		; STATUS LED PORT ADDRESS
 ;
@@ -63,8 +65,9 @@ DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -79,5 +82,6 @@ IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_zrc.asm

@@ -30,6 +30,9 @@
 CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE     .SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 RAMSIZE		.SET	1536		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
@@ -40,9 +43,10 @@ DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
-VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
@@ -55,5 +59,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_zrc_ram.asm

@@ -31,6 +31,9 @@
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 RAMSIZE		.SET	2048		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
@@ -44,8 +47,9 @@ DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -59,5 +63,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/S100_std.asm

@@ -0,0 +1,47 @@
+;
+;==================================================================================================
+;   S100 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_s100.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY

Source/HBIOS/Config/SBC_max.asm

@@ -35,9 +35,12 @@ USELZSA2	.SET	TRUE		; ENABLE FONT COMPRESSION
 ;
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
 ;
-DIAGENABLE	.SET	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 DSKYENABLE	.SET	TRUE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+ICMENABLE	.SET	TRUE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 ;

Source/HBIOS/Config/SBC_simh.asm

@@ -30,6 +30,9 @@ INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 ;
 HTIMENABLE	.SET	TRUE		; ENABLE SIMH TIMER SUPPORT
 ;
+SIMRTCENABLE	.SET	TRUE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTSBCFORCE	.SET	TRUE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 ;

Source/HBIOS/Config/SCZ180_sc126.asm

@@ -35,8 +35,9 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
-DIAGENABLE	.SET	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.SET	$0D		; DIAGNOSTIC PORT ADDRESS
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+FPLED_IO	.SET	$0D		; FP: PORT ADDRESS FOR FP LEDS
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -48,8 +49,9 @@ SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/SCZ180_sc130.asm

@@ -35,8 +35,10 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
-DIAGENABLE	.SET	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -48,8 +50,9 @@ SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/SCZ180_sc131.asm

@@ -34,8 +34,10 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
-DIAGENABLE	.SET	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 ;
 DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

Source/HBIOS/Config/SCZ180_sc140.asm

@@ -34,9 +34,12 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$A0		; FP: PORT ADDRESS FOR FP LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.SET	$A0		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
-DIAGENABLE	.SET	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.SET	$0D		; DIAGNOSTIC PORT ADDRESS
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -59,3 +62,5 @@ SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS

Source/HBIOS/Config/SCZ180_sc503.asm

@@ -34,9 +34,12 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$A0		; FP: PORT ADDRESS FOR FP LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.SET	$A0		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
-DIAGENABLE	.SET	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.SET	$0D		; DIAGNOSTIC PORT ADDRESS
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -59,3 +62,5 @@ SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS

Source/HBIOS/Config/Z80RETRO_std.asm

@@ -0,0 +1,35 @@
+;
+;==================================================================================================
+;   ZETA2 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_z80retro.asm"
+;
+CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
+INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+;
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

Source/HBIOS/Config/ZETA2_std.asm

@@ -26,7 +26,7 @@
 ;
 #include "cfg_zeta2.asm"
 ;
-CPUOSC		.SET	20000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
@@ -35,7 +35,7 @@ UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTSBC		.SET	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_ZETA	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

Source/HBIOS/Makefile

@@ -6,7 +6,7 @@ MOREDIFF = game.bin hbios_rom.bin nascom.bin usrrom.bin \
 SUBDIRS =
 DEST = ../../Binary
 TOOLS =../../Tools
-OTHERS =  *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
+OTHERS =  *.img *.rom *.com *.upd *.bin *.hex cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
 
 # DIFFMAKE = 1
 
@@ -24,7 +24,8 @@ endif
 
 include $(TOOLS)/Makefile.inc
 
-FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
+FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm \
+	fontcgac.asm fontcgau.asm fontvgarcc.asm fontvgarcu.asm
 
 ifeq ($(CPUFAM),2)
 	TASM=$(BINDIR)/uz80as -t hd64180
@@ -42,6 +43,10 @@ else
 	BIOS=wbw
 endif
 
+ifeq ($(ROM_PLATFORM),S100)
+	ROMDEPS += s100mon.bin
+endif
+
 ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG}
 
 # $(info DEPS=$(DEPS))
@@ -57,7 +62,11 @@ $(OBJECTS) : $(ROMDEPS)
 	cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >osimg_small.bin
 	if [ $(ROM_PLATFORM) != UNA ] ; then \
 		cat camel80.bin nascom.bin tastybasic.bin game.bin eastaegg.bin netboot.mod updater.bin usrrom.bin >osimg1.bin ; \
-		cat imgpad2.bin >osimg2.bin ; \
+		if [ $(ROM_PLATFORM) = S100 ] ; then \
+			cat s100mon.bin >osimg2.bin ; \
+		else \
+			cat imgpad2.bin >osimg2.bin ; \
+		fi ; \
 		if [ $(ROMSIZE) -gt 0 ] ; then \
 			for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
 				srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
@@ -88,6 +97,10 @@ font%.asm:
 camel80.bin:
 	cp ../Forth/$@ .
 
+s100mon.bin:
+	$(ZXCC) $(CPM)/SLR180 -s100mon/FH
+	$(ZXCC) $(CPM)/MLOAD25 -s100mon.bin=s100mon
+
 tastybasic.bin:
 	cp ../TastyBasic/src/$@ .
 	

Source/HBIOS/ansi.asm

@@ -634,9 +634,9 @@ ANSI_BEL:
 ANSI_BS:
 	LD	A,(ANSI_COL)	; GET CURRENT COLUMN
 	DEC	A		; BACK IT UP BY ONE
-	RET	C		; IF CARRY, MARGIN EXCEEDED, ABORT
+	RET	M		; IF CARRY, MARGIN EXCEEDED, ABORT
 	LD	(ANSI_COL),A	; SAVE NEW COLUMN
-	JP	ANSI_XY		; UDPATE CUSROR AND RETURN
+	JP	ANSI_XY		; UDPATE CURSOR AND RETURN
 ;
 ANSI_CR:
 	XOR	A		; ZERO ACCUM

Source/HBIOS/asci.asm

@@ -53,7 +53,7 @@
 ; ASEXT:
 ; 7 6 5 4 3 2 1 0
 ; R D C X B F D S
-; 0 1 1 0 0 1 1 0   DEFAULT VALUES
+; 0 1 1 0 0 0 0 0   DEFAULT VALUES
 ; | | | | | | | |
 ; | | | | | | | +-- SEND BREAK
 ; | | | | | | +---- BREAK DETECT (RO)
@@ -64,6 +64,10 @@
 ; | +-------------- DCD0 DISABLE
 ; +---------------- RDRF INT INHIBIT
 ;
+ASCI_DEF_CNTLA	.EQU	$64
+ASCI_DEF_CNTLB	.EQU	$20
+ASCI_DEF_ASEXT	.EQU	$60
+;
 ASCI_BUFSZ	.EQU	32		; RECEIVE RING BUFFER SIZE
 ;
 ASCI_NONE	.EQU	0		; NOT PRESENT
@@ -77,7 +81,7 @@ ASCI_RTS	.EQU	%00010000	; ~RTS BIT OF CNTLA REG
 ;
 #IF (ASCIINTS)
 ;
-  #IF (INTMODE == 2)
+  #IF (INTMODE > 0)
 ;
 ASCI0_IVT	.EQU	IVT(INT_SER0)
 ASCI1_IVT	.EQU	IVT(INT_SER1)
@@ -121,25 +125,19 @@ ASCI_PREINIT2:
 ;
 #IF (ASCIINTS)
 ;
-  #IF (INTMODE >= 1)
+; Z180 ASCI INTERRUPTS OPERATE LIKE IM2 EVEN WHEN IM1 IS ACTIVE.
+;
+  #IF (INTMODE > 0)
 	; SETUP INT VECTORS AS APPROPRIATE
 	LD	A,(ASCI_DEV)		; GET DEVICE COUNT
 	OR	A			; SET FLAGS
 	JR	Z,ASCI_PREINIT3		; IF ZERO, NO ASCI DEVICES, ABORT
 ;
-    #IF (INTMODE == 1)
-	; ADD IM1 INT CALL LIST ENTRY
-	LD	HL,ASCI_INT		; GET INT VECTOR
-	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
-    #ENDIF
-;
-    #IF (INTMODE == 2)
 	; SETUP IM2 VECTORS
 	LD	HL,ASCI_INT0
 	LD	(ASCI0_IVT),HL		; IVT INDEX
 	LD	HL,ASCI_INT1
 	LD	(ASCI1_IVT),HL		; IVT INDEX
-    #ENDIF
 ;
   #ENDIF
 ;
@@ -200,24 +198,6 @@ ASCI_INIT1:
 ;
   #IF (INTMODE > 0)
 ;
-; IM1 ENTRY POINT
-;
-ASCI_INT:
-	; CHECK/HANDLE FIRST PORT
-	LD	A,(ASCI0_CFG + 1)	; GET ASCI TYPE FOR FIRST ASCI
-	OR	A			; SET FLAGS
-	CALL	NZ,ASCI_INT0		; CALL IF EXISTS
-	RET	NZ			; DONE IF INT HANDLED
-;
-	; CHECK/HANDLE SECOND PORT
-	LD	A,(ASCI1_CFG + 1)	; GET ASCI TYPE FOR SECOND ASCI
-	OR	A			; SET FLAGS
-	CALL	NZ,ASCI_INT1		; CALL IF EXISTS
-;
-	RET				; DONE
-;
-; IM2 ENTRY POINTS
-;
 ASCI_INT0:
 	; INTERRUPT HANDLER FOR FIRST ASCI (ASCI0)
 	LD	IY,ASCI0_CFG		; POINT TO ASCI0 CFG
@@ -513,17 +493,29 @@ ASCI_INITDEV3:
 	SET	4,C			; SET CNTLB BIT 4 FOR ODD PARITY
 ;
 ASCI_INITDEV4:
+	; SETUP ASEXT
+	LD	A,D			; CONFIG HIGH BYTE
+	AND	%00100000		; BIT 5 IS RTS
+	CPL				; INVERT FOR ASEXT
+	LD	L,A			; MOVE TO L
+	LD	A,ASCI_DEF_ASEXT	; GET ASEXT DEFAULT
+	AND	L			; COMBINE
+	LD	L,A			; AND LEAVE IN L
+;
 	; SAVE CONFIG PERMANENTLY NOW
 	LD	(IY+4),E		; SAVE LOW WORD
 	LD	(IY+5),D		; SAVE HI WORD
 	JR	ASCI_INITGO
 ;
 ASCI_INITSAFE:
-	LD	B,$64			; CNTLA FAILSAFE VALUE
-	LD	C,$20			; CNTLB FAILSAFE VALUE
+	LD	B,ASCI_DEF_CNTLA	; CNTLA FAILSAFE VALUE
+	LD	C,ASCI_DEF_CNTLB	; CNTLB FAILSAFE VALUE
+	LD	L,ASCI_DEF_ASEXT	; ASEXT FAILSAFE VALUE
 ;
 ASCI_INITGO:
 	; IMPLEMENT CONFIGURATION
+	; B = CNTLA, C=CNTLB, L=ASEXT
+	PUSH	HL			; SAVE ASEXT
 	LD	H,B			; H := CNTLA VAL
 	LD	L,C			; L := CNTLB VAL
 	LD	B,0			; MSB OF PORT MUST BE ZERO!
@@ -532,6 +524,7 @@ ASCI_INITGO:
 	INC	C			; BUMP TO
 	INC	C			; ... CNTLB REG, B IS STILL 0
 	OUT	(C),L			; WRITE CNTLB VALUE
+	POP	HL			; RECOVER ASEXT
 	INC	C			; BUMP TO
 	INC	C			; ... STAT REG, B IS STILL 0
 #IF ((ASCIINTS) & (INTMODE > 0))
@@ -543,8 +536,11 @@ ASCI_INITGO:
 	LD	A,$0E			; BUMP TO
 	ADD	A,C			; ... ASEXT REG
 	LD	C,A			; PUT IN C FOR I/O, B IS STILL 0
-	LD	A,$66			; STATIC VALUE FOR ASEXT
-	OUT	(C),A			; WRITE ASEXT REG
+	BIT	0,C			; IS C ADDRESSING AN ODD NUMBERED PORT?
+	JR	NZ,ASCI_INITGOZ		; IF SO, THIS IS SEC SERIAL, NO CTS!
+	OUT	(C),L			; WRITE ASEXT REG
+;
+ASCI_INITGOZ:
 ;
 #IF ((ASCIINTS) & (INTMODE > 0))
 ;

Source/HBIOS/cfg_duo.asm

@@ -0,0 +1,301 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR DUODYNE
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "Duodyne", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_UNSUP	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+MPGSEL_0	.EQU	$50		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$51		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$52		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$53		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$54		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+RTCIO		.EQU	$94		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	TRUE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.EQU	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.EQU	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
+CTCOSC		.EQU	(4915200/8)	; CTC CLOCK FREQUENCY
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED
+LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
+UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	TRUE		; UART: AUTO-DETECT DUODYNE UART
+;
+ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	(4915200/8)	; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUMODE	.EQU	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
+CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_MBC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$20		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$20		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$28		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	FALSE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	FALSE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$60		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIOZBASE	.EQU	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+

Source/HBIOS/cfg_dyno.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -130,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -146,7 +150,7 @@ SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +158,7 @@ SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO1ACFG	.EQU	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
@@ -169,9 +173,10 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -183,9 +188,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_DYNO	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
@@ -225,7 +230,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -239,6 +244,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -248,6 +255,12 @@ PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_master.asm

@@ -12,7 +12,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -95,9 +95,12 @@ SKZDIV		.EQU	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.EQU	$6F		; WATCHDOG REGISTER ADR
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -105,10 +108,13 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -163,6 +169,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -194,7 +201,7 @@ SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -202,7 +209,7 @@ SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.EQU	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.EQU	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO1ACFG	.EQU	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
@@ -222,10 +229,11 @@ GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 GDCMODE		.EQU	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
 GDCMON		.EQU	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -237,9 +245,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_NONE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -280,7 +288,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -298,6 +306,9 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
@@ -307,10 +318,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_mbc.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -60,9 +60,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED
@@ -70,10 +73,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -121,6 +127,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	TRUE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -132,7 +139,7 @@ SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -150,10 +157,11 @@ CVDUMODE	.EQU	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -166,9 +174,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_MBC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -209,7 +217,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -222,6 +230,9 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
@@ -230,11 +241,34 @@ PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-LPTENABLE	.EQU	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_mk4.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -76,10 +79,13 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -127,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -143,7 +150,7 @@ SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -161,10 +168,11 @@ CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -176,9 +184,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_DIDE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -219,7 +227,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -236,6 +244,8 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -244,10 +254,18 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_n8.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -68,9 +68,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
@@ -78,10 +81,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -129,6 +135,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -145,7 +152,7 @@ SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -163,10 +170,11 @@ CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -178,9 +186,9 @@ FDENABLE	.EQU	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_N8	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -221,7 +229,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	N8_PPI0		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -234,6 +242,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -243,6 +253,12 @@ PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_rcz180.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,18 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
+FPENABLE	.EQU	FALSE		; ENABLES FRONT PANEL SWITCHES
+FPBASE		.EQU	$00		; FRONT PANEL I/O PORT BASE ADDRESS
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+;
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -130,6 +139,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -146,7 +156,7 @@ SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +164,7 @@ SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO1ACFG	.EQU	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
@@ -169,9 +179,10 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -183,9 +194,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
@@ -225,7 +236,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -239,6 +250,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -247,6 +260,32 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$0C		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_rcz280.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -130,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -156,7 +160,7 @@ SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -164,7 +168,7 @@ SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO1ACFG	.EQU	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
@@ -179,9 +183,10 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -193,9 +198,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
@@ -235,7 +240,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -249,6 +254,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -257,6 +264,32 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$0C		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_rcz80.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -65,9 +65,12 @@ SKZDIV		.EQU	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.EQU	$6E		; WATCHDOG REGISTER ADR
 ;
-DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -84,8 +87,8 @@ VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
 MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 ;
@@ -129,6 +132,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -150,7 +154,7 @@ SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -158,7 +162,7 @@ SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.EQU	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.EQU	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO1ACFG	.EQU	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
@@ -173,9 +177,10 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -187,9 +192,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
@@ -229,7 +234,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -243,6 +248,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -251,6 +258,32 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$0C		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_rph.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
@@ -76,10 +79,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	RPH_PPI0		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	RPH_PPI0	; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	RPH_PPI0		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -127,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -152,10 +159,11 @@ GDCENABLE	.EQU	TRUE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 GDCMODE		.EQU	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
 GDCMON		.EQU	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -167,9 +175,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_N8	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -210,7 +218,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -223,6 +231,8 @@ PRPCONENABLE	.EQU	FALSE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -232,6 +242,12 @@ PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_s100.asm

@@ -0,0 +1,306 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR S100 Z180
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "S100", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_S100	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_57600_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+Z180_BASE	.EQU	$C0		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
+Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.EQU	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.EQU	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_TIMER	.EQU	TRUE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
+;
+RTCIO		.EQU	$0C		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+FPLED_ENABLE	.EQU	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.EQU	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.EQU	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.EQU	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.EQU	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.EQU	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.EQU	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.EQU	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
+;
+ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
+ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
+ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
+ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.EQU	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.EQU	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.EQU	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.EQU	SER_115200_8N1	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.EQU	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$10		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$20		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_sbc.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -60,9 +60,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
@@ -70,10 +73,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -121,6 +127,7 @@ UARTMFP		.EQU	TRUE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -132,7 +139,7 @@ SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
@@ -150,10 +157,11 @@ CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -161,14 +169,13 @@ MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_DIO3	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -209,7 +216,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -222,6 +229,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
@@ -231,9 +240,12 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
-LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
-LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

Source/HBIOS/cfg_scz180.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
-DIAGPORT	.EQU	$0D		; DIAGNOSTIC PORT ADDRESS
-DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+FPLED_ENABLE	.EQU	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
 DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
@@ -130,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -146,7 +150,7 @@ SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +158,7 @@ SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO1ACFG	.EQU	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
@@ -169,9 +173,10 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -183,9 +188,9 @@ FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
-FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
 FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
@@ -225,7 +230,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -239,6 +244,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -247,6 +254,32 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)