Compare commits

...

97 Commits

Author SHA1 Message Date
Wayne Warthen
f8c800e527 Create DSKY Driver Framework
Added a new driver category for DSKY (Display/Keypad) devices.  Existing DSKY devices were converted into drivers ICM and PKD.  These devices were previously DSKY and DSKYNG.

This removes substantial code duplication and recovers significant space in romldr and dbgmon.
2023-06-28 15:06:53 -07:00
Wayne Warthen
b90e4d932a Update fd.asm
- Fix typo
2023-06-20 16:12:49 -07:00
Wayne Warthen
5457a7e7fd Improve OS Boot Drive Assignment
- Modified the Disk Device function call (DIODEVICE) to provide new attributes related to disk size and removability.
- Leveraged API change to allow handling drive assignment differently depending on ATAPI vs. ATA interface.
2023-06-20 15:52:34 -07:00
Wayne Warthen
8f5cc510ee Missing Files 2023-06-16 15:18:49 -07:00
Wayne Warthen
0475f5e853 Minor Cleanup
- Update FPLED port values for some configs
- Fix Linux/MacOS build for new disk images
2023-06-16 14:56:20 -07:00
Wayne Warthen
5b7dee0689 Merge pull request #348 from rprouse/issue/347
Adds programming and games disk images
2023-06-16 13:37:25 -07:00
Rob Prouse
6532f61747 Remove DELBR.COM 2023-06-16 10:51:20 -04:00
Rob Prouse
4bdae4eccb Remove USQ.COM 2023-06-16 10:47:55 -04:00
Rob Prouse
efb9840b86 Remove MBASIC85 2023-06-16 08:57:19 -04:00
Wayne Warthen
308a11cb32 Merge pull request #350 from wwarthen/master
Update pull_request_template.md
2023-06-15 12:51:55 -07:00
Wayne Warthen
3a7421de33 Update pull_request_template.md 2023-06-15 12:50:51 -07:00
Wayne Warthen
21a58397b6 Merge pull request #349 from wwarthen/master
Create pull_request_template.md
2023-06-15 12:16:59 -07:00
Wayne Warthen
9ae61806dc Create pull_request_template.md 2023-06-15 12:15:37 -07:00
Rob Prouse
87ac6f07f8 Fix spelling mistake, Tory -> Tony 2023-06-15 13:37:17 -04:00
Rob Prouse
1cd5313259 Remove all HLP files that I added 2023-06-15 13:28:44 -04:00
Rob Prouse
04c1ff04ac Remove CPM2.HLP 2023-06-15 13:19:55 -04:00
Rob Prouse
0e1a0afa2c Replace HI-TECH C with latest version from https://github.com/agn453/HI-TECH-Z80-C 2023-06-15 13:16:52 -04:00
Rob Prouse
5227bb68b5 Added documentation for the new disk images 2023-06-14 14:10:15 -04:00
Rob Prouse
fb68941768 Adds programming and games disk images 2023-06-14 12:45:41 -04:00
Wayne Warthen
8747ec8d02 Clean-up of ATAPI Support
- Improved media handling and error reporting.
2023-06-13 17:02:13 -07:00
Wayne Warthen
abd939625f Support ATAPI in IDE and PPIDE Drivers
- Support is limited to 512 byte sectors.  So, devices such as ATAPI Zip Drives will work.  CD-ROM devices will not because they use a larger sector size.
2023-06-12 15:56:36 -07:00
Wayne Warthen
69716abb25 Regen Doc 2023-06-08 12:34:42 -07:00
Wayne Warthen
1f526d440a Add WDATE Command, Final PPA/IMM/SYQ Driver Cleanup
- Added WDATE command courtesy Kevin Boone.  See https://github.com/kevinboone/wdate-cpm for more information.
- Final cleanup of PPA/IMM/SYQ drivers including CPU speed compensated timeouts.
2023-06-08 11:59:07 -07:00
Wayne Warthen
84374c86e6 Cleanup and Optimizations for PPA/IMM/SYQ Drivers 2023-06-06 16:21:56 -07:00
Wayne Warthen
45ea46b105 Small Bug Fix for PPA/IMM/SYQ Drivers
Credit to Mark Elkin for testing and finding this issue.
2023-06-03 14:27:33 -07:00
Wayne Warthen
1333d6a491 Functional PPA Driver 2023-06-02 15:30:10 -07:00
Wayne Warthen
b7e865dbf1 Preliminary SyQuest Driver 2023-06-01 16:13:26 -07:00
Wayne Warthen
1c411f5552 Add IBM Standard Parallel Port Support to IMM Driver 2023-05-27 16:45:21 -07:00
Wayne Warthen
364e48a5d3 IMM Driver Cleanup, PPA Driver Skeleton
IMM Driver has rational timeouts now.  It also lights the MG014 LED during activity.
The PPA skeleton just attempts to determine if the PPA interface is present.  It does not attempt any I/O.
2023-05-26 16:48:13 -07:00
Wayne Warthen
63cb89dcfc Preliminary IMM Driver (Zip Drive)
Thanks to Alan Cox for inspiring this.  Much of the code was usurped from Fuzix.
2023-05-23 18:35:18 -07:00
Wayne Warthen
6e316b46f0 Document p-System Volume Management Python Script
- Andrew Davidson created a nice Python script to extract/insert p-System volumes from/to disk images.  Added a reference to his website in the p-System ReadMe.txt file.
2023-05-11 14:20:54 -07:00
Wayne Warthen
3f23396536 Support for MG014 RCBus Parallel Port Module 2023-05-10 18:37:47 -07:00
Wayne Warthen
c628ba10f2 Workaround Z280 CPU Bug for LZSA2
The LZSA2 decompressor invoked a known Z280 CPU bug.  A small modification to the code resolves this.
2023-05-07 17:45:43 -07:00
Wayne Warthen
9358299f14 Z280 Workaround for VGARC
Z280 is having an issue with OTDR instruction when loading the font for VGARC.  For now, the use of OTDR has been eliminated.
2023-05-07 16:27:25 -07:00
Wayne Warthen
d445c4a015 Disable LZSA Compression for Z280
- The LZSA2 decompressor code is failing mysteriously on Z280 CPUs.  I have simply disabled it in the Z280 primary configuration file.
2023-05-04 14:14:36 -07:00
Wayne Warthen
e32002545b VGARC Improvements, Doc Fix
- Added ability to enable VGARC and front panel in default config without I/O conflicts (does **not** support having both types of hardware present at the same time).
- Fixed documentation error in issue #345 reported by @MorfeoMatrixx.
2023-05-03 15:58:12 -07:00
Wayne Warthen
7ac88efac1 Support for VGARC
Initial support for Bill Shen's VGARC video/keyboard module for RCBus.
2023-05-02 19:23:51 -07:00
Wayne Warthen
9f71fe05aa Cleanup IDE and PPIDE drivers
- The use of hardware reset has been improved such that it is generally only used at initial boot up.
- Minor improvements to CF card detection and initialization.
- Implement a simple wait mechanism to accommodate the startup time of the RC2014 SD Pico module.
- Front panel I/O port for SC series of systems has been moved to 0x00 which is consistent with all other systems and avoids some I/O conflicts.
2023-04-30 12:03:16 -07:00
Wayne Warthen
ad3c533145 Fix IDE Detection on Spinning Disks
Prior improvement to IDE device detection broke detection of spinning hard disks.  IDE registers cannot be used prior to device init completion (spin up).  Not a problem for CF, but special steps required to ensure devices are fully initialized before register testing.
2023-04-23 18:47:43 -07:00
Wayne Warthen
e43a939f54 Improve IDE Device Detection
Per issue #343, some systems could initially detect a non-existent IDE device which would cause a long time-out.  This should resolve the issue.
2023-04-21 17:08:18 -07:00
Wayne Warthen
e5b7409f44 Support Per-floppy Device Drive Types
- Floppy devices are now configured per-device so that each floppy drive can be different (e.g., first floppy is 3.5" and second floppy is 5.25").
- Removed need to use termination signal on floppy sector I/O.

Addresses issue #318
2023-04-20 16:24:14 -07:00
Wayne Warthen
9100f199b1 Z80-Retro SD Card Support (Alan Cox) 2023-04-18 11:40:22 -07:00
Wayne Warthen
bcc50a31a9 Fix SIO Ports in Z80R Mode 2023-04-17 19:22:37 -07:00
Wayne Warthen
c891ba2bad Support Z80-Retro Platform
Code provided by Alan Cox
2023-04-16 20:30:16 -07:00
Wayne Warthen
2f9e77ca13 Merge branch 'dev' of https://github.com/wwarthen/RomWBW into dev 2023-04-14 19:05:49 -07:00
Wayne Warthen
f346209c82 Front Panel Switch Support 2023-04-14 19:05:37 -07:00
Wayne Warthen
0742fb6188 Merge pull request #342 from wwarthen/master
Merge pull request #340 from wwarthen/dev
2023-04-14 19:00:02 -07:00
Wayne Warthen
94239866a5 Merge pull request #340 from wwarthen/dev
Dev
2023-04-14 18:29:17 -07:00
Wayne Warthen
2681b84a20 Finalize v3.2.1 2023-04-14 18:10:24 -07:00
Wayne Warthen
b5437c56e9 Suppress Serial HFC During Boot
If serial hardware flow control is enabled, but not working, then a system will appear dead because it won't send any data to the host computer.  This change suppresses hardware flow control during boot just to ensure that boot messages can make it to the serial console.  This will only be effective for serial interfaces that support dynamic management of HFC.
2023-04-11 13:09:22 -07:00
Wayne Warthen
f640630a06 CPU Speed Calc Tweek
- Exit CPU speed detection routine earlier if the clock is not ticking.
- Fix minor regression in the SBC_simh.asm config file.
2023-04-10 16:20:12 -07:00
Wayne Warthen
53e201bd28 Handle Overflow in CPUSPD
Edge case where the CPU speed detection routine would overflow in a fast emulator and return a speed of 0.000 MHz.  Modified to fail back to the default CPU speed from the config file if an overflow occurs.
2023-04-09 12:48:36 -07:00
Wayne Warthen
51d962aeab Finalize v3.2.1 2023-04-07 10:22:46 -07:00
Wayne Warthen
5f36cf9a12 Fix TUNE Delay Factor Handling 2023-04-03 13:44:52 -07:00
Wayne Warthen
d812066f2e Update Z80 Tests
Update Z80 CPU instruction test suite to v1.2.
2023-03-29 15:46:46 -07:00
Wayne Warthen
7563863be2 DOS/65 Refresh
- Refresh WIP files of DOS/65 from Dan Werner
- Another tweak to SURVEY
- Regen PDF docs
2023-03-27 14:44:54 -07:00
Wayne Warthen
9654d487ba Merge pull request #338 from b1ackmai1er/dev
VGMPLAY documentation and YM2151 support
2023-03-27 14:14:14 -07:00
b1ackmai1er
5b339aef3e Update vgmplay.txt 2023-03-27 23:39:26 +08:00
b1ackmai1er
47a7d81bb9 Update Applications.md
Add basic VGMPLAY information
2023-03-27 23:36:24 +08:00
b1ackmai1er
a92c44e53f ym2151 vgm files 2023-03-26 20:43:47 +08:00
b1ackmai1er
cc9f5dd516 Update vgmplay.asm
YM2151 updates
2023-03-26 19:31:52 +08:00
Wayne Warthen
6e34de0e02 Cosmetic
Minor cosmetic changes in source.
2023-03-25 12:05:57 -07:00
Wayne Warthen
5a6d7f853b Update HEXCOM.COM
Renamed HEXCOM.CPM -> HEXCOM.COM.
2023-03-25 11:57:26 -07:00
b1ackmai1er
a646f49866 Merge pull request #52 from wwarthen/dev
Dev
2023-03-24 17:06:35 +08:00
Wayne Warthen
98a33b8b50 CTC & CPU Speed
- Revamped CTC detection algorithm hoping to handle problem XRBR is having
- Fixed typo in dynamic CPU speed test that caused it to not be properly recorded/reported (credit XRBR)
- Allow use of DEL/RUBOUT keys as backspace in ROM Loader and Debug Monitor
2023-03-23 12:54:57 -07:00
Wayne Warthen
8aebaab3fe Fix SURVEY.COM (again)
- Previous fix to SURVEY.COM port survey broke the memory survey.  Everything should be OK now.
- Regenerated documentation.
2023-03-22 16:15:04 -07:00
Wayne Warthen
798d8c3ea3 Merge pull request #337 from wwarthen/master
Sync
2023-03-22 15:58:32 -07:00
Wayne Warthen
bbaf2b0714 Merge pull request #336 from elevendroids/master
Fix default ZETA V2 SBC configuration
2023-03-22 15:57:43 -07:00
Michal Potrzebicz
74a8283bba Fix default ZETA V2 SBC configuration
- Set the default CPUOSC to 8MHz (default value in the project's
  documentation), updated the User Guide
- Set the FDD controller to ZETA2 - regression introduced in bd664c3
2023-03-22 22:37:22 +00:00
Wayne Warthen
e869e55252 Prep v3.2.1 Development Branch 2023-03-21 14:48:28 -07:00
Wayne Warthen
e8a76817dc Merge pull request #335 from wwarthen/master
Catch-up
2023-03-18 20:09:02 -07:00
Wayne Warthen
e839c77844 Merge pull request #332 from wwarthen/dev
Fix Doc URL Path
2023-03-18 19:37:13 -07:00
Wayne Warthen
ada7254b84 Fix Doc URL Path 2023-03-18 19:20:48 -07:00
Wayne Warthen
cd96ea7e26 Merge pull request #331 from wwarthen/dev
Merge Final v3.2
2023-03-18 19:11:38 -07:00
Wayne Warthen
0098540cc9 Finalize 3.2.0 2023-03-18 18:50:46 -07:00
Wayne Warthen
b3e7e2ff62 Doc Updates 2023-03-18 17:57:44 -07:00
Wayne Warthen
582937de8e Merge branch 'dev' of https://github.com/wwarthen/RomWBW into dev 2023-03-18 17:13:01 -07:00
Wayne Warthen
5f5953edd8 Doc Tweaks 2023-03-18 17:12:46 -07:00
Wayne Warthen
50cd6ff955 Merge pull request #330 from b1ackmai1er/dev
Update dma.asm
2023-03-17 17:33:23 -07:00
Wayne Warthen
82c53bd20b Update to Small Computer Z50 Configurations
- Improve adherence to Z50 standard.
2023-03-17 15:53:58 -07:00
b1ackmai1er
0d0f5fb182 Update dma.asm
cp/m fails to boot with the dma driver included but no dma hardware installed. This is because the default "dma_fail_flag" indicates that the dma is good to go. But in safe mode the dma initialization never takes place to find no dma and set this flag, so the memory driver hangs. This change is to make the default status of the flag the failed state so the memory driver will fallback to software in recovery mode.
2023-03-18 02:13:00 +08:00
Wayne Warthen
3773c9c7fa Regen Docs
Regenerate pdf files based on Phil's updates.
2023-03-17 11:04:31 -07:00
Wayne Warthen
b7dc67b9c7 Merge pull request #329 from b1ackmai1er/dev
Update SystemGuide.md
2023-03-17 10:44:52 -07:00
b1ackmai1er
76c4209a5e Update ReadMe.md 2023-03-17 20:49:46 +08:00
b1ackmai1er
76d9a99758 Update SystemGuide.md 2023-03-17 20:15:55 +08:00
b1ackmai1er
1db858027e Update ROM_Applications.md
spelling and grammar
2023-03-17 20:11:14 +08:00
b1ackmai1er
d3fb3710ff Update UserGuide.md 2023-03-17 20:05:57 +08:00
b1ackmai1er
170cecd112 Update UserGuide.md 2023-03-17 20:04:12 +08:00
b1ackmai1er
f469699449 Update UserGuide.md
Spelling
2023-03-17 19:58:46 +08:00
b1ackmai1er
c4ff7315c9 Update Applications.md
Spelling corrections.
2023-03-17 19:20:14 +08:00
b1ackmai1er
ddbd338b6f Update SystemGuide.md
Spelling and grammer fixes
2023-03-17 19:02:38 +08:00
Wayne Warthen
77c6f934dc More Documentation Cleanup 2023-03-16 20:48:49 -07:00
Wayne Warthen
f72bf4e4c5 Documentation Cleanup 2023-03-16 16:23:14 -07:00
Wayne Warthen
dcc6bd2b62 Documentation Cleanup 2023-03-16 16:22:04 -07:00
Wayne Warthen
01fac79902 Merge pull request #328 from b1ackmai1er/dev
Some driver documentation updates and corrections
2023-03-15 10:56:26 -07:00
b1ackmai1er
70d3f54834 Some driver documentation updates and corrections 2023-03-15 20:57:51 +08:00
b1ackmai1er
650dcdb35f Merge pull request #51 from wwarthen/dev
Dev
2023-03-15 20:07:46 +08:00
359 changed files with 96924 additions and 3878 deletions

11
.github/pull_request_template.md vendored Normal file
View File

@@ -0,0 +1,11 @@
<!--
BEFORE YOU CREATE A PULL REQUEST:
- Please base all pull requests against the dev branch
- Include a clear description of your change
- Reference related Issue(s) (e.g., "Resolves Issue #123")
Thank you for contributing to RomWBW! I will review your pull request as soon as possible.
DELETE EVERYTHING IN THIS COMMENT BLOCK AND REPLACE WITH YOUR COMMENTS
-->

View File

@@ -13,16 +13,18 @@ jobs:
runs-on: ubuntu-latest
steps:
- name: Make Slugs
uses: rlespinasse/github-slug-action@v4.4.1
- name: Checkout
uses: actions/checkout@v3.3.0
- name: Get Commit Ref
run: |
COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
echo "COMMIT_REF: $COMMIT_REF"
echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
- name: Build
run: |
export TZ='America/Los_Angeles'
sudo apt-get install libncurses-dev
sudo apt-get install srecord
make dist
rm -rf .git*
@@ -36,19 +38,22 @@ jobs:
- name: Upload Artifact
uses: actions/upload-artifact@v3.1.1
with:
name: RomWBW-${{env.GITHUB_SHA_SHORT}}-Linux
name: RomWBW-${{env.COMMIT_REF}}-Linux
path: .
buildMacOS:
runs-on: macOS-latest
steps:
- name: Make Slugs
uses: rlespinasse/github-slug-action@v4.4.1
- name: Checkout
uses: actions/checkout@v3.3.0
- name: Get Commit Ref
run: |
COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
echo "COMMIT_REF: $COMMIT_REF"
echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
- name: Build
run: |
export TZ='America/Los_Angeles'
@@ -65,5 +70,5 @@ jobs:
- name: Upload Artifact
uses: actions/upload-artifact@v3.1.1
with:
name: RomWBW-${{env.GITHUB_SHA_SHORT}}-MacOS
path: .
name: RomWBW-${{env.COMMIT_REF}}-MacOS
path: .

View File

@@ -14,15 +14,6 @@ jobs:
- name: Checkout
uses: actions/checkout@v3.3.0
- name: Create Package Label
run: |
echo GITHUB_REF: "$GITHUB_REF"
LABEL=`echo "$GITHUB_REF" | sed "s|^refs/tags/||"`
echo "PKGLBL=$LABEL" >> $GITHUB_ENV
echo PKGLBL: "$PKGLBL"
echo Upload URL: "${{github.event.release.upload_url}}"
echo GITHUB_TOKEN: "${{secrets.GITHUB_TOKEN}}"
- name: Build
run: |
export TZ='America/Los_Angeles'
@@ -33,22 +24,37 @@ jobs:
- name: Create Package Archive
run: |
zip -r RomWBW-${{env.PKGLBL}}-Package.zip .
zip -r RomWBW-${{github.ref_name}}-Package.zip .
- name: Set Title
run: |
echo "Tag: ${{github.ref_name}}"
if grep -q "dev" <<< "${{github.ref_name}}"; then
TITLE="RomWBW Development Snapshot"
elif grep -q "pre" <<< "${{github.ref_name}}"; then
TITLE="RomWBW Prerelease"
elif grep -q "rc" <<< "${{github.ref_name}}"; then
TITLE="RomWBW Release Candidate"
else
TITLE="RomWBW"
fi
echo "Title: $TITLE"
echo "TITLE=$TITLE" >>$GITHUB_ENV
- name: Attach Package Archive
uses: wwarthen/actions/packages/automatic-releases@built-packages
with:
repo_token: "${{ secrets.GITHUB_TOKEN }}"
repo_token: "${{secrets.GITHUB_TOKEN}}"
draft: true
prerelease: true
title: "RomWBW Development SnapShot ${{env.PKGLBL}}"
title: "${{env.TITLE}} ${{github.ref_name}}"
files: |
RomWBW-${{env.PKGLBL}}-Package.zip
RomWBW-${{github.ref_name}}-Package.zip
# - name: Upload Package Archive
# uses: AButler/upload-release-assets@v2.0.2
# with:
# repo-token: ${{ secrets.GITHUB_TOKEN }}
# repo-token: ${{secrets.github_token}}
# files: |
# RomWBW-${{env.PKGLBL}}-Package.zip
@@ -57,7 +63,7 @@ jobs:
# uses: docker://antonyurchenko/git-release:latest
# env:
# GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
# RELEASE_NAME_PREFIX: "Development SnapShot Release "
# RELEASE_NAME_PREFIX: "${{env.TITLE}} "
# CHANGELOG_FILE: "none"
# with:
# args: |

View File

@@ -1,173 +0,0 @@
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Binary") is part of the RomWBW System Software
distribution archive. Refer to the ReadMe.txt file in this
directory for more information on the overall contents of the
directory.
RomWBW includes a set of disk images that are ready to copy onto
a floppy or hard/CF/SD disk. You can use your modern computer
(Windows/Linux/Mac) to copy the disk image file onto your disk
media. The disk media will then be ready to use in your RomWBW
System.
WARNING: The hdnew_*.img disk images are part of a new disk
format that is a work in progress. Do not use these disk
images without knowing exactly what you are doing! The
hd_*.img disk images continue to be the images you should
be using under normal circumstances.
A description of the disk images is provided later in this file.
For more information on the creatioin of these images including
instructions for customizing them or creating your own, refer to
the ReadMe.txt file in the Source\Images directory.
Installing Images
-----------------
The following instructions apply to Windows computers. Alternatively,
you can use the "dd" command on Linux or Mac.
First of all, a MAJOR WARNING!!!! The tools described below are
quite capable of obliterating your running Windows system drive. Use
with extreme caution and make sure you have backups.
To install a floppy image on floppy media, you can use the tool
called RaWriteWin. This tool is included in the Tools directory of
the distribution. This tool will write your floppy image (fd_xxx.img)
to a floppy disk using a raw block transfer. The tool is GUI based
and it's operation is self explanatory.
To install a hard disk image on a CF card or SD card, you must have
the appropriate media card slot on your computer. If you do, you can
use the tool called Win32DiskImager. This tool is also included in
the Tools directory of the distribution. It will write your
hard disk image (hd_xxx.img) to the designated media card. This tool
is also GUI based and self explanatory.
The use of the SIMH emulator is outside of the scope of this document.
However, if you use SIMH, you will find that you can attach the hard
disk images to the emulator with lines such as the following in your
SIMH configuration file:
| attach hdsk0 hd_cpm22.img
| set hdsk0 format=HDSK
| set hdsk0 geom=T:2048/N:256/S:512
| set hdsk0 wrtenb
Making Disk Images Bootable
---------------------------
The Operating System disk images below are ready to boot by the
RomWBW Boot Loader. However, if you update your RomWBW ROM, then
you should also update the system tracks of your bootable disk
images. You would use SYSCOPY to do this. SYSCOPY can also be
used to make a disk bootable if it is not already bootable.
You would use a command like the following to make drive C bootable:
| B>SYSCOPY C:=CPM.SYS
The system file to use depends on the operating system you are trying
to boot from the slice you are initializing with SYSCOPY:
CP/M 2.2 - cpm.sys
ZSDOS 1.1 - zsys.sys
CP/M 3 - cpmldr.sys
ZPM3 - cpmldr.sys
Slices
------
A RomWBW CP/M filesystem is fixed at 8MB. This is because it is the
largest size filesystem supported by all common CP/M variants. Since
all modern hard disks (including SD Cards and CF Cards) are much
larger than 8MB, RomWBW supports the concept of "slices". This
simply means that you can concatenate multiple CP/M filesystems (up
to 256 of them) on a single physical hard disk and RomWBW will allow
you to assign drive letters to them and treat them as multiple
independent CP/M drives.
With the exception of the hd_combo image, each of the disk images
includes a single CP/M file system (i.e., a single slice). However,
you can easily create a multi-slice disk image by merely concatenating
multiple images together. For example, if you wanted to create a 2
slice disk image that has ZSDOS in the first slice and Wordstar in
the second slice, you could use the following command from a Windows
command prompt:
| C:\RomWBW\Binary>copy /b hd_zsdos.img + hd_ws.img hd_multi.img
You can now write hd_multi.img onto your SD or CF Card and you will
have ZSDOS in the first slice and Wordstar in the second slice.
The hd_combo disk image is an example of this. It contains several
slices in one image file. The contents of this special disk image
are described below.
The concept of slices applies ONLY to hard disks. Floppy disks are
not large enough to support multiple slices.
Disk Image Contents
-------------------
What follows is a brief description of the contents of the
disk images automatically provided in the RomWBW distribution.
Note that all of the OS images include the RomWBW custom
support apps.
cpm22 - DRI CP/M 2.2 (Bootable Floppy and Hard Disk)
Standard DRI CP/M 2.2 distribution files along with a few commonly
used utilities.
zsdos - ZCPR1 + ZSDOS 1.1 (Bootable Floppy and Hard Disk)
Contains ZCPR1 and ZSDOS 1.1. This is roughly equivalent to the
ROM boot contents, but provides a full set of the applications
and related files that would not all fit on the ROM drive.
nzcom - NZCOM (Bootable Floppy and Hard Disk)
Standard NZCOM distribution. Note that you will need to run the
NZCOM setup before this will run properly. You will need
to refer to the NZCOM documentation.
cpm3 - DRI CP/M3 (Bootable Floppy and Hard Disk)
Standard DRI CP/M 3 adaptation for RomWBW that is ready to run.
It can be started by running CPMLDR.
zpm3 - ZPM3 (Bootable Floppy and Hard Disk)
Simeon Cran's ZCPR 3 compatible OS for CP/M 3 adapted for RomWBW and
ready to run. It can be started by running CPMLDR (which seems
wrong, but ZPMLDR is somewhat broken).
ws4 - WordStar 4 (Floppy and Hard Disk)
Micropro Wordstar 4 full distribution. This image is not bootable
and is intended to be added as an additional slice to an OS image.
bp - BPBIOS (Hard Disk only)
Adaptation of BPBIOS for RomWBW. This is NOT complete and NOT
useable in it's current state.
combo - Multi-Boot Combination (Bootable Hard Disk)
A pre-created combo image that contains the following slices. The
slices are identical to the individual images listed above.
Slice 0: cpm22 (bootable)
Slice 1: zsdos (bootable)
Slice 2: nzcom (bootable)
Slice 3: cpm3 (bootable)
Slice 4: zpm3 (bootable)
Slice 5: ws4 (not bootable)

View File

@@ -49,7 +49,7 @@ The files with a ".upd" extension are binary images identical to the
.rom files, but they only have the first 128K bytes. The first 128K
is the system image without the ROM disk contents. These files can be
used to update the system image without modifying the ROM disk
contents. Refer to the Getting Started document for more information.
contents. Refer to the RomWBW User Guide for more information.
ROM Executable Images (<plt>_<cfg>.com)
---------------------------------------

Binary file not shown.

View File

@@ -1,3 +1,30 @@
Version 3.3
-----------
- WBW: Support Front Panel switches
- A?C: Preliminary support for Z80-Retro
- A?C: Support for SD PIO
- A?C: Support for Z80-Retro SD interface
- WBW: Support per-drive floppy configuration
- WBW: Support for Bill Shen's VGARC
- WBW: Support for MG014 Parallel Port module + printer
- WBW: Support for EMM Zip Drive on PPI interface (much inspiration from Alan Cox)
- WBW: Support for PPA Zip Drive on PPI interface (much inspiration from Alan Cox)
- WBW: Support for SyQuest SparQ Drive on PPI interface (much inspiration from Alan Cox)
- WBW: Support for ATAPI Disk Drives (not CD-ROMs) on IDE and PPIDE interfaces
- R?P: Added new disk images: Aztec C, MS BASIC Compiler, MS Fortran, Games, HiTech-C, Turbo Pascal, SLR Z80ASM
Version 3.2.1
-------------
- M?P: Fixed Zeta 2 FDD and CPUSPD config settings
- WBW: Fixed SURVEY.COM (again)
- DDW: Updates to DOS/65 binaries in disk images
- PMS: Updates to VGMPLAY including support for YM2151
- WBW: Fix for quark delay adjustment being trashed
Version 3.2
-----------
- WBW: Version bump for release
Version 3.1.1
-------------
- WBW: Version bumped due to pervasive changes

File diff suppressed because it is too large Load Diff

File diff suppressed because one or more lines are too long

View File

@@ -6,17 +6,37 @@
*** ***
***********************************************************************
This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
the system.
ChangeLog.txt
-------------
Log of changes in RomWBW by version.
RomWBW User Guide ("RomWBW User Guide.pdf")
RomWBW System Guide ("RomWBW System Guide.pdf")
RomWBW Applications ("RomWBW Applications.pdf")
RomWBW ROM Applications ("RomWBW ROM Applications.pdf")
RomWBW Disk Catalog ("RomWBW Disk Catalog.pdf")
RomWBW Errata ("RomWBW Errata.pdf")
-------------------------------------------------------
Documentation set for RomWBW. The primary document is the
User Guide. The System Guide explains internal system operation
and has a reference for the HBIOS API. Use of included tools
and utilities are detailed in the Applications and
ROM Applications documents.
CPM Manual ("CPM Manual.pdf")
-----------------------------
The original DRI CP/M 2.x Operating System Manual. This should be
considered the primary reference for system operation. The section
on CP/M 2 Alteration can be ignored since this work has already been
The original DRI CP/M 2.x Operating System Manual. This should be
considered the primary reference for system operation. The section
on CP/M 2 Alteration can be ignored since this work has already been
completed as part of the RomWBW distribution.
@@ -39,16 +59,10 @@ Manual for the DDTZ v2.7 debug tool included on the ROM drive.
FDisk Manual ("FDisk Manual.pdf")
---------------------------------
The operational manual for John Coffman's hard disk partitioning
The operational manual for John Coffman's hard disk partitioning
program. This program is included in RomWBW as FDISK80.
Floppy Disk Utility Documentation ("FDU.tst")
---------------------------------------------
Operational documentation for the RomWBW FDU application.
Hard Disk Anatomy ("Hard Disk Anatomy.pdf")
-------------------------------------------
@@ -61,17 +75,46 @@ NZCOM User's Manual ("NZCOM Users Manual.pdf")
NZCOM operating system operation manual.
RomWBW Architecture ("RomWBW Architecture.pdf")
-----------------------------------------------
ZCPR Manual ("ZCPR Manual.pdf")
-------------------------------
Document describing the architecture of the RomWBW HBIOS. It
includes reference information for the HBIOS calls.
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
ROM Applications ("ROM Applications.pdf")
-----------------------------------------
ZCPR D&J Manual ("ZCPR-DJ.doc")
-------------------------------
Breif instructions for the ROM based applications included in
in the boot ROM.
ZCPR D&J User Manual. This manual supplements the ZCPR Manual.
ZSDOS Manual ("ZSDOS Manual.pdf")
---------------------------------
ZSDOS is the DOS portion of Z-System. This is the manual for ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.
Microsoft Basic-80 Reference Manual v5.0 (Microsoft Basic-80 Reference Manual v5.0.pdf)
---------------------------------------------------------------------------------------
Official manual for Microsoft BASIC as included in RomWBW.
QP/M 2.7 Installation Guide and Supplements ("qpm27.pdf")
QP/M 2.7 Interface Guide ("qdos27.pdf")
QP/M 2.7 Features and Facilities ("qcp27.pdf")
--------------------------------------------
Official documentation set for QP/M 2.7 from original QP/M distribution.
SIO+CTC Baud Rate Options (SIO+CTC Baud Rate Options.pdf)
---------------------------------------------------------
Documents possible baud rates available based on different baud
clock rates for Zilog SIO using CTC for baud rate clock generation.
Z180 ASCI Baud Rate Options ("Z180 ASCI Baud Rate Options.pdf")
@@ -83,19 +126,43 @@ clock rate. This document provides a list of the possible
baud rates for typical CPU clock rates.
ZCPR Manual ("ZCPR Manual.pdf")
-------------------------------
UCSD p-System Users Manual ("UCSD p-System Users Manual.pdf")
-------------------------------------------------------------
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
Official user manual for p-System operating system included with
RomWBW.
ZSDOS Manual ("ZSDOS Manual.pdf")
---------------------------------
Z80 Assembler User Manual (z80asm (SLR Systems).pdf)
----------------------------------------------------
ZSDOS is the DOS portion of Z-System. This is the manual fo ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.
Official user manual for the Z80 Macro Assembler by SLR Systems
included in the z80asm disk image.
HI-TECH C Compiler User Manual (HI-TECH Z80 C Compiler Manual.txt)
------------------------------------------------------------------
Official user manual for the HI-TECH C Compiler included in the
hitechc disk image.
Borland TurboPascal User Manual (Turbo_Pascal_Version_3.0_Reference_Manual_1986.pdf)
------------------------------------------------------------------------------------
Official user manual Borland TurboPascal included in the pascal disk image.
Aztec C Compiler User Manual (Aztec_C_1.06_User_Manual_Mar84.pdf)
-----------------------------------------------------------------
Official user manual for the Aztec C Compiler included in the aztecc disk image.
FORTRAN-80 User Manual (Microsoft_FORTRAN-80_Users_Manual_1977.pdf)
---------------------------------------------------------------
Official user manual for Microsoft's FORTRAN-80 compiler included in the fortran
disk image.
--WBW 5:18 PM 6/14/2023

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

View File

@@ -40,7 +40,7 @@ N8-2312 (X)
- Test FDU app
- Test TMS driver (video & kbd)
N8-2511 ( )
N8-2511 (X)
-------
- Test ASCI driver
- Test SD driver (Juha mode)
@@ -139,27 +139,6 @@ GENERAL (X)
- ASSIGN app
- MODE app
- SYSCOPY app
- OSLDR app
- FDU app
- FDISK80 app
- TUNE app
RESULTS
-------
- Missing HBIOS startup banner (X)
- PANIC while printing Serial device inventory (X)
- Unexpected interrupt signals not handled well (X)
- Fix IT_??? usage (X)
- Fix HB_DI/HB_EI in PEEK/POKE/BNKCPY (X)
- Fix SIMH timer interrupt setup (X)
- Move DI/EI in PEEK/POKE/BNKCPY to API layer? (X)
- RETI vs. JP in page zero when INTMODE = 0 (X)
- Check interrupt stack space (X)
- If an early INT fires, we return with INTs enabled (not good) (X)
- PPPCON init should display ANSI 80x25 or similar (X)
- Add INT MODE X message to early boot messages (X)
- OSLDR fails when LDDS is loaded (X)
- Add "!!!" to force assembly error as needed ( )
- TIMER app should check for HBIOS active (X)
- Halt system after bad interrupt??? ( )
- Adapt and bundle PLAYER.COM (X)

File diff suppressed because one or more lines are too long

Binary file not shown.

Binary file not shown.

View File

@@ -1,9 +1,9 @@
**RomWBW ReadMe** \
Version 3.2 \
Version 3.3 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
05 Mar 2023
28 Jun 2023
# Overview
@@ -128,8 +128,8 @@ contributions. The list below is probably missing many names please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his code can still
be found in RomWBW.
became the first platform RomWBW supported. Some of his original code
can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and advice.
@@ -140,23 +140,30 @@ let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW including
the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included SD
Card driver.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
- Spencer Owen created the RC2014 series of hobbyist kit computers which
has exponentially increased RomWBW usage.
has exponentially increased RomWBW usage. Some of his kits include
RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
@@ -176,6 +183,10 @@ let me know if I missed you!
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images including
Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
Microsoft Fortran Compiler, and a Games compendium.
Contributions of all kinds to RomWBW are very welcome.
# Licensing
@@ -197,14 +208,15 @@ Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen wwarthen@gmail.com
> Wayne Warthen
> <wwarthen@gmail.com>
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is

View File

@@ -1,6 +1,6 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
05 Mar 2023
28 Jun 2023
@@ -129,8 +129,8 @@ contributions. The list below is probably missing many names please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his code can
still be found in RomWBW.
became the first platform RomWBW supported. Some of his original
code can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
@@ -142,23 +142,30 @@ let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included
SD Card driver.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
- Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage.
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
@@ -178,6 +185,10 @@ let me know if I missed you!
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games compendium.
Contributions of all kinds to RomWBW are very welcome.
@@ -202,14 +213,15 @@ Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
Wayne Warthen wwarthen@gmail.com
Wayne Warthen
wwarthen@gmail.com
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is

View File

@@ -15,6 +15,13 @@
;
;VERSION LIST - Most recent version first.
;
;21/Mar/23 - Previous hack was worthless because it broke
; the memory survey. Rehacked to use HBIOS to
; detect if N8VEM SBC MPCL memory management is
; in use and bypass MPCL ports if so. HBIOS check
; should allow use in non-RomWBW systems again.
; Wayne Warthen
;
;10/Feb/23 - Total hack to avoid crash on ECB SBC
; RomWBW now required by this version
; Wayne Warthen
@@ -240,20 +247,6 @@ TABS EQU 9 ; Tab columns
;
;ORG 100H
;
;
;
.Z80
LD HL,IMGORG
LD DE,START
LD BC,IMGEND-IMGORG
LDIR
JP START
.8080
;
IMGORG:
;
.PHASE 8000H
;
START:
LXI H,0 ; Save stack pointer
DAD SP
@@ -261,9 +254,38 @@ START:
LXI SP,FINIS+64
CALL TYPE ; Type initial CRLF
DW CRLF,CRLF
DB TAB,'*** RomWBW System Survey (Feb 2023) ***'
DB TAB,'*** RomWBW System Survey (Mar 2023) ***'
DW CRLF,CRLFE
;
; Are we running an N8VEM SBC w/ MPCL on RomWBW???
;
.Z80
XOR A ; assume not
LD (ISMPCL),A ; save it
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,NOTMPCL ; Not HBIOS
INC HL ; Next byte of ident
LD A,NOT 'W' ; Second byte of ident
CP (HL) ; Compare
JR NZ,NOTMPCL ; Not HBIOS
;
LD B,0F1H ; HBIOS: VER function
LD C,0 ; required reserved value
RST 08 ; DE := version, L := platform id
LD A,L ; Platform ID
CP 01H ; SBC?
JR NZ,NOTMPCL ; Not SBC
LD A,0FFH ; Flag
LD (ISMPCL),A ; Set flag
;
.8080
;
NOTMPCL:
;
;DISK SURVEY
LXI H,8 ; Init drive counter
MVI C,24 ; Get login vector
@@ -445,20 +467,19 @@ MSURV:
ENDM
DB '|'
DW CRLF
db ' ' ; dmb 31-May-82
DB 'T'+EOL
DB 'TT','T'+EOL
LXI H,RAM
MVI M,LOW 1023 ; Init RAM counter
MVI M,LOW 2047 ; Init RAM counter
INX H
MVI M,HIGH 1023
MVI M,HIGH 2047
MVI B,4 ; Clear ROM, EMP
CLREG:
INX H
MVI M,0
DCR B
JNZ CLREG
LXI H,1024 ; Init memory pointer
MVI C,63 ; K to be checked
LXI H,2048 ; Init memory pointer
MVI C,62 ; K to be checked
;Start of analysis loop
BEGANA:
@@ -492,7 +513,7 @@ NOTEM:
INXI ROM
NEXT:
INX H ; Index next byte
DCX D ; Decrement K counter
DCX D ; DEC DE; Decrement K counter
XRA A
ORA D
ORA E
@@ -545,8 +566,19 @@ NEXTK:
; contents of first page
call type
db 'BIOS at',' '+eol
hexout bios+2
hexout bios+1
;hexout bios+2
;hexout bios+1
.z80
ld hl,(bios+1)
ld de,-3
add hl,de
push hl
ld a,h
call hexprn
pop hl
ld a,l
call hexprn
.8080
call type
db tab,'iobyte',' '+eol
hexout bios+3
@@ -555,8 +587,19 @@ NEXTK:
hexout bios+4
call type
db tab,'BDOS at',' '+eol
hexout bdos+2
hexout bdos+1
;hexout bdos+2
;hexout bdos+1
.z80
ld hl,(bdos+1)
ld de,-6
add hl,de
push hl
ld a,h
call hexprn
pop hl
ld a,l
call hexprn
.8080
call type
dw crlf,crlfe
;
@@ -572,6 +615,8 @@ NEXTK:
CALL TYPE
DB ' Bytes ROM',TAB,TAB+EOL
LHLD BDOS+1
LXI D,-6
DAD D
CALL BINDEC
CALL TYPE
DB ' Bytes in TPA'
@@ -607,9 +652,6 @@ PDLY:
JNZ PDLY
;
.Z80
; record the active bank
ld a,(0ffe0h) ; get current hbios bank id
ld (BANK),a ; and save it
; Check for Z180 CPU
xor a ; assume Z80
ld (IS180),a ; save it
@@ -635,6 +677,17 @@ PORTLP:
ENDIF
;
.Z80
;
ld a,(ISMPCL) ; MPCL?
or a ; set flags
jr z,PCONT ; if not, skip ahead
ld a,d ; get port to test
and 0F8H ; range of 8 ports
cp 078H ; starting at 78H
jr z,ISPORT ; if in range, assume real port
;
PCONT:
di ; interrupts off
ld a,(IS180) ; Z180?
or a
@@ -679,11 +732,6 @@ pnum1b equ $-1
push af
;
rdz:
; Make sure correct bank is still selected!
push af
ld a,(BANK)
call 0FFF3H
pop af
;
ei ; interrupts back on now
;
@@ -818,13 +866,9 @@ RAMF: DS 1 ; RAM good flag
EMPF: DS 1 ; Empty so far flag
BLKSHF: DS 1 ; block shift factor
MAXALL: DS 2 ; maximum block number
BANK: DS 1 ; saved HBIOS bank id
IS180: DS 1 ; non-zero for Z180 CPU
ISMPCL: DS 1 ; non-zero for N8VEM SBC MPCL
FINIS EQU $ ; End of program
;
.DEPHASE
;
IMGEND:
;
END


View File

@@ -45,6 +45,7 @@
; 2021-08-13 [WBW] Add support for LiNC Z50 Sound Card
; 2021-08-17 [WBW] When playing via HBIOS, call BF_SNDRESET at end
; 2022-03-20 [DDW] Add support for MBC PSG module
; 2023-03-30 [WBW] Fix for quark delay adjustment being trashed
;_______________________________________________________________________________
;
; ToDo:
@@ -301,6 +302,11 @@ GOPT3 LD A,0 ; SETUP value to PT3 sound files
JR GOPTX ; Play PTx file
GOPTX
LD HL,(QDLY) ; Get basic quark delay
OR A ; Clear carry
SBC HL,DE ; Adjust for file type
LD (QDLY),HL ; Save updated quark delay factor
CALL CRLF2
LD DE, MSGSONGNAME ; Print song name message
CALL PRTSTR
@@ -322,10 +328,6 @@ GOPTX2 LD A,(DE)
CALL CRLF2 ; Formatting
LD DE,MSGPLY ; Playing message
CALL PRTSTR ; Print message
LD HL,(QDLY) ; Get basic quark delay
OR A ; Clear carry
SBC HL,DE ; Adjust for file type
LD (QDLY),HL ; Save updated quark delay factor
CALL START ; Do initialization
PTXLP CALL START+5 ; Play one quark
LD A,(START+10) ; Get setup byte
@@ -655,8 +657,8 @@ TMP .DB 0 ; work around use of undocumented Z80
HBIOSMD .DB 0 ; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE
OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN
MSGBAN .DB "Tune Player for RomWBW v3.5, 20-Mar-2022",0
MSGUSE .DB "Copyright (C) 2021, Wayne Warthen, GNU GPL v3",13,10
MSGBAN .DB "Tune Player for RomWBW v3.5a, 30-Mar-2023",0
MSGUSE .DB "Copyright (C) 2023, Wayne Warthen, GNU GPL v3",13,10
.DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
.DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10
.DB "Usage: TUNE <filename>.[PT2|PT3|MYM] [--hbios] [+tn|-tn]",0

Binary file not shown.

Binary file not shown.

View File

@@ -12,14 +12,12 @@
; default file type, basic file size checking, polled CTC mode
; added by Phil Summers
;
; Bugs: YM2151 playback untested & no mute.
; CTC polled timing - predicted 44100 divider is too slow
; Bugs: CTC polled timing - predicted 44100 divider is too slow
;
; Assemble with:
;
; TASM -80 -b VGMPLAY.ASM VGMPLAY.COM
;
;
; A VGM file can play 44100 samples a second. This may be sound chip
; register commands or PCM data. This player does not support PCM playback
; due to the high processor speed and file size required. Typical VGM files
@@ -31,60 +29,59 @@
; Device and system specific definitions
;------------------------------------------------------------------------------
;
custom .equ 0 ; System configurations
custom .equ 0 ; System configurations
P8X180 .equ 1
RCBUS .equ 2
sbcecb .equ 3
sbcecb .equ 3
MBC .equ 4
;
plt_romwbw .equ 1 ; Build for ROMWBW?
plt_type .equ sbcecb ; Select build configuration
debug .equ 0 ; Display port, register, config info
plt_romwbw .equ 1 ; Build for ROMWBW?
plt_type .equ sbcecb ; Select build configuration
debug .equ 0 ; Display port, register, config info
;
;------------------------------------------------------------------------------
; Platform specific definitions. If building for ROMWBW, these may be overridden
;------------------------------------------------------------------------------
#IF (plt_type=custom)
RSEL .equ 09AH ; Primary AY-3-8910 Register selection
RDAT .equ 09BH ; Primary AY-3-8910 Register data
RSEL2 .equ 88H ; Secondary AY-3-8910 Register selection
RDAT2 .equ 89H ; Secondary AY-3-8910 Register data
RSEL .equ 09AH ; Primary AY-3-8910 Register selection
RDAT .equ 09BH ; Primary AY-3-8910 Register data
RSEL2 .equ 88H ; Secondary AY-3-8910 Register selection
RDAT2 .equ 89H ; Secondary AY-3-8910 Register data
VGMBASE .equ $C0
YMSEL .equ VGMBASE+00H ; Primary YM2162 11000000 a1=0 a0=0
YMDAT .equ VGMBASE+01H ; Primary YM2162 11000001 a1=0 a0=1
YM2SEL .equ VGMBASE+02H ; Secondary YM2162 11000010 a1=1 a0=0
YM2DAT .equ VGMBASE+03H ; Secondary YM2162 11000011 a1=1 a0=1
PSG1REG .equ VGMBASE+08H ; Primary SN76489
PSG2REG .equ VGMBASE+09H ; Secondary SN76489
ctcbase .equ VGMBASE+0CH ; CTC base address
YM2151_SEL1 .equ 0FEH ; Primary YM2151 register selection
YM2151_DAT1 .equ 0FFH ; Primary YM2151 register data
YM2151_SEL2 .equ 0FEH ; Secondary YM2151 register selection
YM2151_DAT2 .equ 0FFH ; Secondary YM2151 register data
plt_cpuspd .equ 6;000000 ; Non ROMWBW cpu speed default
FRAME_DLY .equ 10 ; Frame delay (~ 1/44100)
YMSEL .equ VGMBASE+00H ; Primary YM2162 11000000 a1=0 a0=0
YMDAT .equ VGMBASE+01H ; Primary YM2162 11000001 a1=0 a0=1
YM2SEL .equ VGMBASE+02H ; Secondary YM2162 11000010 a1=1 a0=0
YM2DAT .equ VGMBASE+03H ; Secondary YM2162 11000011 a1=1 a0=1
PSG1REG .equ VGMBASE+04H ; Primary SN76489
PSG2REG .equ VGMBASE+05H ; Secondary SN76489
YM2151_SEL1 .equ VGMBASE+08H ; Primary YM2151 register selection
YM2151_DAT1 .equ VGMBASE+09H ; Primary YM2151 register data
YM2151_SEL2 .equ VGMBASE+0AH ; Secondary YM2151 register selection
YM2151_DAT2 .equ VGMBASE+0BH ; Secondary YM2151 register data
ctcbase .equ VGMBASE+0CH ; CTC base address
plt_cpuspd .equ 6;000000 ; Non ROMWBW cpu speed default
FRAME_DLY .equ 10 ; Frame delay (~ 1/44100)
#ENDIF
;
#IF (plt_type=P8X180)
RSEL .equ 82H ; Primary AY-3-8910 Register selection
RDAT .equ 83H ; Primary AY-3-8910 Register data
RSEL2 .equ 88H ; Secondary AY-3-8910 Register selection
RDAT2 .equ 89H ; Secondary AY-3-8910 Register data
PSG1REG .equ 84H ; Primary SN76489
PSG2REG .equ 8AH ; Secondary SN76489
YM2151_SEL1 .equ 0B0H ; Primary YM2151 register selection
YM2151_DAT1 .equ 0B1H ; Primary YM2151 register data
YM2151_SEL2 .equ 0B2H ; Secondary YM2151 register selection
YM2151_DAT2 .equ 0B3H ; Secondary YM2151 register data
ctcbase .equ 000H ; CTC base address
YMSEL .equ 000H ; Primary YM2162 11000000 a1=0 a0=0
YMDAT .equ 000H ; Primary YM2162 11000001 a1=0 a0=1
YM2SEL .equ 000H ; Secondary YM2162 11000010 a1=1 a0=0
YM2DAT .equ 000H ; Secondary YM2162 11000011 a1=1 a0=1
FRAME_DLY .equ 48 ; Frame delay (~ 1/44100)
plt_cpuspd .equ 20 ; Non ROMWBW cpu speed default
RSEL .equ 82H ; Primary AY-3-8910 Register selection
RDAT .equ 83H ; Primary AY-3-8910 Register data
RSEL2 .equ 88H ; Secondary AY-3-8910 Register selection
RDAT2 .equ 89H ; Secondary AY-3-8910 Register data
PSG1REG .equ 84H ; Primary SN76489
PSG2REG .equ 8AH ; Secondary SN76489
YM2151_SEL1 .equ 0B0H ; Primary YM2151 register selection
YM2151_DAT1 .equ 0B1H ; Primary YM2151 register data
YM2151_SEL2 .equ 0B2H ; Secondary YM2151 register selection
YM2151_DAT2 .equ 0B3H ; Secondary YM2151 register data
ctcbase .equ 000H ; CTC base address
YMSEL .equ 000H ; Primary YM2162 11000000 a1=0 a0=0
YMDAT .equ 000H ; Primary YM2162 11000001 a1=0 a0=1
YM2SEL .equ 000H ; Secondary YM2162 11000010 a1=1 a0=0
YM2DAT .equ 000H ; Secondary YM2162 11000011 a1=1 a0=1
FRAME_DLY .equ 48 ; Frame delay (~ 1/44100)
plt_cpuspd .equ 20 ; Non ROMWBW cpu speed default
#ENDIF
;
#IF (plt_type=RCBUS)
@@ -103,7 +100,7 @@ YMSEL .equ 000H ; UNDEFINED ; Primary YM2162 11000000 a1=0 a0=0
YMDAT .equ 000H ; UNDEFINED ; Primary YM2162 11000001 a1=0 a0=1
YM2SEL .equ 000H ; UNDEFINED ; Secondary YM2162 11000010 a1=1 a0=0
YM2DAT .equ 000H ; UNDEFINED ; Secondary YM2162 11000011 a1=1 a0=1
plt_cpuspd .equ 7;372800 ; CPUOSC ; Non ROMWBW cpu speed default
plt_cpuspd .equ 7;372800 ; CPUOSC ; Non ROMWBW cpu speed default
FRAME_DLY .equ 12 ; Frame delay (~ 1/44100)
#ENDIF
;
@@ -184,7 +181,7 @@ RTCIO .equ 070H
; YM2162 Register write macros - with wait and timeout
;------------------------------------------------------------------------------
;
#DEFINE setreg(reg,val) \
#DEFINE s2612reg(reg,val) \
#DEFCONT \ ld a,reg
#DEFCONT \ out (YMSEL),a
#DEFCONT \ ld a,val
@@ -195,7 +192,7 @@ RTCIO .equ 070H
#DEFCONT \ jp nc,$+5
#DEFCONT \ djnz $-6
;
#DEFINE setreg2(reg,val) \
#DEFINE s2612reg2(reg,val) \
#DEFCONT \ ld a,reg
#DEFCONT \ out (YM2SEL),a
#DEFCONT \ ld a,val
@@ -205,9 +202,30 @@ RTCIO .equ 070H
#DEFCONT \ rlca
#DEFCONT \ jp nc,$+5
#DEFCONT \ djnz $-6
;
;------------------------------------------------------------------------------
; VGM Codes - see vgmrips.net/wiki/VGM_specification
; YM2151 Register write macros - with wait and timeout
;------------------------------------------------------------------------------
;
; Status Byte: Bit
; 7 Busy Flag (1=Busy)
; 6-2 Not Used
; 1 Timer B Overflow (0=No Overflow, 1=Overflow)
; 0 Timer A Overflow (0=No Overflow, 1=Overflow)
;
#DEFINE s2151reg(reg,val) \
#DEFCONT \ ld a,reg
#DEFCONT \ out (YM2151_SEL1),a
#DEFCONT \ ld a,val
#DEFCONT \ out (YM2151_DAT1),a
#DEFCONT \ ld b,0
#DEFCONT \ in a,(YM2151_SEL1)
#DEFCONT \ rlca
#DEFCONT \ jp nc,$+5
#DEFCONT \ djnz $-6
;
;------------------------------------------------------------------------------
; VGM Codes - see vgmrips.net/wiki/VGM_Specification
;------------------------------------------------------------------------------
VGM_GG_W .equ 04FH ; GAME GEAR PSG STEREO. WRITE DD TO PORT 0X06
@@ -219,8 +237,8 @@ VGM_WNS .equ 061H ; WAIT N SAMPLES
VGM_W735 .equ 062H ; WAIT 735 SAMPLES (1/60TH SECOND)
VGM_W882 .equ 063H ; WAIT 882 SAMPLES (1/50TH SECOND)
VGM_ESD .equ 066H ; END OF SOUND DATA
VGM_YM21511_W .equ 054H ; YM2612 #1 WRITE VALUE DD
VGM_YM21512_W .equ 0A4H ; YM2612 #2 WRITE VALUE DD
VGM_YM21511_W .equ 054H ; YM2151 #1 WRITE VALUE DD
VGM_YM21512_W .equ 0A4H ; YM2151 #2 WRITE VALUE DD
;------------------------------------------------------------------------------
; Generic CP/M definitions
@@ -490,7 +508,7 @@ YM2162_2 CP VGM_YM26122_W
; YM2151 SECTION
;
YM2151_1 CP VGM_YM21511_W
JR NZ,YM2151_2
JR NZ,YM2151_2
LD A,(HL)
OUT (YM2151_SEL1),A
INC HL
@@ -759,252 +777,254 @@ SKIP1: LD A,(IX+0)
XOR A
OUT (RDAT), A
OUT (RDAT2), A
#IFDEF SBCV2004
CALL FASTIO
#ENDIF
SKIP2: LD A,(IX+0) ; mute all channels on ym2612
AND %00110000
JP Z,SKIP3
setreg($22,$00) ; lfo off
s2612reg($22,$00) ; lfo off
setreg($27,$00) ; Disable independant Channel 3
setreg($28,$00) ; note off ch 1
setreg($28,$01) ; note off ch 2
setreg($28,$02) ; note off ch 3
setreg($28,$04) ; note off ch 4
setreg($28,$05) ; note off ch 5
setreg($28,$06) ; note off ch 6
setreg($2b,$00) ; dac off
s2612reg($27,$00) ; Disable independant Channel 3
s2612reg($28,$00) ; note off ch 1
s2612reg($28,$01) ; note off ch 2
s2612reg($28,$02) ; note off ch 3
s2612reg($28,$04) ; note off ch 4
s2612reg($28,$05) ; note off ch 5
s2612reg($28,$06) ; note off ch 6
s2612reg($2b,$00) ; dac off
setreg($b4,$00) ; sound off ch 1-3
setreg($b5,$00)
setreg($b6,$00)
setreg2($b4,$00) ; sound off ch 4-6
setreg2($b5,$00)
setreg2($b6,$00)
s2612reg($b4,$00) ; sound off ch 1-3
s2612reg($b5,$00)
s2612reg($b6,$00)
s2612reg2($b4,$00) ; sound off ch 4-6
s2612reg2($b5,$00)
s2612reg2($b6,$00)
setreg($40,$7f) ; ch 1-3 total level minimum
setreg($41,$7f)
setreg($42,$7f)
setreg($44,$7f)
setreg($45,$7f)
setreg($46,$7f)
setreg($48,$7f)
setreg($49,$7f)
setreg($4a,$7f)
setreg($4c,$7f)
setreg($4d,$7f)
setreg($4e,$7f)
s2612reg($40,$7f) ; ch 1-3 total level minimum
s2612reg($41,$7f)
s2612reg($42,$7f)
s2612reg($44,$7f)
s2612reg($45,$7f)
s2612reg($46,$7f)
s2612reg($48,$7f)
s2612reg($49,$7f)
s2612reg($4a,$7f)
s2612reg($4c,$7f)
s2612reg($4d,$7f)
s2612reg($4e,$7f)
setreg2($40,$7f) ; ch 4-6 total level minimum
setreg2($41,$7f)
setreg2($42,$7f)
setreg2($44,$7f)
setreg2($45,$7f)
setreg2($46,$7f)
setreg2($48,$7f)
setreg2($49,$7f)
setreg2($4a,$7f)
setreg2($4c,$7f)
setreg2($4d,$7f)
setreg2($4e,$7f)
s2612reg2($40,$7f) ; ch 4-6 total level minimum
s2612reg2($41,$7f)
s2612reg2($42,$7f)
s2612reg2($44,$7f)
s2612reg2($45,$7f)
s2612reg2($46,$7f)
s2612reg2($48,$7f)
s2612reg2($49,$7f)
s2612reg2($4a,$7f)
s2612reg2($4c,$7f)
s2612reg2($4d,$7f)
s2612reg2($4e,$7f)
#if (0)
setreg($2a,$00) ; dac value
s2612reg($2a,$00) ; dac value
setreg($24,$00) ; timer A frequency
setreg($25,$00) ; timer A frequency
setreg($26,$00) ; time B frequency
s2612reg($24,$00) ; timer A frequency
s2612reg($25,$00) ; timer A frequency
s2612reg($26,$00) ; time B frequency
setreg($30,$00) ; ch 1-3 multiply & detune
setreg($31,$00)
setreg($32,$00)
setreg($34,$00)
setreg($35,$00)
setreg($36,$00)
setreg($38,$00)
setreg($39,$00)
setreg($3a,$00)
setreg($3c,$00)
setreg($3d,$00)
setreg($3e,$00)
s2612reg($30,$00) ; ch 1-3 multiply & detune
s2612reg($31,$00)
s2612reg($32,$00)
s2612reg($34,$00)
s2612reg($35,$00)
s2612reg($36,$00)
s2612reg($38,$00)
s2612reg($39,$00)
s2612reg($3a,$00)
s2612reg($3c,$00)
s2612reg($3d,$00)
s2612reg($3e,$00)
setreg2($30,$00) ; ch 4-6 multiply & detune
setreg2($31,$00)
setreg2($32,$00)
setreg2($34,$00)
setreg2($35,$00)
setreg2($36,$00)
setreg2($38,$00)
setreg2($39,$00)
setreg2($3a,$00)
setreg2($3c,$00)
setreg2($3d,$00)
setreg2($3e,$00)
s2612reg2($30,$00) ; ch 4-6 multiply & detune
s2612reg2($31,$00)
s2612reg2($32,$00)
s2612reg2($34,$00)
s2612reg2($35,$00)
s2612reg2($36,$00)
s2612reg2($38,$00)
s2612reg2($39,$00)
s2612reg2($3a,$00)
s2612reg2($3c,$00)
s2612reg2($3d,$00)
s2612reg2($3e,$00)
setreg($50,$00) ; ch 1-3 attack rate and scaling
setreg($51,$00)
setreg($52,$00)
setreg($54,$00)
setreg($55,$00)
setreg($56,$00)
setreg($58,$00)
setreg($59,$00)
setreg($5a,$00)
setreg($5c,$00)
setreg($5d,$00)
setreg($5e,$00)
s2612reg($50,$00) ; ch 1-3 attack rate and scaling
s2612reg($51,$00)
s2612reg($52,$00)
s2612reg($54,$00)
s2612reg($55,$00)
s2612reg($56,$00)
s2612reg($58,$00)
s2612reg($59,$00)
s2612reg($5a,$00)
s2612reg($5c,$00)
s2612reg($5d,$00)
s2612reg($5e,$00)
setreg2($50,$00) ; ch 4-6 attack rate and scaling
setreg2($51,$00)
setreg2($52,$00)
setreg2($54,$00)
setreg2($55,$00)
setreg2($56,$00)
setreg2($58,$00)
setreg2($59,$00)
setreg2($5a,$00)
setreg2($5c,$00)
setreg2($5d,$00)
setreg2($5e,$00)
s2612reg2($50,$00) ; ch 4-6 attack rate and scaling
s2612reg2($51,$00)
s2612reg2($52,$00)
s2612reg2($54,$00)
s2612reg2($55,$00)
s2612reg2($56,$00)
s2612reg2($58,$00)
s2612reg2($59,$00)
s2612reg2($5a,$00)
s2612reg2($5c,$00)
s2612reg2($5d,$00)
s2612reg2($5e,$00)
setreg($60,$00) ; ch 1-3 decay rate and am enable
setreg($61,$00)
setreg($62,$00)
setreg($64,$00)
setreg($65,$00)
setreg($66,$00)
setreg($68,$00)
setreg($69,$00)
setreg($6a,$00)
setreg($6c,$00)
setreg($6d,$00)
setreg($6e,$00)
s2612reg($60,$00) ; ch 1-3 decay rate and am enable
s2612reg($61,$00)
s2612reg($62,$00)
s2612reg($64,$00)
s2612reg($65,$00)
s2612reg($66,$00)
s2612reg($68,$00)
s2612reg($69,$00)
s2612reg($6a,$00)
s2612reg($6c,$00)
s2612reg($6d,$00)
s2612reg($6e,$00)
setreg2($60,$00) ; ch 4-6 decay rate and am enable
setreg2($61,$00)
setreg2($62,$00)
setreg2($64,$00)
setreg2($65,$00)
setreg2($66,$00)
setreg2($68,$00)
setreg2($69,$00)
setreg2($6a,$00)
setreg2($6c,$00)
setreg2($6d,$00)
setreg2($6e,$00)
s2612reg2($60,$00) ; ch 4-6 decay rate and am enable
s2612reg2($61,$00)
s2612reg2($62,$00)
s2612reg2($64,$00)
s2612reg2($65,$00)
s2612reg2($66,$00)
s2612reg2($68,$00)
s2612reg2($69,$00)
s2612reg2($6a,$00)
s2612reg2($6c,$00)
s2612reg2($6d,$00)
s2612reg2($6e,$00)
setreg($70,$00) ; ch 1-3 sustain rate
setreg($71,$00)
setreg($72,$00)
setreg($74,$00)
setreg($75,$00)
setreg($76,$00)
setreg($78,$00)
setreg($79,$00)
setreg($7a,$00)
setreg($7c,$00)
setreg($7d,$00)
setreg($7e,$00)
s2612reg($70,$00) ; ch 1-3 sustain rate
s2612reg($71,$00)
s2612reg($72,$00)
s2612reg($74,$00)
s2612reg($75,$00)
s2612reg($76,$00)
s2612reg($78,$00)
s2612reg($79,$00)
s2612reg($7a,$00)
s2612reg($7c,$00)
s2612reg($7d,$00)
s2612reg($7e,$00)
setreg2($70,$00) ; ch 4-6 sustain rate
setreg2($71,$00)
setreg2($72,$00)
setreg2($74,$00)
setreg2($75,$00)
setreg2($76,$00)
setreg2($78,$00)
setreg2($79,$00)
setreg2($7a,$00)
setreg2($7c,$00)
setreg2($7d,$00)
setreg2($7e,$00)
s2612reg2($70,$00) ; ch 4-6 sustain rate
s2612reg2($71,$00)
s2612reg2($72,$00)
s2612reg2($74,$00)
s2612reg2($75,$00)
s2612reg2($76,$00)
s2612reg2($78,$00)
s2612reg2($79,$00)
s2612reg2($7a,$00)
s2612reg2($7c,$00)
s2612reg2($7d,$00)
s2612reg2($7e,$00)
setreg($80,$00) ; ch 1-3 release rate and sustain level
setreg($81,$00)
setreg($82,$00)
setreg($84,$00)
setreg($85,$00)
setreg($86,$00)
setreg($88,$00)
setreg($89,$00)
setreg($8a,$00)
setreg($8c,$00)
setreg($8d,$00)
setreg($8e,$00)
s2612reg($80,$00) ; ch 1-3 release rate and sustain level
s2612reg($81,$00)
s2612reg($82,$00)
s2612reg($84,$00)
s2612reg($85,$00)
s2612reg($86,$00)
s2612reg($88,$00)
s2612reg($89,$00)
s2612reg($8a,$00)
s2612reg($8c,$00)
s2612reg($8d,$00)
s2612reg($8e,$00)
setreg2($80,$00) ; ch 4-6 release rate and sustain level
setreg2($81,$00)
setreg2($82,$00)
setreg2($84,$00)
setreg2($85,$00)
setreg2($86,$00)
setreg2($88,$00)
setreg2($89,$00)
setreg2($8a,$00)
setreg2($8c,$00)
setreg2($8d,$00)
setreg2($8e,$00)
s2612reg2($80,$00) ; ch 4-6 release rate and sustain level
s2612reg2($81,$00)
s2612reg2($82,$00)
s2612reg2($84,$00)
s2612reg2($85,$00)
s2612reg2($86,$00)
s2612reg2($88,$00)
s2612reg2($89,$00)
s2612reg2($8a,$00)
s2612reg2($8c,$00)
s2612reg2($8d,$00)
s2612reg2($8e,$00)
setreg($90,$00) ; ch 1-3 ssg-eg
setreg($91,$00)
setreg($92,$00)
setreg($94,$00)
setreg($95,$00)
setreg($96,$00)
setreg($98,$00)
setreg($99,$00)
setreg($9a,$00)
setreg($9c,$00)
setreg($9d,$00)
setreg($9e,$00)
s2612reg($90,$00) ; ch 1-3 ssg-eg
s2612reg($91,$00)
s2612reg($92,$00)
s2612reg($94,$00)
s2612reg($95,$00)
s2612reg($96,$00)
s2612reg($98,$00)
s2612reg($99,$00)
s2612reg($9a,$00)
s2612reg($9c,$00)
s2612reg($9d,$00)
s2612reg($9e,$00)
setreg2($90,$00) ; ch 4-6 ssg-eg
setreg2($91,$00)
setreg2($92,$00)
setreg2($94,$00)
setreg2($95,$00)
setreg2($96,$00)
setreg2($98,$00)
setreg2($99,$00)
setreg2($9a,$00)
setreg2($9c,$00)
setreg2($9d,$00)
setreg2($9e,$00)
s2612reg2($90,$00) ; ch 4-6 ssg-eg
s2612reg2($91,$00)
s2612reg2($92,$00)
s2612reg2($94,$00)
s2612reg2($95,$00)
s2612reg2($96,$00)
s2612reg2($98,$00)
s2612reg2($99,$00)
s2612reg2($9a,$00)
s2612reg2($9c,$00)
s2612reg2($9d,$00)
s2612reg2($9e,$00)
setreg($a0,$00) ; ch 1-3 frequency
setreg($a1,$00)
setreg($a2,$00)
setreg($a4,$00)
setreg($a5,$00)
setreg($a6,$00)
; setreg($a8,$00) ; ch 3 special mode
; setreg($a9,$00)
; setreg($aa,$00)
; setreg($ac,$00)
; setreg($ad,$00)
; setreg($ae,$00)
s2612reg($a0,$00) ; ch 1-3 frequency
s2612reg($a1,$00)
s2612reg($a2,$00)
s2612reg($a4,$00)
s2612reg($a5,$00)
s2612reg($a6,$00)
; s2612reg($a8,$00) ; ch 3 special mode
; s2612reg($a9,$00)
; s2612reg($aa,$00)
; s2612reg($ac,$00)
; s2612reg($ad,$00)
; s2612reg($ae,$00)
setreg2($a0,$00) ; ch 4-6 frequency
setreg2($a1,$00)
setreg2($a2,$00)
setreg2($a4,$00)
setreg2($a5,$00)
setreg2($a6,$00)
; setreg2($a8,$00) ; ch 3 special mode
; setreg2($a9,$00)
; setreg2($aa,$00)
; setreg2($ac,$00)
; setreg2($ad,$00)
; setreg2($ae,$00)
s2612reg2($a0,$00) ; ch 4-6 frequency
s2612reg2($a1,$00)
s2612reg2($a2,$00)
s2612reg2($a4,$00)
s2612reg2($a5,$00)
s2612reg2($a6,$00)
; s2612reg2($a8,$00) ; ch 3 special mode
; s2612reg2($a9,$00)
; s2612reg2($aa,$00)
; s2612reg2($ac,$00)
; s2612reg2($ad,$00)
; s2612reg2($ae,$00)
setreg($b0,$00) ; ch 1-3 algorith + feedback
setreg($b1,$00)
setreg($b2,$00)
setreg2($b0,$00) ; ch 4-6 algorith + feedback
setreg2($b1,$00)
setreg2($b2,$00)
s2612reg($b0,$00) ; ch 1-3 algorith + feedback
s2612reg($b1,$00)
s2612reg($b2,$00)
s2612reg2($b0,$00) ; ch 4-6 algorith + feedback
s2612reg2($b1,$00)
s2612reg2($b2,$00)
#endif
@@ -1014,6 +1034,64 @@ SKIP3: LD A,(IX+0) ; For YM2151 ... Unimplemented
; MUTE YM2151
s2151reg($14,$30) ; disable timer %00110000
s2151reg($0f,$00) ; disable noise
;
s2151reg($1b,$00) ; CTx output off, LFO waveform
s2151reg($08,$00) ; key off all channels
s2151reg($08,$01)
s2151reg($08,$02)
s2151reg($08,$03)
s2151reg($08,$04)
s2151reg($08,$05)
s2151reg($08,$06)
s2151reg($08,$07)
s2151reg($60,$7f) ; total level = silent
s2151reg($61,$7f)
s2151reg($62,$7f)
s2151reg($63,$7f)
s2151reg($64,$7f)
s2151reg($65,$7f)
s2151reg($66,$7f)
s2151reg($67,$7f)
s2151reg($68,$7f)
s2151reg($69,$7f)
s2151reg($6A,$7f)
s2151reg($6B,$7f)
s2151reg($6C,$7f)
s2151reg($6D,$7f)
s2151reg($6E,$7f)
s2151reg($6F,$7f)
s2151reg($70,$7f)
s2151reg($71,$7f)
s2151reg($72,$7f)
s2151reg($73,$7f)
s2151reg($74,$7f)
s2151reg($75,$7f)
s2151reg($76,$7f)
s2151reg($77,$7f)
s2151reg($78,$7f)
s2151reg($79,$7f)
s2151reg($7A,$7f)
s2151reg($7B,$7f)
s2151reg($7C,$7f)
s2151reg($7D,$7f)
s2151reg($7E,$7f)
s2151reg($7F,$7f)
s2151reg($20,$00) ; channel output off, no feedback
s2151reg($21,$00)
s2151reg($22,$00)
s2151reg($23,$00)
s2151reg($24,$00)
s2151reg($25,$00)
s2151reg($26,$00)
s2151reg($27,$00)
;
SKIP4 RET
;
;------------------------------------------------------------------------------

View File

@@ -21,7 +21,7 @@ Supported platforms
===================
VGM Player is currently being developed on the ROMWBW platform using the Retrobrew computers
EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612 and 2xSN76489) board.
EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612,YM2151 2xSN76489) board.
It can be configured to run with other hardware such as RCBus, P8X180 and nhyodyne MBC.
VGM files can be very big and are limited in size by the available TPA space, which is typically 52k.
@@ -50,13 +50,15 @@ FIELDMAP.VGM - SN76489+YM2612 - Taikou Risshiden: Field Map: Summer
ITSGAMOV.VGM - SN76489+YM2612 - Puyo Puyo Tsuu: It's Game Over! : 16K
STARTDEM.VGN - 2xSN76489+AY-3-8910 * Exed Exes / Savage Bees: Start Demo ~Main BGM : 32K
INCHINA.VGM - YM2612 * Double Dragon 3: The Rosetta Stone: In China : 44K
SURE.VGM - YM2151 - Martial Age: Sure?? : 36K
SABERDAN.VGM - YM2151 - Road Runner: Sabre Dance (Attract Mode - Stage 4) : 28K
* Included in disk images
VGM sources
===========
https://www.smspower.org/forums/15359-VGMPacksGameGearMegaCollection
https://vgmrips.net/packs/chip/ym2612
https://vgmrips.net/packs/chip/ym2151
https://project2612.org/
VGM Tools

View File

@@ -30,11 +30,11 @@
; 2021-12-06 [WBW] Fix inverted ROM/RAM DPB mapping in buffer alloc
; 2022-02-28 [WBW] Use HBIOS to swap banks under CP/M 3
; Use CPM3 BDOS direct BIOS call to get DRVTBL adr
; 2023-06-19 [WBW] Update for revised DIODEVICE API
;_______________________________________________________________________________
;
; ToDo:
; 1) Do something to prevent assigning slices when device does not support them
; 2) ASSIGN C: causes drive map to be reinstalled unnecessarily
; 1) ASSIGN C: causes drive map to be reinstalled unnecessarily
;_______________________________________________________________________________
;
;===============================================================================
@@ -1405,12 +1405,11 @@ chkdev: ; HBIOS variant
; get device/unit info
ld b,$17 ; hbios func: diodevice
ld c,a ; unit to C
rst 08 ; call hbios, D := device, E := unit
ld a,d ; device to A
rst 08 ; call hbios, C := device attributes
;
; check slice support
cp $30 ; A has device/unit, in hard disk range?
jr c,chkdev1 ; if not hard disk, check slice val
bit 5,c ; high capacity device?
jr z,chkdev1 ; if not high cap, check slice val
xor a ; otherwise, signal OK
ret
;
@@ -1918,9 +1917,9 @@ dev06 .db "SD",0
dev07 .db "PRPSD",0
dev08 .db "PPPSD",0
dev09 .db "HDSK",0
dev10 .equ devunk
dev11 .equ devunk
dev12 .equ devunk
dev10 .db "PPA",0
dev11 .db "IMM",0
dev12 .db "SYQ",0
dev13 .equ devunk
dev14 .equ devunk
dev15 .equ devunk
@@ -1943,10 +1942,10 @@ stack .equ $ ; stack top
; Messages
;
indent .db " ",0
msgban1 .db "ASSIGN v1.5 for RomWBW CP/M ",0
msgban1 .db "ASSIGN v1.6 for RomWBW CP/M ",0
msg22 .db "2.2",0
msg3 .db "3",0
msbban2 .db ", 28-Feb-2022",0
msbban2 .db ", 16-Jun-2023",0
msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0
msgban3 .db "Copyright 2021, Wayne Warthen, GNU GPL v3",0

View File

@@ -2291,8 +2291,8 @@ INIT2:
LD C,(HL) ; PUT UNIT NUM IN C
RST 08 ; CALL HBIOS
LD A,C ; GET ATTRIBUTES
AND %00111000 ; ISOLATE TYPE BITS
CP %00101000 ; TYPE = RAM?
AND %10001111 ; ISOLATE TYPE BITS
CP %00000101 ; NOT FLOPPY, TYPE = RAM?
JR NZ,INIT2X ; IF NOT THEN DONE
;
; CHECK IF SECOND UNIT IS ROM OR FLASH
@@ -2303,10 +2303,10 @@ INIT2:
LD C,(HL) ; PUT UNIT NUM IN C
RST 08 ; CALL HBIOS
LD A,C ; GET ATTRIBUTES
AND %00111000 ; ISOLATE TYPE BITS
CP %00100000 ; TYPE = ROM?
AND %10001111 ; ISOLATE TYPE BITS
CP %00000100 ; NOT FLOPPY, TYPE = ROM?
JR Z,INIT2A ; IF SO, ADJUST DEF DRIVE
CP %00111000 ; TYPE = FLASH?
CP %00000111 ; NOT FLOPPY, TYPE = FLASH?
JR NZ,INIT2X ; IF NOT THEN DONE
;
INIT2A:
@@ -2904,52 +2904,51 @@ DRV_INIT:
LD HL,DRVLST ; INIT HL PTR TO DRIVE LIST
;
DRV_INIT2:
PUSH BC ; SAVE LOOP CNT & UNIT
CALL DRV_INIT3 ; CHECK DRIVE
POP BC ; RECOVER LOOP CNT & UNIT
INC C ; NEXT UNIT
DJNZ DRV_INIT2 ; LOOP
LD A,D ; TOTAL DEVICE COUNT TO D
LD A,D ; TOTAL DEVICE COUNT TO A
LD (DRVLSTC),A ; SAVE THE COUNT
JR DRV_INIT4 ; CONTINUE
;
DRV_INIT3:
; GET DEVICE ATTRIBUTES
PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER)
PUSH HL ; SAVE DRIVE LIST PTR
PUSH BC ; SAVE LOOP CONTROL
LD B,BF_DIODEVICE ; HBIOS FUNC: REPORT DEVICE INFO
RST 08 ; CALL HBIOS, UNIT TO C
LD A,D ; DEVICE TYPE TO A
LD A,C ; DEVICE ATTRIBUTES TO A
POP BC ; RESTORE LOOP CONTROL
POP HL ; RESTORE DRIVE LIST PTR
POP DE ; RESTORE DE
CP DIODEV_IDE ; HARD DISK DEVICE?
JR NC,DRV_INIT3A ; IF SO, HANDLE SPECIAL
LD (HL),C ; SAVE UNIT NUM IN LIST
INC HL ; BUMP PTR
INC D ; INC TOTAL DEVICE COUNT
RET
LD B,A ; ATTRIBUTES TO B
;
DRV_INIT3A:
; CHECK FOR ACTIVE AND RETURN IF NOT
; IF DEVICE IS NOT REMOVABLE, THEN CHECK TO ENSURE IT IS
; ACTUALLY ONLINE. IF NOT, SKIP UNIT ENTIRELY.
BIT 6,B ; REMOVABLE?
JR NZ,DRV_INIT3A ; IF SO, SKIP MEDIA CHECK
PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER)
PUSH HL ; SAVE DRIVE LIST PTR
PUSH BC ; SAVE LOOP CONTROL
LD B,BF_DIOMEDIA ; HBIOS FUNC: SENSE MEDIA
LD E,1 ; PERFORM MEDIA DISCOVERY
RST 08
RST 08 ; DO IT
POP BC ; RESTORE LOOP CONTROL
POP HL ; RESTORE DRIVE LIST PTR
POP DE ; RESTORE DE
RET NZ ; IF NO MEDIA, JUST RETURN
; IF ACTIVE...
RET NZ ; OFFLINE, SKIP ENTIRE UNIT
;
DRV_INIT3A:
LD (HL),C ; SAVE UNIT NUM IN LIST
INC HL ; BUMP PTR
INC D ; INC TOTAL DEVICE COUNT
BIT 5,B ; HIGH CAPACITY?
RET Z ; DONE IF NOT
INC E ; INCREMENT HARD DISK COUNT
RET ; AND RETURN
RET ; DONE
;
DRV_INIT4: ; SET SLICES PER VOLUME (HDSPV) BASED ON HARD DISK VOLUME COUNT
LD A,E ; HARD DISK VOLUME COUNT TO A
@@ -2978,7 +2977,8 @@ DRV_INIT6: ; LOOP THRU ALL UNITS AVAILABLE
LD C,(HL) ; GET UNIT NUM FROM LIST
PUSH BC ; PRESERVE LOOP CONTROL
LD B,BF_DIODEVICE ; HBIOS FUNC: REPORT DEVICE INFO
RST 08 ; CALL HBIOS, D := DEVICE TYPE
RST 08 ; CALL HBIOS, C := DEVICE ATTRIBUTES
LD A,C ; DEVICE ATTRIBUTES TO A
POP BC ; GET UNIT INDEX BACK IN C
PUSH BC ; RESAVE LOOP CONTROL
CALL DRV_INIT7 ; MAKE DRIVE MAP ENTRY(S)
@@ -2992,10 +2992,9 @@ DRV_INIT6: ; LOOP THRU ALL UNITS AVAILABLE
DRV_INIT7: ; PROCESS UNIT
LD E,0 ; INITIALIZE SLICE INDEX
LD B,1 ; DEFAULT LOOP COUNTER
LD A,D ; DEVICE TYPE TO ACCUM
LD D,C ; UNIT NUMBER TO D
CP DIODEV_IDE ; HARD DISK DEVICE?
JR C,DRV_INIT8 ; NOPE, LEAVE LOOP COUNT AT 1
BIT 5,A ; HIGH CAPACITY DEVICE?
JR Z,DRV_INIT8 ; NOPE, LEAVE LOOP COUNT AT 1
LD A,(HDSPV) ; GET SLICES PER VOLUME TO ACCUM
LD B,A ; MOVE TO B FOR LOOP COUNTER
;
@@ -3392,9 +3391,9 @@ DEV06 .DB "SD$"
DEV07 .DB "PRPSD$"
DEV08 .DB "PPPSD$"
DEV09 .DB "HDSK$"
DEV10 .EQU DEVUNK
DEV11 .EQU DEVUNK
DEV12 .EQU DEVUNK
DEV10 .DB "PPA$"
DEV11 .DB "IMM$"
DEV12 .DB "SYQ$"
DEV13 .EQU DEVUNK
DEV14 .EQU DEVUNK
DEV15 .EQU DEVUNK
@@ -3406,7 +3405,7 @@ DIRBUF .DW 0 ; DIR BUF POINTER
HEAPTOP .DW BUFPOOL ; CURRENT TOP OF HEAP
BOOTVOL .DW 0 ; BOOT VOLUME, MSB=BOOT UNIT, LSB=BOOT SLICE
HDSPV .DB 2 ; SLICES PER VOLUME FOR HARD DISKS (MUST BE >= 1)
DRVLST .FILL 32 ; ACTIVE DRIVE LIST USED DURINT DRV_INIT
DRVLST .FILL 32 ; ACTIVE DRIVE LIST USED DURING DRV_INIT
DRVLSTC .DB 0 ; ENTRY COUNT FOR ACTIVE DRIVE LIST
;
#IFDEF PLTWBW

View File

@@ -156,7 +156,9 @@ dinit:
ld hl,drvlst ; init hl ptr to drive list
;
dinit2:
push bc ; save loop cnt & unit
call dinit3 ; check drive
pop bc ; recover loop cnt & unit
inc c ; next unit
djnz dinit2 ; loop
ld a,d ; total device count to d
@@ -169,39 +171,35 @@ dinit3:
push bc ; save loop control
ld b,17h ; hbios func: report device info
rst 08 ; call hbios, unit to c
ld a,d ; device type to a
ld a,c ; device attributes to a
pop bc ; restore loop control
pop hl ; restore drive list ptr
pop de ; restore de
cp 30h ; hard disk device?
jr nc,dinit3a ; if so, handle special
ld (hl),c ; save unit num in list
inc hl ; bump ptr
inc d ; inc total device count
ret
ld b,a ; attributes to b
;
dinit3a:
; check for active and return if not
; if device is not removable, then check to ensure it is
; actually online. if not, skip unit entirely.
bit 6,b ; removable?
jr nz,dinit3a ; if so, skip media check
push de ; save de (hard disk volume counter)
push hl ; save drive list ptr
push bc ; save loop control
ld b,18h ; hbios func: sense media
ld e,1 ; perform media discovery
rst 08
rst 08 ; do it
pop bc ; restore loop control
pop hl ; restore drive list ptr
pop de ; restore de
ret nz ; if no media, just return
; if active...
ret nz ; offline, skip entire unit
;
dinit3a:
ld (hl),c ; save unit num in list
inc hl ; bump ptr
inc d ; inc total device count
bit 5,b ; high capacity?
ret z ; done if not
inc e ; increment hard disk count
ret ; and return
ret ; done
dinit4: ; set slices per volume (hdspv) based on hard disk volume count
ld a,e ; hard disk volume count to a
@@ -238,7 +236,8 @@ dinit6:
push bc ; preserve loop control
push hl ; preserve dph pointer
ld b,17h ; hbios func: report device info
rst 08 ; call hbios, d := device type
rst 08 ; call hbios, a := device attributes
ld a,c ; device attributes to a
pop hl ; restore dph pointer
pop bc ; get unit index back in c
push bc ; resave loop control
@@ -253,10 +252,9 @@ dinit6:
dinit7: ; process a unit (all slices)
ld e,0 ; initialize slice index
ld b,1 ; default loop counter
ld a,d ; device type to accum
ld d,c ; unit number to d
cp 030h ; hard disk device?
jr c,dinit8 ; nope, leave loop count at 1
bit 5,a ; high capacity device?
jr z,dinit8 ; nope, leave loop count at 1
ld a,(hdspv) ; get slices per volume to accum
ld b,a ; move to b for loop counter

View File

@@ -51,6 +51,7 @@ found:
| INTTEST | No | Yes | Yes |
| FAT | No | Yes | Yes |
| TUNE | No | Yes | Yes |
| WDATE | No | Yes | Yes |
`\clearpage`{=latex}
@@ -104,7 +105,7 @@ The `ASSIGN` command supports "stacking" of instructions. For example,
two slices of IDE 0 and will unassign E:.
When the command runs it will echo the resultant assignments to the
console to confirm it's actions. It will also display the remaining
console to confirm its actions. It will also display the remaining
space available in disk buffers.
## Notes
@@ -158,7 +159,7 @@ should only be specified for hard disk devices (SD, IDE, PPIDE).
Only one drive letter may be assigned to a specific device/unit/slice
at a time. Attempts to assign a duplicate drive letter will fail and
display an error. If you wish to assign a different drive letter to a
device/unit/slice, unassign the the existing drive letter first.
device/unit/slice, unassign the existing drive letter first.
Be aware that this command will allow you to reassign or remove the
assignment of your system drive letter. This can cause your operating
@@ -235,8 +236,8 @@ confusing that ZPM3 is in the file called CPM3.SYS, but it is normal
for ZPM3.
For the purposes of booting an operating system, each disk slice is
considered it's own operating system. Each slice can be made bootable
with it's own system tracks.
considered its own operating system. Each slice can be made bootable
with its own system tracks.
`SYSCOPY` uses drive letters to specify where to read/write the system
boot images. However, at startup, the boot loaded will require you to
@@ -246,7 +247,7 @@ to a drive letter so you will know what to enter at the boot loader
prompt. By way of explanation, the boot loader does not know about
drive letters because the operating system is not loaded yet.
If you want to put a a boot system image on a device and slice that is
If you want to put a boot system image on a device and slice that is
not currently assigned to a drive letter, you will need to assign a
drive letter first.
@@ -466,7 +467,7 @@ control is fully functional (end to end).
The `XM` application provided in RomWBW is an adaptation of a
pre-existing XModem application. Based on the source code comments, it
was originally adapted from Ward Christensen's MODEM2 by Keith
Petersen and is labeled version 12.5.
Petersen and is labelled version 12.5.
The original source of the application was found in the Walnut Creek
CD-ROM and is called XMDM125.ARK dated 7/15/86.
@@ -529,14 +530,14 @@ manually perform a verification function with the `FLASH VERIFY` form
of the command.
The author's documentation for the application is found in the RomWBW
distribution in the Doc\\Contrib directory.
distribution in the Doc/Contrib directory.
## Notes
The application supports a significant number of EEPROM parts. It
should automatically detect your part. If it does not recognize your
chip, make sure that you do not have a write protect jumper set --
this jumper will cause the ROM chip type to be unrecognized.
this jumper can prevent the ROM chip from being recognized.
Reprogramming a ROM chip in-place is inherently dangerous. If anything
goes wrong, you will be left with a non-functional system and no
@@ -557,12 +558,17 @@ GitHub repository](https://github.com/willsowerbutts/flash4).
# FDISK80
RomWBW supports disk media with MS-DOS FAT filesystems (see FAT
application). If you wish to put a FAT filesystem on your media, the
FDISK80 application can be used to partition your media which is
required in order to add a FAT filesystem.
`FDISK80` allows you to create and manage traditional partitions on
your hard disk media. Depending on the hard disk format and features
you are using, RomWBW may need hard disk partitions defined.
This application is provided by John Coffman.
Please refer to the $doc_user$ for more information on the use of
partitions within RomWBW. It is very important to understand that
RomWBW slices are completely different from disk partitions.
This application is provided by John Coffman. The primary
documentation is in the file "FDisk Manual.pdf" found in the
Doc directory of the RomWBW distribution.
## Usage
@@ -577,20 +583,15 @@ applications. Please refer to the file called "FDisk Manual.pdf" in
the Doc directory of the RomWBW distribution for further instructions.
There is also more information on using FAT partitions with RomWBW in
the "RomWBW Getting Started.pdf" document in the Doc directory of the
distribution.
the $doc_user$ document in the Doc directory of the distribution.
## Notes
Partitioning of RomWBW media is **only** required if you want to add a
FAT filesystem to your media. Do not partition your media if you are
simply using it for RomWBW. To be clear, RomWBW slices do not require
partitioning.
As described in "RomWBW Getting Started.pdf", you should be careful
when adding a FAT partition to your media that the partition does not
overlap with the area of the media being used for RomWBW slices. The
"(R)eserve" function in `FDISK80` can help prevent this.
Hard disk partition tables allow a maximum of 1024 cylinders when
defining partitions. However, RomWBW uses exclusively Logical Block
Addressing (LBA) which does not have this limitation. When defining
partitions is usually best to define the start and size of of the
partition using bytes or sectors.
## Etymology
@@ -661,7 +662,7 @@ After startup, the application provides the following options:
| `R)aw` | will read the minute/second of the RTC clock iteratively every time the space key is pressed. Press enter to end. |
| `L)oop` | will read the full date/time of the RTC clock iteratively every time the space key is pressed. Press enter to end. |
| `C)harge` | will enable the battery charging function of the RTC. |
| `N)ocharge` | will disable the battery charging functino of the RTC. |
| `N)ocharge` | will disable the battery charging function of the RTC. |
| `D)elay` | allows you to test the built-in timing delay in the program. It is not unusual for it to be wrong. |
| `I)nit` | allows you to enter a date/time value for subsequent programming of the RTC using the S)et option. |
| `G)et` | allows you to read the value of a non-volatile register in the RTC. |
@@ -683,7 +684,7 @@ bypassing HBIOS.
## Etymology
The `RTC` application was originally written by Andrew Lync as part of
The `RTC` application was originally written by Andrew Lynch as part of
the original ECB SBC board development. It has since been modified to
support most of the hardware variations included with RomWBW.
@@ -889,6 +890,28 @@ written in C and requires SDCC to compile. As such it is not part of
the RomWBW build process. However, the full project and source code is
found in the [FAT GitHub Repository](https://github.com/wwarthen/FAT).
## Known Issues
CP/M (and workalike) OSes have significant restrictions on filename
characters. The FAT application will block any attempt to create a
file on the CP/M filesystem containing any of these prohibited
characters:
| `< > . , ; : = ? * [ ] _ % | ( ) / \`
The operation will be aborted with "`Error: Invalid Path Name`" if such
a filename character is encountered.
Since MS-DOS does allow some of these characters, you can have
issues when copying files from MS-DOS to CP/M if the MS-DOS filenames
use these characters. Unfortunately, FAT is not yet smart enough to
substitute illegal characters with legal ones. So, you will need to
clean the filenames before trying to copy them to CP/M.
The FAT application does try to detect the scenario where you are
copying a file to itself. However, this detection is not perfect and
can corrupt a file if it occurs. Be careful to avoid this.
`\clearpage`{=latex}
# TUNE
@@ -922,7 +945,7 @@ for the hardware found. If no hardware is detected, it will abort with
an error message.
On Z180 systems, I/O wait states are added when writing to the sound
chip to avoid exceeding it's speed limitations. On Z80 systems, you
chip to avoid exceeding its speed limitations. On Z80 systems, you
will need to ensure that the CPU clock speed of your system does not
exceed the timing limitations of your sound chip.
@@ -939,7 +962,7 @@ By default the application will attempt to interface directly to the sound
chip. The optional argument `--hbios` supplied after the filename, will
enable the application to use the HBIOS sound driver.
The HBIOS mode also support other switch as desribed below.
The HBIOS mode also support other switch as described below.
| Switch | Description |
| ----------- | ------------------------------------------------------ |
@@ -1012,9 +1035,9 @@ speed will actually work on the current hardware. Setting a CPU
speed that exceeds the capabilities of the system will result in
unstable operation or a system stall.
Some peripherals are dependant on the CPU speed. For example, the Z180
Some peripherals are dependent on the CPU speed. For example, the Z180
ASCI baud rate and system timer are derived from the CPU speed. The
CPUSPD applicastion will attempt to adjust these peripherals for
CPUSPD application will attempt to adjust these peripherals for
correct operation after modifying the CPU speed. However, in some
cases this may not be possible. The baud rate of ASCI ports have a
limited set of divisors. If there is no satisfactory divisor to
@@ -1028,3 +1051,163 @@ hardware interface code is specific to RomWBW and the application will
not operate correctly on non-RomWBW systems.
The source code is provided in the RomWBW distribution.
`\clearpage`{=latex}
# VGMPLAY
This application will allow you to play Video Game Music files. VGM
files contain music samples from a range of different sound chips
that were used in arcade games, game consoles and personal computer
systems.
Video Game Music files have a .VGM file extension and each file
contains an embedded header that identifies the hardware it is
intended for and also the title of the music.
All RomWBW operating system boot disks include a selection of sound
files in user area 3. Additional music files can be found at:
[VGMRIPS website](https://vgmrips.net)
[PROJECT2612 website](https://project2612.org/)
Sound files are loaded into memory for playback, so the maximum size
file that can be played is around 52Kb.
Sound chips currently supported are:
* AY-3-8190 (and equivalent YM2149)
* YM2612 (and equivalent YM3848)
* SN76489 (single chip mono and dual chip stereo)
* YM2151
VGMPLAY supports playback of files with multiple combinations of these
chips.
## Syntax
`VGMPLAY `*`<filename>`*
*`<filename>`* is the name of a sound file ending in .VGM
## Usage
VGMPLAY does not automatically detect the hardware platform or sound
hardware that you are using. This means a version customized for your
system must be assembled before use.
To play a sound file, just use the VGMPLAY command and specify the file
to play after the command. So, for example, `VGMPLAY TEDDY` will load
the TEDDY.VGM sound file into memory and begin playing it.
Playback can be stopped by pressing a key. There may be a delay before
playback stops.
## Notes
The default build configuration for VGMPLAY is:
CPU speed: Autodetected
| chip | number | port | notes
| --------- | ------- | -------- | ----------
| AY-3-8910 | 1st | 09ah | stereo
| AY-3-8910 | 2nd | not set | stereo
| YM2612 | 1st | 0c0h | stereo
| YM2612 | 2nd | 0c4h | stereo
| SN76489 | 1st | 0c8h | mono/left
| SN76489 | 2nd | 0c9h | mono/right
| YM2151 | 1st | 0cah | stereo
| YM2151 | 2nd | 0cbh | stereo
Inconsistant, garbled or distorted playback can be an indication that
your CPU clock speed is too high for your sound chip. In this case, if
your platform supports speed switching, then the CPUSPD application
can be used to reduce your processor speed.
VGMPLAY is still under development. The source code is provided in the
RomWBW distribution.
`\clearpage`{=latex}
# WDATE
`wdate` is a utility for CP/M systems that have Wayne Warthen's
ROMWBW firmware. It reads or sets the real-time clock, using function
calls in the BIOS. It should work on any RTC device that is supported by
ROMWBW, including the internal interrupt-driven timer that is is available
on some systems.
`wdate` differs from the `rtc.com` utility that is provided with the
ROMWBW version of CP/M in that it only gets and sets the date/time.
`rtc.com` can also manipulate the nonvolatile RAM in certain clock
devices, and modify the charge controller. However, `wdate` is (I would
argue) easier to use, as it takes its input from the command line, which
can be edited, and it's less fussy about the format. It doesn't require
the date to be set if you only want to change the time, for example.
In addition, `wdate` has at least some error checking.
`wdate` displays the day-of-week and month as English text, not
numbers. It calculates the day-of-week from the year, month, and day.
RTC chips usually store a day-of-week value, but it's useless in this
application for two reasons: first, the BIOS does not expose it. Second,
there is no universally-accepted way to interpret it (which day does
the week start on? Is '0' a valid day of the week?)
## Syntax
| `WDATE`
| `WDATE ` *`<hr> <min>`*
| `WDATE ` *`<hr> <min> <sec>`*
| `WDATE ` *`<year> <month> <day> <hr> <min> <sec>`*
## Usage
A> wdate
Saturday 27 May 13:14:39 2023
With no arguments, displays the current date and time.
A> wdate hr min
With two arguments, sets the time in hours and minutes, without changing date
or seconds
A> wdate hr min sec
With three arguments, sets the time in hours, minutes, and seconds, without
changing date
A> wdate year month day hr min sec
With six arguments, sets date and time. All numbers are one or two digits. The
two-digit year starts at 2000.
A> wdate /?
Show a summary of the command-line usage.
## Notes
I've tested this utility with the DS1302 clock board designed by Ed
Brindly, and on the interrupt-driven timer built into my Z180 board.
However, it does not interact with hardware, only BIOS; I would expect
it to work with other hardware.
wdate checks for the non-existence of ROMWBW, and also for failing
operations on the RTC. It will display the terse "No RTC" message in
both cases.
The ROMWBW functions that manipulate the date and time operate on BCD
numbers, as RTC chips themselves usually do. wdate works in decimal, so
that it can check that the user input makes sense. A substantial part of
the program's code is taken up by number format conversion and range
checking.
## Etymology
The `WDATE` application was written and contributed by Kevin Boone.
The source code is available on GitHub at
[https://github.com/kevinboone/wdate-cpm/blob/main/README.md](https://github.com/kevinboone/wdate-cpm/blob/main/README.md).

View File

@@ -1,4 +1,4 @@
$define{doc_ver}{Version 3.2}$
$define{doc_ver}{Version 3.3}$
$define{doc_product}{RomWBW}$
$define{doc_root}{https://github.com/wwarthen/RomWBW/raw/dev/Doc}$
$ifndef{doc_title}$ $define{doc_title}{Document Title}$ $endif$

View File

@@ -11,12 +11,13 @@ toc-depth: 2
numbersections: true
secnumdepth: 2
header-includes:
- \setlength{\headheight}{15pt}
- |
```{=latex}
\setlength{\headheight}{15pt}
\usepackage{fancyhdr}
\usepackage{xcolor}
\usepackage{xhfill}
\usepackage{tocloft}
\renewcommand*{\familydefault}{\sfdefault}
\renewcommand{\maketitle}{
\begin{titlepage}
@@ -44,6 +45,7 @@ include-before:
```{=latex}
\pagestyle{fancyplain}
\fancyhf{}
\lhead{\fancyplain{}{\nouppercase{\bfseries \leftmark \hfill $doc_product$ $doc_title$}}}
\lfoot{\small RetroBrew Computing Group ~~ {\xrfill[3pt]{1pt}[cyan]} ~~ \thepage}
\pagenumbering{roman}
```
@@ -52,5 +54,4 @@ include-before:
```{=latex}
\clearpage
\pagenumbering{arabic}
\lhead{\fancyplain{}{\nouppercase{\bfseries \leftmark \hfill $doc_product$ $doc_title$}}}
```

Binary file not shown.

Binary file not shown.

After

Width:  |  Height:  |  Size: 18 KiB

Binary file not shown.

View File

@@ -246,7 +246,7 @@ memory starting at location xxxx.
protocol.
If the monitor is assembled with the DSKY functionality,
this feature will be exclude due to space limitions.
this feature will be exclude due to space limitations.
## NOTES:
@@ -624,7 +624,7 @@ Feedback to the ROMWBW developers on these guidelines would be appreciated.
## Notes:
All testing was done with Teraterm x-modem, Forcing checksum mode using macros was found to give the most reliable transfer.
Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before before being written.
Partial writes can be completed with 39SF040 chips. Other chips require entire flash to be erased before being written.
An SBC V2-005 MegaFlash or Z80 MBC required for 1mb flash support. The Updater assumes both chips are same type
Failure handling has not been tested.
Timing broadly calibrated on a Z80 SBC-v2

View File

@@ -117,7 +117,7 @@ please let me know if I missed you!
* Andrew Lynch started it all when he created the N8VEM Z80 SBC
which became the first platform RomWBW supported. Some of his
code can still be found in RomWBW.
original code can still be found in RomWBW.
* Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
@@ -129,23 +129,30 @@ please let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
* Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
* David Giles created support for the Z180 CSIO which is now included
SD Card driver.
* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
* Ed Brindley contributed some of the code that supports the RCBus
platform.
* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
* Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage.
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
* Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW
with many of them.
* Alan Cox has contributed some driver code and has provided a great
deal of advice.
* The CP/NET client files were developed by Douglas Miller.
* Phillip Stevens contributed support for FreeRTOS.
@@ -165,6 +172,11 @@ please let me know if I missed you!
* The RomWBW Disk Catalog document was produced by Mykl Orders.
* Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games
compendium.
Contributions of all kinds to RomWBW are very welcome.
# Licensing
@@ -186,15 +198,15 @@ Portions of RomWBW were created by, contributed by, or derived from
the work of others. It is believed that these works are being used
in accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of it's intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen
> wwarthen@gmail.com
> $doc_author$ \
> [$doc_authmail$](mailto:$doc_authmail$)
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as
a cohesive system. Each program may have it's own licensing which
a cohesive system. Each program may have its own licensing which
may be different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is

View File

@@ -182,7 +182,7 @@ not know anything about what is being loaded (the image is usually an
operating system, but could be any executable code image). Once the Boot
Loader has loaded the image at the selected location, it will transfer
control to it. Assuming the typical situation where the image was an
operating system, the loaded operating system will then perform it's own
operating system, the loaded operating system will then perform its own
initialization and begin normal operation.
## Application Boot
@@ -207,8 +207,8 @@ the previously running operating system starting at $0100. Note that the
program image contains a full copy of the HBIOS to be installed and run. Once
the Application Boot program is loaded by the previous operating system,
control is passed to it and it performs a system initialization similar
to the ROM Boot, but using the image loaded in RAM. Once te new
HBIOS completes it's initialization, it will launch the Boot Loader
to the ROM Boot, but using the image loaded in RAM. Once the new
HBIOS completes its initialization, it will launch the Boot Loader
just like a ROM boot.
The Application Boot program actually contains two other components
@@ -228,7 +228,7 @@ they have a small hardware bootstrap that loads a chunk of code from a
disk device directly into RAM at system startup.
The startup then proceeds very much like the Application Boot
process described above. HBIOS is installed in it's operating bank
process described above. HBIOS is installed in its operating bank
and control is passed to the Boot Loader.
# Driver Model
@@ -245,7 +245,7 @@ layout expected by the operating system and application.
Drivers do need to be aware of the bank switching if a buffer address
is being used in the function call.
* If the buffer address is in the lower 32K of RAM, then the memroy
* If the buffer address is in the lower 32K of RAM, then the memory
it points to will be from the User Bank, not the HBIOS bank which
is now active. In this case, the driver must use an inter-bank
copy to access the data.
@@ -363,7 +363,7 @@ HBIOS functions. Most function calls will return a result in register A.
| -1 | undefined error |
| -2 | function not implemented |
| -3 | invalid function |
| -4 | invalid unit numberr |
| -4 | invalid unit number |
| -5 | out of memory |
| -6 | parameter out of range |
| -7 | media not present |
@@ -617,7 +617,7 @@ Returns the driver specific Status (A) of the specified disk device unit
The return value in register A is used as both a device status and a
standard HBIOS result code. Negative values (bit 7 set) indicate a
standard HBIOS result (error) code. Otherwise, the return value
represents a driver-specific device status. In call cases, the value 0
represents a driver-specific device status. In all cases, the value 0
means OK.
### Function 0x11 -- Disk Reset (DIORESET)
@@ -757,28 +757,36 @@ of memory because it avoids a double copy.
Reports device information about the specified Disk Unit (C). The
Status (A) is a standard HBIOS result code.
Bit 7 of the Device Attribute (C) value returned indicates whether the
device is a floppy disk. If it is a floppy disk, the Device Attribute
(C) value is encoded as follows:
The Device Attribute (C) value returned indicates various
feature indicators related to the device being referenced
by the specified Disk Unit (C). The high 3 bits apply to
all devices. The definition of the low 5 bits depends on
whether the device is a Floppy (indicated by bit 5).
The common bits are:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 7 | = 1 (Floppy Disk) |
| 6-5 | Form Factor: 0=8", 1=5.25", 2=3.5", 3=Other |
| 4 | Sides: 0=SS, 1=DS |
| 3-2 | Density: 0=SD, 1=DD, 2=HD, 3=ED |
| 1-0 | Reserved |
If the Disk Unit (C) specified is a not floppy disk, then the Device
Attribute (C) encoding is as follows:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 7 | = 0 (not Floppy Disk) |
| 7 | Floppy |
| 6 | Removable |
| 5-3 | Type: 0=Hard, 1=CF, 2=SD, 3=USB, |
| | 4=ROM, 5=RAM, 6=RAMF, 7=FLASH |
| 2-0 | Reserved |
| 5 | High Capacity (>8 MB) |
The Floppy specific bits are:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 4-3 | Form Factor: 0=8", 1=5.25", 2=3.5", 3=Other |
| 2 | Sides: 0=SS, 1=DS |
| 1-0 | Density: 0=SD, 1=DD, 2=HD, 3=ED |
The non-Floppy specific bits are:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 4 | LBA Capable |
| 3-0 | Media Type: 0=Hard Disk, 1=CF, 2=SD, 3=USB, |
| | 4=ROM, 5=RAM, 6=RAMF, 7=FLASH, 8=CD-ROM, |
| | 9=Cartridge |
Device Type (D) indicates the specific hardware driver that handles the
specified Disk Unit (C). Values are listed at the start of this
@@ -1001,6 +1009,198 @@ used.
`\clearpage`{=latex}
## Display Keypad (DSKY)
The Display Keypad functions provide read/write access to a segment
style display and associated hex keypad.
HBIOS only supports a single DSKY device since there is no reason to have
more than one at a time. The DSKY unit is assigned a Device Type ID
which indicates the specific hardware device driver that handles the
unit. The table below enumerates these values.
| **Device Type** | **ID** | **Description** | **Driver** |
|-----------------|-------:|------------------------------------------|------------|
| DSKYDEV_ICM | 0x00 | Original ICM7218 based DSKY | icm.asm |
| DSKYDEV_PKD | 0x10 | Next Gen Intel P8279 based DSKY | pkd.asm |
When segment display function encodes the display data in a byte per
character format. Currently, all segment displays are exactly
8 charadcters and this is assumed in API calls. The encoding of each
byte is as shown below:
```
+---01---+
| |
20 02
| |
+---40---+
| |
10 04
| |
+---08---+ 80
```
The keypad keys are identified by the following key ids. Not all
keypads will contain all keys.
| **Key Id** | **Key Definition** | **Key Id** | **Key Definition** |
|------------|--------------------|------------|--------------------|
| $00 | Hex Numeric 0 | $10 | Forward |
| $01 | Hex Numeric 1 | $11 | Backward |
| $02 | Hex Numeric 2 | $12 | Clear |
| $03 | Hex Numeric 3 | $13 | Enter |
| $04 | Hex Numeric 4 | $14 | Deposit |
| $05 | Hex Numeric 5 | $15 | Examine |
| $06 | Hex Numeric 6 | $16 | Go |
| $07 | Hex Numeric 7 | $17 | Boot |
| $08 | Hex Numeric 8 | $18 | F4 |
| $09 | Hex Numeric 9 | $19 | F3 |
| $0A | Hex Numeric A | $1A | F2 |
| $0B | Hex Numeric B | $1B | F1 |
| $0C | Hex Numeric C | | |
| $0D | Hex Numeric D | | |
| $0E | Hex Numeric E | | |
| $0F | Hex Numeric F | | |
### Function 0x30 -- DSKY Reset (DSKYRESET)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x30 | A: Status |
This function performs a device dependent reset operation on the DSKY.
The display will be cleared, keyboard queue will be flushed, and
chip will be reinitialized. The returned Status (A) is a standard
HBIOS result code.
### Function 0x31 -- DSKY (DSKYSTATUS)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x31 | A: Status / Characters Pending |
Return the count of Characters Pending (A) in the input buffer of the
DSKY. If the unit has no input buffer or the
buffer utilization is not available, the function may return simply 0 or
1 where 0 means there is no character available and 1 means there is at
least one character available.
The value returned in register A is used as both a Status (A) code and
the return value. Negative values (bit 7 set) indicate a standard HBIOS
result (error) code. Otherwise, the return value represents the number
of characters in the buffer.
### Function 0x32 -- DSKY Get Key (DSKYGETKEY)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x32 | A: Status |
| | E: Character Value |
Read and return a Character (E) from the DSKY.
If no character(s) are available in the unit's input buffer, this
function will wait indefinitely. The returned Status (A) is a standard
HBIOS result code.
The Character Value (E) returned is not ASCII. It is a keypad key
id. The possible id values are listed at the start of this section.
### Function 0x33 -- DSKY Show HEX (RTCSHOWHEX)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x33 | A: Status |
| DE:HL=Binary Value | |
Display the 32-bit binary value (DE:HL) in hex on the DSKY segment
display. All decimal points of the display will be off.
The Status (A) is a standard HBIOS result code.
### Function 0x34 -- DSKY Show Segments (DSKYSHOWSEG)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x34 | A: Status |
| HL: Buffer Address | |
Display the segment-encoded values on the segment display. The encoding
is defined at the start of this section. The entire displa is updated
and it is assumed that an 8 character buffer will be pointed to by HL.
The buffer must reside in high memory.
The Status (A) is a standard HBIOS result code.
### Function 0x35 -- DSKY Keypad LEDs (DSKYKEYLEDS)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x35 | A: Status |
| HL: Buffer Address | |
Light the LEDs for the keypad keys according to the
bitmap contained in the buffer pointed to by HL. The buffer
must be located in high memory and is assumed to be 8 bytes.
At this time, the bitmap is specific to the PKD hardware.
This function is ignored by the ICM hardware.
The Status (A) is a standard HBIOS result code.
### Function 0x36 -- DSKY Status LED (DSKYSTATLED)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x36 | A: Status |
| D: LED Number | |
| E: LED State | |
Set or clear the status LED specified in D. The state of
the LED is contained in E. If E=0, the LED will be turned
off. If E=1, the LED will be turned on.
This function is specific to the PKD hardware. It will be ignored
by the ICM hardware.
The Status (A) is a standard HBIOS result code.
### Function 0x37 -- DSKY Beep (DSKYBEEP)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x37 | A: Status |
Beep the onboard speaker of the DSKY.
This function is specific to the PKD hardware. It will be ignored
by the ICM hardware.
The Status (A) is a standard HBIOS result code.
### Function 0x38 -- DSKY Device (DSKYDEVICE)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x38 | A: Status |
| | C: Device Attributes |
| | D: Device Type |
| | E: Device Number |
| | H: Device Unit Mode |
| | L: Device I/O Base Address |
Returns device information for the DSKY unit. The Status (A) is a
standard HBIOS result code.
Device Attribute (C) values are not yet defined. Device Type (D)
indicates the specific hardware driver that handles the specified
character unit. Values are listed at the start of this section. Device
Number (E) indicates the physical device number assigned per driver
which is always 0 for DSKY.
Device Mode (H) is used to indicate the variant of the chip or circuit
that is used by the specified unit. The Device I/O Base Address (L)
indicates the starting port address of the hardware interface that is
servicing the specified unit. Both of these values are considered
driver specific. Refer to the associated hardware driver for the values
used.
`\clearpage`{=latex}
## Video Display Adapter (VDA)
The VDA functions are provided as a common interface to Video Display
@@ -1619,7 +1819,7 @@ Status (A) is a standard HBIOS result code.
| E: 0x04 | HL: Ports |
| | DE: Ports |
This subfunction reports detailed device informatoin for the specified
This subfunction reports detailed device information for the specified
Sound Unit (C).
Driver Identity (B) reports the audio device type. Ports (HL & DE)
@@ -1652,7 +1852,7 @@ the duration, the actual duration is applied in the SNDPLAY function.
If the Duration (HL) is set to zero, then the SNDPLAY function will
operate in a non-blocking mode. i.e. a tone will start playing and the
play function will return. The tone will continue to play until the next
tone is played. If the Duration (HL) is greater than zero, the the
tone is played. If the Duration (HL) is greater than zero, the
sound will play for the duration defined in HL and then return.
**\*\*\* Function Not Implemented \*\*\**
@@ -2024,7 +2224,7 @@ lookup.
Return the value of the global system timer Tick Count (DEHL). This is
a double-word binary value. The frequency of the system timer in Hertz
is returned in Frequncy (C). The returned Status (A) is a standard HBIOS
is returned in Frequency (C). The returned Status (A) is a standard HBIOS
result code.
Note that not all hardware configuration have a system timer. You
@@ -2123,6 +2323,17 @@ Wait States (D) is the actual number of wait states, not the number
of wait states added. The returned Status (A) is a standard HBIOS
result code.
#### SYSGET Subfunction 0xF4 -- Get Front Panel Swithes (PANEL)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF8 | A: Status |
| C: 0xF4 | L: Switches |
This function will return the current value of the switches (L) from the
front panel of the system. If no front panel is available in the
system, the returned Status (A) will indicate a No Hardware error.
### Function 0xF9 -- System Set (SYSSET)
| **Entry Parameters** | **Returned Values** |
@@ -2197,7 +2408,7 @@ Wait States (E) will be set if possible. The value of Memory Wait
States (D) is the actual number of wait states, not the number of wait
states added.
Some peripherals are dependant on the CPU speed. For example, the Z180
Some peripherals are dependent on the CPU speed. For example, the Z180
ASCI baud rate and system timer are derived from the CPU speed. The
Set CPU Speed function will attempt to adjust these peripherals for
correct operation after modifying the CPU speed. However, in some
@@ -2206,6 +2417,18 @@ limited set of divisors. If there is no satisfactory divisor to
retain the existing baud rate under the new CPU speed, then the baud
rate of the ASCI port(s) will be affected.
#### SYSSET Subfunction 0xF4 -- Set Front Panel LEDs (PANEL)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF9 | A: Status |
| C: 0xF4 | |
| L: LEDs | |
This function will set the front panel LEDs based on the bits in L. If
no front panel is available in the system, the returned Status (A) will
indicate a No Hardware error.
### Function 0xFA -- System Peek (SYSPEEK)
| **Entry Parameters** | **Returned Values** |
@@ -2389,7 +2612,7 @@ are not reported to the console.
If the diagnosis level is set to display the diagnosis information, then
memory address, register dump and error code is displayed.
A key differance with the PANIC error is that execution may be continued.
A key difference with the PANIC error is that execution may be continued.
Example error message:

View File

@@ -133,7 +133,7 @@ contributions are very welcome.
#### Distribution Directory Layout
The RomWBW distribution is a compressed zip archive file organized in
a set of directories. Each of these directories has it's own
a set of directories. Each of these directories has its own
ReadMe.txt file describing the contents in detail. In summary, these
directories are:
@@ -201,6 +201,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
| [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrc.rom | 115200 |
| [Z280 ZZ80MB SBC]^7^ | RCBus | RCZ280_zz80mb.rom | 115200 |
| [Z80-Retro SBC]^8^ | - | Z80RETRO_std.rom | 38400 |
| ^1^Designed by Andrew Lynch
| ^2^Designed by Sergey Kiselev
@@ -209,6 +210,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
| ^5^Designed by Stephen Cousins
| ^6^Designed by Steve Garcia
| ^7^Designed by Bill Shen
| ^8^Designed by Peter Wilson
RCBus refers to Spencer Owen's RC2014 bus specification and derivatives
including RC26, RC40, RC80, and BP80.
@@ -405,8 +407,9 @@ to your system that is not automatically identified, you may need
to build a custom ROM to add support for it. Building a custom ROM
is covered later.
[Appendix A - Device Summary] contains a list of the RomWBW hardware devices which may
help you identify the hardware discovered in your system.
[Appendix B - Device Summary] contains a list of the RomWBW hardware
devices which may help you identify the hardware discovered in your
system.
## Device Unit Assignments
@@ -529,7 +532,7 @@ ROM Applications:
To start a ROM application you just enter the corresponding letter at
the Boot Loader prompt. In the following example, we launch the
built-in Micrsosoft BASIC interpreter. From within BASIC, we use the
built-in Microsoft BASIC interpreter. From within BASIC, we use the
`BYE` command to return to the Boot Loader:
```
@@ -620,7 +623,7 @@ Boot [H=Help]: 4
Booting Disk Unit 4, Slice 0, Sector 0x00000800...
Volume "Unlabeled" [0xD000-0xFE00, entry @ 0xE600]...
Volume "Unlabelled" [0xD000-0xFE00, entry @ 0xE600]...
CBIOS v3.1.1-pre.194 [WBW]
@@ -660,7 +663,7 @@ Boot [H=Help]: 4.3
Booting Disk Unit 4, Slice 3, Sector 0x0000C800...
Volume "Unlabeled" [0x0100-0x1000, entry @ 0x0100]...
Volume "Unlabelled" [0x0100-0x1000, entry @ 0x0100]...
CP/M V3.0 Loader
Copyright (C) 1998, Caldera Inc.
@@ -720,7 +723,7 @@ The 'R' command within the Boot Loader performs a software reset of
the system. It is the software equivalent of pressing the reset
button.
There is generallhy no need to do this, but it can be convenient when
There is generally no need to do this, but it can be convenient when
you want to see the boot messages again or ensure your system is in
a clean state.
@@ -735,7 +738,7 @@ Restarting System...
Your system can support a number of devices for the console. They may
be VDU type devices or serial devices. If you want to change which
device is the console, the ***I*** menu option can be used to choose
the unit and it's speed.
the unit and its speed.
The command format is ```I <unit> [<baudrate>]```
@@ -781,6 +784,55 @@ The use of diagnostic levels above 4 are really intended only for
software developers. I do not recommend changing this under
normal circumstances.
## Front Panel
RomWBW supports the concept of a simple front panel. The following
image is a conceptual view of such a front panel. If your system has a
front panel, it should look similar to the [RomWBW Front Panel](#panel).
![RomWBW Front Panel](Graphics/Panel){#panel width=50% }
The LEDs in the top row of the panel are used for multiple purposes.
They are initially used to display the progress of the
system boot. This may help in diagnosing a hardware or configuration
issue in a system that does not progress far enough to display text
output on the console. The meaning of the LEDs is:
| | |
|------------|------------------------------|
| `O-------` | System Boot has started |
| `OO------` | Common RAM bank activated |
| `OOO-----` | HBIOS transitioned to RAM |
| `OOOO----` | Basic initialization done |
| `OOOOO---` | CPU detection complete |
| `OOOOOO--` | System timer configured |
| `OOOOOOO-` | Pre-console device init done |
| `OOOOOOOO` | Console activation |
Once the system has booted, the LEDs are used to indicate disk device
activity. Each LED numbered 7-0 represents disk units 7-0. As each
disk device performs I/O, the LED will light.
The second row of the front panel is composed of switches that allow
you to control a few aspects of the system startup.
The first two switches affect the device used as the console initially.
Setting the CRT/Serial switch will cause the system to boot directly
to an attached CRT device (if available). Setting the Pri/Sec switch
will cause the system to boot to the secondary Serial or CRT device
(depending on the setting of the first switch).
The final six switches allow you to cause the system to automatically
boot into a desired function. The Auto/Menu switch must be set to
enable this, otherwise the normal ROM Loader prompt will be used.
If the Disk/ROM switch is not set, then you can use the last 3
switches to select a ROM app to auto-start. If the Disk/ROM switch is
set, then the system will attempt a disk boot based on the following
switches. The Floppy/Hard switch can be used to boot to a Floppy or
Hard Disk. In either case, the first Floppy or Hard Disk will be used
for the boot. If a Hard Disk boot is selected, then the last three
switches can be used to select any of the first 8 slices.
# Disk Management
The systems supported by RomWBW all have the ability to use persistent
@@ -823,11 +875,11 @@ The messages you see will vary depending on your hardware and the
media you have installed. But, they will all have the same general
format as the example above.
Once your your system has working disk devices, they will be accessible
Once your system has working disk devices, they will be accessible
from any operating system you choose to run. Disk storage is available
whether you boot your OS from ROM or from the disk media itself.
Refering back to the Boot Loader section on "Launching from ROM", you
Referring back to the Boot Loader section on "Launching from ROM", you
could start CP/M 2.2 using the 'C' command. As the operating system
starts up, you should see a list of drive letters assigned to the disk
media you have installed. Here is an example of this:
@@ -1071,7 +1123,7 @@ PROGRESS: TRACK=4F HEAD=01 SECTOR=01
```
Since the physical format of floppy media is the same as that used
in a standard MS-DOS/Windows computer, you can also physicall format
in a standard MS-DOS/Windows computer, you can also physical format
floppy media in a modern computer. However, the directory format
itself will not be compatible with CP/M OSes. In this case, you
can use the `CLRDIR` application supplied with RomWBW to reformat
@@ -1091,7 +1143,7 @@ after inserting a new floppy disk.
Under RomWBW, a hard disk is similar to a floppy disk in that it is
considered a disk unit. However, RomWBW has multiple features that
allow it's legacy operating systems to take advantage of modern
allow its legacy operating systems to take advantage of modern
mass storage media.
To start with, the concept of a hard disk in RomWBW applies to any
@@ -1340,7 +1392,7 @@ B>stat e:dsk:
```
It is critical that you include "dsk:" after the drive letter in the
`STAT` command line. The important line to look at is labeled "32 Byte
`STAT` command line. The important line to look at is labelled "32 Byte
Directory Entries". In this case, the value is 1024 which implies that
this drive is located on a modern (hd1k) disk layout. If the value
was 512, it would indicate a legacy (hd512) disk layout.
@@ -1366,7 +1418,7 @@ Essentially, this means you are creating a set of blank directories on
your disk so that files can be saved there. This process is described
below under Disk Initialization. In this scenario, you will need to
subsequently copy any files you want to use onto the newly initialized
disk (see Transferring Files).
disk (see [Transferring Files]).
You will notice that in the following instructions there is no mention
of specific hardware. Because the RomWBW firmware provides a
@@ -1402,6 +1454,7 @@ The following table shows the disk images available.
| xxx_cpm3.img | DRI CP/M 3 Operating System | Yes |
| xxx_zpm3.img | ZPM3 Operating System | Yes |
| xxx_qpm.img | QPM Operating System | Yes |
| xxx_dos65.img | DOS/65 Operating System | Yes |
| xxx_ws4.img | WordStar v4 & ZDE Applications | No |
You will find 3 sets of these .img files in the distribution. The
@@ -1411,8 +1464,8 @@ layout hard disk image.
There is also an image file called "psys.img" which contains a bootable
p-System hard disk image. It contains 6 p-System filesystem slices, but
these are not interoperable with the CP/M slices described above. This
file is discussed separately under p-System in the Operating Systems
these are not interoperable with the CP/M slices described above. This
file is discussed separately under p-System in the [Operating Systems]
section.
### Floppy Disk Images
@@ -1462,7 +1515,7 @@ hard disk image with the specific slice contents you choose.
#### Combo Hard Disk Image
The combo disk image is essentially just a single image that has several
of the individual filesystem images already concatenated together. The
of the individual filesystem images already concatenated together. The
combo disk image contains the following 6 slices in the positions
indicated:
@@ -1516,6 +1569,9 @@ In all of the examples above, the resulting file (hd.img) would now be
written to your hard disk media and would be ready to use in a RomWBW
system.
If you wish to further customize or create new disk image definitions,
please refer to the ReadMe.txt file in the Source/Images directory.
#### Writing Hard Disk Images
Once you have chosen a combo hard disk image file or prepared your own
@@ -1539,7 +1595,7 @@ image that you write to your hard disk media. You can use additional
slices as long your media has room for them. However, writing the disk
image will not initialize the additional slices. If these additional
slices were previously initialized, they will not be corrupted when you
write the new image and will still contain their prvious contents. If
write the new image and will still contain their previous contents. If
the additional slices were not previously initialized, you can use
`CLRDIR` to do so and optionally `SYSCOPY` if you want them to be
bootable.
@@ -1770,7 +1826,7 @@ less likely to encounter compatibility issues.
#### Boot Disk
To make make a bootable CP/M disk, use the RomWBW `SYSCOPY` tool
To make a bootable CP/M disk, use the RomWBW `SYSCOPY` tool
to place a copy of the operating system on the boot track of
the disk. The RomWBW ROM disk has a copy of the boot track
call "CPM.SYS". For example:
@@ -1786,7 +1842,7 @@ call "CPM.SYS". For example:
* `SUBMIT.COM` has been patched per DRI to always place submit
files on A:. This ensures the submitted file will always be
properlly executed.
properly executed.
* The original versions of DDT, DDTZ, and ZSID used the RST 38
vector which conflicts with interrupt mode 1 use of this vector.
@@ -1818,7 +1874,7 @@ via the NZ-COM adaptation (see below).
#### Boot Disk
To make make a bootable Z-System disk, use the RomWBW `SYSCOPY` tool
To make a bootable Z-System disk, use the RomWBW `SYSCOPY` tool
to place a copy of the operating system on the boot track of
the disk. The RomWBW ROM disk has a copy of the boot track
call "ZSYS.SYS". For example:
@@ -1896,7 +1952,7 @@ configured in the most basic way possible. You should refer to the
documentation and use `MKZCM` as desired to customize your system.
NZCOM has substantially more functionality than CP/M or basic
Z-System. It is important to read the the "NZCOM Users
Z-System. It is important to read the "NZCOM Users
Manual.pdf" document in order to use this operating system effectively.
#### Documentation
@@ -1933,29 +1989,48 @@ has a new suite of support tools and help system.
#### Boot Disk
To make a CP/M 3 boot disk, you actually place CPMLDR.SYS
on the system tracks of the disk. You do not place CPM3.SYS on the
system tracks. `CPMLDR.SYS` chain loads `CPM3.SYS` which must
exist as a file on the disk.
CP/M 3 uses a multi-step boot process involving multiple files.
To create (or update) a CP/M 3 boot drive, you must place `CPMLDR.SYS` on
the system track of the disk. You must also place `CPM3.SYS` and
`CCP.COM` on the target drive as regular files. Do **not** place
CPM3.SYS on the boot track. `CPMLDR.SYS` chain loads `CPM3.SYS` which
must exist as a regular file on the disk. Subsequently, `CPM3.SYS`
loads `CCP.COM`.
The CP/M 3 boot files are not included on the ROM disk due to
space constraints. You will need to transfer the files to your
system from the RomWBW distribution directory Binary\\CPM3.
space constraints. You will need to transfer the following files to
your system from the RomWBW distribution directory Binary/CPM3. You
can use XModem for this (or any of the mechanisms in [Transferring
Files].
After this is done, you will need to use `SYSCOPY` to place
the CP/M 3 loader image on the boot tracks of all CP/M 3
boot disks/slices. The loader image is called `CPMLDR.SYS`.
You must then copy (at a minimum) `CPM3.SYS` and `CCP.COM`
onto the disk/slice. Assuming you copied the CP/M 3 boot files
onto your RAM disk at A:, you would use:
- `CPMLDR.SYS`
- `CPM3.SYS` or `CPM3BNK.SYS`
- `CCP.COM`
The `CPM3.SYS` boot file is provided in 2 versions. In the Binary/CPM3
distribution directory, `CPM3.SYS` is the "non-banked" version of
CP/M 3. The `CPM3BNK.SYS` file is the "banked" version of CP/M 3. You
almost certainly want to transfer the banked `CPM3BNK.SYS` version.
After transferring the boot files to your RomWBW system, you will
need to use `SYSCOPY` to place `CPMLDR.SYS` on the boot track of the
target drive. `CPM3.SYS` and `CCP.COM` can be copied to the target
drive using any standard file copy tool such as `PIP` or `COPY`.
You do not need to be booted into CP/M 3 to create or update a CP/M 3
disk. The recommended approach is to boot CP/M 2.2 or Z-System from
ROM. Transfer the boot files to the RAM disk. Then simply copy the
files onto the CP/M 3 disk. Assuming the target CP/M 3 disk is F:, you
can use the following commands to place the files on the target drive:
```
SYSCOPY C:=CPMLDR.SYS
PIP C:=CPM3.SYS
PIP C:=CCP.COM
SYSCOPY F:=A:CPMLDR.SYS
COPY A:CPM3BNK.SYS F:CPM3.SYS
COPY A:CCP.COM F:
```
Note in the example above that `CPM3BNK.SYS` is renamed to `CPM3.SYS`
in the copy command.
#### Notes
- The `COPYSYS` command described in the DRI CP/M 3 documentation is
@@ -1968,16 +2043,29 @@ PIP C:=CCP.COM
program of CP/M 3 is completely different/incompatible from the
`SUBMIT` program of CP/M 2.2.
* RomWBW fully suppoerts CP/M 3 file date/time stamping, but this
- RomWBW fully supports CP/M 3 file date/time stamping, but this
requires that the disk be properly initialized for it. This process
has not been performed on the CP/M 3 disk image. Follow the
CP/M 3 documentation to complete this process.
CP/M 3 documentation to complete this process, if desired.
## Simeon Cran's ZPM3
## ZPM3
ZPM3 is an interesting combination of the features of both CP/M 3 and
ZCPR 3. Essentially, it has the features of and compatibility with
both.
Simeon Cran's ZPM3 is an interesting combination of the features of both
CP/M 3 and ZCPR3. Essentially, it has the features of and
compatibility with both.
Due to this dual compatibility, the ZPM3 distribution image contains
most of the standard CP/M 3 files as well as a variety of common ZCPR3
applications. However, you will notice that user area 0 of the disk has
only a few files. Most of the files are distributed among other user
areas which is standard practice for ZCPR3. Most importantly, you will
see most of the applications in user area 15. The applications can be
executed from any user area because ZPM3 has a default search path that
includes User 15.
The ZPM3 distribution comes with essentially no utility programs at
all. In addition to the standard CP/M 3 utilities, RomWBW includes
a variety of common ZCPR3 utilities.
#### Documentation
@@ -1986,31 +2074,55 @@ CP/M 3 and ZCPR 3.
#### Boot Disk
ZPM3 uses a multi-step boot process involving multiple files. The ZPM3
boot files are not included on the ROM disk due to space constraints.
You will need to transfer the files to your system from the RomWBW
distribution directory Binary\\ZPM3.
To create (or update) a ZPM3 boot drive, you must place `ZPMLDR.SYS` on
the system track of the disk. You must also place `CPM3.SYS`,
`ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM` on the target drive as
regular files. Do **not** place CPM3.SYS on the boot track.
`ZPMLDR.SYS` chain loads `CPM3.SYS` which must exist as a regular file
on the disk. Subsequently, `CPM3.SYS` loads `CCP.COM`.
After this is done, you will need to use `SYSCOPY` to place the ZPM3
loader image on the boot tracks of the disk. The loader image is called
`ZPMLDR.SYS`. You must then copy (at a minimum) `CPM3.SYS`, `ZCCP.COM`,
`ZINSTAL.ZPM`, and `STARTZPM.COM` onto the disk/slice. Assuming you
copied the ZPM3 boot files onto your RAM disk at A:, you would use:
The CP/M 3 boot files are not included on the ROM disk due to space
constraints. You will need to transfer the following files to your
system from the RomWBW distribution directory Binary/ZPM3. You can use
XModem for this (or any of the mechanisms in [Transferring Files].
- `ZPMLDR.SYS`
- `CPM3.SYS`
- `ZCCP.COM`
- `ZINSTAL.ZPM`
- `STARTZPM.COM`
You may be surprised to see the file called `CPM3.SYS`. This is not a
typo. Although it is called `CPM3.SYS`, it is ZPM and not the same as
`CPM3.SYS` in the CPM3 directory. Also, unlike CP/M 3, ZPM3 is always
banked, so you will not find two versions of the file. `CPM3.SYS` is a
banked implementation of ZPM3.
After transferring the boot files to your RomWBW system, you will
need to use `SYSCOPY` to place `ZPMLDR.SYS` on the boot track of the
target drive. The remaining boot files can be copied to the target
drive using any standard file copy tool such as `PIP` or `COPY`.
You do not need to be booted into ZPM3 to create or update a ZPM3
disk. The recommended approach is to boot CP/M 2.2 or Z-System from
ROM. Transfer the boot files to the RAM disk. Then simply copy the
files onto the ZPM disk. Assuming the target ZPM3 disk is F:, you
can use the following commands to place the files on the target drive:
```
A>B:SYSCOPY C:=ZPMLDR.SYS
A>B:COPY CPM3.SYS C:
A>B:COPY ZCCP.COM C:
A>B:COPY ZINSTAL.ZPM C:
A>B:COPY STARTZPM.COM C:
SYSCOPY F:=A:ZPMLDR.SYS
COPY A:CPM3.SYS F:CPM3.SYS
COPY A:CCP.COM F:
COPY A:ZINSTAL.ZPM F:
COPY A:STARTZPM.COM F:
```
#### Notes
* The ZPM operating system is contained in the file called CPM3.SYS
- The ZPM3 operating system is contained in the file called CPM3.SYS
which is confusing, but this is as intended by the ZPM3 distribution.
I believe it was done this way to make it easier for users to transition
from CP/M 3 to ZPM3.
I believe it was done this way to make it easier for users to
transition from CP/M 3 to ZPM3.
## QP/M
@@ -2029,18 +2141,27 @@ regarding the RomWBW adaptation and customizations.
#### Boot Disk
There is no RomWBW-specific boot disk creation procedure. QP/M
comes with a QINSTALL tool for this purpose. You can use the
tool if you want to perform a fresh installation.
comes with a QINSTALL which is used to install QPM over an existing
CP/M 2 installation or to update an existing QPM disk. `QINSTALL.COM`
is included with the RomWBW distribution.
#### Notes
* QPM is not available as source. This implementation was based
- QPM is not available as source. This implementation was based
on the QPM binary distribution and has been minimally customized
for RomWBW.
* QINSTALL is used to customize QPM. It is included on the
- QINSTALL is used to customize QPM. It is included on the
disk image. You should review the notes in the ReadMe.txt
file in Source/Image/d_qpm before making changes.
file in Source/Images/d_qpm before making changes.
- In addition to the QPM disk image, all of the QPM distribution
files can be found in the RomWBW distribution in the
Source/Images/d_qpm/u0 directory.
- The QPM disk image is not included as one of the slices on the
RomWBW combo disk image. If you want to include QPM, you can do
so by following the directions in Source/Images/Readme.txt.
## UCSD p-System
@@ -2053,7 +2174,7 @@ some other distributions, this implements a native p-System
Z80 Extended BIOS, it does not rely on a CP/M BIOS layer.
The p-System is provided on a hard disk image file called
psys.img. This must be copied to it's own dedicated hard
psys.img. This must be copied to its own dedicated hard
disk media (CF Card, SD Card, etc.). It is booted by
selecting slice 0 of the corresponding hard disk unit at
the RomWBW Boot Loader prompt. Do not attempt to use
@@ -2092,18 +2213,23 @@ file which is bootable.
output will be garbled if no such terminal or emulator
is used for console output.
* There is no straightforward mechanism to move files in
* There is no built-in mechanism to move files in
and out of p-System. However, the .vol files in Source/pSys
can be read and modified by CiderPress. CiderPress is able
to add and remove individual files.
Andrew Davidson has created a Python script that can extract p-System
volumes from an existing disk image file. The script is also capable
of inserting a modified volume back into the disk image file.
This tool is available at
<https://github.com/robosnacks/psysimg>.
## FreeRTOS
Phillip Stevens has ported FreeRTOS to run under RomWBW. FreeRTOS is
not provided in the RomWBW distribution. FreeRTOS is available under
the
[MIT licence](https://www.freertos.org/a00114.html) and further general
information is available at
the [MIT licence](https://www.freertos.org/a00114.html)
and further general information is available at
[FreeRTOS](https://www.freertos.org/RTOS.html).
You can also contact Phillip for detailed information on the Z180
@@ -2153,7 +2279,7 @@ therefore, globally available.
| CPUSPD | Change the running CPU speed and wait states of the system. |
Some custom applications do not fit on the ROM disk. They are found on the
disk image files or the individual files can be found in the Binary\\Apps
disk image files or the individual files can be found in the Binary/Apps
directory of the distribution.
| **Application** | **Description** |
@@ -2207,7 +2333,7 @@ default FAT partition.
You can confirm the existence of the FAT partition with `FDISK80` by
using the 'P' command to show the current partition table. Here is an
example of a partition table listing from `FDISK80` that includes the
FAT partition (labeled "FAT16"):
FAT partition (labelled "FAT16"):
```
Capacity of disk 4: ( 4G) 7813120 Geom 77381010
@@ -2221,7 +2347,7 @@ Nr ---Type- A -- Start End LBA start LBA count Size
If your hard disk media does not have a FAT partition already defined,
you will need to define one using FDISK80 by using the 'N' command.
Ensure that the location and size of the FAT partition does not
overlap any of the CP/M slice area and that it fits within the szie
overlap any of the CP/M slice area and that it fits within the size
of your media.
Once the partition is defined, you will still need to format it. Just
@@ -2246,7 +2372,7 @@ If your RomWBW system has multiple disk drives/slots, you can also just
create a disk with your modern computer that is a dedicated FAT
filesystem disk. You can use your modern computer to format the disk
(floppy, CF Card, SD Card, etc.), then insert the disk in your RomWBW
computer and access if using `FAT` based on it's RomWBW unit number.
computer and access if using `FAT` based on its RomWBW unit number.
## FAT Application Usage
@@ -2334,7 +2460,7 @@ Copying...
SAMPLE.TXT ==> 4:/SAMPLE.TXT Overwrite? (Y/N) ... [OK]
SAMPLE2.TXT ==> 4:/SAMPLE2.TXT ... [OK]
2 File(s) Copiedd
2 File(s) Copied
```
# CP/NET Networking
@@ -2719,7 +2845,7 @@ usage documents.
Note that the build scripts for RomWBW create the default disk images
supplied with RomWBW. It is relatively easy to customize the contents
of the disk images that are part of RomWBW. This is described in more
detail in the Source\\Images directory of the distribution.
detail in the Source/Images directory of the distribution.
## FAT Filesystem Transfers
@@ -2779,7 +2905,7 @@ boot. To customize this file, you use the ZCPR ALIAS facility. You
will need to refer to ZCPR documentation for more information on the
ALIAS facility.
p-System has it's own startup command processing mechanism that is
p-System has its own startup command processing mechanism that is
covered in the p-System documentation.
## ROM Customization
@@ -2815,7 +2941,7 @@ built into the ROM.
# UNA Hardware BIOS
John Coffman has produced a new generation of hardware BIOS called
UNA. The standard RomWBW distribution includes it's own hardware
UNA. The standard RomWBW distribution includes its own hardware
BIOS. However, RomWBW can alternatively be constructed with UNA as
the hardware BIOS portion of the ROM. If you wish to use the UNA
variant of RomWBW, then just program your ROM with the ROM image
@@ -2845,6 +2971,31 @@ Please refer to the
[UNA BIOS Firmware Page](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:una:start)
for more information on UNA.
## UNA Usage Notes
- At startup, UNA will display a prompt similar to this:
`Boot UNA unit number or ROM? [R,X,0..3] (R):`
You generally want to choose 'R' which will then launch the RomWBW
loader. Attempting to boot from a disk using a number at the UNA
prompt will only work for the legacy (hd512) disk format. However,
if you go to the RomWBW loader, you will be able to perform a disk
boot on either disk format.
- The disk images created and distributed with RomWBW do not have the
correct system track code for UNA. In order to boot to disk under
UNA, you must first use SYSCOPY to update the system track of the
target disk. The UNA ROM disk has the correct system track files
for UNA: `CPM.SYS` and `ZSYS.SYS`. So, you can boot a ROM OS and
then use one of these files to update the system track.
- Only Z-System and CP/M 2 are available OSes under UNA at this time.
Since NZ-COM launches from CP/M 2, it is usable. p-System is not
usable under UNA.
- Some of the RomWBW-specific applications are not UNA compatible.
# Upgrading
Upgrading to a newer release of RomWBW is essentially just a matter of
@@ -2915,7 +3066,7 @@ occurred.
Similar to using the Flash utility, the system ROM can be updated
or upgraded through the ROM based updater utility. This works by
by reprogrammed the flash ROM as the file is being transfered.
by reprogrammed the flash ROM as the file is being transferred.
This has the advantage that secondary storage is not required to
hold the new image.
@@ -2937,7 +3088,7 @@ firmware, you are likely to have odd problems.
The simplest way to update your disk media is to just use your modern
computer to overwrite the entire media with the latest disk image of
your choice. This process is described below in the Disk Images
your choice. This process is described below in the [Disk Images]
section. If you wish to update existing disk media in your system, you
need to perform the following steps.
@@ -2953,7 +3104,7 @@ them over any older versions of the app on your disk:
* ASSIGN.COM
* SYSCOPY.COM
* MODE.COM
* FDU.COM (was FDTST.COM)
* FDU.COM
* FORMAT.COM
* XM.COM
* FLASH.COM
@@ -2961,14 +3112,13 @@ them over any older versions of the app on your disk:
* TALK.COM
* RTC.COM
* TIMER.COM
* INTTEST.COM
For example: `B>COPY ASSIGN.COM C:`
Some RomWBW custom applications are too large to fit on the ROM disk.
If you are using any of these you will need to transfer them to your
system and then update all copies. These applications are found in
the Binary\\Apps directory of the distribution and in all of the disk
the Binary/Apps directory of the distribution and in all of the disk
images.
* FAT.COM
@@ -2976,33 +3126,77 @@ images.
## System Update
If the system running ROMWBW utilizes the SST39SF040 Flash chip then it
is possible to do a System Update in place of a System Upgrade in some
cases.
As previously described, a RomWBW ROM contains ROM applications as well
as a ROM disk image. If you are upgrading your ROM with a new patch
level release, you may wish to upgrade just the application portion of
the ROM. This is referred to as a System Update.
A System Update would involve only updating the BIOS, ROM applications
and CP/M system.
If the system running ROMWBW utilizes the SST39SF040 Flash chip then it
is possible to do a System Update in place of a System Upgrade in some
cases. A System Update would involve only updating the BIOS, ROM
applications and ROM-hosted operating systems.
A System Update may be more favorable than a System Upgrade in cases
such as:
- Overwriting of the ROM drive is not desired.
- Space is unavailable to hold a full ROMWBW ROM.
- To mimimize time taken to transfer and flash a full ROM.
- Configuration changes are only minor and do not impact disk applications.
- Overwriting of the ROM drive contents is not desired.
- Temporary disk space is unavailable to hold a full ROM image.
- To reduce the time taken to transfer and flash a full ROM.
- Configuration changes are only minor and do not impact disk
applications.
The ROMWBW build process generates a system upgrade file along with
The RomWBW build process generates a system update file along with
the normal ROM image and can be identified by the extension ".upd". It
will be 128Kb in size. In comparison the normal ROM image will have
the extension ".rom" and be 512Kb or 1024Kb in size.
Transferring and flashing the System Update is accomplished in the
same manner as described above in *Upgrading* with the required
difference being that the flash application needs to be directed to
complete a partial flash using the /P command line switch.
Transferring and flashing the System Update is accomplished in the same
manner as described above in [Upgrading via Flash Utility] with the
required difference being that the flash application needs to be
directed to complete a partial flash using the /P command line switch.
`E>FLASH WRITE ROM.UPD /P`
# Related Projects
Outside of the hardware platforms adapted to RomWBW, there are a variety
of software projects that either target RomWBW specifically or provide
a RomWBW-specific variation.
## Z88DK
Z88DK is a software powerful development kit for Z80 computers
supporting both C and assembly language. This kit now provides
specific library support for RomWBW HBIOS. The Z88DK project is
hosted at <https://github.com/z88dk/z88dk>.
## Paleo Editor
Steve Garcia has created a Windows-hosted IDE that is tailored to
development of RomWBW. The project can be found at
<https://github.com/alloidian/PaleoEditor>.
## p-System Volume Management Script
Andrew Davidson has created a Python script to automate the insertion
and deletion of volumes within the p-System disk image. These scripts
are hosted at <https://github.com/robosnacks/psysimg>.
## Z80 fig-FORTH
Dimitri Theulings' implementation of fig-FORTH for the Z80 has a
RomWBW-specific variant. This fig-FORTH is built into the RomWBW
ROM. However, the project itself is hosted at
<https://github.com/dimitrit/figforth>.
## RomWBW Date/Time Utility
Kevin Boone has created a generic application that will display or
set the date/time of an RTC on RomWBW. The application runs on all of
the CP/M OS variants. This tool (`WDATE`) is included on the RomWBW
OS disk images. The project is hosted at
<https://github.com/kevinboone/wdate-cpm>.
# Acknowledgments
I want to acknowledge that a great deal of the code and inspiration
@@ -3013,7 +3207,7 @@ please let me know if I missed you!
* Andrew Lynch started it all when he created the N8VEM Z80 SBC
which became the first platform RomWBW supported. Some of his
code can still be found in RomWBW.
original code can still be found in RomWBW.
* Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
@@ -3025,23 +3219,30 @@ please let me know if I missed you!
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
* Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
* David Giles created support for the Z180 CSIO which is now included
SD Card driver.
* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
* Ed Brindley contributed some of the code that supports the RCBus
platform.
* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver as well as a long list of general code
enhancements.
* Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage.
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
* Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW
with many of them.
* Alan Cox has contributed some driver code and has provided a great
deal of advice.
* The CP/NET client files were developed by Douglas Miller.
* Phillip Stevens contributed support for FreeRTOS.
@@ -3061,6 +3262,11 @@ please let me know if I missed you!
* The RomWBW Disk Catalog document was produced by Mykl Orders.
* Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games
compendium.
Contributions of all kinds to RomWBW are very welcome.
# Licensing
@@ -3082,15 +3288,15 @@ Portions of RomWBW were created by, contributed by, or derived from
the work of others. It is believed that these works are being used
in accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of it's intended
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen
> wwarthen@gmail.com
> $doc_author$ \
> [$doc_authmail$](mailto:$doc_authmail$)
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as
a cohesive system. Each program may have it's own licensing which
a cohesive system. Each program may have its own licensing which
may be different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is
@@ -3248,7 +3454,7 @@ the RomWBW HBIOS configuration.
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 20.000 MHz assumed
- Otherwise 8.000 MHz assumed
- System timer is generated by onboard CTC
- Hardware auto-detected:
- Onboard DS1302 RTC
@@ -3652,6 +3858,7 @@ the RomWBW HBIOS configuration.
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
@@ -3675,6 +3882,7 @@ the RomWBW HBIOS configuration.
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
@@ -3698,11 +3906,27 @@ the RomWBW HBIOS configuration.
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
`\clearpage`{=latex}
### Z80-Retro SBC
| | |
|-------------------|------------------|
| ROM Image File | Z80RETRO_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | Mode 2 |
- CPU speed is assumed to be 14.7456 MHz
- Hardware auto-detected:
- SIO Serial Interface Module
- Onboard CTC
`\clearpage`{=latex}
## Appendix B - Device Summary
The table below briefly describes each of the possible devices that
@@ -3719,13 +3943,15 @@ may be discovered by RomWBW in your system.
| DMA | System | Zilog DMA Controller |
| DS1307 | RTC | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM |
| DS1501RTC | RTC | Maxim DS1501/DS1511 Watchdog Real-Time Clock |
| DSKY | System | Keypad & Display |
| DSRTC | RTC | Maxim DS1302 Real-Time Clock w/ NVRAM |
| DUART | Char | SCC2681 or compatible Dual UART |
| FD | Disk | 8272 of compatible Floppy Disk Controller |
| EMM | Disk | Disk drive on Parallel Port emm interface (Zip Drive) |
| FD | Disk | 8272 or compatible Floppy Disk Controller |
| GDC | Video | uPD7220 Video Display Controller |
| HDSK | Disk | SIMH Simulator Hard Disk |
| IDE | Disk | IDE/ATA Hard Disk Interface |
| ICM | DsKy | ICM7218-based Display/Keypad on PPI |
| IMM | Disk | IMM Zip Drive on PPI |
| INTRTC | RTC | Interrupt-based Real Time Clock |
| KBD | Kbd | 8242 PS/2 Keyboard Controller |
| KIO | System | Zilog Serial/ Parallel Counter/Timer |
@@ -3734,7 +3960,9 @@ may be discovered by RomWBW in your system.
| MSXKYB | Kbd | MSX Compliant Matrix Keyboard |
| I2C | System | I2C Interface |
| PIO | Char | Zilog Parallel Interface Controller |
| PKD | DsKy | P8279-based Display/Keypad on PPI |
| PPIDE | Disk | 8255 IDE/ATA Hard Disk Interface |
| PPA | Disk | PPA Zip Drive on PPI |
| PPK | Kbd | Matrix Keyboard |
| PPPSD | Disk | ParPortProp SD Card Interface |
| PPPCON | Serial | ParPortProp Serial Console Interface |
@@ -3747,10 +3975,12 @@ may be discovered by RomWBW in your system.
| SIO | Char | Zilog Serial Port Interface |
| SN76489 | Sound | SN76489 Programmable Sound Generator |
| SPK | Sound | Bit-bang Speaker |
| SYQ | Disk | Iomega SparQ Drive on PPI |
| TMS | Video | TMS9918/38/58 Video Display Controller |
| UART | Char | 16C550 Family Serial Interface |
| USB-FIFO | Char | FT232H-based ECB USB FIFO |
| VDU | Video | MC6845 Family Video Display Controller |
| VGA | Video | HD6445CP4-based Video Display Controller |
| VRC | Video | VGARC Video Display Controller |
| YM | Audio | YM2612 Programmable Sound Generator |
| Z2U | Char | Zilog Z280 CPU Built-in Serial Ports |

View File

@@ -11,8 +11,8 @@ echo Preparing compressed font files...
lzsa -f2 -r font8x8u.bin font8x8c.bin || exit /b
lzsa -f2 -r font8x11u.bin font8x11c.bin || exit /b
lzsa -f2 -r font8x16u.bin font8x16c.bin || exit /b
lzsa -f2 -r fontcgau.bin fontcgac.bin || exit /b
lzsa -f2 -r fontvgarcu.bin fontvgarcc.bin || exit /b
fonttool font8x8u.bin > font8x8u.asm || exit /b
fonttool font8x11u.bin > font8x11u.asm || exit /b
@@ -20,6 +20,7 @@ fonttool font8x16u.bin > font8x16u.asm || exit /b
fonttool font8x8c.bin > font8x8c.asm || exit /b
fonttool font8x11c.bin > font8x11c.asm || exit /b
fonttool font8x16c.bin > font8x16c.asm || exit /b
fonttool fontcgau.bin > fontcgau.asm || exit /b
fonttool fontcgac.bin > fontcgac.asm || exit /b
fonttool fontvgarcu.bin > fontvgarcu.asm || exit /b
fonttool fontvgarcc.bin > fontvgarcc.asm || exit /b

View File

@@ -1,8 +1,8 @@
OBJECTS = \
font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm \
font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm
font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm fontvgarcu.asm \
font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm fontvgarcc.asm
OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin
OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin fontvgarcc.bin
TOOLS = ../../Tools
@@ -26,5 +26,8 @@ font8x16c.bin: font8x16u.bin
fontcgac.bin: fontcgau.bin
$(BINDIR)/lzsa -f2 -r $< $@
fontvgarcc.bin: fontvgarcu.bin
$(BINDIR)/lzsa -f2 -r $< $@
%.asm: %.bin
$(BINDIR)/bin2asm $< > $@

BIN
Source/Fonts/fontvgarcu.bin Normal file

Binary file not shown.

View File

@@ -117,7 +117,11 @@ GET ($F8):
L=Clock Mult (0:Half, 1:Full, 2: Double)
D=Memory Wait States
E=I/O Wait States
PANEL ($F4):
BC=Function/Subfunction A=Result
L=Switch Values
SET ($F9):
BC=Function/Subfunction A=Result
@@ -142,6 +146,11 @@ SET ($F9):
E=I/O Wait States
PANEL ($F4):
BC=Function/Subfunction A=Result
L=LED Values
PEEK ($FA):
B=Function A=Result
D=Bank E=Byte Value
@@ -475,3 +484,93 @@ TERM_ATTACH: (C=VIDEO UNIT, DE=<VDA>_DISPATCH)
- QUERY ATTACHED VDA FOR SCREEN SIZE (VIA <EMU>_VDADISP)
- INITIALIZE ALL WORKING VARIABLES AND EMULATOR STATE
- RETURN (A=STATUS)
==============
DSKY Functions
==============
RESET ($30):
B=Function A=Result
STAT ($31):
B=Function A=Result / Bytes Pending
A=Number of characters waiting or error code if negative
GETKEY ($32):
B=Function A=Result
E=Key Code
A=DSKY key value or error code if negative
SHOWHEX ($33):
B=Function A=Result
DE:HL=Value (32-bit)
Display value of DE:HL in hex on display. It is not
possible to show decimal points.
SHOWSEG ($34):
B=Function A=Result
HL=Buffer (raw segment encoded)
Display raw segment values. Each byte represents one
character. Each segment of the character is represented
by a bit. The buffer must be located in high memory.
The segments are encoded as shown below:
+--01--+
20 02
+--40--+
10 04
+--08--+ 80
KEYLEDS ($35):
B=Function A=Result
HL=Buffer (LED bitmap)
Light the LEDs for the keypad keys according to the
bitmap contained in the buffer pointed to by HL. The buffer
must be located in high memory.
At this time, the bitmap is specific to the DSKYNG hardware.
This function is ignored by the original DSKY.
STATLED ($36):
B=Function A=Result
D=LED Number
E=LED State (0/1)
Set or clear the status LED specified in D. The state of
the LED is contained in E. If E=0, the LED will be turned
off. If E=1, the LED will be turned on.
BEEP ($37):
B=Function A=Result
Beep the onboard speaker of the DSKY. Only the DSKYNG hardware
has a speaker. This function will be ignored by the original
DSKY.
DEVICE ($38):
B=Function A=Result
D=Device Type
E=Device Number
C=Device Attributes
H=Device Mode
L=Base I/O Adr
Returns device information for the DSKY unit. The Status (A) is a
standard HBIOS result code. Device Attribute (C) values are not yet
defined. Device Type (D) indicates the specific hardware driver that
handles the specified character unit. Values are listed at the start
of this section. Device Number (E) indicates the physical device
number assigned per driver which is always 0 for DSKY.
Device Mode (H) is used to indicate the variant of the chip or circuit
that is used by the specified unit. The Device I/O Base Address (L)
indicates the starting port address of the hardware interface that is
servicing the specified unit. Both of these values are considered
driver specific. Refer to the associated hardware driver for the
values used.

View File

@@ -223,5 +223,6 @@ call Build SCZ180 sc503 || exit /b
call Build DYNO std || exit /b
call Build UNA std || exit /b
call Build RPH std || exit /b
call Build Z80RETRO std || exit /b
goto :eof

View File

@@ -27,7 +27,7 @@ $ErrorAction = 'Stop'
# UNA BIOS is simply imbedded, it is not built here.
#
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "UNA"
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "UNA"
$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
$PlatformListZ280 = "RCZ280"

View File

@@ -38,6 +38,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh
exit

View File

@@ -42,12 +42,15 @@ RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
DSKYENABLE .SET FALSE ; ENABLES DSKY
DSKYMODE .SET DSKYMODE_NG ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYENABLE .SET TRUE ; ENABLES DSKY FUNCTIONALITY
ICMENABLE .SET FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
PKDENABLE .SET TRUE ; ENABLES DSKY NG PKD DRIVER (8259)
;
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -46,6 +49,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -46,9 +49,9 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER

View File

@@ -30,6 +30,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -45,6 +48,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -30,6 +30,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -45,6 +48,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -32,6 +32,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMLOC .SET 23 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -51,7 +54,8 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

View File

@@ -32,6 +32,9 @@ CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMSIZE .SET 256 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -59,7 +62,8 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

View File

@@ -33,11 +33,12 @@ CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
@@ -60,6 +61,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -73,5 +75,6 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -30,6 +30,9 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
@@ -55,6 +58,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -68,5 +72,6 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
SKZENABLE .SET TRUE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .SET DIV_12 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .SET WDOG_SKZ ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
@@ -50,6 +53,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -63,5 +67,6 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
@@ -37,10 +40,13 @@ ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -53,6 +59,8 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -33,11 +33,13 @@ CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;
@@ -65,6 +67,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -79,5 +82,6 @@ IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -30,6 +30,9 @@
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 1536 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
@@ -42,7 +45,8 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
@@ -55,5 +59,6 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -31,6 +31,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 2048 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
@@ -46,6 +49,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -59,5 +63,6 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -35,9 +35,12 @@ USELZSA2 .SET TRUE ; ENABLE FONT COMPRESSION
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSKYENABLE .SET TRUE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
ICMENABLE .SET TRUE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
PKDENABLE .SET TRUE ; ENABLES DSKY NG PKD DRIVER (8259)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
;

View File

@@ -30,6 +30,9 @@ INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
;
HTIMENABLE .SET TRUE ; ENABLE SIMH TIMER SUPPORT
;
SIMRTCENABLE .SET TRUE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTSBCFORCE .SET TRUE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
;

View File

@@ -35,8 +35,9 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPLED_IO .SET $0D ; FP: PORT ADDRESS FOR FP LEDS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -50,6 +51,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -35,8 +35,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -50,6 +52,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -34,8 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

View File

@@ -34,9 +34,12 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .SET $A0 ; FP: PORT ADDRESS FOR FP LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .SET $A0 ; FP: PORT ADDRESS FOR FP SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -59,3 +62,5 @@ SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS

View File

@@ -34,9 +34,12 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .SET $A0 ; FP: PORT ADDRESS FOR FP LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .SET $A0 ; FP: PORT ADDRESS FOR FP SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -59,3 +62,5 @@ SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS

View File

@@ -0,0 +1,35 @@
;
;==================================================================================================
; ZETA2 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_z80retro.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -26,7 +26,7 @@
;
#include "cfg_zeta2.asm"
;
CPUOSC .SET 20000000 ; CPU OSC FREQ IN MHZ
CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
@@ -35,7 +35,7 @@ UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -24,7 +24,8 @@ endif
include $(TOOLS)/Makefile.inc
FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm \
fontcgac.asm fontcgau.asm fontvgarcc.asm fontvgarcu.asm
ifeq ($(CPUFAM),2)
TASM=$(BINDIR)/uz80as -t hd64180

View File

@@ -634,9 +634,9 @@ ANSI_BEL:
ANSI_BS:
LD A,(ANSI_COL) ; GET CURRENT COLUMN
DEC A ; BACK IT UP BY ONE
RET C ; IF CARRY, MARGIN EXCEEDED, ABORT
RET M ; IF CARRY, MARGIN EXCEEDED, ABORT
LD (ANSI_COL),A ; SAVE NEW COLUMN
JP ANSI_XY ; UDPATE CUSROR AND RETURN
JP ANSI_XY ; UDPATE CURSOR AND RETURN
;
ANSI_CR:
XOR A ; ZERO ACCUM

View File

@@ -53,7 +53,7 @@
; ASEXT:
; 7 6 5 4 3 2 1 0
; R D C X B F D S
; 0 1 1 0 0 1 1 0 DEFAULT VALUES
; 0 1 1 0 0 0 0 0 DEFAULT VALUES
; | | | | | | | |
; | | | | | | | +-- SEND BREAK
; | | | | | | +---- BREAK DETECT (RO)
@@ -64,6 +64,10 @@
; | +-------------- DCD0 DISABLE
; +---------------- RDRF INT INHIBIT
;
ASCI_DEF_CNTLA .EQU $64
ASCI_DEF_CNTLB .EQU $20
ASCI_DEF_ASEXT .EQU $60
;
ASCI_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE
;
ASCI_NONE .EQU 0 ; NOT PRESENT
@@ -513,17 +517,29 @@ ASCI_INITDEV3:
SET 4,C ; SET CNTLB BIT 4 FOR ODD PARITY
;
ASCI_INITDEV4:
; SETUP ASEXT
LD A,D ; CONFIG HIGH BYTE
AND %00100000 ; BIT 5 IS RTS
CPL ; INVERT FOR ASEXT
LD L,A ; MOVE TO L
LD A,ASCI_DEF_ASEXT ; GET ASEXT DEFAULT
AND L ; COMBINE
LD L,A ; AND LEAVE IN L
;
; SAVE CONFIG PERMANENTLY NOW
LD (IY+4),E ; SAVE LOW WORD
LD (IY+5),D ; SAVE HI WORD
JR ASCI_INITGO
;
ASCI_INITSAFE:
LD B,$64 ; CNTLA FAILSAFE VALUE
LD C,$20 ; CNTLB FAILSAFE VALUE
LD B,ASCI_DEF_CNTLA ; CNTLA FAILSAFE VALUE
LD C,ASCI_DEF_CNTLB ; CNTLB FAILSAFE VALUE
LD L,ASCI_DEF_ASEXT ; ASEXT FAILSAFE VALUE
;
ASCI_INITGO:
; IMPLEMENT CONFIGURATION
; B = CNTLA, C=CNTLB, L=ASEXT
PUSH HL ; SAVE ASEXT
LD H,B ; H := CNTLA VAL
LD L,C ; L := CNTLB VAL
LD B,0 ; MSB OF PORT MUST BE ZERO!
@@ -532,6 +548,7 @@ ASCI_INITGO:
INC C ; BUMP TO
INC C ; ... CNTLB REG, B IS STILL 0
OUT (C),L ; WRITE CNTLB VALUE
POP HL ; RECOVER ASEXT
INC C ; BUMP TO
INC C ; ... STAT REG, B IS STILL 0
#IF ((ASCIINTS) & (INTMODE > 0))
@@ -543,8 +560,11 @@ ASCI_INITGO:
LD A,$0E ; BUMP TO
ADD A,C ; ... ASEXT REG
LD C,A ; PUT IN C FOR I/O, B IS STILL 0
LD A,$66 ; STATIC VALUE FOR ASEXT
OUT (C),A ; WRITE ASEXT REG
BIT 0,C ; IS C ADDRESSING AN ODD NUMBERED PORT?
JR NZ,ASCI_INITGOZ ; IF SO, THIS IS SEC SERIAL, NO CTS!
OUT (C),L ; WRITE ASEXT REG
;
ASCI_INITGOZ:
;
#IF ((ASCIINTS) & (INTMODE > 0))
;

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -146,7 +149,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +157,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -172,6 +175,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +187,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DYNO ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,7 +229,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -248,6 +252,12 @@ PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

View File

@@ -12,7 +12,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -95,9 +95,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -105,10 +108,13 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -194,7 +200,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -202,7 +208,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -226,6 +232,7 @@ TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -237,9 +244,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -280,7 +287,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -307,10 +314,33 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -60,9 +60,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED
@@ -70,10 +73,13 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -132,7 +138,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -154,6 +160,7 @@ TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -166,9 +173,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_MBC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -209,7 +216,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -230,11 +237,34 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_SPP ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -76,10 +79,13 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -143,7 +149,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -165,6 +171,7 @@ TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -176,9 +183,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -219,7 +226,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -244,10 +251,18 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -68,9 +68,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -78,10 +81,13 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU N8_PPI0 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU N8_PPI0 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU N8_PPI0 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -145,7 +151,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -167,6 +173,7 @@ TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSX
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -178,9 +185,9 @@ FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -221,7 +228,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -243,6 +250,12 @@ PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,18 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -146,7 +155,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +163,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -172,6 +181,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +193,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,7 +235,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -247,6 +257,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z280 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -156,7 +159,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -164,7 +167,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -182,6 +185,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -193,9 +197,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -235,7 +239,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -257,6 +261,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -65,9 +65,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6E ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -84,8 +87,8 @@ VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
@@ -150,7 +153,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -158,7 +161,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -176,6 +179,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -187,9 +191,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -229,7 +233,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -251,6 +255,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RPH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RPH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -76,10 +79,13 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU RPH_PPI0 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU RPH_PPI0 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU RPH_PPI0 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -156,6 +162,7 @@ TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSX
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -167,9 +174,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -210,7 +217,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU RPH_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -232,6 +239,12 @@ PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -60,9 +60,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -70,10 +73,13 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -132,7 +138,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -154,6 +160,7 @@ TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -161,14 +168,13 @@ MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -209,7 +215,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -231,9 +237,12 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_SCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_SCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -66,9 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -146,7 +149,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +157,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -172,6 +175,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +187,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,7 +229,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -247,6 +251,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $18 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

View File

@@ -15,10 +15,14 @@
;
#INCLUDE "../UBIOS/ubios.inc"
;
;PLATFORM .EQU PLT_UNA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
;PLATFORM .EQU PLT_UNA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_UNA ; HARDWARE BIOS: BIOS_[WBW|UNA]
;
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
@@ -32,5 +36,3 @@ ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING

View File

@@ -0,0 +1,234 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR SIMPLE Z80 RETRO
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
; UNDER THIS DIRECTORY.
;
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "Z80Retro", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_Z80RETRO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .EQU 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $60 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $61 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $62 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
MPGSEL_3 .EQU $63 ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
MPGENA .EQU $64 ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
;
RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
;
KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $40 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER (too fast for RomWBW right now)
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 0 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 1 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 7372800 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU $00 ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS
;
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_Z80R ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC/2 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC/2 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_Z80R ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC/2 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU CPUOSC/2 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 1 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0BASE .EQU $60 ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_Z80R ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
PPPBASE .EQU $60 ; PPP: PPI REGISTERS BASE ADDRESS
PPPSDENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
PPPSDTRACE .EQU 1 ; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPPCONENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
PIOSBASE .EQU $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_ZETA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_ZETA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; BIOS_[WBW|UNA]: HARDWARE BIOS
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -52,9 +52,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -62,10 +65,13 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -126,6 +132,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -137,9 +144,9 @@ FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 1 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -153,7 +160,7 @@ PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -173,6 +180,12 @@ PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

View File

@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_ZETA2 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_ZETA2 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -28,7 +28,7 @@ BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .EQU 20000000 ; CPU OSC FREQ IN MHZ
CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
@@ -63,9 +63,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -73,10 +76,13 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -137,6 +143,7 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -148,9 +155,9 @@ FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 1 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -164,7 +171,7 @@ PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -184,6 +191,12 @@ PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

View File

@@ -9,7 +9,7 @@ CTC_DEFCFG .EQU %01010011 ; CTC DEFAULT CONFIG
CTC_CTRCFG .EQU %01010111 ; CTC COUNTER MODE CONFIG
CTC_TIM16CFG .EQU %00010111 ; CTC TIMER/16 MODE CONFIG
CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG
CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG
;CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG
; |||||||+-- CONTROL WORD FLAG
; ||||||+--- SOFTWARE RESET
; |||||+---- TIME CONSTANT FOLLOWS
@@ -19,6 +19,12 @@ CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG
; |+-------- COUNTER MODE
; +--------- INTERRUPT ENABLE
;
;==================================================================================================
; ONLY IM2 IMPLEMENTED BELOW. I DON'T SEE ANY REASONABLE WAY TO IMPLEMENT AN IM1 TIMER BECAUSE
; THE CTC PROVIDES NO WAY TO DETERMINE IF IT WAS THE CAUSE OF AN INTERRUPT OR A WAY TO
; DETERMINE WHICH CHANNEL CAUSED AN INTERRUPT.
;==================================================================================================
;
#IF (INTMODE != 2)
.ECHO "*** WARNING: CTC TIMER DISABLED -- INTMODE 2 REQUIRED!!!\n"
#ENDIF
@@ -36,11 +42,52 @@ CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
; ONLY IM2 IMPLEMENTED BELOW. I DON'T SEE ANY REASONABLE WAY TO
; IMPLEMENT AN IM1 TIMER BECAUSE THE CTC PROVIDES NO WAY TO
; DETERMINE IF IT WAS THE CAUSE OF AN INTERRUPT OR A WAY TO
; DETERMINE WHICH CHANNEL CAUSED AN INTERRUPT.
;
;==================================================================================================
; TIMER SETUP
;
; A PERIODIC INTERRUPT TIMER CAN BE SETUP USING EITHER THE CPU SYSTEM CLOCK OR AN EXTERNAL
; OSCILLATOR CONNECTED TO THE CTC. THE DEFACTO PERIOD FOR THIS TIMER IS 50Hz OR 60Hz.
;
; THE DESIRED TIMER PERIOD IS SET IN THE CONFIGURATION:
; TICKFREQ .SET 60 ; OR
; TICKFREQ .SET 50
;
; THIS DRIVER USES TWO CTC CHANNELS TO CREATE A TWO STEP DIVIDER THAT DIVIDES THE CPU SYSTEM
; CLOCK OR EXTERNAL OSCILLATOR INTO A PERIODIC TICK THAT GENERATES AN INTERRUPT.
;
; THE CPU CLOCK OR CTC EXTERNAL OSCILLATOR NEEDS TO BE LESS THAN 3.932160MHz FOR A 60HZ TIMER
; TICK OR 3.276800MHz FOR A 50Hz TIMER TICK.
;
; THE CHANNELS USED ARE DEFINED BY THE CTCPRECH AND CTCTIMCH DEFINITIONS - TYPICALLY 2 & 3.
; EXTERNAL HARDWARE MUST BE CONFIGURED TO MATCH THIS CONFIGURATION.
;
; EACH CHANNEL SUCCESSIVELY DIVIDES THE CLOCK OR OSCILLATOR FREQUENCY DOWN TO A 50 OR 60Hz TICK.
; THE FIRST DIVIDER CHANNEL IS THE PRESCALER, THE SECOND IS THE TIMER CHANNEL.
;
; IF CTCMODE IS CTCMODE_CTR THEN THE OSCILLATOR CONNECTED TO CTC PRESCALER CHANNEL IS USED.
;
; THE CONFIGURATION FILES DEFINE THE OSCILLATOR FREQUENCY THAT IS CONNECTED TO THE PRESCALER
; CHANNEL. I.E. THE EXTERNAL HARDWARE CONNECTED TO THE CTC.
;
; FOR A 60Hz TIMER WITH A 3.579545Mhz OSCILLATOR USE:
; CTCMODE .SET CTCMODE_CTR
; TICKFREQ .SET 60
; CTCOSC .SET 3579545
;
; IF CTCMODE IS CTCMODE_TIM16 OR CTCMODE_TIM256 THE CPU SYSTEM CLOCK FREQUENCY IS USED.
;
; THIS MODE HAS LIMITED VALUE AS MANY SYSTEMS OPERATE ABOVE THE USABLE TOP FREQUENCY.
; THE CONFIGURATION FILE MUST BE UPDATED TO MATCH YOUR CPU CLOCK FREQUENCY.
;
; FOR A 60Hz TIMER WITH A 2Mhz OSCILLATOR USE:
; CTCMODE .SET CTCMODE_TIM256
; TICKFREQ .SET 60
; CTCOSC .SET 2000000
;
; NOTE THAT IF CPU SPEED IS CHANGED IN THIS MODE, THE TIMER SPEED WILL ALSO CHANGE.
;
;==================================================================================================
;
CTC_PREIO .EQU CTCBASE + CTCPRECH
CTC_SCLIO .EQU CTCBASE + CTCTIMCH
;
@@ -88,21 +135,28 @@ CTCTIVT .EQU INT_CTC0A + CTCTIMCH
;
#ENDIF
;
;==================================================================================================
; CTC PRE-INITIALIZATION
;
; CHECK TO SEE IF A CTC EXISTS. IF IT EXISTS, ALL FOUR CTC CHANNELS ARE PROGRAMMED TO:
; INTERRUPTS DISABLED, COUNTER MODE, RISING EDGE TRIGGER, RESET STATE.
;
; IF THE CTCTIMER CONFIGURATION IS SET, THEN A PERIOD INTERRUPT TIMER IS SET UP USING CTC CHANNELS
; 2 (CTCPRECH) & 3 (CTCTIMCH). THE TIMER WILL BE SETUP TO 50 OR 60HZ DEPENDING ON CONFIGURATION
; SETTING TICKFREQ. CHANNEL 3 WILL GENERATE THE TICK INTERRUPT..
;==================================================================================================
;
CTC_PREINIT:
; BLINDLY RESET THE CTC ASSUMING IT IS THERE
LD A,CTC_DEFCFG
OUT (CTCBASE),A
OUT (CTCBASE+1),A
OUT (CTCBASE+2),A
OUT (CTCBASE+3),A
;
CALL CTC_DETECT ; DO WE HAVE ONE?
LD (CTC_EXIST),A ; SAVE IT
RET NZ ; ABORT IF NONE
;
; RESET ALL CTC CHANNELS
LD B,4 ; 4 CHANNELS
LD C,CTCBASE ; FIRST CHANNEL PORT
CTC_PREINIT1:
LD A,CTC_DEFCFG ; CTC DEFAULT CONFIG
OUT (C),A ; CTC COMMAND
INC C ; NEXT CHANNEL PORT
DJNZ CTC_PREINIT1
;
#IF (CTCTIMER & (INTMODE == 2))
; SETUP TIMER INTERRUPT IVT SLOT
@@ -121,12 +175,12 @@ CTC_PREINIT1:
; CTC CHANNEL AS A PRESCALER AND ANOTHER AS THE ACTUAL
; TIMER INTERRUPT. THE PRESCALE CHANNEL OUTPUT MUST BE WIRED
; TO THE TIMER CHANNEL TRIGGER INPUT VIA HARDWARE.
LD A,CTC_PRECFG ; PRESCALE CHANNEL CONFIGURATION
LD A,CTC_PRECFG ; PRESCALE TIMER CHANNEL CFG
OUT (CTC_PREIO),A ; SETUP PRESCALE CHANNEL
LD A,CTC_DIVHI & $FF ; PRESCALE CHANNEL CONSTANT
OUT (CTC_PREIO),A ; SET PRESCALE CONSTANT
;
LD A,CTC_TIMCFG ; TIMER CHANNEL CONTROL WORD VALUE
LD A,CTC_CTRCFG | $80 ; TIMER CHANNEL + INT CFG
OUT (CTC_SCLIO),A ; SETUP TIMER CHANNEL
LD A,CTC_DIVLO & $FF ; TIMER CHANNEL CONSTANT
OUT (CTC_SCLIO),A ; SET TIMER CONSTANT
@@ -136,7 +190,9 @@ CTC_PREINIT1:
XOR A
RET
;
;
;==================================================================================================
; DRIVER INITIALIZATION
;==================================================================================================
;
CTC_INIT: ; MINIMAL INIT
CTC_PRTCFG:
@@ -199,30 +255,34 @@ CTC_PRTCFG1:
XOR A
RET
;
;
;==================================================================================================
; DETECT CTC BY PROGRAMMING THE FIRST CHANNEL TO COUNT IN TIMER
; MODE (BASED ON CPU CLOCK). THEN CHECK IF COUNTER IS ACTUALLY
; RUNNING.
;==================================================================================================
;
CTC_DETECT:
LD A,CTC_TIM256CFG
OUT (CTCBASE),A
XOR A
OUT (CTCBASE),A
; CTC SHOULD NOW BE RUNNING WITH TIME CONSTANT 0
LD A,CTC_TIM256CFG ; RESET
OUT (CTCBASE),A
IN A,(CTCBASE) ; SHOULD READ 0 NOW
CP 0
JR NZ,CTC_NO
LD A,CTC_TIM16CFG ; RESET & SETUP TIMER MODE
OUT (CTCBASE),A ; SEND TO CTC
LD A,$FF ; TIME CONSTANT $FF
OUT (CTCBASE),A
IN A,(CTCBASE) ; SHOULD NOT BE 0 NOW
CP 0
JR Z,CTC_NO
XOR A
RET
OUT (CTCBASE),A ; SEND CONSTANT & START CTR
NOP ; BRIEF DELAY
IN A,(CTCBASE) ; READ COUNTER
LD C,A ; SAVE VALUE
CALL DLY8 ; WAIT A BIT
IN A,(CTCBASE) ; READ COUNTER AGAIN
PUSH AF ; SAVE RESULT
LD A,CTC_DEFCFG ; DEFAULT CHANNEL CFG
OUT (CTCBASE),A ; RESTORE TO DEFAULTS
POP AF ; GET RESULT BACK
CP C ; COMPARE TO PREVIOUS
JR Z,CTC_NO ; IF SAME, FAIL
XOR A ; SIGNAL SUCCESS
RET ; AND DONE
CTC_NO:
OR $FF
RET
OR $FF ; SIGNAL FAILURE
RET ; AND DONE
;
; CTC DRIVER DATA STORAGE
;
;
CTC_EXIST .DB $FF
CTC_EXIST .DB $FF ; SET TO ZERO IF EXISTS

View File

@@ -902,5 +902,6 @@ CVDU_INIT8563:
;==================================================================================================
;
CVDU_IDAT:
.DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER
.DB CVDU_KBDST
.DB CVDU_KBDDATA

View File

@@ -31,12 +31,7 @@ BUFLEN .EQU 40 ; INPUT LINE LENGTH
JP DSKY_ENTRY
JP UART_ENTRY
;
#IF DSKYENABLE
#DEFINE USEDELAY
ENA_XM .EQU FALSE ; NO ROOM FOR BOTH DSKY+XMODEM
#ELSE
ENA_XM .EQU TRUE ; INCLUDE XMODEM IF SPACE AVAILABLE
#ENDIF
ENA_XM .EQU TRUE ; INCLUDE XMODEM
;
ENA_MBC6502 .EQU FALSE ; ENABLE OR DISABLE MBC6502 OPTION
;
@@ -149,10 +144,7 @@ SERIALCMDLOOP:
;_____________________________________________________________________________
;
INITIALIZE:
;LD A,$C3 ; JP OPCODE
;LD (0),A ; STORE AT $0000
;LD (1),HL ; STORE AT $0001
;
#IF (BIOS == BIOS_UNA)
; INSTALL UNA INVOCATION VECTOR FOR RST 08
LD A,$C3 ; JP INSTRUCTION
@@ -160,14 +152,6 @@ INITIALIZE:
LD HL,($FFFE) ; UNA ENTRY VECTOR
LD (9),HL ; STORE AT 0x0009
#ENDIF
#IF DSKYENABLE
LD B,BF_SYSGET ; HBIOS FUNC=GET SYS INFO
LD C,BF_SYSGET_CPUINFO ; HBIOS SUBFUNC=GET CPU INFO
CALL $FFF0 ; CALL HBIOS
LD A,L ; PUT SPEED IN MHZ IN ACCUM
CALL DELAY_INIT
#ENDIF
;
RET
;
@@ -878,6 +862,8 @@ GETLNLOP:
JR Z,GETLNDONE ; YES, EXIT
CP CHR_BS ; IS <BS>?
JR Z,GETLNBS ; IF SO, HANDLE IT
CP CHR_DEL ; IS <DEL>?
JR Z,GETLNBS ; IF SO, HANDLE AS <BS>
CP ' ' ; UNEXPECTED CONTROL CHAR?
JR C,GETLNLOP ; IF SO, IGNORE IT AND GET NEXT
LD B,A ; SAVE CHAR IN B FOR NOW
@@ -1276,14 +1262,6 @@ TXT_HELP .TEXT "\r\nMonitor Commands (all values in hex):"
;
#IF DSKYENABLE
;
#DEFINE DSKY_KBD
#IF (DSKYMODE == DSKYMODE_V1)
#INCLUDE "dsky.asm"
#ENDIF
#IF (DSKYMODE == DSKYMODE_NG)
#INCLUDE "dskyng.asm"
#ENDIF
;
KY_PR .EQU KY_FW ; USE [FW] FOR [PR] (PORT READ)
KY_PW .EQU KY_BK ; USE [BW] FOR [PW] (PORT WRITE)
;
@@ -1293,8 +1271,9 @@ KY_PW .EQU KY_BK ; USE [BW] FOR [PW] (PORT WRITE)
;_____________________________________________________________________________
;
DSKY_ENTRY:
; SHOULD WE DO SOMETHING HERE TO CONFIRM THAT A DSKY
; IS ACTUALLY OPERATING???
LD SP,MON_STACK ; SET THE STACK POINTER
;EI ; INTS OK NOW
LD HL,DSKY_ENTRY ; RESTART ADDRESS
CALL INITIALIZE
;
@@ -1303,12 +1282,7 @@ DSKY_ENTRY:
; START UP THE SYSTEM WITH THE FRONT PANEL INTERFACE
;_____________________________________________________________________________
;
CALL DSKY_PREINIT ; INITIALIZE DSKY
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_BEEP
#ENDIF
;
;__COMMAND_PARSE______________________________________________________________
;
@@ -1318,17 +1292,12 @@ DSKY_ENTRY:
FRONTPANELLOOP:
LD HL,CPUUP ; SET POINTER TO CPU UP MSG
CALL DSKY_SHOW ; DISPLAY UNENCODED
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTCMDKEYS
CALL DSKY_L1ON
#ENDIF
CALL KB_GET ; GET KEY FROM KB
#IF (DSKYMODE == DSKYMODE_NG)
CALL KB_GET ; GET KEY FROM DSKY
PUSH AF
CALL DSKY_L1OFF
#ENDIF
POP AF
FRONTPANELLOOP1:
CP KY_PR ; IS PORT READ?
@@ -1364,11 +1333,7 @@ DOBOOT:
;_____________________________________________________________________________
;
DOPORTREAD:
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTNUMKEYS
#ENDIF
CALL GETPORT ; GET PORT INTO A
PORTREADLOOP:
LD C,A ; STORE PORT IN "C"
@@ -1391,11 +1356,7 @@ PORTREADGETKEY:
;_____________________________________________________________________________
;
DOPORTWRITE:
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTNUMKEYS
#ENDIF
CALL GETPORT ; GET PORT INTO A
PORTWRITELOOP:
LD L,A ; SAVE PORT NUM
@@ -1417,18 +1378,10 @@ PORTWRITEGETKEY:
;_____________________________________________________________________________
;
DOGO:
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTNUMKEYS
#ENDIF
CALL GETADDR ; GET ADDRESS INTO HL
#IF (DSKYMODE == DSKYMODE_NG)
PUSH HL
CALL DSKY_HIGHLIGHTKEYSOFF
#ENDIF
PUSH HL ; EXEC ADR TO TOS
LD HL,GOTO ; POINT TO "GO" MSG
CALL INITBUF
POP HL
@@ -1448,11 +1401,7 @@ DOGO:
;_____________________________________________________________________________
;
DOEXAMINE:
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTNUMKEYS
#ENDIF
CALL GETADDR ; GET ADDRESS INTO HL
EXAMINELOOP:
LD DE,DISPLAYBUF+0
@@ -1468,11 +1417,7 @@ EXAMINELOOP:
LD A,(HL) ; GET VALUE FROM ADDRESS IN HL
CALL PUTVALUE
CALL ENCDISPLAY ; DISPLAY BUFFER ON DISPLAYS
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTFWDKEYS
#ENDIF
EXAMINEGETKEY:
CALL KB_GET ; GET KEY FROM KB
CP KY_EN ; [EN] PRESSED, INC ADDRESS AND LOOP
@@ -1490,11 +1435,7 @@ EXAMINEFW:
;_____________________________________________________________________________
;
DODEPOSIT:
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTNUMKEYS
#ENDIF
CALL GETADDR ; GET ADDRESS INTO HL
DEPOSITLOOP:
LD DE,DISPLAYBUF+0
@@ -1511,11 +1452,7 @@ DEPOSITLOOP:
LD DE,DISPLAYBUF+6 ; DISPLAY WRITTEN MEM VALUE
CALL PUTVALUE ; ... WITHOUT DP'S
CALL ENCDISPLAY ; DISPLAY BUFFER CONTENTS
#IF (DSKYMODE == DSKYMODE_NG)
CALL DSKY_HIGHLIGHTFWDKEYS
#ENDIF
DEPOSITGETKEY:
CALL KB_GET ; GET KEY FROM KB
CP KY_EN ; [EN] PRESSED, INC ADDRESS AND LOOP
@@ -1682,6 +1619,7 @@ KB_GET:
PUSH DE
PUSH HL ; SAVE HL
CALL DSKY_GETKEY ; GET A KEY
LD A,E ; PUT KEY CODE IN A
CP KY_EN ; ENTER?
JR Z,KB_GET1 ; IF YES, RET TO CALLER
CP $10 ; HEX DIGIT?
@@ -1708,7 +1646,7 @@ INITBUF:
;
;__ENCDISPLAY_________________________________________________________________
;
; DISPLAY CONTENTS OF DISPLAYBUF DECODED PER SEGDECODE TABLE
; DISPLAY CONTENTS OF DISPLAYBUF ENCODED PER SEGDECODE TABLE
;_____________________________________________________________________________
;
ENCDISPLAY:
@@ -1718,7 +1656,7 @@ ENCDISPLAY:
;
;__ENCBUF_____________________________________________________________________
;
; DISPLAY CONTENTS OF BUFFER AT HL DECODED PER SEGDECODE TABLE
; DISPLAY CONTENTS OF BUFFER AT HL ENCODED PER SEGDECODE TABLE
;_____________________________________________________________________________
;
ENCBUF:
@@ -1734,7 +1672,6 @@ ENCBUF1:
INC HL ; BUMP TO NEXT BYTE FOR NEXT PASS
PUSH AF ; SAVE IT
AND $80 ; ISOLATE HI BIT (DP)
;XOR $80 ; FLIP IT
LD C,A ; SAVE IN C
POP AF ; RECOVER ORIGINAL
AND $7F ; REMOVE HI BIT (DP)
@@ -1755,36 +1692,62 @@ ENCBUF1:
POP HL ; RESTORE HL
RET
;
#IF (DSKYMODE == DSKYMODE_V1)
;
CPUUP .DB $04,$4B,$6E,$3B,$00,$3B,$6E,$04 ; "-CPU UP-" (RAW SEG)
MSGBOOT .DB $7F,$1D,$1D,$0F,$A0,$00,$00,$00 ; "Boot! " (RAW SEG)
ADDR .DB $17,$18,$19,$10,$00,$00,$00,$00 ; "Adr 0000" (ENCODED)
PORT .DB $13,$14,$15,$16,$10,$10,$00,$00 ; "Port 00" (ENCODED)
GOTO .DB $1A,$14,$10,$10,$00,$00,$00,$00 ; "Go 0000" (ENCODED)
;
;_HEX_7_SEG_DECODE_TABLE______________________________________________________
;
; SET BIT 7 TO DISPLAY W/ DECIMAL POINT
;_____________________________________________________________________________
;
SEGDECODE:
; DSKY INTERFACE ROUTINES
;_____________________________________________________________________________
;
; POS $00 $01 $02 $03 $04 $05 $06 $07
; GLYPH '0' '1' '2' '3' '4' '5' '6' '7'
.DB $7B, $30, $6D, $75, $36, $57, $5F, $70
DSKY_GETKEY:
LD B,BF_DSKYGETKEY
RST 08
RET
;
; POS $08 $09 $0A $0B $0C $0D $0E $0F
; GLYPH '8' '9' 'A' 'B' 'C' 'D' 'E' 'F'
.DB $7F, $77, $7E, $1F, $4B, $3D, $4F, $4E
DSKY_SHOW:
LD B,BF_DSKYSHOWSEG
RST 08
RET
;
; POS $10 $11 $12 $13 $14 $15 $16 $17 $18 $19 $1A
; GLYPH ' ' '-' '.' 'P' 'o' 'r' 't' 'A' 'd' 'r' 'G'
.DB $00, $04, $00, $6E, $1D, $0C, $0F, $7E, $3D, $0C, $5B
DSKY_BEEP:
LD B,BF_DSKYBEEP
RST 08
RET
;
#ENDIF
DSKY_L1ON:
LD E,1
JR DSKY_STATLED
DSKY_L1OFF:
LD E,0
DSKY_STATLED:
LD B,BF_DSKYSTATLED
LD D,0
RST 08
RET
;
#IF (DSKYMODE == DSKYMODE_NG)
DSKY_PUTLED:
LD B,BF_DSKYKEYLEDS
RST 08
RET
;
DSKY_HIGHLIGHTFWDKEYS:
LD HL,DSKY_HIGHLIGHTFWDKEYLEDS
JR DSKY_PUTLED
;
DSKY_HIGHLIGHTCMDKEYS:
LD HL,DSKY_HIGHLIGHTCMDKEYLEDS
JR DSKY_PUTLED
;
DSKY_HIGHLIGHTNUMKEYS:
LD HL,DSKY_HIGHLIGHTNUMKEYLEDS
JR DSKY_PUTLED
;
DSKY_HIGHLIGHTKEYSOFF:
LD HL,DSKY_HIGHLIGHTKEYLEDSOFF
JR DSKY_PUTLED
;
DSKY_HIGHLIGHTFWDKEYLEDS .DB $00,$00,$00,$30,$00,$00,$00,$00
DSKY_HIGHLIGHTCMDKEYLEDS .DB $20,$00,$20,$3F,$00,$00,$00,$00
DSKY_HIGHLIGHTNUMKEYLEDS .DB $1F,$3F,$1F,$30,$00,$00,$00,$00
DSKY_HIGHLIGHTKEYLEDSOFF .DB $00,$00,$00,$00,$00,$00,$00,$00
;
CPUUP .DB $40,$39,$73,$3E,$00,$3E,$73,$40 ; "-CPU UP-" (RAW SEG)
MSGBOOT .DB $7F,$5C,$5C,$78,$82,$00,$00,$00 ; "Boot! " (RAW SEG)
@@ -1811,31 +1774,8 @@ SEGDECODE:
; GLYPH ' ' '-' '.' 'P' 'o' 'r' 't' 'A' 'd' 'r' 'G'
.DB $00, $40, $00, $73, $5C, $50, $78, $77, $5E, $50, $3D
;
DSKY_HIGHLIGHTFWDKEYS:
CALL DSKY_PUTLED
.DB $00,$00,$00,$30,$00,$00,$00,$00
RET
DSKY_HIGHLIGHTCMDKEYS:
CALL DSKY_PUTLED
.DB $20,$00,$20,$3F,$00,$00,$00,$00
RET
DSKY_HIGHLIGHTNUMKEYS:
CALL DSKY_PUTLED
.DB $1F,$3F,$1F,$30,$00,$00,$00,$00
RET
DSKY_HIGHLIGHTKEYSOFF:
CALL DSKY_PUTLED
.DB $00,$00,$00,$00,$00,$00,$00,$00
RET
#ENDIF
;
DISPLAYBUF: .FILL 8,0
DSKY_BUF .FILL 8,0
;
#ELSE
;
@@ -1854,6 +1794,7 @@ CHR_CR .EQU 0DH
CHR_LF .EQU 0AH
CHR_BS .EQU 08H
CHR_ESC .EQU 1BH
CHR_DEL .EQU 7FH
;
;__________________________________________________________________________________________________
;
@@ -1946,130 +1887,6 @@ ADDHLA:
INC H
RET
;
; DELAY 16US (CPU SPEED COMPENSATED) INCUDING CALL/RET INVOCATION
; REGISTER A AND FLAGS DESTROYED
; NO COMPENSATION FOR Z180 MEMORY WAIT STATES
; THERE IS AN OVERHEAD OF 3TS PER INVOCATION
; IMPACT OF OVERHEAD DIMINISHES AS CPU SPEED INCREASES
;
; CPU SCALER (CPUSCL) = (CPUHMZ - 2) FOR 16US + 3TS DELAY
; NOTE: CPUSCL MUST BE >= 1!
;
; EXAMPLE: 8MHZ CPU (DELAY GOAL IS 16US)
; LOOP = ((6 * 16) - 5) = 91TS
; TOTAL COST = (91 + 40) = 131TS
; ACTUAL DELAY = (131 / 8) = 16.375US
;
; --- TOTAL COST = (LOOP COST + 40) TS -----------------+
DELAY: ; 17TS (FROM INVOKING CALL) |
LD A,(CPUSCL) ; 13TS |
; |
DELAY1: ; |
; --- LOOP = ((CPUSCL * 16) - 5) TS ------------+ |
DEC A ; 4TS | |
#IF (BIOS == BIOS_WBW) ; | |
#IF (CPUFAM == CPU_Z180) ; | |
OR A ; +4TS FOR Z180 | |
#ENDIF ; | |
#ENDIF ; | |
JR NZ,DELAY1 ; 12TS (NZ) / 7TS (Z) | |
; ----------------------------------------------+ |
; |
RET ; 10TS (RETURN) |
;-------------------------------------------------------+
;
; DELAY 16US * DE (CPU SPEED COMPENSATED)
; REGISTER DE, A, AND FLAGS DESTROYED
; NO COMPENSATION FOR Z180 MEMORY WAIT STATES
; THERE IS A 27TS OVERHEAD FOR CALL/RET PER INVOCATION
; IMPACT OF OVERHEAD DIMINISHES AS DE AND/OR CPU SPEED INCREASES
;
; CPU SCALER (CPUSCL) = (CPUHMZ - 2) FOR 16US OUTER LOOP COST
; NOTE: CPUSCL MUST BE > 0!
;
; EXAMPLE: 8MHZ CPU, DE=6250 (DELAY GOAL IS .1 SEC OR 100,000US)
; INNER LOOP = ((16 * 6) - 5) = 91TS
; OUTER LOOP = ((91 + 37) * 6250) = 800,000TS
; ACTUAL DELAY = ((800,000 + 27) / 8) = 100,003US
;
; --- TOTAL COST = (OUTER LOOP + 27) TS ------------------------+
VDELAY: ; 17TS (FROM INVOKING CALL) |
; |
; --- OUTER LOOP = ((INNER LOOP + 37) * DE) TS ---------+ |
LD A,(CPUSCL) ; 13TS | |
; | |
VDELAY1: ; | |
; --- INNER LOOP = ((CPUSCL * 16) - 5) TS ------+ | |
#IF (BIOS == BIOS_WBW) ; | | |
#IF (CPUFAM == CPU_Z180) ; | | |
OR A ; +4TS FOR Z180 | | |
#ENDIF ; | | |
#ENDIF ; | | |
DEC A ; 4TS | | |
JR NZ,VDELAY1 ; 12TS (NZ) / 7TS (Z) | | |
; ----------------------------------------------+ | |
; | |
DEC DE ; 6TS | |
#IF (BIOS == BIOS_WBW) ; | | |
#IF (CPUFAM == CPU_Z180) ; | |
OR A ; +4TS FOR Z180 | |
#ENDIF ; | |
#ENDIF ; | |
LD A,D ; 4TS | |
OR E ; 4TS | |
JP NZ,VDELAY ; 10TS | |
;-------------------------------------------------------+ |
; |
RET ; 10TS (FINAL RETURN) |
;---------------------------------------------------------------+
;
; DELAY ABOUT 0.5 SECONDS
; 500000US / 16US = 31250
;
LDELAY:
PUSH AF
PUSH DE
LD DE,31250
CALL VDELAY
POP DE
POP AF
RET
;
; INITIALIZE DELAY SCALER BASED ON OPERATING CPU SPEED
; ENTER WITH A = CPU SPEED IN MHZ
;
DELAY_INIT:
CP 3 ; TEST FOR <= 2 (SPECIAL HANDLING)
JR C,DELAY_INIT1 ; IF <= 2, SPECIAL PROCESSING
SUB 2 ; ADJUST AS REQUIRED BY DELAY FUNCTIONS
JR DELAY_INIT2 ; AND CONTINUE
DELAY_INIT1:
LD A,1 ; USE THE MIN VALUE OF 1
DELAY_INIT2:
LD (CPUSCL),A ; UPDATE CPU SCALER VALUE
RET
#IF (CPUMHZ < 3)
CPUSCL .DB 1 ; CPU SCALER MUST BE > 0
#ELSE
CPUSCL .DB CPUMHZ - 2 ; OTHERWISE 2 LESS THAN PHI MHZ
#ENDIF
;
; SHORT DELAY FUNCTIONS. NO CLOCK SPEED COMPENSATION, SO THEY
; WILL RUN LONGER ON SLOWER SYSTEMS. THE NUMBER INDICATES THE
; NUMBER OF CALL/RET INVOCATIONS. A SINGLE CALL/RET IS
; 27 T-STATES ON A Z80, 25 T-STATES ON A Z180
;
; ; Z80 Z180
; ; ---- ----
DLY64: CALL DLY32 ; 1728 1600
DLY32: CALL DLY16 ; 864 800
DLY16: CALL DLY8 ; 432 400
DLY8: CALL DLY4 ; 216 200
DLY4: CALL DLY2 ; 108 100
DLY2: CALL DLY1 ; 54 50
DLY1: RET ; 27 25
;
;
;
.FILL 16,0 ; SET MINIMUM STACK DEPTH

View File

@@ -72,7 +72,9 @@ DMA_INIT:
di
otir ; load dma
ei
xor a ; set status
ld (DMA_FAIL_FLAG),a ; ok to use dma
;
DMA_EXIT:
DMAIOFULL
@@ -94,7 +96,7 @@ DMA_NOTFOUND:
jr DMA_EXIT
;
DMA_FAIL_FLAG:
.db 0
.db DMA_FAIL_FLAG
;
;==================================================================================================
; DMA PROBE - WRITE TO ADDRESS REGISTER AND READ BACK

View File

@@ -1,386 +0,0 @@
;
;==================================================================================================
; DSKY (DISPLAY AND KEYBOARD) ROUTINES
;==================================================================================================
;
; THE DSKY MAY COINCIDE ON THE SAME PPI BUS AS A PPISD. IT MAY NOT
; SHARE A PPI BUS WITH A PPIDE. SEE PPI_BUS.TXT FOR MORE INFORMATION.
;
; LED SEGMENTS (BIT VALUES)
;
; +--40--+
; 02 20
; +--04--+
; 08 10
; +--01--+ 80
;
; DSKY SCAN CODES ARE ONE BYTE: CCRRRRRR
; BITS 7-6 IDENTFY THE COLUMN OF THE KEY PRESSED
; BITS 5-0 ARE A BITMAP, WITH A BIT ON TO INDICATE ROW OF KEY PRESSED
;
; ____PC0________PC1________PC2________PC3____
; PB5 | $20 [D] $60 [E] $A0 [F] $E0 [BO]
; PB4 | $10 [A] $50 [B] $90 [C] $D0 [GO]
; PB3 | $08 [7] $48 [8] $88 [9] $C8 [EX]
; PB2 | $04 [4] $44 [5] $84 [6] $C4 [DE]
; PB1 | $02 [1] $42 [2] $82 [3] $C2 [EN]
; PB0 | $01 [FW] $41 [0] $81 [BK] $C1 [CL]
;
;
PPIA .EQU DSKYPPIBASE + 0 ; PORT A
PPIB .EQU DSKYPPIBASE + 1 ; PORT B
PPIC .EQU DSKYPPIBASE + 2 ; PORT C
PPIX .EQU DSKYPPIBASE + 3 ; PPI CONTROL PORT
;
;__DSKY_INIT_________________________________________________________________________________________
;
; CONFIGURE PARALLEL PORT AND CLEAR KEYPAD BUFFER
;____________________________________________________________________________________________________
;
DSKY_PREINIT:
OR $FF ; SIGNAL TO WAIT FOR KEY RELEASE
LD (DSKY_KEYBUF),A ; SET IT
;
; PPI PORT B IS NORMALLY SET TO INPUT, BUT HERE WE
; TEMPORARILY SET IT TO OUTPUT. WHILE IN OUTPUT MODE, WE
; WRITE A VALUE OF $FF WHICH WILL BE PERSISTED BY THE PPI
; CHIP BUS HOLD CIRCUIT IF THERE IS NO DSKY PRESENT. SO,
; WE CAN SUBSEQUENTLY TEST FOR PPIB=$FF TO SEE IF THERE IS
; NO DSKY AND PREVENT PROBLEMS WITH PHANTOM DSKY KEY PRESSES.
; IF A DSKY IS PRESENT, IT WILL SIMPLY OVERPOWER THE PPI
; BUS HOLD CIRCUIT.
LD A,$80 ; PA OUT, PB OUT, PC OUT
OUT (PPIX),A
LD A,$FF ; SET PPIB=$FF, BUS HOLD
OUT (PPIB),A
;
LD A,$82 ; PA OUT, PB IN, PC OUT
OUT (PPIX),A
;
;IN A,(PPIB) ; *DEBUG*
;CALL PRTHEXBYTE ; *DEBUG*
;
IN A,(PPIB) ; READ PPIB
XOR $FF ; INVERT RESULT
LD (DSKY_PRESENT),A ; SAVE AS PRESENT FLAG
;
DSKY_RESET:
PUSH AF
;
LD A,$70 ; PPISD AND 7218 INACTIVE
OUT (PPIC),A
;
POP AF
RET
;
#IFDEF HBIOS
;
DSKY_INIT:
CALL NEWLINE ; FORMATTING
PRTS("DSKY:$") ; FORMATTING
;
PRTS(" IO=0x$") ; FORMATTING
LD A,DSKYPPIBASE ; GET BASE PORT
CALL PRTHEXBYTE ; PRINT BASE PORT
PRTS(" MODE=$") ; FORMATTING
PRTS("V1$") ; PRINT DSKY TYPE
;
LD A,(DSKY_PRESENT) ; PRESENT?
OR A ; SET FLAGS
RET NZ ; YES, ALL DONE
PRTS(" NOT PRESENT$") ; NOT PRESENT
;
RET
;
#ENDIF
;
#IFDEF DSKY_KBD
;
KY_0 .EQU $00
KY_1 .EQU $01
KY_2 .EQU $02
KY_3 .EQU $03
KY_4 .EQU $04
KY_5 .EQU $05
KY_6 .EQU $06
KY_7 .EQU $07
KY_8 .EQU $08
KY_9 .EQU $09
KY_A .EQU $0A
KY_B .EQU $0B
KY_C .EQU $0C
KY_D .EQU $0D
KY_E .EQU $0E
KY_F .EQU $0F
KY_FW .EQU $10 ; FORWARD
KY_BK .EQU $11 ; BACKWARD
KY_CL .EQU $12 ; CLEAR
KY_EN .EQU $13 ; ENTER
KY_DE .EQU $14 ; DEPOSIT
KY_EX .EQU $15 ; EXAMINE
KY_GO .EQU $16 ; GO
KY_BO .EQU $17 ; BOOT
;
;__DSKY_GETKEY_____________________________________________________________________________________
;
; WAIT FOR A DSKY KEYPRESS AND RETURN
;____________________________________________________________________________________________________
;
DSKY_GETKEY:
LD A,(DSKY_PRESENT) ; DOES IT EXIST?
OR A ; SET FLAGS
JR Z,DSKY_GETKEY1A ; ABORT IF NOT PRESENT
;
CALL DSKY_STAT ; CHECK STATUS
JR Z,DSKY_GETKEY ; LOOP IF NOTHING READY
LD A,(DSKY_KEYBUF)
LD B,24 ; SIZE OF DECODE TABLE
LD C,0 ; INDEX
LD HL,DSKY_KEYMAP ; POINT TO BEGINNING OF TABLE
DSKY_GETKEY1:
CP (HL) ; MATCH?
JR Z,DSKY_GETKEY2 ; FOUND, DONE
INC HL
INC C ; BUMP INDEX
DJNZ DSKY_GETKEY1 ; LOOP UNTIL EOT
DSKY_GETKEY1A:
LD A,$FF ; NOT FOUND ERR, RETURN $FF
RET
DSKY_GETKEY2:
LD A,$FF ; SET KEY BUF TO $FF
LD (DSKY_KEYBUF),A ; DO IT
; RETURN THE INDEX POSITION WHERE THE SCAN CODE WAS FOUND
LD A,C ; RETURN INDEX VALUE
RET
;
;__DSKY_STAT_________________________________________________________________________________________
;
; CHECK FOR KEY PRESS, SAVE RAW VALUE, RETURN STATUS
;____________________________________________________________________________________________________
;
DSKY_STAT:
LD A,(DSKY_PRESENT) ; DOES IT EXIST?
OR A ; SET FLAGS
RET Z ; ABORT WITH A=0 IF NOT THERE
;
LD A,(DSKY_KEYBUF) ; GET CURRENT BUF VAL
CP $FF ; $FF MEANS WE ARE WAITING FOR PREV KEY TO BE RELEASED
JR Z,DSKY_STAT1 ; CHECK FOR PREV KEY RELEASE
OR A ; DO WE HAVE A SCAN CODE BUFFERED ALREADY?
RET NZ ; IF SO, WE ARE DONE
JR DSKY_STAT2 ; OTHERWISE, DO KEY CHECK
DSKY_STAT1:
; WAITING FOR PREVIOUS KEY RELEASE
CALL DSKY_KEY ; SCAN
JR Z,DSKY_STAT2 ; IF ZERO, PREV KEY RELEASED, CONTINUE
XOR A ; SIGNAL NO KEY PRESSED
RET ; AND DONE
DSKY_STAT2:
CALL DSKY_KEY ; SCAN
LD (DSKY_KEYBUF),A ; SAVE RESULT
RET ; RETURN WITH ZF SET APPROPRIATELY
;
;__DSKY_KEY_______________________________________________________________________________________
;
; CHECK FOR KEY PRESS W/ DEBOUNCE
;____________________________________________________________________________________________________
;
DSKY_KEY:
; IF PPIB VALUE IS $FF, THERE IS NO DSKY, SEE DSKY_INIT
IN A,(PPIB)
INC A
RET Z
CALL DSKY_SCAN ; INITIAL KEY PRESS SCAN
LD E,A ; SAVE INITIAL SCAN VALUE
DSKY_KEY1:
; MAX BOUNCE TIME FOR OMRON B3F IS 3MS
PUSH DE ; SAVE DE
LD DE,300 ; ~3MS DELAY
CALL VDELAY ; DO IT
CALL DSKY_SCAN ; REPEAT SCAN
POP DE ; RESTORE DE
RET Z ; IF NOTHING PRESSED, DONE
CP E ; SAME?
JR DSKY_KEY2 ; YES, READY TO RETURN
LD E,A ; OTHERWISE, SAVE NEW SCAN VAL
JR DSKY_KEY1 ; AND LOOP UNTIL STABLE VALUE
DSKY_KEY2:
OR A ; SET FLAGS BASED ON VALUE
RET ; AND DONE
;
;__DSKY_SCAN______________________________________________________________________________________
;
; SCAN KEYPAD AND RETURN RAW SCAN CODE (RETURNS ZERO IF NO KEY PRESSED)
;____________________________________________________________________________________________________
;
DSKY_SCAN:
LD B,4 ; 4 COLUMNS
LD C,$01 ; FIRST COLUMN
LD E,0 ; INITIAL COL ID
DSKY_SCAN1:
LD A,C ; COL TO A
OR $70 ; KEEP PPISD AND 7218 INACTIVE
OUT (PPIC),A ; ACTIVATE COL
IN A,(PPIB) ; READ ROW BITS
AND $3F ; MASK, WE ONLY HAVE 6 ROWS, OTHERS UNDEFINED
JR NZ,DSKY_SCAN2 ; IF NOT ZERO, GOT SOMETHING
RLC C ; NEXT COL
INC E ; BUMP COL ID
DJNZ DSKY_SCAN1 ; LOOP THROUGH ALL COLS
XOR A ; NOTHING FOUND, RETURN ZERO
JP DSKY_RESET ; RETURN VIA RESET
DSKY_SCAN2:
RRC E ; MOVE COL ID
RRC E ; ... TO HIGH BITS 6 & 7
OR E ; COMBINE WITH ROW
JP DSKY_RESET ; RETURN VIA RESET
;
;_KEYMAP_TABLE_____________________________________________________________________________________________________________
;
DSKY_KEYMAP:
; POS $00 $01 $02 $03 $04 $05 $06 $07
; KEY [0] [1] [2] [3] [4] [5] [6] [7]
.DB $41, $02, $42, $82, $04, $44, $84, $08
;
; POS $08 $09 $0A $0B $0C $0D $0E $0F
; KEY [8] [9] [A] [B] [C] [D] [E] [F]
.DB $48, $88, $10, $50, $90, $20, $60, $A0
;
; POS $10 $11 $12 $13 $14 $15 $16 $17
; KEY [FW] [BK] [CL] [EN] [DE] [EX] [GO] [BO]
.DB $01, $81, $C1, $C2, $C4, $C8, $D0, $E0
;
; KBD WORKING STORAGE
;
DSKY_KEYBUF .DB 0
;
#ENDIF ; DSKY_KBD
;
;==================================================================================================
; CONVERT 32 BIT BINARY TO 8 BYTE HEX SEGMENT DISPLAY
;==================================================================================================
;
; HL: ADR OF 32 BIT BINARY
; DE: ADR OF DEST LED SEGMENT DISPLAY BUFFER (8 BYTES)
;
DSKY_BIN2SEG:
PUSH HL
PUSH DE
LD B,4 ; 4 BYTES OF INPUT
EX DE,HL
DSKY_BIN2SEG1:
LD A,(DE) ; FIRST NIBBLE
SRL A
SRL A
SRL A
SRL A
PUSH HL
LD HL,DSKY_HEXMAP
CALL DSKY_ADDHLA
LD A,(HL)
POP HL
LD (HL),A
INC HL
LD A,(DE) ; SECOND NIBBLE
AND 0FH
PUSH HL
LD HL,DSKY_HEXMAP
CALL DSKY_ADDHLA
LD A,(HL)
POP HL
LD (HL),A
INC HL
INC DE ; NEXT BYTE
DJNZ DSKY_BIN2SEG1
POP DE
POP HL
RET
;
;==================================================================================================
; DSKY SHOW BUFFER
; HL: ADDRESS OF BUFFER
;==================================================================================================
;
DSKY_SHOW:
;;PUSH AF ; SAVE 7218 CONTROL BITS
LD A,82H ; SETUP PPI
OUT (PPIX),A
CALL DSKY_COFF
;;POP AF
LD A,$F0 ; 7218 -> (DATA COMING, NO DECODE)
OUT (PPIA),A
CALL DSKY_STROBEC ; STROBE COMMAND
LD B,DSKY_BUFLEN ; NUMBER OF DIGITS
LD C,PPIA
DSKY_HEXOUT2:
;OUTI
LD A,(HL)
XOR $80 ; FIX DOT POLARITY
OUT (C),A
INC HL
DEC B
JP Z,DSKY_STROBE ; DO FINAL STROBE AND RETURN
CALL DSKY_STROBE ; STROBE BYTE VALUE
JR DSKY_HEXOUT2
DSKY_STROBEC: ; COMMAND STROBE
LD A,80H | 30H
JP DSKY_STROBE0
DSKY_STROBE: ; DATA STROBE
LD A,00H | 30H ; SET WRITE STROBE
DSKY_STROBE0:
OUT (PPIC),A ; OUT TO PORTC
CALL DLY2 ; DELAY
DSKY_COFF:
LD A,40H | 30H ; QUIESCE
OUT (PPIC),A ; OUT TO PORTC
; CALL DSKY_DELAY ; WAIT
RET
;
;==================================================================================================
; UTILTITY FUNCTIONS
;==================================================================================================
;
DSKY_ADDHLA:
ADD A,L
LD L,A
RET NC
INC H
RET
;
;==================================================================================================
; STORAGE
;==================================================================================================
;
; CODES FOR NUMERICS
; HIGH BIT ALWAYS CLEAR TO SUPPRESS DECIMAL POINT
; SET HIGH BIT TO SHOW DECIMAL POINT
;
DSKY_HEXMAP:
.DB $7B ; 0
.DB $30 ; 1
.DB $6D ; 2
.DB $75 ; 3
.DB $36 ; 4
.DB $57 ; 5
.DB $5F ; 6
.DB $70 ; 7
.DB $7F ; 8
.DB $77 ; 9
.DB $7E ; A
.DB $1F ; B
.DB $4B ; C
.DB $3D ; D
.DB $4F ; E
.DB $4E ; F
;
; SEG DISPLAY WORKING STORAGE
;
DSKY_PRESENT .DB 0
;
DSKY_BUF .FILL 8,0
DSKY_BUFLEN .EQU $ - DSKY_BUF
DSKY_HEXBUF .FILL 4,0
DSKY_HEXBUFLEN .EQU $ - DSKY_HEXBUF

View File

@@ -109,7 +109,7 @@ FRC_TOSEEKWT .EQU -15H ; EB
; FD DEVICE CONFIGURATION
;
FD_DEVCNT .EQU FDCNT ; 2 DEVICES SUPPORTED
FD_CFGSIZ .EQU 8 ; SIZE OF CFG TBL ENTRIES
FD_CFGSIZ .EQU 9 ; SIZE OF CFG TBL ENTRIES
;
; PER DEVICE DATA OFFSETS
; ; OFFSET OF...
@@ -121,25 +121,28 @@ FD_HST .EQU 4 ; HOSTS SEEK POSITION
FD_HSTTRK .EQU FD_HST + 0 ; HOST TRACK (WORD)
FD_HSTSEC .EQU FD_HST + 2 ; HOST SECTOR (BYTE)
FD_HSTHD .EQU FD_HST + 3 ; HOST HEAD (BYTE)
FD_TYPE .EQU 8 ; FLOPPY DSIK TYPE (BYTE)
;
FD_CFGTBL:
; DEVICE 0, PRIMARY MASTER
.DB 0 ; DEVICE NUMBER
.DB 0 ; DEVICE STATUS
.DB FDMEDIA ; MEDIA TYPE
.DB $FF ; CURRENT MEDIA TYPE (INIT TO NONE)
.DB $FF ; CURRENT TRACK
.DW 0 ; HOST TRACK
.DB 0 ; HOST SECTOR
.DB 0 ; HOST HEAD
.DB FD0TYPE ; DRIVE TYPE
#IF (FD_DEVCNT >= 2)
; DEVICE 1, PRIMARY SLAVE
.DB 1 ; DRIVER DEVICE NUMBER
.DB 0 ; DEVICE STATUS
.DB FDMEDIA ; MEDIA TYPE
.DB $FF ; CURRENT MEDIA TYPE (INIT TO NONE)
.DB $FF ; CURRENT TRACK
.DW 0 ; HOST TRACK
.DB 0 ; HOST SECTOR
.DB 0 ; HOST HEAD
.DB FD1TYPE ; DRIVE TYPE
#ENDIF
;
#IF ($ - FD_CFGTBL) != (FD_DEVCNT * FD_CFGSIZ)
@@ -199,6 +202,42 @@ FSST_ENTSIZ .EQU $ - FSST
FSST_COUNT .EQU (($ - FSST) / FSST_ENTSIZ) ; # ENTRIES IN TABLE
#ENDIF
;
; FDC DRIVE TYPE MEDIA OPTIONS
;
; THIS TABLE LISTS THE TYPES OF MEDIA THAT SHOULD BE ATTEMPTED
; FOR EACH POSSIBLE DRIVE TYPE. THE ENTRIES MATCH THE ORDER OF THE
; FDT_ VALUES DEFINED IN STD.ASM
;
FD_MEDIAMAP:
.DW FDMM_NONE ; NO DRIVE TYPE
.DW FDMM_3DD
.DW FDMM_3HD
.DW FDMM_5DD
.DW FDMM_5HD
.DW FDMM_8
;
FDMM_NONE .DB $FF
FDMM_3DD .DB FDM720, $FF
FDMM_3HD .DB FDM144, FDM720, $FF
FDMM_5DD .DB FDM360, $FF
FDMM_5HD .DB FDM120, FDM360, $FF
FDMM_8 .DB FDM111, $FF
;
; FDC DRIVE TYPE ATTRIBUTES
;
; LOOKUP TABLE TO MAP THE DEVICE ATTRIBUTES BYTE RETURNED
; BY THE FD_DEVICE FUNCTION BASED ON THE DRIVE TYPE.
; THE ENTRIES MATCH THE ORDER OF THE
; FDT_ VALUES DEFINED IN STD.ASM
;
FD_DEVATTR:
.DB %11000000 ; DRIVE TYPE NONE
.DB %11010101 ; DRIVE TYPE 3.5 DD
.DB %11010110 ; DRIVE TYPE 3.5 HD
.DB %11001101 ; DRIVE TYPE 5.25 DD
.DB %11001110 ; DRIVE TYPE 5.25 HD
.DB %11000101 ; DRIVE TYPE 8
;
; FDC COMMANDS
;
CFD_READ .EQU 00000110B ; CMD,HDS/DS,C,H,R,N,EOT,GPL,DTL --> ST0,ST1,ST2,C,H,R,N
@@ -498,21 +537,11 @@ FD_DEFMED:
FD_DEVICE:
LD D,DIODEV_FD ; D := DEVICE TYPE
LD E,(IY+FD_DEV) ; E := PHYSICAL DEVICE NUMBER
#IF (FDMEDIA == FDM720)
LD C,%11010100 ; 3.5" DS/DD
#ENDIF
#IF (FDMEDIA == FDM144)
LD C,%11011000 ; 3.5" DS/HD
#ENDIF
#IF (FDMEDIA == FDM360)
LD C,%10110100 ; 5.25" DS/DD
#ENDIF
#IF (FDMEDIA == FDM120)
LD C,%10111000 ; 5.25" DS/HD
#ENDIF
#IF (FDMEDIA == FDM111)
LD C,%10010100 ; 8" DS/DD
#ENDIF
LD A,(IY+FD_TYPE) ; DRIVE TYPE
LD HL,FD_DEVATTR ; DEVICE ATTR TABLE
CALL ADDHLA ; POINT TO ENTRY
LD C,(HL) ; GET IT
LD H,FDMODE ; H := MODE
LD L,FDC_MSR ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
@@ -527,9 +556,7 @@ FD_MEDIA:
#IF (FDMAUTO)
; SETUP TO READ TRK 0, HD 0, SEC 0
;LD A,C ; C STILL HAS REQUESTED DRIVE
LD A,(IY+FD_DEV) ; GET DRIVE UNIT
;AND 0FH
LD (FCD_DS),A
LD A,0
LD (FCD_C),A
@@ -538,53 +565,77 @@ FD_MEDIA:
LD (FCD_R),A
LD A,DOP_READID
LD (FCD_DOP),A
#ENDIF
#IF (FDTRACE < 3)
LD A,(IY+FD_TYPE) ; GET DRIVE TYPE VALUE
;CALL PRTHEXBYTE ; *DEBUG*
LD HL,FD_MEDIAMAP ; POINT TO MEDIA MAP TABLE
ADD A,A ; TABLE IS WORD SIZED
CALL ADDHLA ; LOOKUP ENTRY
LD A,(HL) ; DEREFERENCE
INC HL
LD H,(HL)
LD L,A
#IF (FDMAUTO)
#IF (FDTRACE < 3)
; SUPPRESS TRACING FOR MEDIA TESTS
LD A,0
LD (FCD_TRACE),A
#ENDIF
LD B,5
#ENDIF
LD B,5 ; 5 ATTEMPTS
FD_MEDIARETRY:
; TRY PRIMARY MEDIA CHOICE FIRST
LD A,FDMEDIA
CALL FD_TESTMEDIA
JR Z,FD_MEDIA3 ; IF SUCCESS, WE ARE DONE
; TRY ALTERNATE MEDIA CHOICE
LD A,FDMEDIAALT
CALL FD_TESTMEDIA
JR Z,FD_MEDIA3 ; IF SUCCESS, WE ARE DONE
DJNZ FD_MEDIARETRY
PUSH HL ; SAVE MEDIA MAP PTR
CALL FD_MEDIALOOP ; TRY IT
POP HL ; RECOVER MEDIA MAP PTR
JR Z,FD_MEDIA3 ; CONTINUE ON SUCCESS
DJNZ FD_MEDIARETRY ; LOOP TILL DONE
FD_MEDIARETRY1:
; NO JOY, RETURN WITH E=0 (NO MEDIA)
;LD HL,(FDDS_MEDIAADR)
;LD (HL),0 ; SET TO NO MEDIA
LD (IY+FD_MEDTYP),0 ; SET DRIVE = NO MEDIA
LD E,0
LD (IY+FD_MEDTYP),$FF ; SET MEDIA TYPE TO UNDEFINED
LD E,0 ; NO MEDIA FLAG
LD A,ERR_NOMEDIA ; SIGNAL ERROR
OR A ; SET FLAGS
RET
FD_MEDIALOOP:
LD A,(HL) ; LOAD NEXT MEDIA TYPE TO TRY
CP $FF ; END OF MEDIA TYPES TO TRY?
JR Z,FD_MEDIALOOP1 ; NO MORE TO TRY, LOOP EXIT
CALL FD_TESTMEDIA ; TRY IT
RET Z ; RETURN ON SUCCESS
INC HL ; NEXT MEDIA TYPE TO TRY
JR FD_MEDIALOOP ; LOOP
FD_MEDIALOOP1:
OR $FF ; SIGNAL FAILURE
RET ; RETURN
FD_TESTMEDIA:
;LD HL,(FDDS_MEDIAADR)
;LD (HL),A
;CALL PRTHEXBYTE ; *DEBUG*
LD (IY+FD_MEDTYP),A
PUSH HL
PUSH BC
CALL FD_START
POP BC
POP HL
;CALL PRTHEXBYTE ; *DEBUG*
RET
FD_MEDIA3:
#IF (FDTRACE < 3)
#IF (FDTRACE < 3)
; RESTORE TRACING FOR MEDIA TESTS
LD A,FDTRACE
LD (FCD_TRACE),A
#ENDIF
#ENDIF
#ELSE
LD A,(HL)
LD (IY+FD_MEDTYP),A
#ENDIF
FD_MEDIA4:
@@ -778,7 +829,7 @@ FD_DETECT1:
;
FD_INITUNIT:
LD (IY+FD_STAT),0 ; CLEAR STATUS
LD (IY+FD_MEDTYP),FDMEDIA ; SET DEFAULT MEDIA TYPE
LD (IY+FD_MEDTYP),$FF ; SET UNKNOWN MEDIA TYPE
LD (IY+FD_CURTRK),$FE ; SPECIAL VALUE FOR CURTRK
RET
;
@@ -1079,9 +1130,11 @@ FD_RETRY1:
FD_START:
;
#IF (DSKYENABLE)
#IF (DSKYDSKACT)
LD A,4
CALL LDHLIYA
CALL HB_DSKACTCHS ; SHOW ACTIVITY
#ENDIF
#ENDIF
;
LD A,(FCD_FDCRDY)
@@ -1151,9 +1204,6 @@ FD_RUN1:
RET
FD_RUNCHK:
;;#IF (DSKYENABLE)
;; CALL FD_DSKY
;;#ENDIF
FD_RUNEXIT:
LD A,(FST_RC)
@@ -1170,23 +1220,6 @@ FD_RUNERR:
JP FD_RETRC
;;#IF (DSKYENABLE)
;;FD_DSKY:
;; LD HL,DSKY_HEXBUF
;; LD A,(FCD_C)
;; LD (HL),A
;; INC HL
;; LD A,(FCD_R)
;; LD (HL),A
;; INC HL
;; LD A,(FRB_ST0)
;; LD (HL),A
;; INC HL
;; LD A,(FRB_ST1)
;; LD (HL),A
;; CALL DSKY_HEXOUT
;; RET
;;#ENDIF
;
;===============================================================================
; FLOPPY DISK CONTROL SERVICES (PHYSICAL DEVICE CONTROL FOR FDC HARDWARE)
@@ -1285,7 +1318,8 @@ FC_SETUPIO:
LD (DE),A
INC DE
LD A,(FCD_EOT)
;LD A,(FCD_EOT)
LD A,(FCD_R) ; READ ONLY ONE SECTOR
LD (DE),A
INC DE
@@ -1397,15 +1431,17 @@ FC_RESETFDC:
; PULSE TERMCT TO TERMINATE ANY ACTIVE EXECUTION PHASE
;
FC_PULSETC:
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_DYNO) | (FDMODE == FDMODE_EPFDC) | (FDMODE == FDMODE_MBC))
IN A,(FDC_TC)
#ELSE
LD A,(FST_DOR)
SET 0,A
OUT (FDC_DOR),A
RES 0,A
OUT (FDC_DOR),A
#ENDIF
; PULSING TC NO LONGER REQUIRED BECAUSE WE ONLY READ A SINGLE SECTOR
;
;#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_DYNO) | (FDMODE == FDMODE_EPFDC) | (FDMODE == FDMODE_MBC))
; IN A,(FDC_TC)
;#ELSE
; LD A,(FST_DOR)
; SET 0,A
; OUT (FDC_DOR),A
; RES 0,A
; OUT (FDC_DOR),A
;#ENDIF
RET
;
; SET FST_DOR FOR MOTOR CONTROL ON
@@ -1694,7 +1730,7 @@ FXR_TO: ; TIMEOUT
;
FXR_ABORT: ; EXECUTION ABORTED
HB_EI ; INTERRUPTS OK AGAIN
JR FOP_RES ; GET RSEULTS, NO NEED TO PULSE TC
JR FOP_RES ; GET RESULTS, NO NEED TO PULSE TC
;
FXR_END: ; EXECUTION COMPLETED NORMALLY
CALL FC_PULSETC ; PULSE TC TO END EXECUTION
@@ -1828,7 +1864,9 @@ FOP_EVALST1:
LD C,FRC_ENDCYL
BIT 7,A
JR NZ,FOP_SETFST
; THI IS NORMAL BECAUSE WE NOW READ ONLY A SINGLE SECTOR
;JR NZ,FOP_SETFST
JR NZ,FOP_EXIT
LD C,FRC_DATAERR
BIT 5,A

View File

@@ -325,5 +325,6 @@ GDC_POS .DW 0 ; CURRENT DISPLAY POSITION
;==================================================================================================
;
GDC_IDAT:
.DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER
.DB GDC_KBDST
.DB GDC_KBDDATA

File diff suppressed because it is too large Load Diff

View File

@@ -36,7 +36,16 @@ BF_RTCGETALM .EQU BF_RTC + 6 ; GET ALARM
BF_RTCSETALM .EQU BF_RTC + 7 ; SET ALARM
BF_RTCDEVICE .EQU BF_RTC + 8 ; RTC DEVICE INFO REPORT
;
BF_EMU .EQU $30 ; DEPRECATED
BF_DSKY .EQU $30
BF_DSKYRESET .EQU BF_DSKY + 0 ; RESET DSKY HARDWARE
BF_DSKYSTAT .EQU BF_DSKY + 1 ; GET KEYPAD STATUS
BF_DSKYGETKEY .EQU BF_DSKY + 2 ; GET KEY FROM KEYPAD
BF_DSKYSHOWHEX .EQU BF_DSKY + 3 ; DISPLAY BINARY VALUE IN HEX
BF_DSKYSHOWSEG .EQU BF_DSKY + 4 ; DISPLAY ENCODED SEGMENT STRING
BF_DSKYKEYLEDS .EQU BF_DSKY + 5 ; SET/CLEAR KEYPAD LEDS
BF_DSKYSTATLED .EQU BF_DSKY + 6 ; SET/CLEAR STATUS LEDS
BF_DSKYBEEP .EQU BF_DSKY + 7 ; BEEP ONBOARD DSKY SPEAKER
BF_DSKYDEVICE .EQU BF_DSKY + 8 ; DSKY DEVICE INFO REPORT
;
BF_VDA .EQU $40
BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU
@@ -98,6 +107,7 @@ BF_SYSGET_CIOFN .EQU $01 ; GET CIO UNIT FN/DATA ADR
BF_SYSGET_DIOCNT .EQU $10 ; GET DISK UNIT COUNT
BF_SYSGET_DIOFN .EQU $11 ; GET DIO UNIT FN/DATA ADR
BF_SYSGET_RTCCNT .EQU $20 ; GET RTC UNIT COUNT
BF_SYSGET_DSKYCNT .EQU $30 ; GET DSKY UNIT COUNT
BF_SYSGET_VDACNT .EQU $40 ; GET VDA UNIT COUNT
BF_SYSGET_VDAFN .EQU $41 ; GET VDA UNIT FN/DATA ADR
BF_SYSGET_SNDCNT .EQU $50 ; GET VDA UNIT COUNT
@@ -109,11 +119,13 @@ BF_SYSGET_CPUINFO .EQU $F0 ; GET CPU INFORMATION
BF_SYSGET_MEMINFO .EQU $F1 ; GET MEMORY CAPACTITY INFO
BF_SYSGET_BNKINFO .EQU $F2 ; GET BANK ASSIGNMENT INFO
BF_SYSGET_CPUSPD .EQU $F3 ; GET CLOCK SPEED & WAIT STATES
BF_SYSGET_PANEL .EQU $F4 ; GET FRONT PANEL SWITCHES VAL
;
BF_SYSSET_TIMER .EQU $D0 ; SET TIMER VALUE
BF_SYSSET_SECS .EQU $D1 ; SET SECONDS VALUE
BF_SYSSET_BOOTINFO .EQU $E0 ; SET BOOT INFORMATION
BF_SYSSET_CPUSPD .EQU $F3 ; SET CLOCK SPEED & WAIT STATES
BF_SYSSET_PANEL .EQU $F4 ; SET FRONT PANEL LEDS
;
BF_SYSINT_INFO .EQU $00 ; GET INTERRUPT SYSTEM INFO
BF_SYSINT_GET .EQU $10 ; GET INT VECTOR ADDRESS
@@ -137,6 +149,7 @@ PLT_DYNO .EQU 11 ; DYNO MICRO-ATX MOTHERBOARD
PLT_RCZ280 .EQU 12 ; RCBUS W/ Z280
PLT_MBC .EQU 13 ; MULTI BOARD COMPUTER
PLT_RPH .EQU 14 ; RHYOPHYRE GRAPHICS COMPUTER
PLT_Z80RETRO .EQU 15 ; Z80 RETRO COMPUTER
;
; HBIOS GLOBAL ERROR RETURN VALUES
;
@@ -261,6 +274,15 @@ DIAG_08 .EQU 11111111B ; ON
DIAG_09 .EQU 11111111B ; ON
#ENDIF
;
; FRONT PANEL SWITCHES
;
SW_CRT .EQU %10000000 ; CRT/SER CONSOLE
SW_SEC .EQU %01000000 ; SEC/PRI CONSOLE
SW_AUTO .EQU %00100000 ; AUTO/MENU BOOT
SW_DISK .EQU %00010000 ; DISK/ROM
SW_FLOP .EQU %00001000 ; FLOP/HD
SW_OPT .EQU %00000111 ; SLICE/ROM APP
;
; MEDIA ID VALUES
;
MID_NONE .EQU 0
@@ -309,6 +331,9 @@ DIODEV_SD .EQU $60
DIODEV_PRPSD .EQU $70
DIODEV_PPPSD .EQU $80
DIODEV_HDSK .EQU $90
DIODEV_PPA .EQU $A0
DIODEV_IMM .EQU $B0
DIODEV_SYQ .EQU $C0
;
; RTC DEVICE IDS
;
@@ -319,6 +344,11 @@ RTCDEV_INT .EQU $30 ; PERIODIC INT TIMER
RTCDEV_DS7 .EQU $40 ; DS1307 (I2C)
RTCDEV_RP5 .EQU $50 ; RP5C01
;
; DSKY DEVICE IDS
;
DSKYDEV_ICM .EQU $00 ; Intersil ICM7218
DSKYDEV_PKD .EQU $10 ; Intel P8279
;
; VIDEO DEVICE IDS
;
VDADEV_VDU .EQU $00 ; ECB VDU - MOTOROLA 6545
@@ -326,7 +356,7 @@ VDADEV_CVDU .EQU $10 ; ECB COLOR VDU - MOS 8563
VDADEV_GDC .EQU $20 ; GRAPHICS DISPLAY CTLR - UPD7220
VDADEV_TMS .EQU $30 ; N8 ONBOARD VDA SUBSYSTEM - TMS 9918
VDADEV_VGA .EQU $40 ; ECB VGA3 - HITACHI HD6445
;VDADEV_V9958 .EQU $50 ; V9958 VDU
VDADEV_VRC .EQU $50 ; VGARC
;
; SOUND DEVICE IDS
;
@@ -335,6 +365,37 @@ SNDDEV_AY38910 .EQU $10
SNDDEV_BITMODE .EQU $20
SNDDEV_YM2612 .EQU $30
;
; DSKY KEYS
;
KY_0 .EQU $00
KY_1 .EQU $01
KY_2 .EQU $02
KY_3 .EQU $03
KY_4 .EQU $04
KY_5 .EQU $05
KY_6 .EQU $06
KY_7 .EQU $07
KY_8 .EQU $08
KY_9 .EQU $09
KY_A .EQU $0A
KY_B .EQU $0B
KY_C .EQU $0C
KY_D .EQU $0D
KY_E .EQU $0E
KY_F .EQU $0F
KY_FW .EQU $10 ; FORWARD
KY_BK .EQU $11 ; BACKWARD
KY_CL .EQU $12 ; CLEAR
KY_EN .EQU $13 ; ENTER
KY_DE .EQU $14 ; DEPOSIT
KY_EX .EQU $15 ; EXAMINE
KY_GO .EQU $16 ; GO
KY_BO .EQU $17 ; BOOT
KY_F4 .EQU $18 ; F4
KY_F3 .EQU $19 ; F3
KY_F2 .EQU $1A ; F2
KY_F1 .EQU $1B ; F1
;
; HBIOS CONTROL BLOCK OFFSETS
; WARNING: THESE OFFSETS WILL CHANGE SIGNIFICANTLY BETWEEN RELEASES
; IT IS STRONGLY RECOMMENDED THAT YOU DO NOT USE THEM!

View File

@@ -166,7 +166,7 @@ HDSK_GEOM:
HDSK_DEVICE:
LD D,DIODEV_HDSK ; D := DEVICE TYPE
LD E,(IY+HDSK_DEV) ; E := PHYSICAL DEVICE NUMBER
LD C,%00000000 ; C := ATTRIBUTES, NON-REMOVABLE HARD DISK
LD C,%00110000 ; C := ATTRIBUTES, NON-REMOVABLE HARD DISK
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,HDSK_IO ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
@@ -234,9 +234,11 @@ HDSK_RW0:
LD (HDSK_RC),A ; CLEAR RETURN CODE
;
#IF (DSKYENABLE)
#IF (DSKYDSKACT)
LD A,HDSK_LBA
CALL LDHLIYA
CALL HB_DSKACT ; SHOW ACTIVITY
#ENDIF
#ENDIF
;
; CONVERT LBA HHHH:LLLL (4 BYTES)

Some files were not shown because too many files have changed in this diff Show More