I had updated SLR180. The newer version switched the default file extension it looks for from .180 to .z80. Changed filenames and build/make files to adjust to this.
- Improved ASSIGN operation under CP/M 3 to better handle BIOS function invocations
- Added 2PIOTST for testing the DUALPIO MBC board
- Increased default RAM drive size for ZRC
- Fixed the ROM VERIFY functionality on Z280. It was indicating errors incorrectly.
- Revised the way that ZZRCC is built to remove a bunch of complexity that was causing issues. An implication of this is that ZZRCC now treats the data loaded from the CF Card as a ROM disk instead of a RAM disk.
- Updated the assemblers to handle some more Z280 instructions used in HBIOS.
- When building ZZRCC, checks have been added to ensure the ROM image is exactly 256K. The build defaults to 512K and that causes the ZZRCC disk image to be corrupted. This will stop the build if the user fails to specify a 256K ROM size.
The Z280 interbank memory copy uses DMA and did not properly handle scenarios where the source or destination memory range crossed over the banked/common memory boundary. It added a bunch of code, but it is fixed now. This seems to be required by CP/M 3.
- Fix build under Windows (credit to Dean Netherton for finding this).
- Fix ReadMe.md file format to remove superfluous junk at top.
- Improve RAM size detection (work in progress, not part of normal build).
- Added KBDINFO which dumps low level info about keyboards.
- Updated KBDTEST and VDCTEST to put the keyboard controller into translation mode which is what these programs were intended to use.
- Add kbdtest, cvdtest, and cvdonly test programs. They apply to MBC platform only.
- Display more boot info in CVDU and KBD drivers.
- Separate floppy and hard disk content definition files.
- Fixes to ZPMLDR to make it functional with RomWBW.
- Incorporate fixes from the Jon Saxton disassembly in ZPM3 itself.
- Credit to Lars Nelson for finding the ZPM3 source (disassembly).
- Corrects the dynamic disk buffer allocation routine in CBIOS and ASSIGN.COM. They had the DPB assignments inverted causing slightly wrong buffer allocations for RAM and ROM disks.
Credit to Andrew Lynch for discovering this issue.
- Some newer/multi-port UART chips now use MCR:3 to activate the interrupt pin(s), otherwise tri-state. This update sets MCR:3 in all cases.
- Added UARTDUAL config variable that enables detection of a dual UART chip at 0x80 for MBC platform.
- Fixed a typo in TastyBasic Build script.
