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106 Commits

Author SHA1 Message Date
Wayne Warthen
c1fa7b420a SD Media Automatic Drive Assignment - Issue #365
- Modified SD Media handling such that no OS drive letters will be assigned automatically at OS Startup if there is no media inserted.
2023-10-05 10:14:30 -07:00
Wayne Warthen
9072bc6d70 Issue #366
Based on input from Dean Jenkins:
- Updated User Guide to clarify some nuances related to use of Combo Disk Images
- Added "blank" slice images
2023-10-04 16:54:34 -07:00
Wayne Warthen
480dbe4f4c Add Disk Images for ROMless Configurations 2023-10-03 19:44:49 -07:00
Wayne Warthen
26fad23c3a Z280 ROMless Fixes
- Corrected a couple deficiencies that caused Z280 CPUs to fail in the new ROMless configuration
2023-10-03 15:24:18 -07:00
Wayne Warthen
883dab7e97 ROMless Operation Overhaul
- Implement new approach to ROMless boot and operation.  Still missing the ability to seed the RAM disk.
- Tweaks to CH driver
2023-10-01 17:22:19 -07:00
Wayne Warthen
d3f5643791 CH Driver Tweaks 2023-09-24 16:47:36 -07:00
Wayne Warthen
5299d24379 Merge pull request #363 from skullandbones/Issue-362_RPI4_no_bios.bin_v1
zxcc: Fix for load bios.bin failure on a RPi4
2023-09-24 16:25:50 -07:00
Dean Jenkins
a229db96a6 zxcc: Fix for load bios.bin failure on a RPi4
Fix load_bios() when used on a Raspberry Pi4.

The defect was corrupting the path of the zxcc executable.

The fix is to NUL terminate the path string from the readlink()
call.
2023-09-24 17:04:35 +01:00
Wayne Warthen
092e44c62e RPi Builds & CH375/6 Support
- The build process was enhanced by Dean  Jenkins to support the Raspberry Pi.  Note that the Propeller firmware will not be generated by a RPi build.  See Issue #358.
- Initial support for USB storage via CH375/6.
2023-09-22 14:13:12 -07:00
Wayne Warthen
722bce819b Bump Version 2023-09-16 13:41:32 -07:00
Wayne Warthen
2d470a2a90 Merge pull request #360 from danwerner21/dev
ESP32 Driver updates
2023-09-16 13:24:08 -07:00
Dan Werner
b6700dfa4c ESP32 Driver updates 2023-09-16 14:47:09 -05:00
Wayne Warthen
cfc76d0659 Add Heath H8 Framework 2023-09-14 19:38:17 -07:00
Wayne Warthen
7fce3277a0 Create SCZ180_sc700.asm
- Missed this file on last commit
2023-09-13 14:56:24 -07:00
Wayne Warthen
2219e4c82d Miscellaneous
- Add SCZ180_sc700 standard build
- Minor fix to DMAMON
2023-09-13 14:03:54 -07:00
Wayne Warthen
68e841e62c Miscellaneous
- Minor correction to DMAMON to restore proper operation of interrupt testing
- Minor improvements to QPM documentation
2023-09-11 10:17:57 -07:00
Wayne Warthen
bb70c36b36 Improve QPM Build
The QPM portion of the build has been updated to dynamically combine the current CBIOS with the static QPM CCP and BDOS binaries.  This will keep the QPM system image up to date and avoid HBIOS version mismatch warnings.
2023-09-09 16:18:40 -07:00
Wayne Warthen
c391fd6d56 Support S100 Propeller Console 2023-09-07 18:16:25 -07:00
Wayne Warthen
e69caf5059 Add SROM (Serial ROM) Utility 2023-09-05 16:29:05 -07:00
Wayne Warthen
8b7e71049b FDC Detection Update & Enable ESP Driver on Duodyne
- Based on reports from Martin R, the FDC detection algorithm has been updated to try reading the FDC MSR register twice to try and get the desired value of 0x80.
- Dan Werner's ESP board for Duodyne is working well, so the default Duodyne config has been changed to automatically detect this board.
2023-08-25 10:25:07 -07:00
Wayne Warthen
50e190c755 Merge pull request #357 from fernandocarolo/dev
Fix references to the EPFDC driver in comments.
2023-08-23 14:44:47 -07:00
Wayne Warthen
d0eccf026b Enable INTRTC for Easy Z80 2023-08-23 14:28:20 -07:00
Fernando Carolo
39f796ce22 Fix references to the EPFDC driver in comments.
The EtchedPixels floppy disk controller is known by the identifier
'FDMODE_EPFDC', but the comments in the Config subdirectory have an
incorrect reference to 'EPWDC'. This fix updates the comments to use the
correct name.
2023-08-23 21:02:48 +01:00
Wayne Warthen
5610e79db4 Improve FD Driver Detection
Credit to Martin R for reporting that his FDC was not being detected.  The delay between FDC status register reads was increased in the detection routine to correct this.
2023-08-22 15:22:11 -07:00
Wayne Warthen
e782b78b16 Bump Version 2023-08-22 11:02:08 -07:00
Wayne Warthen
c0d3969244 Merge pull request #356 from b1ackmai1er/dev
Duo/MBC IM2 Hardware Timer support
2023-08-22 10:54:30 -07:00
b1ackmai1er
c62af3df33 MBC / DUO IM2 template
Template for setting up interrupts using the IM2 pin header on MBC and DUO platforms.
2023-08-22 13:16:42 +08:00
b1ackmai1er
6d736996fd Merge pull request #60 from wwarthen/dev
Support Serial Ports on ESP32 Board
2023-08-22 12:32:56 +08:00
Wayne Warthen
8bc801d0a4 Support Serial Ports on ESP32 Board 2023-08-21 17:40:34 -07:00
b1ackmai1er
2c6b7f7fb1 Update std.asm 2023-08-21 16:38:59 +08:00
b1ackmai1er
c3503f56d1 Update cfg_z80retro.asm 2023-08-21 16:29:27 +08:00
b1ackmai1er
d4c87996f0 Merge branch 'dev' of https://github.com/b1ackmai1er/RomWBW into dev 2023-08-21 16:25:29 +08:00
b1ackmai1er
9f5b3a8b1c Duo/MBC IM2 Hardware Timer support 2023-08-21 16:00:47 +08:00
Wayne Warthen
d06e1e2a5c Initial DUO Interrupt Handling 2023-08-20 15:03:34 -07:00
Wayne Warthen
22a0c52af3 Bump Version 2023-08-20 12:10:32 -07:00
Wayne Warthen
85aa7e89c2 Merge pull request #355 from b1ackmai1er/dev
Update DMAMON
2023-08-20 11:56:16 -07:00
b1ackmai1er
59d04f2446 Update std.asm 2023-08-20 18:18:55 +08:00
b1ackmai1er
9cc52e30d6 Update dmamon.asm 2023-08-20 18:16:19 +08:00
Wayne Warthen
e1a4e815dc Fix S100 Z180 Board LED Operation
- Status LED for S100 Z180 board was not enabled.  Credit to Jay Cotton for finding this.
2023-08-17 12:53:59 -07:00
Wayne Warthen
3c340d1ab9 Miscellaneous
- Minor documentation updates
- Improve ESP driver hardware detection
2023-08-17 11:26:19 -07:00
Wayne Warthen
138248fafc Merge pull request #354 from oholiab/xm_send_on_port
Add port option to XM's send mode
2023-08-16 19:40:40 -07:00
Matt Carroll
834eefb0bb Add port option to XM's send mode 2023-08-16 15:03:12 +01:00
Wayne Warthen
7835eb5deb Duodyne Work in Progress
- Updated DMA Driver
- Updated PCF I2C Driver
2023-08-02 13:21:52 -07:00
Wayne Warthen
d1a5c66147 Update DUO_std.asm 2023-07-28 15:43:31 -07:00
Wayne Warthen
b184ccfb78 Miscellaneous
- Updated S100 Monitor launch code to warn user if console will be directed to S100 bus vs. active on-board UART.
- Updated Duodyne early boot to add a delay to stabilize the boot process.  This is temporary and needs to be further investigated.
2023-07-28 15:19:54 -07:00
Wayne Warthen
4776b32cd3 Revise S100 Monitor Boot Option 2023-07-26 13:52:50 -07:00
Wayne Warthen
2bc5333f2b Add Boot Loader Menu Entry for S100 Z180 Monitor Invocation 2023-07-25 16:47:51 -07:00
Wayne Warthen
a5575456e2 Initial Support for Duodyne 2023-07-24 19:24:49 -07:00
Wayne Warthen
bdb8dc020b Update S100 Monitor to v0.34 2023-07-22 18:56:37 -07:00
Wayne Warthen
faaba69554 Improve sd.asm SD Card Compatibility
- PIO mode of sd.asm driver modified to setup shadow register (Issue #352).
- Relocated Z280 IVT to improve space utilization in HBIOS bank.
2023-07-17 14:52:14 -07:00
Wayne Warthen
0395bba4f5 Preliminary Support for ESP32 Nhyodyne Module
- Initial console support for Dan Werner's ESP32 Module
2023-07-10 13:16:24 -07:00
Wayne Warthen
14ac7a917b Upgrade s100mon to Latest
- Incorporated latest S100 Board Monitor code from John Monahan
2023-07-09 12:38:48 -07:00
Wayne Warthen
7a209d4053 S100 Monitor Update
The S100 Monitor will now allow launching RomWBW using the 'B' command.
2023-07-08 18:03:13 -07:00
Wayne Warthen
7e5b140c2f Update Makefile 2023-07-07 17:19:39 -07:00
Wayne Warthen
1f1952fb19 Add S100 and DUO Platforms 2023-07-07 16:18:01 -07:00
Wayne Warthen
229bdaa308 Support Z180 IM1
Added proper support for interrupt mode 1 on Z180.
2023-07-01 15:33:18 -07:00
Wayne Warthen
5c0894b8c1 Merge pull request #351 from jblang/dev
Add ColecoVision-compatible configuration
2023-07-01 11:56:15 -07:00
J.B. Langston
9cefcfb0bc Add ColecoVision-compatible configuration 2023-07-01 10:16:49 -05:00
Wayne Warthen
5d34a5c5d5 Miscellaneous
- Implement SHOWHEX functions in ICM and PKD drivers
- Improve DSKY common routines in HBIOS
- Include key CP/M 2.2 programs in NZCOM floppy image
2023-06-29 16:33:22 -07:00
Wayne Warthen
f8c800e527 Create DSKY Driver Framework
Added a new driver category for DSKY (Display/Keypad) devices.  Existing DSKY devices were converted into drivers ICM and PKD.  These devices were previously DSKY and DSKYNG.

This removes substantial code duplication and recovers significant space in romldr and dbgmon.
2023-06-28 15:06:53 -07:00
Wayne Warthen
b90e4d932a Update fd.asm
- Fix typo
2023-06-20 16:12:49 -07:00
Wayne Warthen
5457a7e7fd Improve OS Boot Drive Assignment
- Modified the Disk Device function call (DIODEVICE) to provide new attributes related to disk size and removability.
- Leveraged API change to allow handling drive assignment differently depending on ATAPI vs. ATA interface.
2023-06-20 15:52:34 -07:00
Wayne Warthen
8f5cc510ee Missing Files 2023-06-16 15:18:49 -07:00
Wayne Warthen
0475f5e853 Minor Cleanup
- Update FPLED port values for some configs
- Fix Linux/MacOS build for new disk images
2023-06-16 14:56:20 -07:00
Wayne Warthen
5b7dee0689 Merge pull request #348 from rprouse/issue/347
Adds programming and games disk images
2023-06-16 13:37:25 -07:00
Rob Prouse
6532f61747 Remove DELBR.COM 2023-06-16 10:51:20 -04:00
Rob Prouse
4bdae4eccb Remove USQ.COM 2023-06-16 10:47:55 -04:00
Rob Prouse
efb9840b86 Remove MBASIC85 2023-06-16 08:57:19 -04:00
Wayne Warthen
308a11cb32 Merge pull request #350 from wwarthen/master
Update pull_request_template.md
2023-06-15 12:51:55 -07:00
Wayne Warthen
3a7421de33 Update pull_request_template.md 2023-06-15 12:50:51 -07:00
Wayne Warthen
21a58397b6 Merge pull request #349 from wwarthen/master
Create pull_request_template.md
2023-06-15 12:16:59 -07:00
Wayne Warthen
9ae61806dc Create pull_request_template.md 2023-06-15 12:15:37 -07:00
Rob Prouse
87ac6f07f8 Fix spelling mistake, Tory -> Tony 2023-06-15 13:37:17 -04:00
Rob Prouse
1cd5313259 Remove all HLP files that I added 2023-06-15 13:28:44 -04:00
Rob Prouse
04c1ff04ac Remove CPM2.HLP 2023-06-15 13:19:55 -04:00
Rob Prouse
0e1a0afa2c Replace HI-TECH C with latest version from https://github.com/agn453/HI-TECH-Z80-C 2023-06-15 13:16:52 -04:00
Rob Prouse
5227bb68b5 Added documentation for the new disk images 2023-06-14 14:10:15 -04:00
Rob Prouse
fb68941768 Adds programming and games disk images 2023-06-14 12:45:41 -04:00
Wayne Warthen
8747ec8d02 Clean-up of ATAPI Support
- Improved media handling and error reporting.
2023-06-13 17:02:13 -07:00
Wayne Warthen
abd939625f Support ATAPI in IDE and PPIDE Drivers
- Support is limited to 512 byte sectors.  So, devices such as ATAPI Zip Drives will work.  CD-ROM devices will not because they use a larger sector size.
2023-06-12 15:56:36 -07:00
Wayne Warthen
69716abb25 Regen Doc 2023-06-08 12:34:42 -07:00
Wayne Warthen
1f526d440a Add WDATE Command, Final PPA/IMM/SYQ Driver Cleanup
- Added WDATE command courtesy Kevin Boone.  See https://github.com/kevinboone/wdate-cpm for more information.
- Final cleanup of PPA/IMM/SYQ drivers including CPU speed compensated timeouts.
2023-06-08 11:59:07 -07:00
Wayne Warthen
84374c86e6 Cleanup and Optimizations for PPA/IMM/SYQ Drivers 2023-06-06 16:21:56 -07:00
Wayne Warthen
45ea46b105 Small Bug Fix for PPA/IMM/SYQ Drivers
Credit to Mark Elkin for testing and finding this issue.
2023-06-03 14:27:33 -07:00
Wayne Warthen
1333d6a491 Functional PPA Driver 2023-06-02 15:30:10 -07:00
Wayne Warthen
b7e865dbf1 Preliminary SyQuest Driver 2023-06-01 16:13:26 -07:00
Wayne Warthen
1c411f5552 Add IBM Standard Parallel Port Support to IMM Driver 2023-05-27 16:45:21 -07:00
Wayne Warthen
364e48a5d3 IMM Driver Cleanup, PPA Driver Skeleton
IMM Driver has rational timeouts now.  It also lights the MG014 LED during activity.
The PPA skeleton just attempts to determine if the PPA interface is present.  It does not attempt any I/O.
2023-05-26 16:48:13 -07:00
Wayne Warthen
63cb89dcfc Preliminary IMM Driver (Zip Drive)
Thanks to Alan Cox for inspiring this.  Much of the code was usurped from Fuzix.
2023-05-23 18:35:18 -07:00
Wayne Warthen
6e316b46f0 Document p-System Volume Management Python Script
- Andrew Davidson created a nice Python script to extract/insert p-System volumes from/to disk images.  Added a reference to his website in the p-System ReadMe.txt file.
2023-05-11 14:20:54 -07:00
Wayne Warthen
3f23396536 Support for MG014 RCBus Parallel Port Module 2023-05-10 18:37:47 -07:00
Wayne Warthen
c628ba10f2 Workaround Z280 CPU Bug for LZSA2
The LZSA2 decompressor invoked a known Z280 CPU bug.  A small modification to the code resolves this.
2023-05-07 17:45:43 -07:00
Wayne Warthen
9358299f14 Z280 Workaround for VGARC
Z280 is having an issue with OTDR instruction when loading the font for VGARC.  For now, the use of OTDR has been eliminated.
2023-05-07 16:27:25 -07:00
Wayne Warthen
d445c4a015 Disable LZSA Compression for Z280
- The LZSA2 decompressor code is failing mysteriously on Z280 CPUs.  I have simply disabled it in the Z280 primary configuration file.
2023-05-04 14:14:36 -07:00
Wayne Warthen
e32002545b VGARC Improvements, Doc Fix
- Added ability to enable VGARC and front panel in default config without I/O conflicts (does **not** support having both types of hardware present at the same time).
- Fixed documentation error in issue #345 reported by @MorfeoMatrixx.
2023-05-03 15:58:12 -07:00
Wayne Warthen
7ac88efac1 Support for VGARC
Initial support for Bill Shen's VGARC video/keyboard module for RCBus.
2023-05-02 19:23:51 -07:00
Wayne Warthen
9f71fe05aa Cleanup IDE and PPIDE drivers
- The use of hardware reset has been improved such that it is generally only used at initial boot up.
- Minor improvements to CF card detection and initialization.
- Implement a simple wait mechanism to accommodate the startup time of the RC2014 SD Pico module.
- Front panel I/O port for SC series of systems has been moved to 0x00 which is consistent with all other systems and avoids some I/O conflicts.
2023-04-30 12:03:16 -07:00
Wayne Warthen
ad3c533145 Fix IDE Detection on Spinning Disks
Prior improvement to IDE device detection broke detection of spinning hard disks.  IDE registers cannot be used prior to device init completion (spin up).  Not a problem for CF, but special steps required to ensure devices are fully initialized before register testing.
2023-04-23 18:47:43 -07:00
Wayne Warthen
e43a939f54 Improve IDE Device Detection
Per issue #343, some systems could initially detect a non-existent IDE device which would cause a long time-out.  This should resolve the issue.
2023-04-21 17:08:18 -07:00
Wayne Warthen
e5b7409f44 Support Per-floppy Device Drive Types
- Floppy devices are now configured per-device so that each floppy drive can be different (e.g., first floppy is 3.5" and second floppy is 5.25").
- Removed need to use termination signal on floppy sector I/O.

Addresses issue #318
2023-04-20 16:24:14 -07:00
Wayne Warthen
9100f199b1 Z80-Retro SD Card Support (Alan Cox) 2023-04-18 11:40:22 -07:00
Wayne Warthen
bcc50a31a9 Fix SIO Ports in Z80R Mode 2023-04-17 19:22:37 -07:00
Wayne Warthen
c891ba2bad Support Z80-Retro Platform
Code provided by Alan Cox
2023-04-16 20:30:16 -07:00
Wayne Warthen
2f9e77ca13 Merge branch 'dev' of https://github.com/wwarthen/RomWBW into dev 2023-04-14 19:05:49 -07:00
Wayne Warthen
f346209c82 Front Panel Switch Support 2023-04-14 19:05:37 -07:00
Wayne Warthen
0742fb6188 Merge pull request #342 from wwarthen/master
Merge pull request #340 from wwarthen/dev
2023-04-14 19:00:02 -07:00
468 changed files with 105749 additions and 3749 deletions

11
.github/pull_request_template.md vendored Normal file
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@@ -0,0 +1,11 @@
<!--
BEFORE YOU CREATE A PULL REQUEST:
- Please base all pull requests against the dev branch
- Include a clear description of your change
- Reference related Issue(s) (e.g., "Resolves Issue #123")
Thank you for contributing to RomWBW! I will review your pull request as soon as possible.
DELETE EVERYTHING IN THIS COMMENT BLOCK AND REPLACE WITH YOUR COMMENTS
-->

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@@ -39,8 +39,8 @@ image for the Mark IV with the standard configuration. If a custom
configuration called "custom" is created and built, a new file called
MK4_custom.rom will be added to this directory.
Documentation of the pre-built ROM Images is contained in the
RomList.txt file in this directory.
Documentation of the pre-built ROM Images is contained in
"RomWBW User Guide.pdf" in the Doc directory.
ROM Firmware Update Images (<plt>_<cfg>.upd)
-------------------------------------

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@@ -1,3 +1,29 @@
Version 3.3
-----------
- WBW: Support Front Panel switches
- A?C: Preliminary support for Z80-Retro
- A?C: Support for SD PIO
- A?C: Support for Z80-Retro SD interface
- WBW: Support per-drive floppy configuration
- WBW: Support for Bill Shen's VGARC
- WBW: Support for MG014 Parallel Port module + printer
- WBW: Support for EMM Zip Drive on PPI interface (much inspiration from Alan Cox)
- WBW: Support for PPA Zip Drive on PPI interface (much inspiration from Alan Cox)
- WBW: Support for SyQuest SparQ Drive on PPI interface (much inspiration from Alan Cox)
- WBW: Support for ATAPI Disk Drives (not CD-ROMs) on IDE and PPIDE interfaces
- R?P: Added new disk images: Aztec C, MS BASIC Compiler, MS Fortran, Games, HiTech-C, Turbo Pascal, SLR Z80ASM
- JBL: Added RCZ80 configuration for ColecoVision
- WBW: Support for Z180 running interrupt mode 1
- WBW: Preliminary support for S100 Computers Z180
- WBW: Preliminary support for Dan Werner's ESP32 MBC Module
- WBW: Early support for Duodyne base system (CPU/UART/ROM/RAM/RTC/SPK)
- M?C: Fixed XM to allow specifying HBIOS port for send operations
- WBW: Fix S100 Z180 LED operation (credit to Jay Cotton for finding this issue)
- WBW: QPM system image is now combined with current CBIOS during build
- WBW: Added framework for Heath platform
- WBW: Support for USB Disks via CH375/CH376
- D?J: Support for Raspberry Pi build process
Version 3.2.1
-------------
- M?P: Fixed Zeta 2 FDD and CPUSPD config settings

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@@ -6,8 +6,8 @@
*** ***
***********************************************************************
This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
the system.
ChangeLog.txt
@@ -34,9 +34,9 @@ ROM Applications documents.
CPM Manual ("CPM Manual.pdf")
-----------------------------
The original DRI CP/M 2.x Operating System Manual. This should be
considered the primary reference for system operation. The section
on CP/M 2 Alteration can be ignored since this work has already been
The original DRI CP/M 2.x Operating System Manual. This should be
considered the primary reference for system operation. The section
on CP/M 2 Alteration can be ignored since this work has already been
completed as part of the RomWBW distribution.
@@ -59,7 +59,7 @@ Manual for the DDTZ v2.7 debug tool included on the ROM drive.
FDisk Manual ("FDisk Manual.pdf")
---------------------------------
The operational manual for John Coffman's hard disk partitioning
The operational manual for John Coffman's hard disk partitioning
program. This program is included in RomWBW as FDISK80.
@@ -78,9 +78,9 @@ NZCOM operating system operation manual.
ZCPR Manual ("ZCPR Manual.pdf")
-------------------------------
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
ZCPR D&J Manual ("ZCPR-DJ.doc")
@@ -92,9 +92,9 @@ ZCPR D&J User Manual. This manual supplements the ZCPR Manual.
ZSDOS Manual ("ZSDOS Manual.pdf")
---------------------------------
ZSDOS is the DOS portion of Z-System. This is the manual for ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
ZSDOS is the DOS portion of Z-System. This is the manual for ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.
Microsoft Basic-80 Reference Manual v5.0 (Microsoft Basic-80 Reference Manual v5.0.pdf)
@@ -110,7 +110,6 @@ QP/M 2.7 Features and Facilities ("qcp27.pdf")
Official documentation set for QP/M 2.7 from original QP/M distribution.
SIO+CTC Baud Rate Options (SIO+CTC Baud Rate Options.pdf)
---------------------------------------------------------
@@ -133,4 +132,37 @@ UCSD p-System Users Manual ("UCSD p-System Users Manual.pdf")
Official user manual for p-System operating system included with
RomWBW.
--WBW 5:18 PM 3/16/2023
Z80 Assembler User Manual (z80asm (SLR Systems).pdf)
----------------------------------------------------
Official user manual for the Z80 Macro Assembler by SLR Systems
included in the z80asm disk image.
HI-TECH C Compiler User Manual (HI-TECH Z80 C Compiler Manual.txt)
------------------------------------------------------------------
Official user manual for the HI-TECH C Compiler included in the
hitechc disk image.
Borland TurboPascal User Manual (Turbo_Pascal_Version_3.0_Reference_Manual_1986.pdf)
------------------------------------------------------------------------------------
Official user manual Borland TurboPascal included in the pascal disk image.
Aztec C Compiler User Manual (Aztec_C_1.06_User_Manual_Mar84.pdf)
-----------------------------------------------------------------
Official user manual for the Aztec C Compiler included in the aztecc disk image.
FORTRAN-80 User Manual (Microsoft_FORTRAN-80_Users_Manual_1977.pdf)
---------------------------------------------------------------
Official user manual for Microsoft's FORTRAN-80 compiler included in the fortran
disk image.
--WBW 5:18 PM 6/14/2023

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@@ -1,9 +1,9 @@
**RomWBW ReadMe** \
Version 3.2.1 \
Version 3.3 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
07 Apr 2023
04 Oct 2023
# Overview
@@ -183,6 +183,10 @@ let me know if I missed you!
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images including
Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
Microsoft Fortran Compiler, and a Games compendium.
Contributions of all kinds to RomWBW are very welcome.
# Licensing

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@@ -1,6 +1,6 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
07 Apr 2023
04 Oct 2023
@@ -185,6 +185,10 @@ let me know if I missed you!
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games compendium.
Contributions of all kinds to RomWBW are very welcome.

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@@ -153,7 +153,8 @@ JP2 (/FAULT) shorted, JP3 (MINI): 2-3, JP4 (/DC/RDY): 2-3.
The RCBus Scott Baker WDC-based floppy module should be jumpered
for I/O base address 0x50 (SV1: 11-12), JP1 (/DACK): 1-2,
JP2 (TC): 2-3.
JP2 (TC): 2-3. Note that pin 1 of JPX jumpers is toward the bottom
of the board.
The RCBus FDC by Alan Cox (Etched Pixels) needs to be strapped
for base I/O address 0x48.

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@@ -12,12 +12,26 @@ DMAMODE_Z180 .EQU 2 ; Z180 INTEGRATED DMA
DMAMODE_Z280 .EQU 3 ; Z280 INTEGRATED DMA
DMAMODE_RC .EQU 4 ; RCBUS Z80 DMA
DMAMODE_MBC .EQU 5 ; MBC
DMAMODE_VDG .EQU 6 ; VELESOFT DATAGEAR
DMAMODE_DUO .EQU 6 ; DUO
DMAMODE_VDG .EQU 7 ; VELESOFT DATAGEAR
;
DMAMODE .EQU DMAMODE_DUO ; SELECT DMA DEVICE FOR TESTING
;
;==================================================================================================
; SOME DEFAULT PLATFORM CONFIGURATIONS
;==================================================================================================
;
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_MBC ; SELECT DMA DEVICE FOR TESTING
DMALATCH .EQU DMABASE+1 ; DMA: DMA LATCH ADDRESS
DMAIOTST .EQU $68 ; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
;
#IF (DMAMODE==DMAMODE_DUO)
DMABASE .SET $40 ; DMA: DMA0 BASE ADDRESS
DMALATCH .SET $43 ; DMA: DMA LATCH ADDRESS
DMAIOTST .SET $58 ; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
;DMAIOTST .SET $94 ; AN ALT OUTPUT PORT FOR TESTING - RTC/SPEAKER/LEDS PORT
#ENDIF
;
;==================================================================================================
; HELPER MACROS AND EQUATES
;==================================================================================================
@@ -113,7 +127,7 @@ MAIN:
LD SP,STACK ; STACK
;
call PRTSTRD ; WELCOME
.db "\n\rDMA Monitor V3\n\r$"
.db "\n\rDMA Monitor V3.1\n\r$"
;
#IF (INTENABLE)
;
@@ -122,6 +136,8 @@ MAIN:
ld de,$A000
ld bc,hsiz
ldir
ld a,(dmaport)
ld (int_dmaport),a
;
; Install interrupt vector (RomWBW specific!!!)
ld hl,int ; pointer to my interrupt handler
@@ -156,17 +172,17 @@ MENULP1:
CP 'N'
JP Z,DMATST_N ; MEMORY COPY ITER
CP '0'
JP Z,DMATST_01
JP Z,DMATST_0 ; PULSE DMA PORT
CP '1'
JP Z,DMATST_1 ; PULSE LATCH PORT
CP 'O'
JP Z,DMATST_O
#IF !(DMAMODE==DMAMODE_VDG)
CP '1'
JP Z,DMATST_01
CP 'R'
JP Z,DMATST_R ; TOGGLE RESET
CP 'Y'
JP Z,DMATST_Y ; TOGGLE READY
#ENDIF
JP Z,DMATST_Y
cp 'L'
jp z,DMACFG_L ; SET LATCH PORT
cp 'S'
jp z,DMACFG_S ; SET PORT
cp 'V'
@@ -197,12 +213,20 @@ DMABYE:
;
DMACFG_S:
call PRTSTRD
.db "\n\rSet port address\n\rPort:$"
.db "\n\rSet DMA port address\n\rPort:$"
call HEXIN
ld hl,dmaport
ld (hl),a
inc hl
inc a
#IF (INTENABLE)
ld (int_dmaport),a
#ENDIF
jp MENULP
;
DMACFG_L:
call PRTSTRD
.db "\n\rSet Latch port address\n\rPort:$"
call HEXIN
ld hl,dmalach
ld (hl),a
jp MENULP
;
@@ -234,11 +258,17 @@ DMATST_N:
CALL DMAMemTestIter
JP MENULP
;
DMATST_01:
DMATST_0:
call PRTSTRD
.db "\n\rPerforming Port Selection Test\n\r$"
CALL DMA_Port01
JP MENULP
.db "\n\rPerforming DMA Port Selection Test\n\r$"
CALL DMA_Port0
ret
DMATST_1:
call PRTSTRD
.db "\n\rPerforming Latch Port Selection Test\n\r$"
CALL DMA_Port1
ret
;
DMATST_O:
call PRTSTRD
@@ -255,7 +285,7 @@ DMATST_D:
DMATST_Y:
call PRTSTRD
.db "\n\rPerforming Ready Bit Test\n\r$"
CALL DMA_ReadyT
CALL DMA_ReadyY
JP MENULP
;
DMATST_R:
@@ -289,6 +319,10 @@ DISPM: call PRTSTRD
.db ", Port=0x$"
LD A,(dmaport) ; DISPLAY
CALL PRTHEXBYTE ; DMA PORT
call PRTSTRD
.db ", Latch Port=0x$"
ld A,(dmalach)
CALL PRTHEXBYTE ; DMA PORT
;
#IF (INTENABLE)
;
@@ -351,7 +385,7 @@ DMA_INIT:
CALL PRTHEXBYTE
;
#IF !(DMAMODE==DMAMODE_VDG)
ld a,(dmautil)
ld a,(dmalach)
ld c,a
LD A,DMA_FORCE
out (c),a ; force ready off
@@ -369,7 +403,8 @@ DMA_INIT:
;
ld hl,DMACode ; program the
ld b,DMACode_Len ; dma command
ld c,DMABASE ; block
ld a,(dmaport)
ld c,a ; block
;
di
otir ; load dma
@@ -417,6 +452,7 @@ DMA_DEV_STR:
.TEXT "Z280$"
.TEXT "RCBUS$"
.TEXT "MBC$"
.TEXT "DUODYNE$"
.TEXT "DATAGEAR$"
;
DMA_SPD_STR:
@@ -479,11 +515,12 @@ DMACFG_V:
;==================================================================================================
;
DMABUF .TEXT "0123456789abcdef"
;DMABUF .DB $04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$00,$00,$00 ; SPEAKER
;
DMA_ReadyO:
call PRTSTRD
.db "\r\nOutputing string to port 0x$"
ld a,DMAIOTST
ld a,(tstport)
call PRTHEXBYTE
call NEWLINE
;
@@ -491,7 +528,7 @@ DMA_ReadyO:
IOLoop: push bc
call NEWLINE
ld hl,DMABUF
ld a,DMAIOTST
ld a,(tstport)
ld bc,16
;
call DMAOTIR
@@ -502,16 +539,17 @@ IOLoop: push bc
ret
;
;==================================================================================================
; PULSE PORT (COMMON ROUTINE WHERE A CONTAINS THE ASCII PORT OFFSET)
; PULSE PORT
;==================================================================================================
;
DMA_Port01:
DMA_Port0:
ld a,(dmaport)
jr DMA_Port
DMA_Port1:
ld a,(dmalach)
DMA_Port:
call PRTSTRD
.db "\r\nPulsing port 0x$"
sub '0' ; Calculate
ld c,a
ld a,(dmaport) ; Port to
add a,c
call PRTHEXBYTE
call NEWLINE
ld c,a ; toggle
@@ -543,12 +581,9 @@ dlylp: dec bc
; TOGGLE READY BIT
;==================================================================================================
;
DMA_ReadyT:
DMA_ReadyY:
call NEWLINE
#IF !(DMAMODE==DMAMODE_VDG)
#ENDIF
ld a,(dmautil)
ld a,(dmalach)
ld c,a ; toggle
ld b,$20 ; loop counter
portlp2:push bc
@@ -558,14 +593,12 @@ portlp2:push bc
.db ": ON$"
call delay
ld a,$FF
; ld c,DMABASE+1
out (c),a
call PRTSTRD
.db " -> OFF$"
call delay
call PRTSTRD
.db "\r \r$"
; ld c,DMABASE+1
ld a,0
out (c),a
pop bc
@@ -605,9 +638,9 @@ DMAMemMove1:
;
DMAMemMove2:
;
; LD HL,$8400 ; PLANT
; LD A,$00 ; BAD
; LD (HL),A ; SEED
;LD HL,$8400 ; PLANT
;LD A,$00 ; BAD
;LD (HL),A ; SEED
;
LD A,$AA ; CHECK COPY SUCCESSFULL
LD HL,$8000
@@ -615,6 +648,14 @@ DMAMemMove2:
NXTCMP: CPI
JP PO,CMPOK
JR Z,NXTCMP
DEC HL
CALL PRTHEXWORDHL
LD A,' '
CALL COUT
LD A,(HL)
CALL PRTHEXBYTE
RET ; RET W/ ZF CLEAR
;
CMPOK:
@@ -1167,10 +1208,10 @@ CST:
RET
;
USEINT .DB FALSE ; USE INTERRUPTS FLAG
counter .dw 0
dmaport .db DMABASE
dmautil .db DMABASE+1
dmalach .db DMALATCH
dmaxfer .db DMA_XMODE
tstport .db DMAIOTST
dmavbs .db 0
SAVSTK: .DW 2
.FILL 64
@@ -1187,11 +1228,16 @@ reladr .equ $ ; relocation start adr
.org $A000 ; code will run here
;
int:
;LD E,'.' ; OUTPUT CHAR TO E
;LD C,CIO_CONSOLE ; CONSOLE UNIT TO C
;LD B,BF_CIOOUT ; HBIOS FUNC: OUTPUT CHAR
;CALL $FFF0 ; HBIOS OUTPUTS CHARACTER
; According to the DMA doc, you must issue
; a DMA_DISABLE command prior to a
; DMA_REINIT_STATUS_BYTE command to avoid a
; potential race condition.
ld a,(dmaport)
ld a,(int_dmaport)
ld c,a
ld a,DMA_DISABLE
out (c),a
@@ -1211,6 +1257,11 @@ int:
or $ff ; signal int handled
ret
;
; data referred to in handler must reside in high mem
;
int_dmaport .db 0 ; hi mem copy of dmaport
counter .dw 0 ; interrupt counter
;
hsiz .equ $ - $A000 ; size of handler to relocate
;
.org reladr + hsiz

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@@ -8,6 +8,8 @@ set TASMTABS=%TOOLS%\tasm32
tasm -t180 -g3 -fFF i2cscan.asm i2cscan.com i2cscan.lst || exit /b
tasm -t180 -g3 -fFF rtcds7.asm rtcds7.com rtcds7.lst || exit /b
tasm -t180 -g3 -fFF i2clcd.asm i2clcd.com i2clcd.lst || exit /b
tasm -t80 -g3 -ff srom.asm srom.com srom.lst || exit /b
copy /Y i2c*.com ..\..\..\..\Binary\Apps\Test\ || exit /b
copy /Y rtcds7*.com ..\..\..\..\Binary\Apps\Test\ || exit /b
copy /Y srom.com ..\..\..\..\Binary\Apps\Test\ || exit /b

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@@ -1,4 +1,4 @@
OBJECTS = i2cscan.com rtcds7.com i2clcd.com
OBJECTS = i2cscan.com rtcds7.com i2clcd.com srom.com
DEST = ../../../../Binary/Apps/Test/
TOOLS = ../../../../Tools

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@@ -5,12 +5,13 @@
; MARCO MACCAFERRI, HTTPS://WWW.MACCASOFT.COM
; HBIOS VERSION BY PHIL SUMMERS (B1ACKMAILER) DIFFICULTLEVELHIGH@GMAIL.COM
;
PCF .EQU 1
P8X180 .EQU 0
SC126 .EQU 0
SC137 .EQU 0
PCFECB .EQU 0
PCFDUO .EQU 1
P8X180 .EQU 0
SC126 .EQU 0
SC137 .EQU 0
;
#IF (PCF)
#IF (PCFECB)
I2C_BASE .EQU 0F0H
PCF_ID .EQU 0AAH
CPU_CLK .EQU 12
@@ -20,6 +21,16 @@ PCF_RS1 .EQU PCF_RS0+1
PCF_OWN .EQU (PCF_ID >> 1) ; PCF'S ADDRESS IN SLAVE MODE
#ENDIF
;
#IF (PCFDUO)
I2C_BASE .EQU 056H
PCF_ID .EQU 0AAH
CPU_CLK .EQU 12
;
PCF_RS0 .EQU I2C_BASE
PCF_RS1 .EQU PCF_RS0+1
PCF_OWN .EQU (PCF_ID >> 1) ; PCF'S ADDRESS IN SLAVE MODE
#ENDIF
;
#IF (P8X180)
I2C_BASE .EQU 0A0h
_sda .EQU 0
@@ -153,8 +164,11 @@ lp5f: ld a,(addr) ; next address
jp 0
signon: .db "I2C Bus Scanner"
#IF (PCF)
.DB " - PCF8584"
#IF (PCFECB)
.DB " - PCF8584 (ECB)"
#ENDIF
#IF (PCFDUO)
.DB " - PCF8584 (Duodyne)"
#ENDIF
#IF (SC126)
.DB " - SC126"
@@ -219,7 +233,7 @@ _cout: ; character
ret
;-----------------------------------------------------------------------------
#IF (PCF)
#IF (PCFECB | PCFDUO)
_i2c_start:
PCF_START:
LD A,PCF_START_
@@ -418,7 +432,7 @@ PCF_PINFAIL .DB "PIN FAIL$"
PCF_BBFAIL .DB "BUS BUSY$"
;
;-----------------------------------------------------------------------------
#IF (PCF)
#IF (PCFECB | PCFDUO)
_i2c_stop:
PCF_STOP:
LD A,PCF_STOP_ ; issue

File diff suppressed because it is too large Load Diff

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@@ -629,6 +629,9 @@ CFGTBL: ; PLT RSEL RDAT RIN Z180 ACR
;
.DB 13, $A0, $A1, $A0, $FF, $A2 ; MBC
.DW HWSTR_MBC
;
.DB 17, $A0, $A1, $A0, $FF, $A2 ; DUODYNE
.DW HWSTR_DUO
;
.DB $FF ; END OF TABLE MARKER
;
@@ -682,6 +685,7 @@ HWSTR_RCEB6 .DB "RCBus Sound Module (EBv6)",0
HWSTR_RCMF .DB "RCBus Sound Module (MF)",0
HWSTR_LINC .DB "Z50 LiNC Sound Module",0
HWSTR_MBC .DB "NHYODYNE Sound Module",0
HWSTR_DUO .DB "DUODYNE Sound Module",0
MSGUNSUP .db "MYM files not supported with HBIOS yet!\r\n", 0

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@@ -720,12 +720,17 @@ NOBYE: LXI H,FCB+1 ; Get primary option
; Send option processor
; Single option: "K" - force 1k mode
;
INX H ; Look for a 'K'
CALL SNDOPC
CALL SNDOPC
JMP ALLSET
SNDOPC:INX H ; Look for an option
MOV A,M
CPI ' ' ; Is it a space?
JZ ALLSET ; Then we're ready to send...
CPI 'K'
JNZ OPTERR ; "K" is the only setable 2nd option
JNZ CHKK
POP PSW
JMP ALLSET
CHKK: CPI 'K'
JNZ CHK6TH ; If it's not K it should be a port number
LDA MSPEED
CPI MINKSP ; If less than MINKSP bps, ignore 1k
JC ALLSET ; Request
@@ -733,7 +738,7 @@ NOBYE: LXI H,FCB+1 ; Get primary option
STA KFLAG ; First, force us to 1K mode
CALL ILPRT
DB '(1k protocol selected)',CR,LF,0
JMP ALLSET ; That's it for send...
RET ; That's it for send...
;
; Receive option processor
; 3 or 4 options: "X" - disable auto-protocol select
@@ -5789,4 +5794,4 @@ BDPTOS EQU 83 ; Print Time on System
ENDIF ; BYEBDOS
;
END



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@@ -30,11 +30,12 @@
; 2021-12-06 [WBW] Fix inverted ROM/RAM DPB mapping in buffer alloc
; 2022-02-28 [WBW] Use HBIOS to swap banks under CP/M 3
; Use CPM3 BDOS direct BIOS call to get DRVTBL adr
; 2023-06-19 [WBW] Update for revised DIODEVICE API
; 2023-09-19 [WBW] Added CHUSB & CHSD device support
;_______________________________________________________________________________
;
; ToDo:
; 1) Do something to prevent assigning slices when device does not support them
; 2) ASSIGN C: causes drive map to be reinstalled unnecessarily
; 1) ASSIGN C: causes drive map to be reinstalled unnecessarily
;_______________________________________________________________________________
;
;===============================================================================
@@ -1405,12 +1406,11 @@ chkdev: ; HBIOS variant
; get device/unit info
ld b,$17 ; hbios func: diodevice
ld c,a ; unit to C
rst 08 ; call hbios, D := device, E := unit
ld a,d ; device to A
rst 08 ; call hbios, C := device attributes
;
; check slice support
cp $30 ; A has device/unit, in hard disk range?
jr c,chkdev1 ; if not hard disk, check slice val
bit 5,c ; high capacity device?
jr z,chkdev1 ; if not high cap, check slice val
xor a ; otherwise, signal OK
ret
;
@@ -1918,11 +1918,11 @@ dev06 .db "SD",0
dev07 .db "PRPSD",0
dev08 .db "PPPSD",0
dev09 .db "HDSK",0
dev10 .equ devunk
dev11 .equ devunk
dev12 .equ devunk
dev13 .equ devunk
dev14 .equ devunk
dev10 .db "PPA",0
dev11 .db "IMM",0
dev12 .db "SYQ",0
dev13 .db "CHUSB",0
dev14 .db "CHSD",0
dev15 .equ devunk
;
devcnt .equ 10 ; 10 devices defined
@@ -1943,10 +1943,10 @@ stack .equ $ ; stack top
; Messages
;
indent .db " ",0
msgban1 .db "ASSIGN v1.5 for RomWBW CP/M ",0
msgban1 .db "ASSIGN v1.7 for RomWBW CP/M ",0
msg22 .db "2.2",0
msg3 .db "3",0
msbban2 .db ", 28-Feb-2022",0
msbban2 .db ", 19-Sep-2023",0
msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0
msgban3 .db "Copyright 2021, Wayne Warthen, GNU GPL v3",0

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@@ -31,6 +31,8 @@
;
;[2022/03/27] v1.8 Support RHYOPHYRE
;
;[2023/07/07] v1.9 Support DUODYNE
;
; Constants
;
mask_data .EQU %10000000 ; RTC data line
@@ -49,6 +51,7 @@ PORT_DYNO .EQU $0C ; RTC port for DYNO
PORT_RCZ280 .EQU $C0 ; RTC port for RCZ280
PORT_MBC .EQU $70 ; RTC port for MBC
PORT_RPH .EQU $84 ; RTC port for RHYOPHYRE
PORT_DUO .EQU $94 ; RTC port for DUODYNE
BDOS .EQU 5 ; BDOS invocation vector
@@ -1079,61 +1082,66 @@ HINIT:
LD C,PORT_SBC
LD DE,PLT_SBC
CP $01 ; SBC
JR Z,RTC_INIT2
JP Z,RTC_INIT2
CP $02 ; ZETA
JR Z,RTC_INIT2
JP Z,RTC_INIT2
CP $03 ; ZETA 2
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_N8
LD DE,PLT_N8
CP $04 ; N8
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_MK4
LD DE,PLT_MK4
CP $05 ; Mark IV
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_RCZ80
LD DE,PLT_RCZ80
CP $07 ; RCBus w/ Z80
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_RCZ180
LD DE,PLT_RCZ180
CP $08 ; RCBus w/ Z180
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_EZZ80
LD DE,PLT_EZZ80
CP $09 ; Easy Z80
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_SCZ180
LD DE,PLT_SCZ180
CP $0A ; SCZ180
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_DYNO
LD DE,PLT_DYNO
CP 11 ; DYNO
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_RCZ280
LD DE,PLT_RCZ280
CP 12 ; RCZ280
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_MBC
LD DE,PLT_MBC
CP 13 ; MBC
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_RPH
LD DE,PLT_RPH
CP 14 ; RHYOPHYRE
JR Z,RTC_INIT2
JP Z,RTC_INIT2
;
LD C,PORT_DUO
LD DE,PLT_DUO
CP 17 ; DUODYNE
JP Z,RTC_INIT2
;
; Unknown platform
LD DE,PLTERR ; BIOS error message
@@ -1630,7 +1638,7 @@ TESTING_BIT_DELAY_OVER:
RTC_HELP_MSG:
.DB 0Ah, 0Dh ; line feed and carriage return
.TEXT "RTC: Version 1.8"
.TEXT "RTC: Version 1.9"
.DB 0Ah, 0Dh ; line feed and carriage return
.TEXT "Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot W)arm-start H)elp"
.DB 0Ah, 0Dh ; line feed and carriage return
@@ -1760,6 +1768,7 @@ PLT_DYNO .TEXT ", DYNO RTC Module Latch Port 0x0C\r\n$"
PLT_RCZ280 .TEXT ", RCBus Z280 RTC Module Latch Port 0xC0\r\n$"
PLT_MBC .TEXT ", MBC RTC Latch Port 0x70\r\n$"
PLT_RPH .TEXT ", RHYOPHYRE RTC Latch Port 0x84\r\n$"
PLT_DUO .TEXT ", DUODYNE RTC Latch Port 0x70\r\n$"
;
; Generic FOR-NEXT loop algorithm

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@@ -310,6 +310,32 @@ diskdef wbw_rom1024
os 2.2
end
# RomWBW 512KB RAM (256KB reserved, 256KB RAM Disk)
diskdef wbw_ram512
seclen 512
tracks 8
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 1024KB RAM (256KB reserved, 768KB RAM Disk)
diskdef wbw_ram1024
seclen 512
tracks 24
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 720K floppy media
diskdef wbw_fd720

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@@ -4,6 +4,7 @@ setlocal
pushd HDIAG && call Build || exit /b & popd
pushd CBIOS && call Build || exit /b & popd
pushd CPM22 && call Build || exit /b & popd
pushd QPM && call Build || exit /b & popd
pushd ZCPR && call Build || exit /b & popd
pushd ZCPR-DJ && call Build || exit /b & popd
pushd ZSDOS && call Build || exit /b & popd

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@@ -2291,8 +2291,8 @@ INIT2:
LD C,(HL) ; PUT UNIT NUM IN C
RST 08 ; CALL HBIOS
LD A,C ; GET ATTRIBUTES
AND %00111000 ; ISOLATE TYPE BITS
CP %00101000 ; TYPE = RAM?
AND %10001111 ; ISOLATE TYPE BITS
CP %00000101 ; NOT FLOPPY, TYPE = RAM?
JR NZ,INIT2X ; IF NOT THEN DONE
;
; CHECK IF SECOND UNIT IS ROM OR FLASH
@@ -2303,10 +2303,10 @@ INIT2:
LD C,(HL) ; PUT UNIT NUM IN C
RST 08 ; CALL HBIOS
LD A,C ; GET ATTRIBUTES
AND %00111000 ; ISOLATE TYPE BITS
CP %00100000 ; TYPE = ROM?
AND %10001111 ; ISOLATE TYPE BITS
CP %00000100 ; NOT FLOPPY, TYPE = ROM?
JR Z,INIT2A ; IF SO, ADJUST DEF DRIVE
CP %00111000 ; TYPE = FLASH?
CP %00000111 ; NOT FLOPPY, TYPE = FLASH?
JR NZ,INIT2X ; IF NOT THEN DONE
;
INIT2A:
@@ -2529,24 +2529,21 @@ MD_INIT:
; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE
;
#IFDEF PLTWBW
; TODO: HANDLE DISABLED RAM/ROM DISK BETTER.
; IF RAM OR ROM DISK ARE DISABLED, BELOW WILL STILL
; TRY TO ADJUST THE DPB BASED ON RAM BANK CALCULATIONS.
; IT SHOULD NOT MATTER BECAUSE THE DPB SHOULD NEVER BE
; USED. IT WOULD BE BETTER TO GET RAMD0/ROMD0 AND
; RAMDN/ROMDN FROM THE HCB AND USE THOSE TO CALC THE
; DPB ADJUSTMENT. IF DN-D0=0, BYPASS ADJUSTMENT.
LD A,(HCB + HCB_ROMBANKS) ; ROM BANK COUNT
SUB 4 ; REDUCE BANK COUNT BY RESERVED PAGES
LD IX,DPB_ROM ; ADDRESS OF DPB
CALL MD_INIT1 ; FIX IT UP
; NOTE: ROM AND/OR RAM DISK MAY NOT BE ACTIVE, BUT WE GO
; AHEAD AND UPDATE BOTH DPBS ANYWAY. IT CAUSES NO HARM SINCE
; INACTIVE RAM/ROM DISK WILL NEVER BE ACCESSED.
;
LD A,(HCB + HCB_RAMBANKS) ; RAM BANK COUNT
SUB 8 ; REDUCE BANK COUNT BY RESERVED PAGES
LD IX,DPB_RAM ; ADDRESS OF DPB
CALL MD_INIT1 ; FIX IT UP
; ROM DISK
LD A,(HCB + HCB_ROMD_BNKS) ; ROM DISK SIZE IN BANKS
LD IX,DPB_ROM ; ADDRESS OF DPB
CALL MD_INIT1 ; FIX IT UP
;
JR MD_INIT4 ; DONE
; RAM DISK
LD A,(HCB + HCB_RAMD_BNKS) ; RAM DISK SIZE IN BANKS
LD IX,DPB_RAM ; ADDRESS OF DPB
CALL MD_INIT1 ; FIX IT UP
;
JR MD_INIT4 ; DONE
;
MD_INIT1:
;
@@ -2904,52 +2901,51 @@ DRV_INIT:
LD HL,DRVLST ; INIT HL PTR TO DRIVE LIST
;
DRV_INIT2:
PUSH BC ; SAVE LOOP CNT & UNIT
CALL DRV_INIT3 ; CHECK DRIVE
POP BC ; RECOVER LOOP CNT & UNIT
INC C ; NEXT UNIT
DJNZ DRV_INIT2 ; LOOP
LD A,D ; TOTAL DEVICE COUNT TO D
LD A,D ; TOTAL DEVICE COUNT TO A
LD (DRVLSTC),A ; SAVE THE COUNT
JR DRV_INIT4 ; CONTINUE
;
DRV_INIT3:
; GET DEVICE ATTRIBUTES
PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER)
PUSH HL ; SAVE DRIVE LIST PTR
PUSH BC ; SAVE LOOP CONTROL
LD B,BF_DIODEVICE ; HBIOS FUNC: REPORT DEVICE INFO
RST 08 ; CALL HBIOS, UNIT TO C
LD A,D ; DEVICE TYPE TO A
LD A,C ; DEVICE ATTRIBUTES TO A
POP BC ; RESTORE LOOP CONTROL
POP HL ; RESTORE DRIVE LIST PTR
POP DE ; RESTORE DE
CP DIODEV_IDE ; HARD DISK DEVICE?
JR NC,DRV_INIT3A ; IF SO, HANDLE SPECIAL
LD (HL),C ; SAVE UNIT NUM IN LIST
INC HL ; BUMP PTR
INC D ; INC TOTAL DEVICE COUNT
RET
LD B,A ; ATTRIBUTES TO B
;
DRV_INIT3A:
; CHECK FOR ACTIVE AND RETURN IF NOT
; IF DEVICE IS NOT REMOVABLE, THEN CHECK TO ENSURE IT IS
; ACTUALLY ONLINE. IF NOT, SKIP UNIT ENTIRELY.
BIT 6,B ; REMOVABLE?
JR NZ,DRV_INIT3A ; IF SO, SKIP MEDIA CHECK
PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER)
PUSH HL ; SAVE DRIVE LIST PTR
PUSH BC ; SAVE LOOP CONTROL
LD B,BF_DIOMEDIA ; HBIOS FUNC: SENSE MEDIA
LD E,1 ; PERFORM MEDIA DISCOVERY
RST 08
RST 08 ; DO IT
POP BC ; RESTORE LOOP CONTROL
POP HL ; RESTORE DRIVE LIST PTR
POP DE ; RESTORE DE
RET NZ ; IF NO MEDIA, JUST RETURN
; IF ACTIVE...
RET NZ ; OFFLINE, SKIP ENTIRE UNIT
;
DRV_INIT3A:
LD (HL),C ; SAVE UNIT NUM IN LIST
INC HL ; BUMP PTR
INC D ; INC TOTAL DEVICE COUNT
BIT 5,B ; HIGH CAPACITY?
RET Z ; DONE IF NOT
INC E ; INCREMENT HARD DISK COUNT
RET ; AND RETURN
RET ; DONE
;
DRV_INIT4: ; SET SLICES PER VOLUME (HDSPV) BASED ON HARD DISK VOLUME COUNT
LD A,E ; HARD DISK VOLUME COUNT TO A
@@ -2978,7 +2974,8 @@ DRV_INIT6: ; LOOP THRU ALL UNITS AVAILABLE
LD C,(HL) ; GET UNIT NUM FROM LIST
PUSH BC ; PRESERVE LOOP CONTROL
LD B,BF_DIODEVICE ; HBIOS FUNC: REPORT DEVICE INFO
RST 08 ; CALL HBIOS, D := DEVICE TYPE
RST 08 ; CALL HBIOS, C := DEVICE ATTRIBUTES
LD A,C ; DEVICE ATTRIBUTES TO A
POP BC ; GET UNIT INDEX BACK IN C
PUSH BC ; RESAVE LOOP CONTROL
CALL DRV_INIT7 ; MAKE DRIVE MAP ENTRY(S)
@@ -2992,10 +2989,9 @@ DRV_INIT6: ; LOOP THRU ALL UNITS AVAILABLE
DRV_INIT7: ; PROCESS UNIT
LD E,0 ; INITIALIZE SLICE INDEX
LD B,1 ; DEFAULT LOOP COUNTER
LD A,D ; DEVICE TYPE TO ACCUM
LD D,C ; UNIT NUMBER TO D
CP DIODEV_IDE ; HARD DISK DEVICE?
JR C,DRV_INIT8 ; NOPE, LEAVE LOOP COUNT AT 1
BIT 5,A ; HIGH CAPACITY DEVICE?
JR Z,DRV_INIT8 ; NOPE, LEAVE LOOP COUNT AT 1
LD A,(HDSPV) ; GET SLICES PER VOLUME TO ACCUM
LD B,A ; MOVE TO B FOR LOOP COUNTER
;
@@ -3392,11 +3388,11 @@ DEV06 .DB "SD$"
DEV07 .DB "PRPSD$"
DEV08 .DB "PPPSD$"
DEV09 .DB "HDSK$"
DEV10 .EQU DEVUNK
DEV11 .EQU DEVUNK
DEV12 .EQU DEVUNK
DEV13 .EQU DEVUNK
DEV14 .EQU DEVUNK
DEV10 .DB "PPA$"
DEV11 .DB "IMM$"
DEV12 .DB "SYQ$"
DEV13 .DB "CHUSB$"
DEV14 .DB "CHSD$"
DEV15 .EQU DEVUNK
;
#ENDIF
@@ -3406,7 +3402,7 @@ DIRBUF .DW 0 ; DIR BUF POINTER
HEAPTOP .DW BUFPOOL ; CURRENT TOP OF HEAP
BOOTVOL .DW 0 ; BOOT VOLUME, MSB=BOOT UNIT, LSB=BOOT SLICE
HDSPV .DB 2 ; SLICES PER VOLUME FOR HARD DISKS (MUST BE >= 1)
DRVLST .FILL 32 ; ACTIVE DRIVE LIST USED DURINT DRV_INIT
DRVLST .FILL 32 ; ACTIVE DRIVE LIST USED DURING DRV_INIT
DRVLSTC .DB 0 ; ENTRY COUNT FOR ACTIVE DRIVE LIST
;
#IFDEF PLTWBW

View File

@@ -156,7 +156,9 @@ dinit:
ld hl,drvlst ; init hl ptr to drive list
;
dinit2:
push bc ; save loop cnt & unit
call dinit3 ; check drive
pop bc ; recover loop cnt & unit
inc c ; next unit
djnz dinit2 ; loop
ld a,d ; total device count to d
@@ -169,39 +171,35 @@ dinit3:
push bc ; save loop control
ld b,17h ; hbios func: report device info
rst 08 ; call hbios, unit to c
ld a,d ; device type to a
ld a,c ; device attributes to a
pop bc ; restore loop control
pop hl ; restore drive list ptr
pop de ; restore de
cp 30h ; hard disk device?
jr nc,dinit3a ; if so, handle special
ld (hl),c ; save unit num in list
inc hl ; bump ptr
inc d ; inc total device count
ret
ld b,a ; attributes to b
;
dinit3a:
; check for active and return if not
; if device is not removable, then check to ensure it is
; actually online. if not, skip unit entirely.
bit 6,b ; removable?
jr nz,dinit3a ; if so, skip media check
push de ; save de (hard disk volume counter)
push hl ; save drive list ptr
push bc ; save loop control
ld b,18h ; hbios func: sense media
ld e,1 ; perform media discovery
rst 08
rst 08 ; do it
pop bc ; restore loop control
pop hl ; restore drive list ptr
pop de ; restore de
ret nz ; if no media, just return
; if active...
ret nz ; offline, skip entire unit
;
dinit3a:
ld (hl),c ; save unit num in list
inc hl ; bump ptr
inc d ; inc total device count
bit 5,b ; high capacity?
ret z ; done if not
inc e ; increment hard disk count
ret ; and return
ret ; done
dinit4: ; set slices per volume (hdspv) based on hard disk volume count
ld a,e ; hard disk volume count to a
@@ -238,7 +236,8 @@ dinit6:
push bc ; preserve loop control
push hl ; preserve dph pointer
ld b,17h ; hbios func: report device info
rst 08 ; call hbios, d := device type
rst 08 ; call hbios, a := device attributes
ld a,c ; device attributes to a
pop hl ; restore dph pointer
pop bc ; get unit index back in c
push bc ; resave loop control
@@ -253,10 +252,9 @@ dinit6:
dinit7: ; process a unit (all slices)
ld e,0 ; initialize slice index
ld b,1 ; default loop counter
ld a,d ; device type to accum
ld d,c ; unit number to d
cp 030h ; hard disk device?
jr c,dinit8 ; nope, leave loop count at 1
bit 5,a ; high capacity device?
jr z,dinit8 ; nope, leave loop count at 1
ld a,(hdspv) ; get slices per volume to accum
ld b,a ; move to b for loop counter

View File

@@ -355,38 +355,30 @@ dpb$hdnew: ; 8MB Hard Disk Drive (new format)
; called for first time initialization.
dsk$init:
; TODO: Handle disabled RAM/ROM disk better.
; If RAM or ROM disk are disabled, below will still
; try to adjust the DPB based on RAM bank calculations.
; It should not matter because the DPB should never be
; used. It would be better to get RAMD0/ROMD0 and
; RAMDN/ROMDN from the HCB and use those to calc the
; DPB adjustment. If DN-D0=0, bypass adjustment.
ld b,0FAh ; HBIOS Peek Function
ld a,(@hbbio) ; HBIOS bank id
ld d,a ; ... goes in D
ld hl,10Ch ; Offset 10Ch is ROM bank cnt
rst 08 ; Call HBIOS, value in E
ld a,e ; move count to accum
sub 4 ; reduce by # reserved banks
ld ix,dpb$rom ; address of DPB
call dsk$init1 ; fix it up
ld b,0FAh ; HBIOS Peek Function
ld a,(@hbbio) ; HBIOS bank id
ld d,a ; ... goes in D
ld hl,10Bh ; Offset 10Bh is RAM bank cnt
rst 08 ; Call HBIOS, value in E
ld a,e ; move count to accum
sub 8 ; reduce by # reserved banks
ld ix,dpb$ram ; address of DPB
call dsk$init1 ; fix it up
; NOTE: ROM and/or RAM disk may not be active, but we go
; ahead and update both DPBs anyway. It causes no harm since
; inactive RAM/ROM disk will never be accessed.
ld hl,1DFh ; ROM disk bank cnt in HCB
ld ix,dpb$rom ; address of ROM Disk DPB
call dsk$init1 ; fix it up
ld hl,1DDh ; RAM dsik bank cnt in HCB
ld ix,dpb$ram ; address of RAM Disk DPB
call dsk$init1 ; fix it up
ret ; done
dsk$init1:
; Get bank count of RAM/ROM disk
ld b,0FAh ; HBIOS Peek Function
ld a,(@hbbio) ; HBIOS bank id
ld d,a ; ... goes in D
rst 08 ; Call HBIOS, value in E
;ld a,e ; move count to accum
; Setup HL with bank count
ld l,a ; lsb
;ld l,a ; lsb
ld l,e ; lsb
ld h,0 ; msb is always zero
; Update EXM field

View File

@@ -8,12 +8,12 @@ MEMTOP = FD
BNKSWT = Y
COMBAS = 80
LERROR = Y
NUMSEGS = 04
NUMSEGS = 02
MEMSEG00 = 01,17,00
MEMSEG01 = 0E,72,02
MEMSEG02 = 01,7F,03
MEMSEG03 = 01,7F,04
MEMSEG04 = 01,7F,05
MEMSEG03 = 00,C0,04
MEMSEG04 = 00,C0,05
MEMSEG05 = 00,C0,06
MEMSEG06 = 00,C0,07
MEMSEG07 = 00,C0,08
@@ -25,38 +25,38 @@ MEMSEG0C = 00,C0,0D
MEMSEG0D = 00,C0,0E
MEMSEG0E = 00,C0,0F
MEMSEG0F = 00,C0,10
HASHDRVA = Y
HASHDRVB = Y
HASHDRVC = Y
HASHDRVD = Y
HASHDRVE = Y
HASHDRVF = Y
HASHDRVG = Y
HASHDRVH = Y
HASHDRVI = Y
HASHDRVJ = Y
HASHDRVK = Y
HASHDRVL = Y
HASHDRVM = Y
HASHDRVN = Y
HASHDRVO = Y
HASHDRVP = Y
ALTBNKSA = Y
ALTBNKSB = Y
ALTBNKSC = Y
ALTBNKSD = Y
ALTBNKSE = Y
ALTBNKSF = Y
ALTBNKSG = Y
ALTBNKSH = Y
ALTBNKSI = Y
ALTBNKSJ = Y
ALTBNKSK = Y
ALTBNKSL = Y
ALTBNKSM = Y
ALTBNKSN = Y
ALTBNKSO = Y
ALTBNKSP = Y
HASHDRVA = N
HASHDRVB = N
HASHDRVC = N
HASHDRVD = N
HASHDRVE = N
HASHDRVF = N
HASHDRVG = N
HASHDRVH = N
HASHDRVI = N
HASHDRVJ = N
HASHDRVK = N
HASHDRVL = N
HASHDRVM = N
HASHDRVN = N
HASHDRVO = N
HASHDRVP = N
ALTBNKSA = N
ALTBNKSB = N
ALTBNKSC = N
ALTBNKSD = N
ALTBNKSE = N
ALTBNKSF = N
ALTBNKSG = N
ALTBNKSH = N
ALTBNKSI = N
ALTBNKSJ = N
ALTBNKSK = N
ALTBNKSL = N
ALTBNKSM = N
ALTBNKSN = N
ALTBNKSO = N
ALTBNKSP = N
NDIRRECA = 08
NDIRRECB = 00
NDIRRECC = 00

View File

@@ -8,7 +8,7 @@ MEMTOP = FD
BNKSWT = N
COMBAS = 00
LERROR = Y
NUMSEGS = 03
NUMSEGS = 01
MEMSEG00 = 00,80,00
MEMSEG01 = 00,C0,02
MEMSEG02 = 00,C0,03

View File

@@ -65,12 +65,11 @@ xbnkmov:
; ------------ -------------- -------
; COMMON BID_COM 8Fh
; 0: OS/BUFS BID_USR 8Eh
; BID_BIOS 8Dh
; 1: TPA BID_AUX 8Ch
; 2: BUFS BID_AUX-1 8Bh
; 3: BUFS BID_AUX-2 8Ah
; 4: BUFS BID_AUX-3 89h
; 5: BUFS BID_AUX-4 88h
; 1: TPA BID_AUX 8Dh
; 2: BUFS BID_AUX-1 8Ch
; 3: BUFS BID_AUX-2 8Bh
; 4: BUFS BID_AUX-3 8Ah
; 5: BUFS BID_AUX-4 89h
;
; N.B., Below BID_AUX is considered RAM disk bank. Need to
; make sure RAM disk is kept small enough to stay below
@@ -80,17 +79,13 @@ xbnkmov:
; to adjust for real size of RAM in system
;
?bnkxlt:
or a
jr z,bank0
neg ; 2 -> -2
add a,8Dh ; 8Dh - 2 = 8Bh
@hbbio equ $ - 1 ; BID_BIOS
ret
bank0:
ld a,8Eh ; 0 -> 8Eh
neg ; ex: 2 -> -2
add a,8Eh ; ex: 8Eh - 2 = 8Ch
@hbusr equ $ - 1 ; BID_USR
ret
@hbbio db 0 ; BID_BIOS
movtyp db 0 ; non-zero for interbank move
movbnks:

View File

@@ -4,6 +4,7 @@ setlocal
pushd HDIAG && call Clean.cmd & popd
pushd Apps && call Clean.cmd & popd
pushd CPM22 && call Clean.cmd & popd
pushd QPM && call Clean.cmd & popd
pushd ZCPR && call Clean.cmd & popd
pushd ZCPR-DJ && call Clean.cmd & popd
pushd ZSDOS && call Clean.cmd & popd

View File

@@ -51,6 +51,7 @@ found:
| INTTEST | No | Yes | Yes |
| FAT | No | Yes | Yes |
| TUNE | No | Yes | Yes |
| WDATE | No | Yes | Yes |
`\clearpage`{=latex}
@@ -889,6 +890,28 @@ written in C and requires SDCC to compile. As such it is not part of
the RomWBW build process. However, the full project and source code is
found in the [FAT GitHub Repository](https://github.com/wwarthen/FAT).
## Known Issues
CP/M (and workalike) OSes have significant restrictions on filename
characters. The FAT application will block any attempt to create a
file on the CP/M filesystem containing any of these prohibited
characters:
| `< > . , ; : = ? * [ ] _ % | ( ) / \`
The operation will be aborted with "`Error: Invalid Path Name`" if such
a filename character is encountered.
Since MS-DOS does allow some of these characters, you can have
issues when copying files from MS-DOS to CP/M if the MS-DOS filenames
use these characters. Unfortunately, FAT is not yet smart enough to
substitute illegal characters with legal ones. So, you will need to
clean the filenames before trying to copy them to CP/M.
The FAT application does try to detect the scenario where you are
copying a file to itself. However, this detection is not perfect and
can corrupt a file if it occurs. Be careful to avoid this.
`\clearpage`{=latex}
# TUNE
@@ -1106,3 +1129,85 @@ can be used to reduce your processor speed.
VGMPLAY is still under development. The source code is provided in the
RomWBW distribution.
`\clearpage`{=latex}
# WDATE
`wdate` is a utility for CP/M systems that have Wayne Warthen's
ROMWBW firmware. It reads or sets the real-time clock, using function
calls in the BIOS. It should work on any RTC device that is supported by
ROMWBW, including the internal interrupt-driven timer that is is available
on some systems.
`wdate` differs from the `rtc.com` utility that is provided with the
ROMWBW version of CP/M in that it only gets and sets the date/time.
`rtc.com` can also manipulate the nonvolatile RAM in certain clock
devices, and modify the charge controller. However, `wdate` is (I would
argue) easier to use, as it takes its input from the command line, which
can be edited, and it's less fussy about the format. It doesn't require
the date to be set if you only want to change the time, for example.
In addition, `wdate` has at least some error checking.
`wdate` displays the day-of-week and month as English text, not
numbers. It calculates the day-of-week from the year, month, and day.
RTC chips usually store a day-of-week value, but it's useless in this
application for two reasons: first, the BIOS does not expose it. Second,
there is no universally-accepted way to interpret it (which day does
the week start on? Is '0' a valid day of the week?)
## Syntax
| `WDATE`
| `WDATE ` *`<hr> <min>`*
| `WDATE ` *`<hr> <min> <sec>`*
| `WDATE ` *`<year> <month> <day> <hr> <min> <sec>`*
## Usage
A> wdate
Saturday 27 May 13:14:39 2023
With no arguments, displays the current date and time.
A> wdate hr min
With two arguments, sets the time in hours and minutes, without changing date
or seconds
A> wdate hr min sec
With three arguments, sets the time in hours, minutes, and seconds, without
changing date
A> wdate year month day hr min sec
With six arguments, sets date and time. All numbers are one or two digits. The
two-digit year starts at 2000.
A> wdate /?
Show a summary of the command-line usage.
## Notes
I've tested this utility with the DS1302 clock board designed by Ed
Brindly, and on the interrupt-driven timer built into my Z180 board.
However, it does not interact with hardware, only BIOS; I would expect
it to work with other hardware.
wdate checks for the non-existence of ROMWBW, and also for failing
operations on the RTC. It will display the terse "No RTC" message in
both cases.
The ROMWBW functions that manipulate the date and time operate on BCD
numbers, as RTC chips themselves usually do. wdate works in decimal, so
that it can check that the user input makes sense. A substantial part of
the program's code is taken up by number format conversion and range
checking.
## Etymology
The `WDATE` application was written and contributed by Kevin Boone.
The source code is available on GitHub at
[https://github.com/kevinboone/wdate-cpm/blob/main/README.md](https://github.com/kevinboone/wdate-cpm/blob/main/README.md).

View File

@@ -1,4 +1,4 @@
$define{doc_ver}{Version 3.2.1}$
$define{doc_ver}{Version 3.3}$
$define{doc_product}{RomWBW}$
$define{doc_root}{https://github.com/wwarthen/RomWBW/raw/dev/Doc}$
$ifndef{doc_title}$ $define{doc_title}{Document Title}$ $endif$

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@@ -172,6 +172,11 @@ please let me know if I missed you!
* The RomWBW Disk Catalog document was produced by Mykl Orders.
* Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games
compendium.
Contributions of all kinds to RomWBW are very welcome.
# Licensing

View File

@@ -757,28 +757,36 @@ of memory because it avoids a double copy.
Reports device information about the specified Disk Unit (C). The
Status (A) is a standard HBIOS result code.
Bit 7 of the Device Attribute (C) value returned indicates whether the
device is a floppy disk. If it is a floppy disk, the Device Attribute
(C) value is encoded as follows:
The Device Attribute (C) value returned indicates various
feature indicators related to the device being referenced
by the specified Disk Unit (C). The high 3 bits apply to
all devices. The definition of the low 5 bits depends on
whether the device is a Floppy (indicated by bit 5).
The common bits are:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 7 | = 1 (Floppy Disk) |
| 6-5 | Form Factor: 0=8", 1=5.25", 2=3.5", 3=Other |
| 4 | Sides: 0=SS, 1=DS |
| 3-2 | Density: 0=SD, 1=DD, 2=HD, 3=ED |
| 1-0 | Reserved |
If the Disk Unit (C) specified is a not floppy disk, then the Device
Attribute (C) encoding is as follows:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 7 | = 0 (not Floppy Disk) |
| 7 | Floppy |
| 6 | Removable |
| 5-3 | Type: 0=Hard, 1=CF, 2=SD, 3=USB, |
| | 4=ROM, 5=RAM, 6=RAMF, 7=FLASH |
| 2-0 | Reserved |
| 5 | High Capacity (>8 MB) |
The Floppy specific bits are:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 4-3 | Form Factor: 0=8", 1=5.25", 2=3.5", 3=Other |
| 2 | Sides: 0=SS, 1=DS |
| 1-0 | Density: 0=SD, 1=DD, 2=HD, 3=ED |
The non-Floppy specific bits are:
| **Bits** | **Definition** |
|---------:|--------------------------------------------------|
| 4 | LBA Capable |
| 3-0 | Media Type: 0=Hard Disk, 1=CF, 2=SD, 3=USB, |
| | 4=ROM, 5=RAM, 6=RAMF, 7=FLASH, 8=CD-ROM, |
| | 9=Cartridge |
Device Type (D) indicates the specific hardware driver that handles the
specified Disk Unit (C). Values are listed at the start of this
@@ -1001,6 +1009,198 @@ used.
`\clearpage`{=latex}
## Display Keypad (DSKY)
The Display Keypad functions provide read/write access to a segment
style display and associated hex keypad.
HBIOS only supports a single DSKY device since there is no reason to have
more than one at a time. The DSKY unit is assigned a Device Type ID
which indicates the specific hardware device driver that handles the
unit. The table below enumerates these values.
| **Device Type** | **ID** | **Description** | **Driver** |
|-----------------|-------:|------------------------------------------|------------|
| DSKYDEV_ICM | 0x00 | Original ICM7218 based DSKY | icm.asm |
| DSKYDEV_PKD | 0x10 | Next Gen Intel P8279 based DSKY | pkd.asm |
When segment display function encodes the display data in a byte per
character format. Currently, all segment displays are exactly
8 charadcters and this is assumed in API calls. The encoding of each
byte is as shown below:
```
+---01---+
| |
20 02
| |
+---40---+
| |
10 04
| |
+---08---+ 80
```
The keypad keys are identified by the following key ids. Not all
keypads will contain all keys.
| **Key Id** | **Key Definition** | **Key Id** | **Key Definition** |
|------------|--------------------|------------|--------------------|
| $00 | Hex Numeric 0 | $10 | Forward |
| $01 | Hex Numeric 1 | $11 | Backward |
| $02 | Hex Numeric 2 | $12 | Clear |
| $03 | Hex Numeric 3 | $13 | Enter |
| $04 | Hex Numeric 4 | $14 | Deposit |
| $05 | Hex Numeric 5 | $15 | Examine |
| $06 | Hex Numeric 6 | $16 | Go |
| $07 | Hex Numeric 7 | $17 | Boot |
| $08 | Hex Numeric 8 | $18 | F4 |
| $09 | Hex Numeric 9 | $19 | F3 |
| $0A | Hex Numeric A | $1A | F2 |
| $0B | Hex Numeric B | $1B | F1 |
| $0C | Hex Numeric C | | |
| $0D | Hex Numeric D | | |
| $0E | Hex Numeric E | | |
| $0F | Hex Numeric F | | |
### Function 0x30 -- DSKY Reset (DSKYRESET)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x30 | A: Status |
This function performs a device dependent reset operation on the DSKY.
The display will be cleared, keyboard queue will be flushed, and
chip will be reinitialized. The returned Status (A) is a standard
HBIOS result code.
### Function 0x31 -- DSKY (DSKYSTATUS)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x31 | A: Status / Characters Pending |
Return the count of Characters Pending (A) in the input buffer of the
DSKY. If the unit has no input buffer or the
buffer utilization is not available, the function may return simply 0 or
1 where 0 means there is no character available and 1 means there is at
least one character available.
The value returned in register A is used as both a Status (A) code and
the return value. Negative values (bit 7 set) indicate a standard HBIOS
result (error) code. Otherwise, the return value represents the number
of characters in the buffer.
### Function 0x32 -- DSKY Get Key (DSKYGETKEY)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x32 | A: Status |
| | E: Character Value |
Read and return a Character (E) from the DSKY.
If no character(s) are available in the unit's input buffer, this
function will wait indefinitely. The returned Status (A) is a standard
HBIOS result code.
The Character Value (E) returned is not ASCII. It is a keypad key
id. The possible id values are listed at the start of this section.
### Function 0x33 -- DSKY Show HEX (RTCSHOWHEX)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x33 | A: Status |
| DE:HL=Binary Value | |
Display the 32-bit binary value (DE:HL) in hex on the DSKY segment
display. All decimal points of the display will be off.
The Status (A) is a standard HBIOS result code.
### Function 0x34 -- DSKY Show Segments (DSKYSHOWSEG)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x34 | A: Status |
| HL: Buffer Address | |
Display the segment-encoded values on the segment display. The encoding
is defined at the start of this section. The entire displa is updated
and it is assumed that an 8 character buffer will be pointed to by HL.
The buffer must reside in high memory.
The Status (A) is a standard HBIOS result code.
### Function 0x35 -- DSKY Keypad LEDs (DSKYKEYLEDS)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x35 | A: Status |
| HL: Buffer Address | |
Light the LEDs for the keypad keys according to the
bitmap contained in the buffer pointed to by HL. The buffer
must be located in high memory and is assumed to be 8 bytes.
At this time, the bitmap is specific to the PKD hardware.
This function is ignored by the ICM hardware.
The Status (A) is a standard HBIOS result code.
### Function 0x36 -- DSKY Status LED (DSKYSTATLED)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x36 | A: Status |
| D: LED Number | |
| E: LED State | |
Set or clear the status LED specified in D. The state of
the LED is contained in E. If E=0, the LED will be turned
off. If E=1, the LED will be turned on.
This function is specific to the PKD hardware. It will be ignored
by the ICM hardware.
The Status (A) is a standard HBIOS result code.
### Function 0x37 -- DSKY Beep (DSKYBEEP)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x37 | A: Status |
Beep the onboard speaker of the DSKY.
This function is specific to the PKD hardware. It will be ignored
by the ICM hardware.
The Status (A) is a standard HBIOS result code.
### Function 0x38 -- DSKY Device (DSKYDEVICE)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0x38 | A: Status |
| | C: Device Attributes |
| | D: Device Type |
| | E: Device Number |
| | H: Device Unit Mode |
| | L: Device I/O Base Address |
Returns device information for the DSKY unit. The Status (A) is a
standard HBIOS result code.
Device Attribute (C) values are not yet defined. Device Type (D)
indicates the specific hardware driver that handles the specified
character unit. Values are listed at the start of this section. Device
Number (E) indicates the physical device number assigned per driver
which is always 0 for DSKY.
Device Mode (H) is used to indicate the variant of the chip or circuit
that is used by the specified unit. The Device I/O Base Address (L)
indicates the starting port address of the hardware interface that is
servicing the specified unit. Both of these values are considered
driver specific. Refer to the associated hardware driver for the values
used.
`\clearpage`{=latex}
## Video Display Adapter (VDA)
The VDA functions are provided as a common interface to Video Display
@@ -1752,6 +1952,9 @@ The hardware Platform (L) is identified as follows:
| PLT_RCZ280 |12 | RCBUS W/ Z280 |
| PLT_MBC |13 | NHYODYNE MULTI-BOARD COMPUTER |
| PLT_RPH |14 | RHYOPHYRE GRAPHICS SBC |
| PLT_Z80RETRO |15 | Z80 RETRO COMPUTER |
| PLT_S100 |16 | S100 COMPUTERS Z180 |
| PLT_DUO |17 | DUODYNE Z80 SYSTEM |
### Function 0xF2 -- System Set Bank (SYSSETBNK)
@@ -2123,6 +2326,17 @@ Wait States (D) is the actual number of wait states, not the number
of wait states added. The returned Status (A) is a standard HBIOS
result code.
#### SYSGET Subfunction 0xF4 -- Get Front Panel Swithes (PANEL)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF8 | A: Status |
| C: 0xF4 | L: Switches |
This function will return the current value of the switches (L) from the
front panel of the system. If no front panel is available in the
system, the returned Status (A) will indicate a No Hardware error.
### Function 0xF9 -- System Set (SYSSET)
| **Entry Parameters** | **Returned Values** |
@@ -2206,6 +2420,18 @@ limited set of divisors. If there is no satisfactory divisor to
retain the existing baud rate under the new CPU speed, then the baud
rate of the ASCI port(s) will be affected.
#### SYSSET Subfunction 0xF4 -- Set Front Panel LEDs (PANEL)
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF9 | A: Status |
| C: 0xF4 | |
| L: LEDs | |
This function will set the front panel LEDs based on the bits in L. If
no front panel is available in the system, the returned Status (A) will
indicate a No Hardware error.
### Function 0xFA -- System Peek (SYSPEEK)
| **Entry Parameters** | **Returned Values** |

View File

@@ -58,8 +58,9 @@ produced by these developer communities:
General features include:
* Z80 Family CPUs including Z80, Z180, and Z280
* Banked memory services for several banking designs
* Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
* Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, Zip, Iomega
* Serial drivers including UART (16550-like), ASCI, ACIA, SIO
* Video drivers including TMS9918, SY6545, MOS8563, HD6445
* Keyboard (PS/2) drivers via VT8242 or PPI interfaces
@@ -195,12 +196,17 @@ below, **carefully** pick the appropriate ROM image for your hardware.
| [Small Computer SC131 Z180 Pocket Computer]^5^ | - | SCZ180_sc131.rom | 115200 |
| [Small Computer SC140 Z180 CPU Module]^5^ | Z50 | SCZ180_sc140.rom | 115200 |
| [Small Computer SC503 Z180 CPU Module]^5^ | Z50 | SCZ180_sc503.rom | 115200 |
| [Small Computer SC700 Z180 CPU Module]^5^ | RCBus | SCZ180_sc700.rom | 115200 |
| [Dyno Z180 SBC]^6^ | Dyno | DYNO_std.rom | 38400 |
| [Nhyodyne Z80 MBC]^1^ | MBC | MBC_std.rom | 38400 |
| [Rhyophyre Z180 SBC]^1^ | - | RPH_std.rom | 38400 |
| [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrc.rom | 115200 |
| [Z280 ZZ80MB SBC]^7^ | RCBus | RCZ280_zz80mb.rom | 115200 |
| [Z80-Retro SBC]^8^ | - | Z80RETRO_std.rom | 38400 |
| [S100 Computers Z180]^9^ | S100 | S100_std.rom | 38400 |
| [Duodyne Z80 System]^1^ | Duo | DUO_std.rom | 38400 |
| [Heath H8 Z80 System] | H8 | HEATH_std.rom | 115200 |
| ^1^Designed by Andrew Lynch
| ^2^Designed by Sergey Kiselev
@@ -209,6 +215,8 @@ below, **carefully** pick the appropriate ROM image for your hardware.
| ^5^Designed by Stephen Cousins
| ^6^Designed by Steve Garcia
| ^7^Designed by Bill Shen
| ^8^Designed by Peter Wilson
| ^9^Designed by John Monahan
RCBus refers to Spencer Owen's RC2014 bus specification and derivatives
including RC26, RC40, RC80, and BP80.
@@ -782,6 +790,55 @@ The use of diagnostic levels above 4 are really intended only for
software developers. I do not recommend changing this under
normal circumstances.
## Front Panel
RomWBW supports the concept of a simple front panel. The following
image is a conceptual view of such a front panel. If your system has a
front panel, it should look similar to the [RomWBW Front Panel](#panel).
![RomWBW Front Panel](Graphics/Panel){#panel width=50% }
The LEDs in the top row of the panel are used for multiple purposes.
They are initially used to display the progress of the
system boot. This may help in diagnosing a hardware or configuration
issue in a system that does not progress far enough to display text
output on the console. The meaning of the LEDs is:
| | |
|------------|------------------------------|
| `O-------` | System Boot has started |
| `OO------` | Common RAM bank activated |
| `OOO-----` | HBIOS transitioned to RAM |
| `OOOO----` | Basic initialization done |
| `OOOOO---` | CPU detection complete |
| `OOOOOO--` | System timer configured |
| `OOOOOOO-` | Pre-console device init done |
| `OOOOOOOO` | Console activation |
Once the system has booted, the LEDs are used to indicate disk device
activity. Each LED numbered 7-0 represents disk units 7-0. As each
disk device performs I/O, the LED will light.
The second row of the front panel is composed of switches that allow
you to control a few aspects of the system startup.
The first two switches affect the device used as the console initially.
Setting the CRT/Serial switch will cause the system to boot directly
to an attached CRT device (if available). Setting the Pri/Sec switch
will cause the system to boot to the secondary Serial or CRT device
(depending on the setting of the first switch).
The final six switches allow you to cause the system to automatically
boot into a desired function. The Auto/Menu switch must be set to
enable this, otherwise the normal ROM Loader prompt will be used.
If the Disk/ROM switch is not set, then you can use the last 3
switches to select a ROM app to auto-start. If the Disk/ROM switch is
set, then the system will attempt a disk boot based on the following
switches. The Floppy/Hard switch can be used to boot to a Floppy or
Hard Disk. In either case, the first Floppy or Hard Disk will be used
for the boot. If a Hard Disk boot is selected, then the last three
switches can be used to select any of the first 8 slices.
# Disk Management
The systems supported by RomWBW all have the ability to use persistent
@@ -1480,7 +1537,46 @@ indicated:
You will notice that there are actually 2 combo disk images in the
distribution. One for an hd512 disk layout (hd512_combo.img) and one
for an hd1k disk layout (hd1k_combo.img). Simply use the image file that
corresponds to your desired hard disk layout.
corresponds to your desired hard disk layout. Review the information
in [Hard Disk Layouts] if you need more information of the disk layout
options.
The partition table in the combo disk images includes an entry for a
FAT filesystem starting at 512K with a size of 384K. So when using
the combo disk image, by default, your disk will have the first 512K
dedicated to CP/M slices followed by 384K for a FAT filesystem. Note
that the pre-allocated FAT partition must still be formatted using
`FDISK32` in order to actually use it
(see [FAT Filesystem Preparation]).
The combo disk image layout was designed to fit well on a 1GB hard
disk. The 512K of CP/M slices and 384K of FAT filesystem all fit inside
a 1GB hard disk. This size choice was a bit arbitrary, but based on the
idea that a 1GB CF or SD Card is easy and cheap to acquire. It is fine
if your hard disk is smaller than 1GB. It just means that it will not
be possible to use the pre-allocated FAT filesystem partition (you will
get I/O errors if you attempt to do so).
The 512KB area of the combo disk image set aside for slices can contain
approximately 64 slices (8MB per slice). If your actual hard disk is
less than 512KB, then this will correspondingly reduce the number of
possible slices. If your hard disk is smaller than 64MB, then you
will find that some of the higher drive letters do not work because
they exist "off the end" of the hard disk.
For RomWBW systems with a single hard disk (typical), you will notice
that an OS will pre-allocate 8 drive letters to the hard disk. If the
combo disk image is being used, only the first 6 drive letters (A: - H:)
will have any content because the combo disk image only provides 6
slices. The subsequent drives (I: - J:) will have no content and will
not be pre-initialized. If you want to use any slices beyond the first
6, you must initialize them using `CLRDIR` first.
A great way to maintain your own data on a hard disk is to put this
data in slices beyond the first 6. By doing so, you can always
"reimage" your drive with the combo image without overlaying the data
stored in the slices beyond the first 6. Just be very careful to use
the same combo image (hd512 or hd1k) as you used originally.
#### Custom Hard Disk Image
@@ -2089,10 +2185,36 @@ regarding the RomWBW adaptation and customizations.
#### Boot Disk
There is no RomWBW-specific boot disk creation procedure. QP/M
comes with a QINSTALL which is used to install QPM over an existing
CP/M 2 installation or to update an existing QPM disk. `QINSTALL.COM`
is included with the RomWBW distribution.
To create or update a bootable QP/M Z-System disk, a special process
is required. QP/M is not provided in source format. You are expected
to install QP/M over an existing CP/M installation using the
`QINSTALL.COM` application.
To update an existing QP/M boot disk with the latest RomWBW CBIOS, you
must use 2 steps: apply the generic CP/M system track, then reinstall
the QP/M components. To do this, you can perform the following steps:
1. Boot to the existing QP/M disk. At this point, drive A should be
the QP/M disk that you wish to update. You may receive a warning
about CBIOS/HBIOS version mismatch.
1. Use RomWBW `SYSCOPY` to place the stock RomWBW CP/M OS image
onto the system tracks of the QP/M boot disk:
`SYSCOPY A:=x:CPM.SYS`
where x is the drive letter of your ROM Disk.
1. Run `QINSTALL` to overlay the QP/M OS components on your
QP/M boot disk.
**WARNING**: `QINSTALL` has no mechanism for retaining previous
non-default settings. Any previous non-default settings you
previously made with `QINSTALL` will need to be reapplied. The
pre-built RomWBW QP/M disk image includes a couple of specific
non-default settings to optimize use with RomWBW. Please review the
notes in the ReadMe.txt file in Source/Images/d_qpm.
#### Notes
@@ -2100,6 +2222,9 @@ is included with the RomWBW distribution.
on the QPM binary distribution and has been minimally customized
for RomWBW.
- When booted, the QPM startup banner will indicate CP/M 2.2. This
is because QPM uses the CP/M 2.2 CBIOS code.
- QINSTALL is used to customize QPM. It is included on the
disk image. You should review the notes in the ReadMe.txt
file in Source/Images/d_qpm before making changes.
@@ -2162,18 +2287,23 @@ file which is bootable.
output will be garbled if no such terminal or emulator
is used for console output.
* There is no straightforward mechanism to move files in
* There is no built-in mechanism to move files in
and out of p-System. However, the .vol files in Source/pSys
can be read and modified by CiderPress. CiderPress is able
to add and remove individual files.
Andrew Davidson has created a Python script that can extract p-System
volumes from an existing disk image file. The script is also capable
of inserting a modified volume back into the disk image file.
This tool is available at
<https://github.com/robosnacks/psysimg>.
## FreeRTOS
Phillip Stevens has ported FreeRTOS to run under RomWBW. FreeRTOS is
not provided in the RomWBW distribution. FreeRTOS is available under
the
[MIT licence](https://www.freertos.org/a00114.html) and further general
information is available at
the [MIT licence](https://www.freertos.org/a00114.html)
and further general information is available at
[FreeRTOS](https://www.freertos.org/RTOS.html).
You can also contact Phillip for detailed information on the Z180
@@ -2249,26 +2379,35 @@ This application understands both FAT filesystems as well as CP/M filesystems.
* Long filenames are not supported. Files with long filenames will
show up with their names truncated into the older 8.3 convention.
* A FAT filesystem can be located on floppy or hard disk media. For
hard disk media, the FAT filesystem must be located within a valid
FAT partition.
hard disk media, a valid FAT Filesystem partition must exist.
* Note that CP/M (and compatible) OSes do not support all of the
filename characters that a modern computer does. The following
characters are **not permitted** in a CP/M filename:
`< > . , ; : = ? * [ ] _ % | ( ) / \`
The FAT application does not auto-rename files when it encounters
invalid filenames. It will just issue an error and quit.
Additionally, the error message is not very clear about the problem.
## FAT Filesystem Preparation
In general, you can create media formatted with a FAT filesystem on
your RomWBW computer or on your modern computer. We will only be
discussing the RomWBW-based approach here.
In the case of a floppy disk, you can use the `FAT` application to
format the floppy disk. For example, if your floppy disk is on RomWBW
disk unit 2, you could use `FAT FORMAT 2:`. This will overwrite the
floppy with a FAT filesystem and all previous contents will be lost.
Once formatted this way, the floppy disk can be used in a floppy drive
attached to a modern computer or it can be used on RomWBW using the
In the case of a floppy disk, you can use the `FAT` application to
format the floppy disk. The floppy disk must already be physically
formatted using RomWBW FDU or equivalent. If your floppy disk is on
RomWBW disk unit 2, you could use `FAT FORMAT 2:`. This will overwrite
the floppy with a FAT filesystem and all previous contents will be lost.
Once formatted this way, the floppy disk can be used in a floppy drive
attached to a modern computer or it can be used on RomWBW using the
other `FAT` tool commands.
In the case of hard disk media, it is necessary to have a FAT
partition. If you prepared your RomWBW hard disk media using the
disk image process, then this partition will already be present and
disk image process, then this partition will already be defined and
you do not need to recreate it. This default FAT partition is located
at approximately 512MB from the start of your disk and it is 384MB in
size. So, your hard disk media must be 1GB or greater to use this
@@ -2316,8 +2455,13 @@ If your RomWBW system has multiple disk drives/slots, you can also just
create a disk with your modern computer that is a dedicated FAT
filesystem disk. You can use your modern computer to format the disk
(floppy, CF Card, SD Card, etc.), then insert the disk in your RomWBW
computer and access if using `FAT` based on its RomWBW unit number.
computer and access it using `FAT` based on its RomWBW unit number.
**WARNING**: Microsoft Windows will sometimes suggest reformatting
partitions that it does not recognize. If you are prompted to format
a partition of your SD/CF Card when inserting the card into a Windows
computer, you probably want to select Cancel.
## FAT Application Usage
Complete instructions for the `FAT` application are found in $doc_apps$.
@@ -3101,6 +3245,46 @@ directed to complete a partial flash using the /P command line switch.
`E>FLASH WRITE ROM.UPD /P`
# Related Projects
Outside of the hardware platforms adapted to RomWBW, there are a variety
of software projects that either target RomWBW specifically or provide
a RomWBW-specific variation.
## Z88DK
Z88DK is a software powerful development kit for Z80 computers
supporting both C and assembly language. This kit now provides
specific library support for RomWBW HBIOS. The Z88DK project is
hosted at <https://github.com/z88dk/z88dk>.
## Paleo Editor
Steve Garcia has created a Windows-hosted IDE that is tailored to
development of RomWBW. The project can be found at
<https://github.com/alloidian/PaleoEditor>.
## p-System Volume Management Script
Andrew Davidson has created a Python script to automate the insertion
and deletion of volumes within the p-System disk image. These scripts
are hosted at <https://github.com/robosnacks/psysimg>.
## Z80 fig-FORTH
Dimitri Theulings' implementation of fig-FORTH for the Z80 has a
RomWBW-specific variant. This fig-FORTH is built into the RomWBW
ROM. However, the project itself is hosted at
<https://github.com/dimitrit/figforth>.
## RomWBW Date/Time Utility
Kevin Boone has created a generic application that will display or
set the date/time of an RTC on RomWBW. The application runs on all of
the CP/M OS variants. This tool (`WDATE`) is included on the RomWBW
OS disk images. The project is hosted at
<https://github.com/kevinboone/wdate-cpm>.
# Acknowledgments
I want to acknowledge that a great deal of the code and inspiration
@@ -3166,6 +3350,11 @@ please let me know if I missed you!
* The RomWBW Disk Catalog document was produced by Mykl Orders.
* Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games
compendium.
Contributions of all kinds to RomWBW are very welcome.
# Licensing
@@ -3673,6 +3862,31 @@ the RomWBW HBIOS configuration.
`\clearpage`{=latex}
### Small Computer SC700 Z180 CPU Module
| | |
|-------------------|------------------|
| ROM Image Files | SCZ180_sc700.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Onboard SD Card Interface
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### Dyno Z180 SBC
| | |
@@ -3757,6 +3971,7 @@ the RomWBW HBIOS configuration.
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
@@ -3780,6 +3995,7 @@ the RomWBW HBIOS configuration.
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
@@ -3803,6 +4019,80 @@ the RomWBW HBIOS configuration.
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
`\clearpage`{=latex}
### Z80-Retro SBC
| | |
|-------------------|------------------|
| ROM Image File | Z80RETRO_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | Mode 2 |
- CPU speed is assumed to be 14.7456 MHz
- Hardware auto-detected:
- SIO Serial Interface Module
- Onboard CTC
`\clearpage`{=latex}
### S100 Computers Z180
| | |
|-------------------|---------------|
| ROM Image File | S100_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | Mode 2 |
- CPU speed assumed to be 18.432 MHz
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- Interrupt-driven RTC
- Z180 ASCI Serial Ports
- Onboard SD Card Interface
`\clearpage`{=latex}
### Duodyne Z80 System
| | |
|-------------------|---------------|
| ROM Image File | DUO_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 8.000 MHz assumed
- System timer is generated by CTC if available
- Hardware auto-detected:
- DS1302 RTC
- Zilog DMA Module
- UART Serial Adapter
`\clearpage`{=latex}
### Heath H8 Z80 System
| | |
|-------------------|---------------|
| ROM Image File | HEATH_std.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 1 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 7.3728 MHz assumed
- Hardware auto-detected:
- DS1302 RTC
- ACIA Serial Interface Module
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
@@ -3824,13 +4114,15 @@ may be discovered by RomWBW in your system.
| DMA | System | Zilog DMA Controller |
| DS1307 | RTC | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM |
| DS1501RTC | RTC | Maxim DS1501/DS1511 Watchdog Real-Time Clock |
| DSKY | System | Keypad & Display |
| DSRTC | RTC | Maxim DS1302 Real-Time Clock w/ NVRAM |
| DUART | Char | SCC2681 or compatible Dual UART |
| FD | Disk | 8272 of compatible Floppy Disk Controller |
| EMM | Disk | Disk drive on Parallel Port emm interface (Zip Drive) |
| FD | Disk | 8272 or compatible Floppy Disk Controller |
| GDC | Video | uPD7220 Video Display Controller |
| HDSK | Disk | SIMH Simulator Hard Disk |
| IDE | Disk | IDE/ATA Hard Disk Interface |
| IDE | Disk | IDE/ATA/ATAPI Hard Disk Interface |
| ICM | DsKy | ICM7218-based Display/Keypad on PPI |
| IMM | Disk | IMM Zip Drive on PPI |
| INTRTC | RTC | Interrupt-based Real Time Clock |
| KBD | Kbd | 8242 PS/2 Keyboard Controller |
| KIO | System | Zilog Serial/ Parallel Counter/Timer |
@@ -3839,7 +4131,9 @@ may be discovered by RomWBW in your system.
| MSXKYB | Kbd | MSX Compliant Matrix Keyboard |
| I2C | System | I2C Interface |
| PIO | Char | Zilog Parallel Interface Controller |
| PPIDE | Disk | 8255 IDE/ATA Hard Disk Interface |
| PKD | DsKy | P8279-based Display/Keypad on PPI |
| PPIDE | Disk | 8255 IDE/ATA/ATAPI Hard Disk Interface |
| PPA | Disk | PPA Zip Drive on PPI |
| PPK | Kbd | Matrix Keyboard |
| PPPSD | Disk | ParPortProp SD Card Interface |
| PPPCON | Serial | ParPortProp Serial Console Interface |
@@ -3852,10 +4146,12 @@ may be discovered by RomWBW in your system.
| SIO | Char | Zilog Serial Port Interface |
| SN76489 | Sound | SN76489 Programmable Sound Generator |
| SPK | Sound | Bit-bang Speaker |
| SYQ | Disk | Iomega SparQ Drive on PPI |
| TMS | Video | TMS9918/38/58 Video Display Controller |
| UART | Char | 16C550 Family Serial Interface |
| USB-FIFO | Char | FT232H-based ECB USB FIFO |
| VDU | Video | MC6845 Family Video Display Controller |
| VGA | Video | HD6445CP4-based Video Display Controller |
| VRC | Video | VGARC Video Display Controller |
| YM | Audio | YM2612 Programmable Sound Generator |
| Z2U | Char | Zilog Z280 CPU Built-in Serial Ports |

View File

@@ -11,8 +11,8 @@ echo Preparing compressed font files...
lzsa -f2 -r font8x8u.bin font8x8c.bin || exit /b
lzsa -f2 -r font8x11u.bin font8x11c.bin || exit /b
lzsa -f2 -r font8x16u.bin font8x16c.bin || exit /b
lzsa -f2 -r fontcgau.bin fontcgac.bin || exit /b
lzsa -f2 -r fontvgarcu.bin fontvgarcc.bin || exit /b
fonttool font8x8u.bin > font8x8u.asm || exit /b
fonttool font8x11u.bin > font8x11u.asm || exit /b
@@ -20,6 +20,7 @@ fonttool font8x16u.bin > font8x16u.asm || exit /b
fonttool font8x8c.bin > font8x8c.asm || exit /b
fonttool font8x11c.bin > font8x11c.asm || exit /b
fonttool font8x16c.bin > font8x16c.asm || exit /b
fonttool fontcgau.bin > fontcgau.asm || exit /b
fonttool fontcgac.bin > fontcgac.asm || exit /b
fonttool fontvgarcu.bin > fontvgarcu.asm || exit /b
fonttool fontvgarcc.bin > fontvgarcc.asm || exit /b

View File

@@ -1,8 +1,8 @@
OBJECTS = \
font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm \
font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm
font8x8u.asm font8x11u.asm font8x16u.asm fontcgau.asm fontvgarcu.asm \
font8x8c.asm font8x11c.asm font8x16c.asm fontcgac.asm fontvgarcc.asm
OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin
OTHERS = font8x8c.bin font8x11c.bin font8x16c.bin fontcgac.bin fontvgarcc.bin
TOOLS = ../../Tools
@@ -26,5 +26,8 @@ font8x16c.bin: font8x16u.bin
fontcgac.bin: fontcgau.bin
$(BINDIR)/lzsa -f2 -r $< $@
fontvgarcc.bin: fontvgarcu.bin
$(BINDIR)/lzsa -f2 -r $< $@
%.asm: %.bin
$(BINDIR)/bin2asm $< > $@

BIN
Source/Fonts/fontvgarcu.bin Normal file

Binary file not shown.

View File

@@ -117,7 +117,11 @@ GET ($F8):
L=Clock Mult (0:Half, 1:Full, 2: Double)
D=Memory Wait States
E=I/O Wait States
PANEL ($F4):
BC=Function/Subfunction A=Result
L=Switch Values
SET ($F9):
BC=Function/Subfunction A=Result
@@ -142,6 +146,11 @@ SET ($F9):
E=I/O Wait States
PANEL ($F4):
BC=Function/Subfunction A=Result
L=LED Values
PEEK ($FA):
B=Function A=Result
D=Bank E=Byte Value
@@ -475,3 +484,93 @@ TERM_ATTACH: (C=VIDEO UNIT, DE=<VDA>_DISPATCH)
- QUERY ATTACHED VDA FOR SCREEN SIZE (VIA <EMU>_VDADISP)
- INITIALIZE ALL WORKING VARIABLES AND EMULATOR STATE
- RETURN (A=STATUS)
==============
DSKY Functions
==============
RESET ($30):
B=Function A=Result
STAT ($31):
B=Function A=Result / Bytes Pending
A=Number of characters waiting or error code if negative
GETKEY ($32):
B=Function A=Result
E=Key Code
A=DSKY key value or error code if negative
SHOWHEX ($33):
B=Function A=Result
DE:HL=Value (32-bit)
Display value of DE:HL in hex on display. It is not
possible to show decimal points.
SHOWSEG ($34):
B=Function A=Result
HL=Buffer (raw segment encoded)
Display raw segment values. Each byte represents one
character. Each segment of the character is represented
by a bit. The buffer must be located in high memory.
The segments are encoded as shown below:
+--01--+
20 02
+--40--+
10 04
+--08--+ 80
KEYLEDS ($35):
B=Function A=Result
HL=Buffer (LED bitmap)
Light the LEDs for the keypad keys according to the
bitmap contained in the buffer pointed to by HL. The buffer
must be located in high memory.
At this time, the bitmap is specific to the DSKYNG hardware.
This function is ignored by the original DSKY.
STATLED ($36):
B=Function A=Result
D=LED Number
E=LED State (0/1)
Set or clear the status LED specified in D. The state of
the LED is contained in E. If E=0, the LED will be turned
off. If E=1, the LED will be turned on.
BEEP ($37):
B=Function A=Result
Beep the onboard speaker of the DSKY. Only the DSKYNG hardware
has a speaker. This function will be ignored by the original
DSKY.
DEVICE ($38):
B=Function A=Result
D=Device Type
E=Device Number
C=Device Attributes
H=Device Mode
L=Base I/O Adr
Returns device information for the DSKY unit. The Status (A) is a
standard HBIOS result code. Device Attribute (C) values are not yet
defined. Device Type (D) indicates the specific hardware driver that
handles the specified character unit. Values are listed at the start
of this section. Device Number (E) indicates the physical device
number assigned per driver which is always 0 for DSKY.
Device Mode (H) is used to indicate the variant of the chip or circuit
that is used by the specified unit. The Device I/O Base Address (L)
indicates the starting port address of the hardware interface that is
servicing the specified unit. Both of these values are considered
driver specific. Refer to the associated hardware driver for the
values used.

View File

@@ -0,0 +1,74 @@
ROM Bank Layout
Bank ID Module Start Size
------ ------ ------ ------
0x00 hbios 0x0000 0x8000
<end> 0x8000
0x01 loader 0x0000 0x1000
dbgmon 0x1000 0x2000
cpm22 0x2000 0x3000
zsys 0x5000 0x3000
<end> 0x8000
0x02 forth 0x0000 0x1700
basic 0x1700 0x2000
tbasic 0x3700 0x0900
game 0x4000 0x0900
egg 0x4900 0x0200
netboot 0x4B00 0x1000
updater 0x5B00 0x0D00
usrrom 0x6800 0x1800
<end> 0x8000
0x03 imgpad2 0x0000 0x8000
<end> 0x8000
0x04 - N ROM Disk Data
RAM Bank Layout
Bank ID Usage
------- ------
0x80 RomWBW HBIOS
0x81-0x8B RAM Disk Data
0x8C CP/M 3 Buffers
0x8D CP/M 3 OS
0x8E User TPA
0x8F Common
ROMless Bank Layout
Bank ID Usage
------- ------
0x80 RomWBW HBIOS
0x81 Loader, DbgMon, CP/M 2.2, ZSDOS
0x82 ROM Apps
0x83 More ROM Apps
0x84-0x8B RAM Disk Data
0x8C CP/M 3 Buffers
0x8D CP/M 3 OS
0x8E User TPA
0x8F Common
ROMless Tiny Bank Layout (128K)
NOTE: no ROM Apps, no CP/M 3 support, no RAM disk
Bank ID Usage
------- ------
0x80 RomWBW HBIOS
0x81 Loader, DbgMon, CP/M 2.2, ZSDOS
0x82 User TPA
0x83 Common
Disk Image Sizes
Image Size ROM System ROMless System
---------- ---------- --------------
1024K 896K 768K
512 384K 256K
256 128K 0K
128 (tiny) n/a 0K

View File

@@ -93,7 +93,14 @@ call :asm imgpad2 || exit /b
copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin + ..\cpm22\cpm_wbw.bin osimg.bin || exit /b
copy /b ..\Forth\camel80.bin + nascom.bin + ..\tastybasic\src\tastybasic.bin + game.bin + eastaegg.bin + netboot.mod + updater.bin + usrrom.bin osimg1.bin || exit /b
copy /b imgpad2.bin osimg2.bin || exit /b
if %Platform%==S100 (
zxcc slr180 -s100mon/fh
zxcc mload25 -s100mon || exit /b
copy /b s100mon.com osimg2.bin || exit /b
) else (
copy /b imgpad2.bin osimg2.bin || exit /b
)
copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit /b
@@ -103,10 +110,8 @@ copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit
:: should yield a result of zero.
::
if %ROMSize% gtr 0 (
for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
"%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
)
for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
"%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
)
::
@@ -130,8 +135,8 @@ if %ROMSize% gtr 0 (
copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
) else (
copy /b hbios_rom.bin + osimg_small.bin %ROMName%.rom || exit /b
copy /b hbios_rom.bin + osimg_small.bin %ROMName%.upd || exit /b
copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin + ..\RomDsk\ram%ROMSize%_wbw.dat %ROMName%.rom || exit /b
copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
)
@@ -215,13 +220,19 @@ call Build RCZ280 ext || exit /b
call Build RCZ280 nat || exit /b
call Build RCZ280 zz80mb || exit /b
call Build RCZ280 zzrc || exit /b
call Build RCZ280 zzrc_ram || exit /b
call Build SCZ180 sc126 || exit /b
call Build SCZ180 sc130 || exit /b
call Build SCZ180 sc131 || exit /b
call Build SCZ180 sc140 || exit /b
call Build SCZ180 sc503 || exit /b
call Build SCZ180 sc700 || exit /b
call Build DYNO std || exit /b
call Build UNA std || exit /b
call Build RPH std || exit /b
call Build Z80RETRO std || exit /b
call Build S100 std || exit /b
call Build DUO std || exit /b
call Build HEATH std || exit /b
goto :eof

View File

@@ -27,8 +27,8 @@ $ErrorAction = 'Stop'
# UNA BIOS is simply imbedded, it is not built here.
#
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "UNA"
$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "DUO", "UNA", "HEATH"
$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100"
$PlatformListZ280 = "RCZ280"
#

View File

@@ -19,6 +19,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc_ram"; bash Build.sh
# ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
# ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh
@@ -32,14 +33,19 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="DUO"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc126"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc130"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc131"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc700"; bash Build.sh
ROM_PLATFORM="S100"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="HEATH"; ROM_CONFIG="std"; bash Build.sh
exit
fi

View File

@@ -11,6 +11,7 @@ if exist *.exp del *.exp
if exist *.tmp del *.tmp
if exist *.mrk del *.mrk
if exist *.sys del *.sys
if exist *.hex del *.hex
if exist build.inc del build.inc
if exist font*.asm del font*.asm
if exist build_env.cmd del build_env.cmd

View File

@@ -0,0 +1,48 @@
;
;==================================================================================================
; DUODYNE STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_duo.asm"
;
CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
;;;DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
;
BATCOND .SET TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
;
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
PCFENABLE .SET TRUE ; ENABLE PCF8584 I2C CONTROLLER
;
MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
ESPENABLE .SET TRUE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)

View File

@@ -0,0 +1,69 @@
;
;==================================================================================================
; HEATH H8 Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
DSKYENABLE .SET TRUE ; ENABLES DSKY FUNCTIONALITY
H8PENABLE .SET TRUE ; ENABLES HEATH H8 FRONT PANEL
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -42,12 +42,17 @@ RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
DSKYENABLE .SET FALSE ; ENABLES DSKY
DSKYMODE .SET DSKYMODE_NG ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYENABLE .SET TRUE ; ENABLES DSKY FUNCTIONALITY
ICMENABLE .SET FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
PKDENABLE .SET TRUE ; ENABLES DSKY NG PKD DRIVER (8259)
;
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
ESPENABLE .SET TRUE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)

View File

@@ -47,7 +47,7 @@ VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -46,6 +49,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
@@ -54,7 +58,7 @@ AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -46,15 +49,15 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -30,6 +30,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -45,6 +48,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -52,7 +56,7 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -30,6 +30,9 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
@@ -45,6 +48,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -52,7 +56,7 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -28,14 +28,16 @@
;
#include "cfg_rcz280.asm"
;
CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMLOC .SET 23 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET 8192 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
@@ -51,14 +53,15 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -32,14 +32,14 @@ CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMSIZE .SET 256 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 256 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .SET 256 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
;
RAMLOC .SET 18 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
@@ -59,14 +59,15 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -0,0 +1,77 @@
;
;==================================================================================================
; RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz280.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
Z280_IOWAIT .SET 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
MDROM .SET FALSE ; MD: ENABLE ROM DISK
MDRAM .SET TRUE ; MD: ENABLE RAM DISK
;
Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
Z2UOSC .SET (CPUOSC / 8) ; Z2U: OSC FREQUENCY IN MHZ
Z2U0HFC .SET TRUE ; Z2U0: ENABLE HARDWARE FLOW CONTROL
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -33,13 +33,15 @@ CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER
@@ -60,6 +62,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -67,11 +70,12 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -0,0 +1,79 @@
;
;==================================================================================================
; RCBUS Z80 COLECOVISION-COMPATIBLE CONFIGURATION FOR J.B. LANGSTON'S GAME BOARDS
;==================================================================================================
;
; THIS CONFIGURATION ENABLES DRIVERS FOR THE TMS9918 AND SN76489 BOARDS BY J.B. LANGSTON
; AND THE YM2149 BOARD BY ED BRINDLEY. THE TMS9918 IS CONFIGURED TO USE THE COLECOVISION
; PORTS AND HAS INTERRUPTS DISABLED BECAUSE COLECOVISION USES NMI, WHICH WOULD BREAK CP/M
; WHEN ENABLED. IT IS CONFIGURED FOR A 3.686MHZ CPU CLOCK IN ORDER TO BE COMPATIBLE WITH
; COLECOVISION GAMES. THE FIRST SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE CPU
; RUNNING AT THIS SPEED. THE SECOND SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE
; SECOND CLOCK SET TO 7.373MHZ. LOWER BAUD RATES CAN BE ACHIEVED ON THE SECOND PORT BY
; MOVING THE SECONDARY CLOCK DIVIDER JUMPER (E.G., 38400 @ 2.458MHZ). THE BAUD RATE DOES
; NOT NEED TO BE CHANGED IN THIS CONFIGURATION FILE IN ORDER TO DO THIS, BUT THE DEVICE
; LIST WILL INCORRECTLY SHOW THE PORT RUNNING AT 115200 REGARDLESS OF THE CLOCK DIVIDER.
; UNCOMMENT THE LINE THAT SETS BOOTCON TO 1 TO BOOT ON THE SECOND SIO PORT BY DEFAULT.
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "Z" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 3686400 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;BOOTCON .SET 1 ; BOOT CONSOLE DEVICE
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .SET SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .SET CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .SET SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .SET -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .SET 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .SET SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_COLECO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 1 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET TRUE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -30,6 +30,9 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
@@ -55,6 +58,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -62,11 +66,12 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
SKZENABLE .SET TRUE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .SET DIV_12 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .SET WDOG_SKZ ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
@@ -50,6 +53,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -57,11 +61,12 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -29,6 +29,9 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
@@ -37,10 +40,13 @@ ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -48,11 +54,13 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -33,11 +33,13 @@ CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;
@@ -65,6 +67,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -72,12 +75,13 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -30,6 +30,9 @@
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 1536 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
@@ -42,18 +45,20 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -31,7 +31,10 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
RAMSIZE .SET 2048 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
@@ -46,6 +49,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -53,11 +57,12 @@ AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -0,0 +1,46 @@
;
;==================================================================================================
; S100 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_s100.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 1 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 2 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
SCONENABLE .SET TRUE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY

View File

@@ -35,9 +35,12 @@ USELZSA2 .SET TRUE ; ENABLE FONT COMPRESSION
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSKYENABLE .SET TRUE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
ICMENABLE .SET TRUE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
PKDENABLE .SET TRUE ; ENABLES DSKY NG PKD DRIVER (8259)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
;

View File

@@ -45,7 +45,7 @@ VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -35,8 +35,9 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPLED_IO .SET $0D ; FP: PORT ADDRESS FOR FP LEDS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -50,6 +51,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -57,7 +59,7 @@ AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -35,8 +35,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -50,6 +52,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
@@ -57,7 +60,7 @@ AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -34,8 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

View File

@@ -34,9 +34,12 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .SET $A0 ; FP: PORT ADDRESS FOR FP LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .SET $A0 ; FP: PORT ADDRESS FOR FP SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $A0 ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -51,7 +54,7 @@ AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -34,9 +34,12 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .SET $A0 ; FP: PORT ADDRESS FOR FP LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .SET $A0 ; FP: PORT ADDRESS FOR FP SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $A0 ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
@@ -51,7 +54,7 @@ AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

View File

@@ -0,0 +1,71 @@
;
;==================================================================================================
; SC700 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "Small Computer SC700", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
LEDPORT .SET $0E ; STATUS LED PORT ADDRESS
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

View File

@@ -0,0 +1,35 @@
;
;==================================================================================================
; ZETA2 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_z80retro.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -35,7 +35,7 @@ UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -35,7 +35,7 @@ UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

View File

@@ -6,7 +6,7 @@ MOREDIFF = game.bin hbios_rom.bin nascom.bin usrrom.bin \
SUBDIRS =
DEST = ../../Binary
TOOLS =../../Tools
OTHERS = *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
OTHERS = *.img *.rom *.com *.upd *.bin *.hex cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
# DIFFMAKE = 1
@@ -24,7 +24,8 @@ endif
include $(TOOLS)/Makefile.inc
FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm \
fontcgac.asm fontcgau.asm fontvgarcc.asm fontvgarcu.asm
ifeq ($(CPUFAM),2)
TASM=$(BINDIR)/uz80as -t hd64180
@@ -42,6 +43,10 @@ else
BIOS=wbw
endif
ifeq ($(ROM_PLATFORM),S100)
ROMDEPS += s100mon.bin
endif
ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG}
# $(info DEPS=$(DEPS))
@@ -57,12 +62,14 @@ $(OBJECTS) : $(ROMDEPS)
cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >osimg_small.bin
if [ $(ROM_PLATFORM) != UNA ] ; then \
cat camel80.bin nascom.bin tastybasic.bin game.bin eastaegg.bin netboot.mod updater.bin usrrom.bin >osimg1.bin ; \
cat imgpad2.bin >osimg2.bin ; \
if [ $(ROMSIZE) -gt 0 ] ; then \
for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
done \
fi \
if [ $(ROM_PLATFORM) = S100 ] ; then \
cat s100mon.bin >osimg2.bin ; \
else \
cat imgpad2.bin >osimg2.bin ; \
fi ; \
for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
done \
fi
if [ $(ROM_PLATFORM) = UNA ] ; then \
cp osimg.bin $(DEST)/UNA_WBW_SYS.bin ; \
@@ -74,8 +81,8 @@ $(OBJECTS) : $(ROMDEPS)
cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
else \
cat hbios_rom.bin osimg_small.bin > $(ROMNAME).rom ; \
cat hbios_rom.bin osimg_small.bin > $(ROMNAME).upd ; \
cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).rom ; \
cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
fi \
fi
@@ -88,6 +95,10 @@ font%.asm:
camel80.bin:
cp ../Forth/$@ .
s100mon.bin:
$(ZXCC) $(CPM)/SLR180 -s100mon/FH
$(ZXCC) $(CPM)/MLOAD25 -s100mon.bin=s100mon
tastybasic.bin:
cp ../TastyBasic/src/$@ .

View File

@@ -1,27 +0,0 @@
RomWBW ROM Layout Notes
Bank Module Start Size
------ ------ ------ ------
0 hbios 0x0000 0x8000
<end> 0x8000
1 loader 0x0000 0x1000
dbgmon 0x1000 0x2000
cpm22 0x2000 0x3000
zsys 0x5000 0x3000
<end> 0x8000
2 forth 0x0000 0x1700
basic 0x1700 0x2000
tbasic 0x3700 0x0900
game 0x4000 0x0900
egg 0x4900 0x0200
netboot 0x4B00 0x1000
updater 0x5B00 0x0D00
usrrom 0x6800 0x1800
<end> 0x8000
3 imgpad2 0x0000 0x8000
<end> 0x8000
4-N ROM Disk Data

View File

@@ -634,9 +634,9 @@ ANSI_BEL:
ANSI_BS:
LD A,(ANSI_COL) ; GET CURRENT COLUMN
DEC A ; BACK IT UP BY ONE
RET C ; IF CARRY, MARGIN EXCEEDED, ABORT
RET M ; IF CARRY, MARGIN EXCEEDED, ABORT
LD (ANSI_COL),A ; SAVE NEW COLUMN
JP ANSI_XY ; UDPATE CUSROR AND RETURN
JP ANSI_XY ; UDPATE CURSOR AND RETURN
;
ANSI_CR:
XOR A ; ZERO ACCUM

View File

@@ -53,7 +53,7 @@
; ASEXT:
; 7 6 5 4 3 2 1 0
; R D C X B F D S
; 0 1 1 0 0 1 1 0 DEFAULT VALUES
; 0 1 1 0 0 0 0 0 DEFAULT VALUES
; | | | | | | | |
; | | | | | | | +-- SEND BREAK
; | | | | | | +---- BREAK DETECT (RO)
@@ -64,6 +64,10 @@
; | +-------------- DCD0 DISABLE
; +---------------- RDRF INT INHIBIT
;
ASCI_DEF_CNTLA .EQU $64
ASCI_DEF_CNTLB .EQU $20
ASCI_DEF_ASEXT .EQU $60
;
ASCI_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE
;
ASCI_NONE .EQU 0 ; NOT PRESENT
@@ -77,7 +81,7 @@ ASCI_RTS .EQU %00010000 ; ~RTS BIT OF CNTLA REG
;
#IF (ASCIINTS)
;
#IF (INTMODE == 2)
#IF (INTMODE > 0)
;
ASCI0_IVT .EQU IVT(INT_SER0)
ASCI1_IVT .EQU IVT(INT_SER1)
@@ -121,25 +125,19 @@ ASCI_PREINIT2:
;
#IF (ASCIINTS)
;
#IF (INTMODE >= 1)
; Z180 ASCI INTERRUPTS OPERATE LIKE IM2 EVEN WHEN IM1 IS ACTIVE.
;
#IF (INTMODE > 0)
; SETUP INT VECTORS AS APPROPRIATE
LD A,(ASCI_DEV) ; GET DEVICE COUNT
OR A ; SET FLAGS
JR Z,ASCI_PREINIT3 ; IF ZERO, NO ASCI DEVICES, ABORT
;
#IF (INTMODE == 1)
; ADD IM1 INT CALL LIST ENTRY
LD HL,ASCI_INT ; GET INT VECTOR
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
;
#IF (INTMODE == 2)
; SETUP IM2 VECTORS
LD HL,ASCI_INT0
LD (ASCI0_IVT),HL ; IVT INDEX
LD HL,ASCI_INT1
LD (ASCI1_IVT),HL ; IVT INDEX
#ENDIF
;
#ENDIF
;
@@ -200,24 +198,6 @@ ASCI_INIT1:
;
#IF (INTMODE > 0)
;
; IM1 ENTRY POINT
;
ASCI_INT:
; CHECK/HANDLE FIRST PORT
LD A,(ASCI0_CFG + 1) ; GET ASCI TYPE FOR FIRST ASCI
OR A ; SET FLAGS
CALL NZ,ASCI_INT0 ; CALL IF EXISTS
RET NZ ; DONE IF INT HANDLED
;
; CHECK/HANDLE SECOND PORT
LD A,(ASCI1_CFG + 1) ; GET ASCI TYPE FOR SECOND ASCI
OR A ; SET FLAGS
CALL NZ,ASCI_INT1 ; CALL IF EXISTS
;
RET ; DONE
;
; IM2 ENTRY POINTS
;
ASCI_INT0:
; INTERRUPT HANDLER FOR FIRST ASCI (ASCI0)
LD IY,ASCI0_CFG ; POINT TO ASCI0 CFG
@@ -513,17 +493,29 @@ ASCI_INITDEV3:
SET 4,C ; SET CNTLB BIT 4 FOR ODD PARITY
;
ASCI_INITDEV4:
; SETUP ASEXT
LD A,D ; CONFIG HIGH BYTE
AND %00100000 ; BIT 5 IS RTS
CPL ; INVERT FOR ASEXT
LD L,A ; MOVE TO L
LD A,ASCI_DEF_ASEXT ; GET ASEXT DEFAULT
AND L ; COMBINE
LD L,A ; AND LEAVE IN L
;
; SAVE CONFIG PERMANENTLY NOW
LD (IY+4),E ; SAVE LOW WORD
LD (IY+5),D ; SAVE HI WORD
JR ASCI_INITGO
;
ASCI_INITSAFE:
LD B,$64 ; CNTLA FAILSAFE VALUE
LD C,$20 ; CNTLB FAILSAFE VALUE
LD B,ASCI_DEF_CNTLA ; CNTLA FAILSAFE VALUE
LD C,ASCI_DEF_CNTLB ; CNTLB FAILSAFE VALUE
LD L,ASCI_DEF_ASEXT ; ASEXT FAILSAFE VALUE
;
ASCI_INITGO:
; IMPLEMENT CONFIGURATION
; B = CNTLA, C=CNTLB, L=ASEXT
PUSH HL ; SAVE ASEXT
LD H,B ; H := CNTLA VAL
LD L,C ; L := CNTLB VAL
LD B,0 ; MSB OF PORT MUST BE ZERO!
@@ -532,6 +524,7 @@ ASCI_INITGO:
INC C ; BUMP TO
INC C ; ... CNTLB REG, B IS STILL 0
OUT (C),L ; WRITE CNTLB VALUE
POP HL ; RECOVER ASEXT
INC C ; BUMP TO
INC C ; ... STAT REG, B IS STILL 0
#IF ((ASCIINTS) & (INTMODE > 0))
@@ -543,8 +536,11 @@ ASCI_INITGO:
LD A,$0E ; BUMP TO
ADD A,C ; ... ASEXT REG
LD C,A ; PUT IN C FOR I/O, B IS STILL 0
LD A,$66 ; STATIC VALUE FOR ASEXT
OUT (C),A ; WRITE ASEXT REG
BIT 0,C ; IS C ADDRESSING AN ODD NUMBERED PORT?
JR NZ,ASCI_INITGOZ ; IF SO, THIS IS SEC SERIAL, NO CTS!
OUT (C),L ; WRITE ASEXT REG
;
ASCI_INITGOZ:
;
#IF ((ASCIINTS) & (INTMODE > 0))
;

316
Source/HBIOS/cfg_duo.asm Normal file
View File

@@ -0,0 +1,316 @@
;
;==================================================================================================
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR DUODYNE
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
; UNDER THIS DIRECTORY.
;
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "Duodyne", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_DUO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_UNSUP ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $50 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $51 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $52 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
MPGSEL_3 .EQU $53 ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
MPGENA .EQU $54 ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
;
RTCIO .EQU $94 ; RTC LATCH REGISTER ADR
;
KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU (4915200/8) ; CTC CLOCK FREQUENCY
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $56 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU FALSE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS
;
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
VDUSIZ .EQU V80X25 ; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
CVDUMODE .EQU CVDUMODE_MBC ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
CVDUMON .EQU CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_MBC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU FALSE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU FALSE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0BASE .EQU $60 ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE1BASE .EQU $20 ; PPIDE 1: PPI REGISTERS BASE ADR
PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2BASE .EQU $14 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
ESPCONENABLE .EQU TRUE ; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
HDSKTRACE .EQU 1 ; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_SPP ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIOZBASE .EQU $88 ; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
PIOSBASE .EQU $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
UFBASE .EQU $0C ; UF: REGISTERS BASE ADR
;
SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN7CLK .EQU 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD
SNMODE .EQU SNMODE_NONE ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
;
AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD
AYMODE .EQU AYMODE_MBC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
;
SPKENABLE .EQU TRUE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $40 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_DUO ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR DYNO
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR DYNO
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,10 +34,8 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,15 +58,21 @@ CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -76,7 +80,14 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -123,7 +134,7 @@ UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -146,7 +157,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +165,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -172,6 +183,8 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +196,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DYNO ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,13 +238,15 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -239,6 +254,8 @@ PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -248,6 +265,12 @@ PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -267,7 +290,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

321
Source/HBIOS/cfg_heath.asm Normal file
View File

@@ -0,0 +1,321 @@
;
;==================================================================================================
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z80
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
; UNDER THIS DIRECTORY.
;
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_HEATH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .EQU 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
;
RTCIO .EQU $C0 ; RTC LATCH REGISTER ADR
;
KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU CPUOSC ; CTC CLOCK FREQUENCY
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6E ; WATCHDOG REGISTER ADR
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS
;
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT
ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
ACIA0BASE .EQU $80 ; ACIA 0: REGISTERS BASE ADR
ACIA0CLK .EQU CPUOSC ; ACIA 0: OSC FREQ IN HZ
ACIA0DIV .EQU 1 ; ACIA 0: SERIAL CLOCK DIVIDER
ACIA0CFG .EQU DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM)
ACIA1BASE .EQU $40 ; ACIA 1: REGISTERS BASE ADR
ACIA1CLK .EQU CPUOSC ; ACIA 1: OSC FREQ IN HZ
ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER
ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0BASE .EQU $20 ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE1BASE .EQU $00 ; PPIDE 1: PPI REGISTERS BASE ADR
PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN7CLK .EQU 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD
SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
;
AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION MASTER
; ROMWBW 3.X CONFIGURATION MASTER
;==================================================================================================
;
; THIS FILE IS *NOT* A REAL CONFIGURATION FILE. IT IS A MASTER TEMPLATE FILE
@@ -12,7 +12,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -31,10 +31,8 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
@@ -87,6 +85,9 @@ CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
@@ -95,9 +96,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -105,10 +109,14 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -156,7 +164,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -194,7 +202,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -202,7 +210,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -226,6 +234,8 @@ TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -237,9 +247,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -280,13 +290,25 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -298,6 +320,9 @@ PPPSDENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
PPPSDTRACE .EQU 1 ; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPPCONENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
ESPCONENABLE .EQU TRUE ; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
HDSKTRACE .EQU 1 ; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
@@ -307,10 +332,33 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -334,7 +382,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR MBC
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR MBC
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,7 +34,6 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -54,15 +53,21 @@ CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU (4915200/8) ; CTC CLOCK FREQUENCY
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED
@@ -70,10 +75,14 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -114,7 +123,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -132,7 +141,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -154,6 +163,8 @@ TMSMODE .EQU TMSMODE_MBC ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -166,9 +177,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_MBC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -209,12 +220,14 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -222,6 +235,9 @@ PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
ESPCONENABLE .EQU TRUE ; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
HDSKTRACE .EQU 1 ; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
@@ -230,11 +246,34 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_SPP ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_SPP ; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_SPP ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -258,8 +297,7 @@ SPKENABLE .EQU TRUE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_MBC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_MBC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR MARK IV
; ROMWBW 3.X CONFIGURATION FOR MARK IV
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,10 +34,8 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .EQU $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
Z180_CLKDIV .EQU 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -60,15 +58,21 @@ CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -76,10 +80,14 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -120,7 +128,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -143,7 +151,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -165,6 +173,8 @@ TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -176,9 +186,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -219,12 +229,14 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU TRUE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -236,6 +248,8 @@ PPPSDENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
PPPSDTRACE .EQU 1 ; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPPCONENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -244,10 +258,18 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_NONE ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -271,7 +293,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8
; ROMWBW 3.X CONFIGURATION FOR N8
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,10 +34,8 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMLOC .EQU 0 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .EQU $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
Z180_CLKDIV .EQU 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -62,15 +60,21 @@ CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
@@ -78,10 +82,14 @@ LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY
DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG]
DSKYPPIBASE .EQU N8_PPI0 ; BASE I/O ADDRESS OF DSKY PPI
DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU N8_PPI0 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU N8_PPI0 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -122,7 +130,7 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -145,7 +153,7 @@ SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -167,6 +175,8 @@ TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSX
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -178,9 +188,9 @@ FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
@@ -221,12 +231,14 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -234,6 +246,8 @@ PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -243,6 +257,12 @@ PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -266,7 +286,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,10 +34,8 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,15 +58,27 @@ CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -76,7 +86,14 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -123,7 +140,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -146,7 +163,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
@@ -154,7 +171,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
@@ -172,6 +189,8 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -183,9 +202,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -225,13 +244,25 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -239,6 +270,8 @@ PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -247,6 +280,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -267,7 +326,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ280 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z280 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,10 +34,8 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,15 +58,21 @@ CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -76,7 +80,14 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -123,7 +134,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -156,7 +167,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -164,7 +175,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -182,6 +193,8 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -193,9 +206,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -235,13 +248,25 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -249,6 +274,8 @@ PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -257,6 +284,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -277,7 +330,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z280 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_Z280 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z80
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z80
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -34,7 +34,6 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -57,6 +56,9 @@ CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU CPUOSC ; CTC CLOCK FREQUENCY
;
PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
@@ -65,9 +67,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6E ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
@@ -75,7 +80,14 @@ LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
DSKYENABLE .EQU FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .EQU FALSE ; ENABLES HEATH H8 FRONT PANEL
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -84,8 +96,8 @@ VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
@@ -122,7 +134,7 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -150,7 +162,7 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
@@ -158,7 +170,7 @@ SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
@@ -176,6 +188,8 @@ TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .EQU FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
@@ -187,9 +201,9 @@ FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .EQU FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .EQU FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
@@ -229,13 +243,25 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -243,6 +269,8 @@ PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .EQU FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -251,6 +279,32 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $0C ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
PPACNT .EQU 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .EQU 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .EQU PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .EQU LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .EQU LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .EQU FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
IMMCNT .EQU 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .EQU 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .EQU IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .EQU LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .EQU LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .EQU FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
SYQCNT .EQU 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .EQU 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .EQU IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -271,7 +325,7 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

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