Start v3.6.0 Beta Testing Cycle

tms: updated vram detection to disable screen during vram probing

.gitignore

@@ -101,6 +101,7 @@ Tools/unix/zx/zx
 !Source/Z1RCC/*.bin
 !Source/ZZRCC/*.bin
 !Source/SZ80/*.bin
+!Source/MSX/d_fat/**
 !Tools/cpm/**
 !Tools/unix/zx/*
 !Tools/zx/*

Binary/Clean.cmd

@@ -5,6 +5,7 @@ if exist *.bin del *.bin
 if exist *.dat del *.dat
 if exist *.com del *.com
 if exist *.img del *.img
+if exist *.dsk del *.dsk
 if exist *.rom del *.rom
 if exist *.hex del *.hex
 if exist *.upd del *.upd

Binary/Makefile

@@ -5,4 +5,4 @@ SUBDIRS = Apps CPM22 CPM3 QPM ZSDOS ZPM3 CPNET
 include $(TOOLS)/Makefile.inc
 
 clean::
-	@rm -f *.bin *.com *.img *.rom *.upd *.hex *.pdf *.log *.eeprom *.dat
+	@rm -f *.bin *.com *.img *.dsk *.rom *.upd *.hex *.pdf *.log *.eeprom *.dat

Doc/ChangeLog.txt

@@ -37,6 +37,10 @@ Version 3.6
 - DDW: Added support for the 'N8PC' platform. Includes support for the M6242 RTC chip
 - JMD: Added VGMINFO application
 - WBW: Created SCSI Driver derived from code from Jay Cotton
+- WBW: Add official RC2014 platform (derived from RCZ80)
+- D?N: Added improved TMS Driver hardware/configuration detection and reporting
+- WBW: Removed driver module INIT lists, replaced with init phase system
+- JMD: Support Coleco AY-3-8910 ports in TUNE and HBIOS
 
 Version 3.5.1
 -------------

ReadMe.md

@@ -7,7 +7,7 @@
 **RomWBW Introduction** \
 Version 3.6 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-12 Dec 2025
+30 Jan 2026
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW Introduction
 Wayne Warthen (wwarthen@gmail.com)
-12 Dec 2025
+30 Jan 2026
 
 
 

Source/Apps/Tune/cli.inc

@@ -51,6 +51,13 @@ CLI_PORTS1:
 	LD	A,PORTS_RC
 	JR	CLI_PORTS_Z
 CLI_PORTS2:
+ 	LD	HL, CLIARGS		; TEST FOR -COLECO ON COMMAND LINE
+	LD	DE, OPT_COLECO
+	CALL	STRINDEX
+	JR	NZ, CLI_PORTS3
+	LD	A,PORTS_COLECO
+	JR	CLI_PORTS_Z
+CLI_PORTS3:
 	LD	A,PORTS_AUTO		; USE AUTO PORT SELECTION
 CLI_PORTS_Z:
 	LD	(USEPORTS),A		; SAVE PORTS SELECTION
@@ -114,6 +121,7 @@ CLI_OCTAVE_ADJST5:
 
 OPT_MSX		.DB	"-MSX", 0			; USE MSX PORTS
 OPT_RC		.DB	"-RC", 0			; USE RC PORTS
+OPT_COLECO	.DB	"-COLECO", 0			; USE COLECO PORTS
 HBIOSOPT:	.DB	"--HBIOS", 0			; USE HBIOS API FOR PLAYBACK
 DELAYOPT:	.DB	"-DELAY",0			; FORCE DELAY MODE
 DOWN1		.DB	"-t1", 0			; DOWN AN OCTAVE

Source/Apps/Tune/tune.asm

@@ -54,6 +54,9 @@
 ;   2024-09-17 [WBW] Add support for HEATH H8 with Les Bird's MSX Card
 ;   2024-12-12 [WBW] Add options to force standard MSX or RC ports
 ;   2025-05-28 [WBW] Add option to force delay mode
+;   2026-01-24 [WBW] Support RC2014 platform id
+;   2026-01-31 [WBW] Update MUTE funtion to zero all PSG registers
+;   2026-02-03 [JMD] Add Coleco (50H/51H/52H) auto-detect 
 ;_______________________________________________________________________________
 ;
 ; ToDo:
@@ -78,6 +81,7 @@ TYPMYM		.EQU	3		; FILTYP value for MYM sound file
 PORTS_AUTO	.EQU	0		; AUTO select audio chip ports
 PORTS_MSX	.EQU	1		; force MSX audio chip ports
 PORTS_RC	.EQU	2		; force RCBUS audio chip ports
+PORTS_COLECO	.EQU	3		; force Coleco-style ports (50H/51H)
 ;
 ; HIGH SPEED CPU CONTROL
 ;
@@ -131,15 +135,18 @@ CONTINUE:
 
 	LD	A, (HBIOSMD)
 	OR	A
-	JR	NZ, TSTTIMER		; skip hardware check if using hbios
+	JP	NZ, TSTTIMER		; skip hardware check if using hbios
 
 	LD	A, (USEPORTS)		; get ports option
 	LD	HL,MSXPORTS		; assume MSX
 	CP	PORTS_MSX		; use MSX?
 	JR	Z,FORCE
-	LD	HL,RCPORTS		; asssume RC
+	LD	HL,RCPORTS		; assume RC
 	CP	PORTS_RC		; use RC?
 	JR	Z,FORCE
+	LD	HL,COLECOPORTS		; assume Coleco ports
+	CP	PORTS_COLECO		; use Coleco?
+	JR	Z,FORCE
 	JR	AUTOSEL			; otherwise do auto select
 
 FORCE:
@@ -607,6 +614,9 @@ CFGSIZ	.EQU	$ - CFGTBL
 ;
 	.DB	$07,	$33,	$32,	$32,	$FF,	$FF,	$FF	; RCZ80 W/ LINC SOUND MODULE
 	.DW	HWSTR_LINC
+;
+	.DB	$07,	$50,	$51,	$52,	$FF,	$FF,	$FF	; RCZ80 W/ RC SOUND MODULE (COLECO)
+	.DW	HWSTR_COLECO
 ;
 	.DB	$08,	$68,	$60,	$68,	$C0,	$FF,	$FF	; RCZ180 W/ RC SOUND MODULE (EB)
 	.DW	HWSTR_RCEB
@@ -619,6 +629,9 @@ CFGSIZ	.EQU	$ - CFGTBL
 ;
 	.DB	$08,	$33,	$32,	$32,	$C0,	$FF,	$FF	; RCZ180 W/ LINC SOUND MODULE
 	.DW	HWSTR_LINC
+;
+	.DB	$08,	$50,	$51,	$52,	$FF,	$FF,	$FF	; RCZ180 W/ RC SOUND MODULE (COLECO)
+	.DW	HWSTR_COLECO
 ;
 	.DB	$09,	$D8,	$D0,	$D8,	$FF,	$FF,	$FF	; EZZ80 W/ RC SOUND MODULE (EB)
 	.DW	HWSTR_RCEB
@@ -631,6 +644,9 @@ CFGSIZ	.EQU	$ - CFGTBL
 ;
 	.DB	$09,	$33,	$32,	$32,	$FF,	$FF,	$FF	; EZZ80 W/ LINC SOUND MODULE
 	.DW	HWSTR_LINC
+;
+	.DB	$09,	$50,	$51,	$52,	$FF,	$FF,	$FF	; EZZ80 W/ RC SOUND MODULE (COLECO)
+	.DW	HWSTR_COLECO
 ;
 	.DB	$0A,	$68,	$60,	$68,	$C0,	$FF,	$FF	; SCZ180 W/ RC SOUND MODULE (EB)
 	.DW	HWSTR_RCEB
@@ -643,6 +659,9 @@ CFGSIZ	.EQU	$ - CFGTBL
 ;
 	.DB	$0A,	$33,	$32,	$32,	$C0,	$FF,	$FF	; SCZ180 W/ LINC SOUND MODULE
 	.DW	HWSTR_LINC
+;
+	.DB	$0A,	$50,	$51,	$52,	$FF,	$FF,	$FF	; SCZ80 W/ RC SOUND MODULE (COLECO)
+	.DW	HWSTR_COLECO
 ;
 	.DB	$0B,	$D8,	$D0,	$D8,	$FF,	$FF,	$FF	; RCZ280 W/ RC SOUND MODULE (EB)
 	.DW	HWSTR_RCEB
@@ -655,6 +674,9 @@ CFGSIZ	.EQU	$ - CFGTBL
 ;
 	.DB	$0B,	$33,	$32,	$32,	$FF,	$FF,	$FF	; RCZ280 W/ LINC SOUND MODULE
 	.DW	HWSTR_LINC
+;
+	.DB	$0B,	$50,	$51,	$52,	$FF,	$FF,	$FF	; RCZ280 W/ RC SOUND MODULE (COLECO)
+	.DW	HWSTR_COLECO
 ;
 	.DB	13,	$A0,	$A1,	$A0,	$FF,	$A2,	$FE	; MBC
 	.DW	HWSTR_MBC
@@ -667,6 +689,18 @@ CFGSIZ	.EQU	$ - CFGTBL
 ;
 	.DB	22,	$41,	$40,	$40,	$FF,	$FF,	$FF	; NABU
 	.DW	HWSTR_NABU
+;
+	.DB	27,	$D8,	$D0,	$D8,	$FF,	$FF,	$FF	; RC2014 W/ RC SOUND MODULE (EB)
+	.DW	HWSTR_RCEB
+;
+	.DB	27,	$A0,	$A1,	$A2,	$FF,	$FF,	$FF	; RC2014 W/ RC SOUND MODULE (MSX)
+	.DW	HWSTR_RCMSX
+;
+	.DB	27,	$D1,	$D0,	$D0,	$FF,	$FF,	$FF	; RC2014 W/ RC SOUND MODULE (MF)
+	.DW	HWSTR_RCMF
+;
+	.DB	27,	$50,	$51,	$52,	$FF,	$FF,	$FF	; RC2014 W/ RC SOUND MODULE (COLECO)
+	.DW	HWSTR_COLECO
 ;
 	.DB	$FF					; END OF TABLE MARKER
 ;
@@ -681,6 +715,10 @@ RCPORTS:
 	.DB	$FF,	$D8,	$D0,	$FF,	$FF,	$FF,	$FF	; GENERIC RC
 	.DW	HWSTR_RC
 ;
+COLECOPORTS:
+	.DB	$FF,	$50,	$51,	$52,	$FF,	$FF,	$FF	; GENERIC COLECO AY PORTS (50H/51H, READ AT 52H)
+	.DW	HWSTR_COLECO
+;
 CFG:		; ACTIVE CONFIG VALUES (FROM SELECTED CFGTBL ENTRY)
 PLT		.DB	0	; RomWBW HBIOS platform id
 PORTS:
@@ -710,11 +748,11 @@ OCTAVEADJ	.DB	0	; AMOUNT TO ADJUST OCTAVE UP OR DOWN
 
 USEPORTS	.DB	0	; AUDIO CHIP PORT SELECTION MODE
 
-MSGBAN		.DB	"Tune Player for RomWBW v3.13, 28-May-2025",0
-MSGUSE		.DB	"Copyright (C) 2025, Wayne Warthen, GNU GPL v3",13,10
+MSGBAN		.DB	"Tune Player for RomWBW v3.16, 5-fEB-2026",0
+MSGUSE		.DB	"Copyright (C) 2026, Wayne Warthen, GNU GPL v3",13,10
 		.DB	"PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
 		.DB	"MYMPlay by Marq/Lieves!Tuore",13,10,13,10
-		.DB	"Usage: TUNE <filename>.[PT2|PT3|MYM] [-msx|-rc] [-delay] [--hbios] [+tn|-tn]",0
+		.DB	"Usage: TUNE <filename>.[PT2|PT3|MYM] [-msx|-rc|-coleco] [-delay] [--hbios] [+tn|-tn]",0
 MSGBIO		.DB	"Incompatible BIOS or version, "
 		.DB	"HBIOS v", '0' + RMJ, ".", '0' + RMN, " required",0
 MSGPLT		.DB	"Hardware error, system not supported!",0
@@ -740,6 +778,7 @@ HWSTR_NABU	.DB	"NABU Onboard Sound",0
 HWSTR_HEATH	.DB	"HEATH H8 MSX Module",0
 HWSTR_MSX	.DB	"MSX Standard Ports (A0H/A1H)",0
 HWSTR_RC	.DB	"RCBus Standard Ports (D8H/D0H)",0
+HWSTR_COLECO	.DB	"RCBus Coleco Ports (50H/51H)",0
 
 MSGUNSUP	.db	"MYM files not supported with HBIOS yet!\r\n", 0
 
@@ -891,10 +930,16 @@ MUTE	ISHBIOS
 	JR	NZ,MUTEVIAHBIOS
 
 	XOR A
-	LD H,A
-	LD L,A
-	LD (AYREGS+AmplA),A
-	LD (AYREGS+AmplB),HL
+	LD B,14
+	LD HL,AYREGS
+MUTE1	LD (HL),A
+	INC HL
+	DJNZ MUTE1
+	;XOR A
+	;LD H,A
+	;LD L,A
+	;LD (AYREGS+AmplA),A
+	;LD (AYREGS+AmplB),HL
 	JP ROUT
 
 MUTEVIAHBIOS:

Source/Apps/VGM/vgmplay.asm

@@ -34,131 +34,175 @@ P8X180          .equ    1
 RCBUS           .equ    2
 sbcecb		.equ	3		
 MBC		.equ	4
+RCBUSMSX	.equ	5		; Ports configured as per MSX
 ;
 plt_romwbw	.equ	1		; Build for ROMWBW?
 plt_type	.equ	sbcecb		; Select build configuration
 debug		.equ	0		; Display port, register, config info
 ;
 ;------------------------------------------------------------------------------
-; Platform specific definitions. If building for ROMWBW, these may be overridden
-;------------------------------------------------------------------------------
-
-#IF (plt_type=custom)
-RSEL            .equ    09AH		; Primary AY-3-8910 Register selection
-RDAT            .equ    09BH		; Primary AY-3-8910 Register data
-RSEL2           .equ    88H		; Secondary AY-3-8910 Register selection
-RDAT2           .equ    89H		; Secondary AY-3-8910 Register data
-VGMBASE		.equ	$C0
-YMSEL		.equ	VGMBASE+00H	; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	VGMBASE+01H	; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	VGMBASE+02H	; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	VGMBASE+03H	; Secondary YM2162 11000011 a1=1 a0=1
-PSG1REG         .equ    VGMBASE+04H	; Primary SN76489
-PSG2REG         .equ    VGMBASE+05H	; Secondary SN76489
-YM2151_SEL1	.equ	VGMBASE+08H	; Primary YM2151 register selection
-YM2151_DAT1	.equ	VGMBASE+09H	; Primary YM2151 register data
-YM2151_SEL2	.equ	VGMBASE+0AH	; Secondary YM2151 register selection
-YM2151_DAT2	.equ	VGMBASE+0BH	; Secondary YM2151 register data
-ctcbase		.equ	VGMBASE+0CH	; CTC base address
-plt_cpuspd	.equ	6;000000	; Non ROMWBW cpu speed default
-FRAME_DLY       .equ    10  		; Frame delay (~ 1/44100)
-#ENDIF
-;
-#IF (plt_type=P8X180)
-RSEL            .equ    82H		; Primary AY-3-8910 Register selection
-RDAT            .equ    83H		; Primary AY-3-8910 Register data
-RSEL2           .equ    88H		; Secondary AY-3-8910 Register selection
-RDAT2           .equ    89H		; Secondary AY-3-8910 Register data
-PSG1REG         .equ    84H		; Primary SN76489
-PSG2REG         .equ    8AH		; Secondary SN76489
-YM2151_SEL1	.equ	0B0H		; Primary YM2151 register selection
-YM2151_DAT1	.equ	0B1H		; Primary YM2151 register data
-YM2151_SEL2	.equ	0B2H		; Secondary YM2151 register selection
-YM2151_DAT2	.equ	0B3H		; Secondary YM2151 register data
-ctcbase		.equ	000H		; CTC base address
-YMSEL		.equ	000H		; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	000H		; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	000H		; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	000H		; Secondary YM2162 11000011 a1=1 a0=1
-FRAME_DLY       .equ    48		; Frame delay (~ 1/44100)
-plt_cpuspd	.equ	20		; Non ROMWBW cpu speed default
-#ENDIF
-;
-#IF (plt_type=RCBUS)
-RSEL            .equ    0D8H		; AYMODE_RCZ80	; Primary AY-3-8910 Register selection
-RDAT            .equ    0D0H		; AYMODE_RCZ80	; Primary AY-3-8910 Register data
-RSEL2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register selection
-RDAT2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register data
-PSG1REG         .equ    0FFH		; SNMODE_RC   !	; Primary SN76489
-PSG2REG         .equ    0FBH		; SNMODE_RC	; Secondary SN76489
-YM2151_SEL1	.equ	0FEH		; ED BRINDLEY	; Primary YM2151 register selection
-YM2151_DAT1	.equ	0FFH		; ED BRINDLEY !	; Primary YM2151 register data
-YM2151_SEL2	.equ	000H		; UNDEFINED	; Secondary YM2151 register selection
-YM2151_DAT2	.equ	000H		; UNDEFINED	; Secondary YM2151 register data
-ctcbase		.equ	000H		; UNDEFINED	; CTC base address
-YMSEL		.equ	000H		; UNDEFINED	; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	000H		; UNDEFINED	; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	000H		; UNDEFINED	; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	000H		; UNDEFINED	; Secondary YM2162 11000011 a1=1 a0=1
-plt_cpuspd	.equ	7;372800	; CPUOSC	; Non ROMWBW cpu speed default
-FRAME_DLY       .equ    12				; Frame delay (~ 1/44100)
-#ENDIF
-;
-#IF (plt_type=sbcecb)
-RSEL            .equ    09AH		; AYMODE_SCG	; Primary AY-3-8910 Register selection
-RDAT            .equ	09BH		; AYMODE_SCG	; Primary AY-3-8910 Register data
-RSEL2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register selection
-RDAT2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register data
-VGMBASE		.equ	$C0				; ECB-VGM V2 base address
-YMSEL		.equ	VGMBASE+00H			; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	VGMBASE+01H			; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	VGMBASE+02H			; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	VGMBASE+03H			; Secondary YM2162 11000011 a1=1 a0=1
-PSG1REG         .equ    VGMBASE+06H	; SNMODE_VGM	; Primary SN76489
-PSG2REG         .equ    VGMBASE+07H	; SNMODE_VGM	; Secondary SN76489
-ctcbase		.equ	VGMBASE+0CH			; CTC base address
-YM2151_SEL1	.equ	000H		; UNDEFINED	; Primary YM2151 register selection
-YM2151_DAT1	.equ	000H		; UNDEFINED	; Primary YM2151 register data
-YM2151_SEL2	.equ	000H		; UNDEFINED	; Secondary YM2151 register selection
-YM2151_DAT2	.equ	000H		; UNDEFINED	; Secondary YM2151 register data
-plt_cpuspd	.equ	8;000000	; CPUOSC	; Non ROMWBW cpu speed default
-FRAME_DLY       .equ    13  				; Frame delay (~ 1/44100)
-#ENDIF
-;
-#IF (plt_type=MBC)
-RSEL            .equ    0A0H		; AYMODE_MBC	; Primary AY-3-8910 Register selection
-RDAT            .equ    0A1H		; AYMODE_MBC	; Primary AY-3-8910 Register data
-RSEL2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register selection
-RDAT2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register data
-YMSEL		.equ	000H		; UNDEFINED	; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.equ	000H		; UNDEFINED	; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.equ	000H		; UNDEFINED	; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.equ	000H		; UNDEFINED	; Secondary YM2162 11000011 a1=1 a0=1
-PSG1REG         .equ    000H		; UNDEFINED	; Primary SN76489
-PSG2REG         .equ    000H		; UNDEFINED	; Secondary SN76489
-ctcbase		.equ	000H		; UNDEFINED	; CTC base address
-YM2151_SEL1	.equ	000H		; UNDEFINED	; Primary YM2151 register selection
-YM2151_DAT1	.equ	000H		; UNDEFINED	; Primary YM2151 register data
-YM2151_SEL2	.equ	000H		; UNDEFINED	; Secondary YM2151 register selection
-YM2151_DAT2	.equ	000H		; UNDEFINED	; Secondary YM2151 register data
-plt_cpuspd	.equ	8;000000	; CPUOSC	; Non ROMWBW cpu speed default
-FRAME_DLY       .equ    13  		; UNDEFINED	; Frame delay (~ 1/44100)
-
-#ENDIF
-;
-;------------------------------------------------------------------------------
-; Configure timing loop 
+; Configure timing loop
 ;------------------------------------------------------------------------------
 ;
 cpu_loop:	.equ	0
 ctc_poll:	.equ	1
 ctc_int:	.equ	2			; not implemented
+hbios_tmr:	.equ	3			; use hbios 50hz or 60hz timer to calculate a fdelay value (plt_romwbw must be set)
 ;
-delay_type:	.equ	cpu_loop		; cpu timed loop or utilize ctc
+delay_type:	.equ	hbios_tmr		; cpu timed loop or utilize ctc
 delay_wait	.equ	0			; funny wait mode for ctc
 ;
 D60		.equ	735			; 735x60=44100 Frame delay values for ntsc
 D50		.equ	882			; 882x50=44100 Frame delay values for pal
+
+#IF (delay_type==hbios_tmr)
+#IF (plt_romwbw!=1)
+## Assembly configuration Error
+## Must have plt_romwbw set, for delay_type==hbios_tmr
+#ENDIF
+#ENDIF
+;
+;------------------------------------------------------------------------------
+; Platform specific definitions. If building for ROMWBW, these may be overridden
+;------------------------------------------------------------------------------
+; 
+#IF (plt_type=custom)
+VGMBASE		.equ	$C0
+
+ctcbase		.equ	VGMBASE+0CH	; CTC base address
+FRAME_DLY       .equ    10  		; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	6;000000	; Non ROMWBW cpu speed default
+PSG1REG         .equ    VGMBASE+04H	; Primary SN76489
+PSG2REG         .equ    VGMBASE+05H	; Secondary SN76489
+RDAT            .equ    09BH		; Primary AY-3-8910 Register data
+RDAT2           .equ    89H		; Secondary AY-3-8910 Register data
+RSEL            .equ    09AH		; Primary AY-3-8910 Register selection
+RSEL2           .equ    88H		; Secondary AY-3-8910 Register selection
+YM2151_DAT1	.equ	VGMBASE+09H	; Primary YM2151 register data
+YM2151_DAT2	.equ	VGMBASE+0BH	; Secondary YM2151 register data
+YM2151_SEL1	.equ	VGMBASE+08H	; Primary YM2151 register selection
+YM2151_SEL2	.equ	VGMBASE+0AH	; Secondary YM2151 register selection
+YM2413_DAT1	.equ	7DH		; YM2413 Data Register
+YM2413_SEL1	.equ	7CH		; YM2413 Address Register
+YM2DAT		.equ	VGMBASE+03H	; Secondary YM2162 11000011 a1=1 a0=1
+YM2SEL		.equ	VGMBASE+02H	; Secondary YM2162 11000010 a1=1 a0=0
+YMDAT		.equ	VGMBASE+01H	; Primary YM2162 11000001 a1=0 a0=1
+YMSEL		.equ	VGMBASE+00H	; Primary YM2162 11000000 a1=0 a0=0
+#ENDIF
+;
+#IF (plt_type=P8X180)
+ctcbase		.equ	000H		; CTC base address
+FRAME_DLY       .equ    48		; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	20		; Non ROMWBW cpu speed default
+PSG1REG         .equ    84H		; Primary SN76489
+PSG2REG         .equ    8AH		; Secondary SN76489
+RDAT            .equ    83H		; Primary AY-3-8910 Register data
+RDAT2           .equ    89H		; Secondary AY-3-8910 Register data
+RSEL            .equ    82H		; Primary AY-3-8910 Register selection
+RSEL2           .equ    88H		; Secondary AY-3-8910 Register selection
+YM2151_DAT1	.equ	0B1H		; Primary YM2151 register data
+YM2151_DAT2	.equ	0B3H		; Secondary YM2151 register data
+YM2151_SEL1	.equ	0B0H		; Primary YM2151 register selection
+YM2151_SEL2	.equ	0B2H		; Secondary YM2151 register selection
+YM2413_DAT1	.equ	7DH		; YM2413 Data Register
+YM2413_SEL1	.equ	7CH		; YM2413 Address Register
+YM2DAT		.equ	000H		; Secondary YM2162 11000011 a1=1 a0=1
+YM2SEL		.equ	000H		; Secondary YM2162 11000010 a1=1 a0=0
+YMDAT		.equ	000H		; Primary YM2162 11000001 a1=0 a0=1
+YMSEL		.equ	000H		; Primary YM2162 11000000 a1=0 a0=0
+#ENDIF
+;
+#IF (plt_type=RCBUS)
+ctcbase		.equ	000H		; UNDEFINED	; CTC base address
+FRAME_DLY       .equ    12				; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	7;372800	; CPUOSC	; Non ROMWBW cpu speed default
+PSG1REG         .equ    0FFH		; SNMODE_RC   !	; Primary SN76489
+PSG2REG         .equ    0FBH		; SNMODE_RC	; Secondary SN76489
+RDAT            .equ    0D0H		; AYMODE_RCZ80	; Primary AY-3-8910 Register data
+RDAT2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register data
+RSEL            .equ    0D8H		; AYMODE_RCZ80	; Primary AY-3-8910 Register selection
+RSEL2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register selection
+YM2151_DAT1	.equ	0FFH		; ED BRINDLEY !	; Primary YM2151 register data
+YM2151_DAT2	.equ	000H		; UNDEFINED	; Secondary YM2151 register data
+YM2151_SEL1	.equ	0FEH		; ED BRINDLEY	; Primary YM2151 register selection
+YM2151_SEL2	.equ	000H		; UNDEFINED	; Secondary YM2151 register selection
+YM2413_DAT1	.equ	7DH		; YM2413 Data Register
+YM2413_SEL1	.equ	7CH		; YM2413 Address Register
+YM2DAT		.equ	000H		; UNDEFINED	; Secondary YM2162 11000011 a1=1 a0=1
+YM2SEL		.equ	000H		; UNDEFINED	; Secondary YM2162 11000010 a1=1 a0=0
+YMDAT		.equ	000H		; UNDEFINED	; Primary YM2162 11000001 a1=0 a0=1
+YMSEL		.equ	000H		; UNDEFINED	; Primary YM2162 11000000 a1=0 a0=0
+#ENDIF
+;
+#IF (plt_type=sbcecb)
+VGMBASE		.equ	$C0				; ECB-VGM V2 base address
+
+ctcbase		.equ	VGMBASE+0CH			; CTC base address
+FRAME_DLY       .equ    13  				; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	8;000000	; CPUOSC	; Non ROMWBW cpu speed default
+PSG1REG         .equ    VGMBASE+06H	; SNMODE_VGM	; Primary SN76489
+PSG2REG         .equ    VGMBASE+07H	; SNMODE_VGM	; Secondary SN76489
+RDAT            .equ	09BH		; AYMODE_SCG	; Primary AY-3-8910 Register data
+RDAT2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register data
+RSEL            .equ    09AH		; AYMODE_SCG	; Primary AY-3-8910 Register selection
+RSEL2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register selection
+YM2151_DAT1	.equ	000H		; UNDEFINED	; Primary YM2151 register data
+YM2151_DAT2	.equ	000H		; UNDEFINED	; Secondary YM2151 register data
+YM2151_SEL1	.equ	000H		; UNDEFINED	; Primary YM2151 register selection
+YM2151_SEL2	.equ	000H		; UNDEFINED	; Secondary YM2151 register selection
+YM2413_DAT1	.equ	7DH		; YM2413 Data Register
+YM2413_SEL1	.equ	7CH		; YM2413 Address Register
+YM2DAT		.equ	VGMBASE+03H			; Secondary YM2162 11000011 a1=1 a0=1
+YM2SEL		.equ	VGMBASE+02H			; Secondary YM2162 11000010 a1=1 a0=0
+YMDAT		.equ	VGMBASE+01H			; Primary YM2162 11000001 a1=0 a0=1
+YMSEL		.equ	VGMBASE+00H			; Primary YM2162 11000000 a1=0 a0=0
+#ENDIF
+;
+#IF (plt_type=MBC)
+ctcbase		.equ	000H		; UNDEFINED	; CTC base address
+FRAME_DLY       .equ    13  		; UNDEFINED	; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	8;000000	; CPUOSC	; Non ROMWBW cpu speed default
+PSG1REG         .equ    000H		; UNDEFINED	; Primary SN76489
+PSG2REG         .equ    000H		; UNDEFINED	; Secondary SN76489
+RDAT            .equ    0A1H		; AYMODE_MBC	; Primary AY-3-8910 Register data
+RDAT2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register data
+RSEL            .equ    0A0H		; AYMODE_MBC	; Primary AY-3-8910 Register selection
+RSEL2           .equ    000H		; UNDEFINED	; Secondary AY-3-8910 Register selection
+YM2151_DAT1	.equ	000H		; UNDEFINED	; Primary YM2151 register data
+YM2151_DAT2	.equ	000H		; UNDEFINED	; Secondary YM2151 register data
+YM2151_SEL1	.equ	000H		; UNDEFINED	; Primary YM2151 register selection
+YM2151_SEL2	.equ	000H		; UNDEFINED	; Secondary YM2151 register selection
+YM2413_DAT1	.equ	7DH		; YM2413 Data Register
+YM2413_SEL1	.equ	7CH		; YM2413 Address Register
+YM2DAT		.equ	000H		; UNDEFINED	; Secondary YM2162 11000011 a1=1 a0=1
+YM2SEL		.equ	000H		; UNDEFINED	; Secondary YM2162 11000010 a1=1 a0=0
+YMDAT		.equ	000H		; UNDEFINED	; Primary YM2162 11000001 a1=0 a0=1
+YMSEL		.equ	000H		; UNDEFINED	; Primary YM2162 11000000 a1=0 a0=0
+#ENDIF
+
+#IF (plt_type=RCBUSMSX)
+VGMBASE		.equ	$C0
+
+ctcbase		.equ	VGMBASE+0CH	; CTC base address
+FRAME_DLY       .equ    10  		; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	6;000000	; Non ROMWBW cpu speed default
+PSG1REG         .equ    VGMBASE+04H	; Primary SN76489
+PSG2REG         .equ    VGMBASE+05H	; Secondary SN76489
+RDAT            .equ    0A1H		; Primary AY-3-8910 Register data
+RDAT2           .equ    0A1H		; Secondary AY-3-8910 Register data
+RSEL            .equ    0A0H		; Primary AY-3-8910 Register selection
+RSEL2           .equ    0A0H		; Secondary AY-3-8910 Register selection
+YM2151_DAT1	.equ	VGMBASE+09H	; Primary YM2151 register data
+YM2151_DAT2	.equ	VGMBASE+0BH	; Secondary YM2151 register data
+YM2151_SEL1	.equ	VGMBASE+08H	; Primary YM2151 register selection
+YM2151_SEL2	.equ	VGMBASE+0AH	; Secondary YM2151 register selection
+YM2413_DAT1	.equ	7DH		; YM2413 Data Register
+YM2413_SEL1	.equ	7CH		; YM2413 Address Register
+YM2DAT		.equ	VGMBASE+03H	; Secondary YM2162 11000011 a1=1 a0=1
+YM2SEL		.equ	VGMBASE+02H	; Secondary YM2162 11000010 a1=1 a0=0
+YMDAT		.equ	VGMBASE+01H	; Primary YM2162 11000001 a1=0 a0=1
+YMSEL		.equ	VGMBASE+00H	; Primary YM2162 11000000 a1=0 a0=0
+#ENDIF
 ;
 ;------------------------------------------------------------------------------
 ; CTC Defaults 
@@ -239,6 +283,8 @@ VGM_W882	.equ	063H			; WAIT 882 SAMPLES (1/50TH SECOND)
 VGM_ESD		.equ	066H			; END OF SOUND DATA
 VGM_YM21511_W	.equ	054H			; YM2151 #1 WRITE VALUE DD
 VGM_YM21512_W	.equ	0A4H			; YM2151 #2 WRITE VALUE DD
+VGM_AY		.equ	0A0H			; AY-3-8910
+VGM_YM2413	.equ	051H			; YM2413, write value dd to register aa
 
 ;------------------------------------------------------------------------------
 ; Generic CP/M definitions
@@ -270,7 +316,11 @@ LF              .equ    0AH                	; line feed
 ;
 		CALL	vgmsetup		; Device setup
 		call	welcome			; Welcome message and build debug info
+#IF (delay_type==hbios_tmr)
+		call	bcpu
+#ENDIF
 		call	vgmreadr		; read in the vgm file
+
 ;
 ;------------------------------------------------------------------------------
 ; Play loop
@@ -288,7 +338,7 @@ MAINLOOP	CALL    PLAY                	; Play one frame
                 OR      A
                 JR      NZ,EXIT
 NO_CHK:
-#IF (delay_type==cpu_loop)
+#IF ((delay_type==cpu_loop) | (delay_type==hbios_tmr))
 vdelay:		.equ	$+1
 		ld	hl,vdelay
 fdelay:		.equ	$+1
@@ -323,7 +373,7 @@ lp3:		in	a,(ctcch3)		; wait for counter to reach zero
 ;
 #IF (delay_type==ctc_int)
 #ENDIF
-;
+
                 JP      MAINLOOP
 ;
 ;------------------------------------------------------------------------------
@@ -393,7 +443,7 @@ HASEXT:         LD      C,OPENF			; Open File
                 LD      (FCBCR), A
                 LD      DE, VGMDATA
                 LD      (VGMPOS), DE
-RLOOP 
+RLOOP
 ;		LD	A,(TOPM)		; CBIOS start
 ;		SUB	10h			; Less BDOS = Top Memory Page
 		LD	A,$D6			; Hardcoded top of memory
@@ -452,15 +502,39 @@ PSG             CP      VGM_PSG1_W		; Write byte to SN76489.
                 JR      NEXT
 
 PSG2            CP      VGM_PSG2_W		; Write byte to second SN76489.
-                JR      NZ, AY
+                JR      NZ, YM2413
                 LD      A, (HL)
                 INC     HL
                 OUT     (PSG2REG), A
 		SET	1,(IX+0)
                 JR      NEXT
 
-;	AY-3-8910 SECTION
+;
+;	YM2413 (MSX-MUSIC) SECTION
+YM2413:
+		CP	VGM_YM2413
+		JR	NZ, AY
 
+		LD	A, (HL)			; aa (register)
+
+		OUT 	(YM2413_SEL1), A
+
+		IN	A, (YM2413_SEL1)  	; wait 12 / 3.58 µs
+		IN	A, (YM2413_SEL1)  	;  "
+
+		INC	HL
+		LD	A, (HL)			; dd (value)
+		INC	HL
+
+		OUT	(YM2413_DAT1),A
+		PUSH	AF
+		POP	AF
+
+		SET	2,(IX+1)		; FLAG YM2413
+
+		JR	NEXT
+
+;	AY-3-8910 SECTION
 AY              CP      0A0H
 		JR	NZ,YM2162_1
 		LD      A, (HL)
@@ -628,6 +702,15 @@ VGMDEVICES:	LD	DE,MSG_PO		; Played on ...
 ;		PUSH	AF
 ;
 		LD	A,(IX+1)
+
+		BIT	2, A
+		JR	Z, SKIPX
+
+		LD	DE, MSG_YM2413
+		CALL	PRTSTR
+
+
+SKIPX:
 		LD	DE,MSG_UNK		; Unknown Device Code detected
 ;		CALL	CHKDEV
 ;
@@ -1092,7 +1175,54 @@ SKIP3:		LD	A,(IX+0)		; For YM2151 ... Unimplemented
 		s2151reg($27,$00)
 ;
 
-SKIP4		RET
+SKIP4		BIT	2,(IX+1)		; mute all channels on YM2413
+		JP	Z,SKIP5
+
+		ld	de,000EH
+		call	YM2413_WR  ; rhythm off
+		ld	de,0F07H
+		call	YM2413_WR  ; max carrier release rate
+		ld	b,9
+		ld	de,0F30H
+		call	YM2413_FILL  ; instrument 0, min volume
+		ld	b,9
+		ld	de,0010H
+		call	YM2413_FILL  ; frequency 0
+		ld	b,9
+		ld	de,0020H
+		jr	YM2413_FILL    ; key off
+
+SKIP5:
+		RET
+
+; e = register
+; d = value
+; ix = this
+YM2413_WR:
+		ld a,e
+		out (YM2413_SEL1),a
+		ld a,d
+		push	af
+		push	af
+		pop	af
+		pop	af
+		out (YM2413_DAT1),a
+		ret
+
+
+; b = count
+; e = register base
+; d = value
+; ix = this
+YM2413_FILL:
+		push bc
+		push de
+		call YM2413_WR
+		pop de
+		pop bc
+		inc e
+		djnz YM2413_FILL
+		ret
 ;
 ;------------------------------------------------------------------------------
 ; Hardware specific routines.
@@ -1157,8 +1287,9 @@ MSG_YM2612:	.DB	"xYM-2612 ",0
 MSG_SN:		.DB	"xSN76489 ",0
 MSG_AY:		.DB	"xAY-3-8910 ",0
 MSG_YM2151:	.DB	"xYM-2151 ",0
+MSG_YM2413:	.DB	"YM2413", 0
 MSG_UNK:	.DB	"xUnsupported device encountered", CR, LF, 0
-MSG_EXIT:	.DB	"FINISHED.",CR,LF,0
+MSG_EXIT:	.DB	CR, LF, "FINISHED.",CR,LF,0
 MSG_NOFILE:     .DB	"File not found", CR, LF, 0
 MSG_MEM:	.DB	"File to big", CR, LF, 0
 MSG_TITLE:	.DB	" from: ",0
@@ -1166,12 +1297,16 @@ MSG_TRACK	.DB	"Playing: ",0
 MSG_CPU		.DB	"[cpu]",0
 MSG_CTCPOLL	.DB	"[ctc polled]",0
 MSG_CTCINT	.DB	"[ctc interrupts]",0
+MSG_HBIOSTMR	.DB	"[hbios timer]",0
+
 MSG_ROMWBW	.DB	" [romwbw] ",0
+
 MSG_CUSTOM	.DB	" [custom] ",0
 MSG_P8X180	.DB	" [p8x180] ",0
 MSG_RCBUS	.DB	" [RCBus] ",0
 MSG_SBCECB	.DB	" [sbc] ",0
 MSG_MBC		.DB	" [mbc] ",0
+MSG_RCBUSMSX	.DB	" [RCBus-MSX] ",0
 ;
 ;------------------------------------------------------------------------------
 ; Variables
@@ -1190,7 +1325,7 @@ VGM_DEV		.DB	%00000000	; IX+0 Flags for devices
 		.DB	%00000000	; IX+1 Unimplemented device flags & future devices
 ;
 OLDSTACK        .DW     0		; original stack pointer
-                .FILL	40H		; space for stack
+                .FILL	80H		; space for stack
 STACK		.DW	0		; top of stack
 
 ;------------------------------------------------------------------------------
@@ -1242,7 +1377,7 @@ welcome:	LD	DE,MSG_WELC		; Welcome Message
 		CALL	PRTSTR
 #ENDIF
 ;
-		LD	A,delay_type		; display build type
+		LD	A,delay_type		; display delay type
 		LD	DE,MSG_CPU
 		CALL	PRTIDXDEA
 ;
@@ -1252,7 +1387,7 @@ welcome:	LD	DE,MSG_WELC		; Welcome Message
 		call	CRLF
 ;
 #IF (debug)
-#IF (delay_type==cpu_loop)
+#IF ((delay_type==cpu_loop) | (delay_type==hbios_tmr))
 		ld	a,'f'			; Display frame rate delay
 		call	PRTCHR
 		call	PRTDOT
@@ -1285,6 +1420,146 @@ welcome:	LD	DE,MSG_WELC		; Welcome Message
 #ENDIF
 		CALL	CRLF
 		ret
+
+
+#IF (delay_type==hbios_tmr)
+bcpu:
+		CALL	hbios_tmr_enabled
+		JP	z, setfdelay
+
+		LD	DE, MSG_BENCHMARK
+		CALL	PRTSTR
+
+	;	 get current timer tick value
+		LD	BC, $F8D0		; GET TIMER TICKS
+		RST	08			; FROM HBIOS
+		; hl is current timer tick value
+		; c is freq
+		LD	A, L
+		PUSH	AF
+
+		; sync to next timer tick
+		; or timeout if there is no timer
+bc1:
+		LD	BC, $F8D0		; GET TIMER TICKS
+		RST	08			; FROM HBIOS
+
+		POP	AF
+		PUSH	AF
+		CP	L
+		JR	Z, bc1
+
+		POP	AF
+		LD	H, L
+		PUSH	HL			; save current tick value
+
+		LD	B, 0
+		LD	HL, 2000
+bc2:
+		DJNZ	$
+
+		DEC	HL
+		LD	A, H
+		OR	L
+		JR	NZ, bc2
+
+		LD	BC, $F8D0		; GET TIMER TICKS
+		RST	08			; FROM HBIOS
+
+		LD	A, L
+		POP	HL
+		; h is starting timer tick
+		; a is current timer tick
+
+		; calculate a-l
+		SUB	L
+#IF (debug)
+		CALL	CRLF
+		CALL	PRTDOT
+		CALL	PRTDECB
+		CALL	PRTDOT
+#ENDIF
+		; c is TICKFREQ
+		; conversion rates are 50Hz -> 580, 60Hz -> 697
+
+		LD	HL, 580
+		PUSH	AF
+		LD	A, C
+		CP	50
+		JR	Z, bc3
+		LD	HL, 697
+bc3:
+		POP	AF
+		LD	C, A
+		CALL	divide_16_by_8
+
+		LD	A, L
+#IF (debug)
+		CALL	PRTDECB
+#ENDIF
+		CALL	CRLF
+
+		LD	(fdelay), A
+		RET
+
+	; determine if hbios's timer is installed
+	; returns:
+	;   A == 0 & Z if no timer
+	;   A != 0 & NZ if timer
+hbios_tmr_enabled:
+		LD	BC, $F8D0		; GET TIMER TICKS
+		RST	08			; FROM HBIOS
+
+		PUSH	HL			; save current ticks
+
+		; loop for a bit
+		LD	B, 0
+		LD	HL, 500
+tme1:
+		DJNZ	$
+
+		DEC	HL
+		LD	A, H
+		OR	L
+		JR	NZ, tme1
+
+		LD	BC, $F8D0		; GET TIMER TICKS
+		RST	08			; FROM HBIOS
+
+		LD	A, L
+		POP	HL
+
+		; if a == l  then probably no timer
+		SUB	L
+		RET
+
+; c = divisor
+; hl = dividend
+; a <- remainder
+; c <- divisor unchanged
+; hl <- quotient
+divide_16_by_8:
+		XOR 	A
+		LD 	B, 16
+div_loop:
+		ADD	HL, HL
+		RLA
+		JR	C, div_overflow
+		CP	C
+		JR	C, div_zero
+div_overflow:
+		INC	L
+		SUB	C
+div_zero:
+		DJNZ 	div_loop
+		RET
+
+MSG_BENCHMARK:
+		.DB	"Benchmarking CPU ...", 0
+
+#ENDIF
+
+
 ;
 ;------------------------------------------------------------------------------
 ; Probe HBIOS for devices and patch in I/O ports for devices
@@ -1296,8 +1571,8 @@ cfgports:	ret
 ; Setup frame delay value - Loop count for DJNZ $ loop
 ;------------------------------------------------------------------------------
 ;
+#IF ((delay_type==cpu_loop) | (delay_type==hbios_tmr))
 setfdelay:
-#IF (delay_type==cpu_loop)
 #IF (plt_romwbw)
 		LD	BC,$F8F0		; GET CPU SPEED
 		RST	08			; FROM HBIOS

Source/Apps/XM/xmdm125.asm

@@ -50,6 +50,10 @@ VYEAR	EQU	86
 NO	EQU	0
 YES	EQU	NOT NO
 ;
+; Add debugging code?
+;
+DEBUG	EQU	NO
+;
 ; Define ASCII characters used
 ;
 BS	EQU	08H	; Backspace character
@@ -2258,7 +2262,14 @@ RCVRPT:	 IF	CONFUN		; Check for function key?
 	CALL	RECV		; Get any character received
 	JC	RCVSTOT		; Timeout
 ;
-RCVRPTB:CPI	SOH		; 'SOH' for a 128-byte block?
+RCVRPTB:
+	IF	DEBUG
+	CALL	ILPRT
+	DB	CR,LF,0
+	CALL	PRTHEXBYTE
+	ENDIF
+
+	CPI	SOH		; 'SOH' for a 128-byte block?
 	JZ	RCVSOH		; Yes
 	CPI	STX		; A 1024-byte block?
 	JZ	RCVSTX		;
@@ -2343,7 +2354,13 @@ DELFILE:LXI	D,FCB		; Point to file
 ;
 ;RCVSTOT:JMP	RCVSERR		; Bump error count, etc.
 ; [WBW] Bypass line flush if error is timeout
-RCVSTOT:JMP	RCVSER1		; Bump error count, etc.
+RCVSTOT:
+	IF	DEBUG
+	CALL	ILPRT
+	DB	'Timeout',CR,LF,0
+	ENDIF
+
+	JMP	RCVSER1		; Bump error count, etc.
 ;
 ; Got SOH or STX - get block number, block number complemented
 ;
@@ -2360,10 +2377,16 @@ RCVHDR:	SHLD	BLKSIZ		; Store block size for later
 	MVI	A,1		; Need something to store at FRSTIM
 	STA	FRSTIM		; Indicate first 'SOH' received
 	CALL	RECV		; Get record
+	IF	DEBUG
+	CALL	PRTHEXBYTE
+	ENDIF
 	JC	RCVSTOT		; Got timeout
 	MOV	D,A		; D=block number
 	MVI	B,1		; Timeout = 1 sec
 	CALL	RECV		; Get complimented record number
+	IF	DEBUG
+	CALL	PRTHEXBYTE
+	ENDIF
 	JC	RCVSTOT		; Timeout
 	CMA			; Calculate the  complement
 	CMP	D		; Good record number?
@@ -2383,6 +2406,9 @@ RCVDATA:MOV	A,D		; Get record number
 ;
 RCVCHR:	MVI	B,1		; 1 sec timeout
 	CALL	RECV		; Get the character
+	IF	DEBUG
+	CALL	PRTHEXBYTE
+	ENDIF
 	JC	RCVSTOT		; Timeout
 	MOV	M,A		; Store the character
 	INX	H		; Point to next character
@@ -2421,15 +2447,30 @@ CHKSNUM:LDA	RCVRNO		; Get received
 ; record, else send a NAK requesting the record be sent again.
 ;
 RCVCRC:	MVI	E,2		; Number of bytes to receive
+	IF	DEBUG
+	CALL	ILPRT
+	DB	CR,LF,0
+	ENDIF
 ;
 RCVCRC2:MVI	B,1		; 1 sececond timeout
 	CALL	RECV		; Get crc byte
+	IF	DEBUG
+	CALL	PRTHEXBYTE
+	ENDIF
 	JC	RCVSTOT		; Timeout
 	DCR	E		; Decrement the number of bytes
 	JNZ	RCVCRC2		; Get both bytes
+	IF	DEBUG
+	CALL	ILPRT
+	DB	CR,LF,0
+	ENDIF
 	CALL	CHKCRC		; Check received CRC against calc'd CRC
 	ORA	A		; Is CRC okay?
 	JZ	CHKSNUM		; Yes, go check record numbers
+	IF	DEBUG
+	CALL	ILPRT
+	DB	'CRC Err',CR,LF,0
+	ENDIF
 	JMP	RCVSERR		; Go check error limit and send NAK
 ;
 ; Previous record repeated, due to the last ACK being garbaged.  ACK it
@@ -4267,6 +4308,51 @@ DKIND:	LDAX	D		; Get the character from the string
 DKIND1:	LDA	KIND		; Get the kind of file back
 	RET			; Finished
 	 ENDIF
+;
+	IF	DEBUG
+;
+; PRINT THE HEX BYTE VALUE IN A
+;
+PRTHEXBYTE:
+	PUSH	PSW
+	PUSH	D
+	CALL	HEXASCII
+	MOV	A,D
+	CALL	CTYPE
+	MOV	A,E
+	CALL	CTYPE
+	POP	D
+	POP	PSW
+	RET
+
+;
+; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE
+;
+HEXASCII:
+	MOV	D,A
+	CALL	HEXCONV
+	MOV	E,A
+	MOV	A,D
+	RLC
+	RLC
+	RLC
+	RLC
+	CALL	HEXCONV
+	MOV	D,A
+	RET
+;
+; CONVERT LOW NIBBLE OF A TO ASCII HEX
+;
+HEXCONV:
+	ANI	0FH	     ;LOW NIBBLE ONLY
+	ADI	90H
+	DAA
+	ACI	40H
+	DAA
+	RET
+;
+	ENDIF
+;
 ;.....
 ;
 ;-----------------------------------------------------------------------
@@ -4499,15 +4585,19 @@ NIBBL:	ANI	0FH		; Isolate digit
 ; Inline print of message, terminates with a 0
 ;
 ILPRT:	XTHL			; Save HL, get HL=message
+	PUSH	PSW		; Save accum/flags
 ;
-ILPLP:	MOV	A,M		; Get the character
+ILPLP:	
+	MOV	A,M		; Get the character
 	INX	H		; To next character
 	ORA	A		; End of message?
 	JZ	ILPRET		; Yes, return
 	CALL	CTYPE		; Type the message
 	JMP	ILPLP		; Loop
 ;
-ILPRET:	XTHL			; Restore HL
+ILPRET:
+	POP	PSW		; Restore accum/flags
+	XTHL			; Restore HL
 	RET			; Past message
 ;
 ; Exit printing message following call
@@ -4582,6 +4672,14 @@ MOVE:	MOV	A,M		; Get a character
 ;
 CHKCRC:	PUSH	H		; Check 'CRC' bytes of received message
 	LHLD	CRCVAL
+	
+	IF	DEBUG
+	MOV	A,H
+	CALL	PRTHEXBYTE
+	MOV	A,L
+	CALL	PRTHEXBYTE
+	ENDIF
+	
 	MOV	A,H
 	ORA	L
 	POP	H

Source/Apps/rtc/rtc.asm

@@ -35,6 +35,8 @@
 ;
 ;[2024/09/02] v1.10  Support Genesis STD Z180
 ;
+;[2026/01/24] v1.11  Support RC2014
+;
 ; Constants
 ;
 mask_data	.EQU	%10000000	; RTC data line
@@ -54,8 +56,8 @@ PORT_RCZ280	.EQU	$C0		; RTC port for RCZ280
 PORT_MBC	.EQU	$70		; RTC port for MBC
 PORT_RPH	.EQU	$84		; RTC port for RHYOPHYRE
 PORT_DUO	.EQU	$94		; RTC port for DUODYNE
-PORT_STDZ180 .EQU $84         ; RTC Port for STD Bus Z180 board
-
+PORT_STDZ180	.EQU	$84		; RTC Port for STD Bus Z180 board
+PORT_RC2014	.EQU	$C0		; RTC port for RC2014
 
 BDOS		.EQU	5		; BDOS invocation vector
 FCB		.EQU	05CH		; Start of command line
@@ -1151,6 +1153,11 @@ HINIT:
 	CP	21		; STD Z180
 	JP	Z,RTC_INIT2
 ;
+	LD	C,PORT_RC2014
+	LD	DE,PLT_RC2014
+	CP	27		; RC2014
+	JP	Z,RTC_INIT2
+;
 
 ; Unknown platform
 	LD	DE,PLTERR	; BIOS error message
@@ -1778,7 +1785,8 @@ PLT_RCZ280	.TEXT	", RCBus Z280 RTC Module Latch Port 0xC0\r\n$"
 PLT_MBC		.TEXT	", MBC RTC Latch Port 0x70\r\n$"
 PLT_RPH		.TEXT	", RHYOPHYRE RTC Latch Port 0x84\r\n$"
 PLT_DUO		.TEXT	", DUODYNE RTC Latch Port 0x70\r\n$"
-PLT_STDZ180 .TEXT ", STD Z180 RTC Module latch port 0x84\r\n$"
+PLT_STDZ180	.TEXT	", STD Z180 RTC Module latch port 0x84\r\n$"
+PLT_RC2014	.TEXT	", RC2014 Z80 RTC Module Latch Port 0xC0\r\n$"
 
 ;
 ; Generic FOR-NEXT loop algorithm

Source/Doc/Hardware.md

@@ -28,6 +28,7 @@ including RC26, RC40, RC80, and BP80.
 
 | **Description**                                             | **Bus** | **ROM Image File**           | **Baud Rate** |
 |-------------------------------------------------------------|---------|------------------------------|--------------:|
+| [RC2014 Z80 CPU Module], 512K RAM/ROM                       | RCBus   | RC2014_std.rom               | 115200        |
 | [RCBus Z80 CPU Module], 512K RAM/ROM                        | RCBus   | RCZ80_std.rom                | 115200        |
 | [RCBus Z80 CPU Module (KIO)], 512K w/KIO                    | RCBus   | RCZ80_kio_std.rom            | 115200        |
 | [RCBus Z180 CPU Module (External)]                          | RCBus   | RCZ180_ext_std.rom           | 115200        |
@@ -121,7 +122,7 @@ Others
 | [NABU w/ RomWBW Option Board]^5^                            | NABU     | NABU_std.rom                |        115200 |
 | [S100 Computers Z180 SBC]^4^                                | S100     | SZ180_std.rom               |         57600 |
 | [S100 Computers Z80 CPU]^4^                                 | S100     | SZ80_std.rom                |         19200 |
-| [S100 Computers T35 FPGA Z80 SBC]^4^                        | S100     | SZ80_t35.rom                |          9600 |
+| [S100 Computers T35 FPGA Z80 SBC]^4^                        | S100     | SZ80_t35_std.rom            |          9600 |
 | [UNA Hardware BIOS]^1^                                      | -        | UNA_std.rom                 |             - |
 | [Z80-Retro SBC]^3^                                          | -        | Z80RETRO_std.rom            |         38400 |
 | [Z180 Mark IV SBC]^1^                                       | ECB      | MK4_std.rom                 |         38400 |
@@ -477,7 +478,7 @@ A T35 FPGA Z80 based S100 SBC
 * Creator: John Monahan
 * Website: [S100 Computers FPGA Z80 SBC](http://www.s100computers.com/My%20System%20Pages/FPGA%20Z80%20SBC/FPGA%20Z80%20SBC.htm)
 
-#### ROM Image File:  SZ80_t35.rom
+#### ROM Image File:  SZ80_t35_std.rom
 
 |                   |               |
 |-------------------|---------------|
@@ -527,7 +528,7 @@ A T35 FPGA Z80 based S100 SBC
   See website for dip switch settings.
 
 - RomWBW is loaded by the S100 monitor from either CF Card or SD Card.
-  The CF/SD Card should be imaged using SZ80_t35_hd1k_combo.img which
+  The CF/SD Card should be imaged using SZ80_t35_std_hd1k_combo.img which
   includes RomWBW.
 
 `\clearpage`{=latex}
@@ -973,6 +974,59 @@ This is a variant of the N8 computer.
 
 ## RCBus Z80
 
+The RC2014 ROM is for the official RC2014 Kits by Spencer Owen.
+
+* Creator: Spencer Owen
+* Google Groups: [RC2014-Z80](https://groups.google.com/g/rc2014-z80)
+* Github: [RC2014](https://github.com/RC2014Z80/RC2014)
+
+### RC2014 Z80 CPU Module
+
+Generic Rom Image.
+
+#### ROM Image File:  RC2014_std.rom
+
+|                   |               |
+|-------------------|---------------|
+| Bus               | RCBus         |
+| Default CPU Speed | 7.372 MHz     |
+| Interrupts        | Mode 1        |
+| System Timer      | None          |
+| Serial Default    | 115200 Baud   |
+| Memory Manager    | Z2            |
+| ROM Size          | 512 KB        |
+| RAM Size          | 512 KB        |
+
+#### Supported Hardware
+
+- FP: LEDIO=0, SWIO=0
+- LCD: IO=218, SIZE=20X4
+- DSRTC: MODE=STD, IO=192
+- UART: IO=128
+- UART: IO=136
+- UART: IO=160
+- UART: IO=168
+- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED
+- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
+- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
+- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
+- ACIA: IO=128, INTERRUPTS ENABLED
+- CH: IO=62
+- CH: IO=60
+- CHUSB: IO=62
+- CHUSB: IO=60
+- MD: TYPE=RAM
+- MD: TYPE=ROM
+- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
+- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
+- IDE: MODE=RC, IO=16, MASTER
+- IDE: MODE=RC, IO=16, SLAVE
+- PPIDE: IO=32, MASTER
+- PPIDE: IO=32, SLAVE
+- SD: MODE=PIO, IO=105, UNITS=1
+
+`\clearpage`{=latex}
+
 ### RCBus Z80 CPU Module
 
 Generic Rom Image.
@@ -2562,6 +2616,7 @@ Note:
 | KIO       | Zilog Serial/ Parallel Counter/Timer (Z84C90)          |
 | PPP       | ParPortProp Host Interface Controller                  |
 | PRP       | PropIO Host Interface Controller                       |
+| SCTIM     | SC737 50Hz System Timer                                |
 
 # UNA Hardware BIOS
 

Source/Doc/SystemGuide.md

@@ -2987,7 +2987,7 @@ HBIOS result code.
 
 This function returns information about the active CPU environment. The 
 Z80 CPU Variant (H) will be one of: 0=Z80, 1=Z180, 2=Z180-K, 3=Z180-N, 
-4=Z280.  The current CPU speed is provided as both CPU Speed MHz (L) and
+4=Z280, 5=eZ80.  The current CPU speed is provided as both CPU Speed MHz (L) and
 CPU Speed KHz (DE).  The raw oscillator speed is provided as Oscillator
 Speed KHz (BC).  The returned Status (A) is a standard HBIOS result 
 code.
@@ -3150,6 +3150,9 @@ performed.  It includes the Boot Bank ID (L), the Boot Disk Unit (D),
 and the Boot Disk Slice (E).  The returned Status (A) is a standard 
 HBIOS result code.
 
+This information is recorded in the HCB.  HCB_BOOTBID is set to the Boot
+Bank ID (L) and HCB_BOOTVOL is set to the BootDisk Unit/Slice (DE).
+
 #### SYSSET Subfunction 0xF3 -- Set CPU Speed (CPUSPD)
 
 | **Entry Parameters**                   | **Returned Values**                    |

Source/HBIOS/Build.cmd

@@ -235,8 +235,9 @@ call Build ZETA2 std || exit /b
 call Build N8 std || exit /b
 call Build N8PC std || exit /b
 call Build MK4 std || exit /b
-call Build RCZ80 std || exit /b
+call Build RC2014 std || exit /b
 call Build RCEZ80 std || exit /b
+call Build RCZ80 std || exit /b
 call Build RCZ80 kio_std || exit /b
 call Build EZZ80 easy_std || exit /b
 call Build EZZ80 tiny_std || exit /b
@@ -271,7 +272,7 @@ call Build EPITX std || exit /b
 :: call Build MON std || exit /b
 call Build NABU std || exit /b
 call Build SZ80 std || exit /b
-call Build SZ80 t35 || exit /b
+call Build SZ80 t35_std || exit /b
 call Build UNA std || exit /b
 call Build MSX std || exit /b
 

Source/HBIOS/Build.ps1

@@ -27,7 +27,7 @@ $ErrorAction = 'Stop'
 # UNA BIOS is simply imbedded, it is not built here.
 #
 
-$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "SZ80", "RCEZ80", "MSX"
+$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RC2014", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "SZ80", "RCEZ80", "MSX"
 $PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "SZ180", "EPITX", "GMZ180","N8PC"
 $PlatformListZ280 = "RCZ280"
 

Source/HBIOS/Build.sh

@@ -19,6 +19,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="N8"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="N8PC"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="MK4"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="RC2014"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="RCEZ80"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="kio_std"; bash Build.sh
@@ -55,7 +56,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 #	ROM_PLATFORM="MON"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="NABU"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SZ80"; ROM_CONFIG="std"; bash Build.sh
-	ROM_PLATFORM="SZ80"; ROM_CONFIG="t35"; bash Build.sh
+	ROM_PLATFORM="SZ80"; ROM_CONFIG="t35_std"; bash Build.sh
 	ROM_PLATFORM="MSX"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
 	exit

Source/HBIOS/Config/DUO_std.asm

@@ -59,6 +59,8 @@ INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
+CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+;
 PCFENABLE	.SET	TRUE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -82,6 +84,8 @@ PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 ;
 CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
 ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/EPITX_std.asm

@@ -76,6 +76,7 @@ IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/EZZ80_easy_std.asm

@@ -56,9 +56,6 @@ CPUOSC		.SET	10000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
-CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
-CTCMODE		.SET	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
-CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
 WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
@@ -68,21 +65,19 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
-SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.SET	1843200		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCLK	.SET	1843200		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACLK	.SET	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCLK	.SET	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
@@ -114,5 +109,5 @@ SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/EZZ80_tiny_std.asm

@@ -57,12 +57,8 @@ INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCBASE		.SET	$10		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
-CTCMODE		.SET	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
-CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
 EIPCENABLE	.SET	TRUE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
-WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
@@ -73,7 +69,6 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
@@ -84,11 +79,9 @@ SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	$18		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.SET	1843200		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCLK	.SET	1843200		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACLK	.SET	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCLK	.SET	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
@@ -121,5 +114,5 @@ SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/GMZ180_std.asm

@@ -71,7 +71,7 @@ ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
@@ -82,10 +82,8 @@ FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]

Source/HBIOS/Config/HEATH_std.asm

@@ -53,12 +53,14 @@ AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 ;
 CPUOSC		.SET	16384000	; CPU OSC FREQ IN MHZ
 ;
+H8PENABLE	.SET	TRUE		; ENABLES HEATH H8 FRONT PANEL
+;
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ;
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 ;
@@ -70,4 +72,4 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]

Source/HBIOS/Config/MBC_std.asm

@@ -59,6 +59,10 @@ INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
+CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+;
+LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
+;
 DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
 ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
 PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
@@ -66,9 +70,15 @@ PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 ;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+CVDUENABLE	.SET	TRUE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
+TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 ;
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
@@ -80,6 +90,10 @@ PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
 ESPENABLE	.SET	TRUE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)

Source/HBIOS/Config/MK4_std.asm

@@ -83,6 +83,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	TRUE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;

Source/HBIOS/Config/N8PC_std.asm

@@ -85,9 +85,10 @@ PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-
-
-DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
+;
+DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.SET	N8_PPI0		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	1000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+;
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES

Source/HBIOS/Config/N8_std.asm

@@ -47,6 +47,8 @@
 ;
 #INCLUDE "cfg_N8.asm"
 ;
+BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+;
 BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
 AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
@@ -72,15 +74,19 @@ INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
+VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
+VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
-;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 ;

Source/HBIOS/Config/RC2014_std.asm

@@ -0,0 +1,116 @@
+;
+;==================================================================================================
+;   ROMWBW DEFAULT BUILD SETTINGS FOR RC2014 Z80
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE.  THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS
+; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.
+;
+; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE
+; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE).
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
+;
+#INCLUDE "cfg_RC2014.asm"
+;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	TRUE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
+CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
+;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
+TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE	.SET	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
+AY_FORCE	.SET	TRUE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCEZ80_std.asm

@@ -47,31 +47,31 @@
 ;
 #INCLUDE "cfg_RCEZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	20000000	; CPU OSC FREQ IN MHZ
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
-;;
+;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
-TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
-EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-;
 CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
 CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
 CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
@@ -83,12 +83,22 @@ PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	TRUE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 
 EZ80TIMER	.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]

Source/HBIOS/Config/RCZ180_ext_std.asm

@@ -66,20 +66,20 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -104,8 +104,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ180_nat_std.asm

@@ -66,20 +66,20 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -104,8 +104,14 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ180_z1rcc_std.asm

@@ -70,20 +70,20 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
 MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
@@ -111,8 +111,14 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ280_ext_std.asm

@@ -63,22 +63,20 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
-ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
@@ -106,8 +104,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ280_nat_std.asm

@@ -63,22 +63,20 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
@@ -106,8 +104,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ280_zz80mb_std.asm

@@ -66,23 +66,21 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 Z2U0HFC		.SET	TRUE		; Z2U 0: ENABLE HARDWARE FLOW CONTROL
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
@@ -96,7 +94,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
@@ -110,8 +108,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm

@@ -69,12 +69,11 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
@@ -82,11 +81,10 @@ UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 Z2UOSC		.SET	(CPUOSC / 16)	; Z2U: OSC FREQUENCY IN MHZ
 Z2U0HFC		.SET	TRUE		; Z2U0: ENABLE HARDWARE FLOW CONTROL
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
@@ -103,7 +101,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
@@ -117,8 +115,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ280_zzrcc_std.asm

@@ -69,12 +69,11 @@ Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
@@ -82,11 +81,10 @@ UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 Z2UOSC		.SET	(CPUOSC / 16)	; Z2U: OSC FREQUENCY IN MHZ
 Z2U0HFC		.SET	TRUE		; Z2U0: ENABLE HARDWARE FLOW CONTROL
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
@@ -103,7 +101,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
@@ -117,8 +115,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_coleco_std.asm

@@ -67,25 +67,71 @@
 ;
 #INCLUDE "Config/RCZ80_std.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	3686400		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_COLECO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_COLECO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 ;
-PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
 ;
 SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_ez512_std.asm

@@ -42,7 +42,7 @@
 ; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
-#DEFINE PLATFORM_NAME "EaZy80-512", " [", CONFIG, "]"
+#DEFINE PLATFORM_NAME "EaZy80-512", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
@@ -55,65 +55,48 @@ AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
-KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
-KIOBASE		.SET	$00		; KIO BASE I/O ADDRESS
-CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
-CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
-CTCOSC		.SET	1843200		; CTC CLOCK FREQUENCY
-;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_EZ512	; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
 ;
-FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
+KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.SET	$00		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
+CTCOSC		.SET	1843200		; CTC CLOCK FREQUENCY
+;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-;
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	KIOBASE+$08	; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.SET	CTCOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCLK	.SET	CTCOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
 ;
-IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-;
-PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
-;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_EZ512	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
-CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
-LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-;
-PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
-IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
-SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
-;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_k80w_std.asm

@@ -42,32 +42,85 @@
 ; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
+#DEFINE PLATFORM_NAME	"K80W", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
-#INCLUDE "Config/RCZ80_std.asm"
+#INCLUDE "cfg_RCZ80.asm"
 ;
-INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 ;
 CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
+INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
+;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
 CTCOSC		.SET	1843200		; CTC CLOCK FREQUENCY
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_K80W	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	KIOBASE+$08	; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.SET	CTCOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCLK	.SET	CTCOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
+TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_K80W	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_kio_std.asm

@@ -45,19 +45,34 @@
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
-#INCLUDE "Config/RCZ80_std.asm"
+#INCLUDE "cfg_RCZ80.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
+CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
+;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	KIOBASE+$08	; SIO 0: REGISTERS BASE ADR
@@ -65,3 +80,49 @@ SIO0ACLK	.SET	1843200		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372
 SIO0ACTCC	.SET	0		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.SET	1843200		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCTCC	.SET	1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
+TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_skz_std.asm

@@ -55,6 +55,7 @@ CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 SKZENABLE	.SET	TRUE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_12		; UART CLK (CLK2) DIVIDER FOR Z80-512K
@@ -69,7 +70,6 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
@@ -78,13 +78,15 @@ ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIO0BCLK	.SET	CPUOSC / 12	; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.SET	SER_38400_8N1	; SIO 0B: SERIAL LINE CONFIG
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -109,8 +111,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_std.asm

@@ -55,6 +55,7 @@ CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
@@ -63,13 +64,13 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
@@ -77,6 +78,7 @@ TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -92,10 +94,6 @@ SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
-CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
-CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
-CHUFIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
-CHNATIVEFORCE	.SET	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
@@ -105,8 +103,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_zrc512_std.asm

@@ -43,7 +43,6 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "ZRC512", " [", CONFIG, "]"
-;
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
@@ -57,6 +56,7 @@ CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -69,20 +69,21 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
 ;
@@ -109,8 +110,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_zrc_ram_std.asm

@@ -43,7 +43,6 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "ZRC", " [", CONFIG, "]"
-;
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
@@ -57,6 +56,7 @@ CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -69,20 +69,21 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
 ;
@@ -109,8 +110,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RCZ80_zrc_std.asm

@@ -43,7 +43,6 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE PLATFORM_NAME "ZRC", " [", CONFIG, "]"
-;
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
@@ -57,6 +56,7 @@ CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 RAMSIZE		.SET	1536		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@@ -69,20 +69,21 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
-RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -107,8 +108,16 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/RPH_std.asm

@@ -61,4 +61,6 @@ Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc126_std.asm

@@ -72,14 +72,15 @@ INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -91,6 +92,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
@@ -103,8 +105,14 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SCZ180_sc130_std.asm

@@ -72,14 +72,15 @@ INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -91,6 +92,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
@@ -103,8 +105,14 @@ PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SCZ180_sc131_std.asm

@@ -67,17 +67,8 @@ LEDMODE		.SET	LEDMODE_SC	; LEDMODE_[STD|SC|RTC|NABU]
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
-DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
-DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
-IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT

Source/HBIOS/Config/SCZ180_sc140_std.asm

@@ -49,6 +49,10 @@
 ;
 #INCLUDE "cfg_SCZ180.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -59,33 +63,16 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$A0		; FP: PORT ADDRESS FOR FP LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 FPSW_IO		.SET	$A0		; FP: PORT ADDRESS FOR FP SWITCHES
-;
 LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
 ;
-LCDENABLE	.SET	FALSE		; DISABLE LCD DISPLAY
-;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
-FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
-;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
-;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
-;
-PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_LINC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
-AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY

Source/HBIOS/Config/SCZ180_sc503_std.asm

@@ -49,6 +49,10 @@
 ;
 #INCLUDE "cfg_SCZ180.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -59,34 +63,16 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$A0		; FP: PORT ADDRESS FOR FP LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 FPSW_IO		.SET	$A0		; FP: PORT ADDRESS FOR FP SWITCHES
-;
-LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
-;
-LCDENABLE	.SET	FALSE		; DISABLE LCD DISPLAY
+LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
-FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
-;
-;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
-;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-;
-PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-;
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_LINC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
-AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SCZ180_sc700_std.asm

@@ -49,6 +49,10 @@
 ;
 #INCLUDE "cfg_SCZ180.asm"
 ;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -56,37 +60,58 @@ Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
-VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
-TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
-SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT

Source/HBIOS/Config/SZ180_std.asm

@@ -57,6 +57,9 @@ Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	1		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	3		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$05		; FP: PORT ADDRESS FOR FP LEDS
+;
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 MMRTCENABLE	.SET	TRUE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 DS12RTCENABLE	.SET	TRUE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
@@ -83,4 +86,4 @@ ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
 ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
 ;
-SCSIENABLE	.SET	TRUE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
+SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)

Source/HBIOS/Config/SZ80_std.asm

@@ -73,4 +73,4 @@ ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
 ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
 ;
-SCSIENABLE	.SET	TRUE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
+SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)

Source/HBIOS/Config/SZ80_t35_std.asm

@@ -84,4 +84,4 @@ ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
 ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
 ;
-SCSIENABLE	.SET	TRUE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
+SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)

Source/HBIOS/Config/ZETA2_std.asm

@@ -52,9 +52,12 @@ BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
 AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 ;
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
-INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
+INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]

Source/HBIOS/Config/ZETA_std.asm

@@ -56,6 +56,8 @@ INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_ZETA	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]

Source/HBIOS/acia.asm

@@ -56,6 +56,24 @@ ACIA_ACIA       .EQU    1
 ;
 ACIA_RTSON      .EQU    %10111111       ; BIT MASK TO ASSERT RTS
 ACIA_RTSOFF     .EQU    %01000000       ; BIT MASK TO DEASSERT RTS
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE HEADER
+;--------------------------------------------------------------------------------------------------
+;
+ORG_ACIA	.EQU	$
+;
+	.DW	SIZ_ACIA		; MODULE SIZE
+	.DW	ACIA_INITPHASE		; ADR OF INIT PHASE HANDLER
+;
+ACIA_INITPHASE:
+	; INIT PHASE HANDLER, A=PHASE
+	CP	HB_PHASE_PREINIT	; PREINIT PHASE?
+	JP	Z,ACIA_PREINIT		; DO PREINIT
+	CP	HB_PHASE_INIT		; INIT PHASE?
+	JP	Z,ACIA_INIT		; DO INIT
+	RET				; DONE
+
 ;
 ;
 ;
@@ -743,3 +761,14 @@ ACIA1_CFG:
 #ENDIF
 ;
 ACIA_CFGCNT     .EQU    ($ - ACIA_CFG) / ACIA_CFGSIZ
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE TRAILER
+;--------------------------------------------------------------------------------------------------
+;
+END_ACIA	.EQU	$
+SIZ_ACIA	.EQU	END_ACIA - ORG_ACIA
+;	
+	MEMECHO	"ACIA occupies "
+	MEMECHO	SIZ_ACIA
+	MEMECHO	" bytes.\n"

Source/HBIOS/asci.asm

@@ -90,6 +90,23 @@ ASCI1_IVT	.EQU	IVT(INT_SER1)
 ;
 #ENDIF
 ;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE HEADER
+;--------------------------------------------------------------------------------------------------
+;
+ORG_ASCI	.EQU	$
+;
+	.DW	SIZ_ASCI		; MODULE SIZE
+	.DW	ASCI_INITPHASE		; ADR OF INIT PHASE HANDLER
+;
+ASCI_INITPHASE:
+	; INIT PHASE HANDLER, A=PHASE
+	CP	HB_PHASE_PREINIT	; PREINIT PHASE?
+	JP	Z,ASCI_PREINIT		; DO PREINIT
+	CP	HB_PHASE_INIT		; INIT PHASE?
+	JP	Z,ASCI_INIT		; DO INIT
+	RET				; DONE
+;
 ;
 ;
 ASCI_PREINIT:
@@ -899,3 +916,14 @@ ASCI1_CFG:
 #ENDIF
 ;
 ASCI_CFGCNT	.EQU	($ - ASCI_CFG) / ASCI_CFGSIZ
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE TRAILER
+;--------------------------------------------------------------------------------------------------
+;
+END_ASCI	.EQU	$
+SIZ_ASCI	.EQU	END_ASCI - ORG_ASCI
+;	
+	MEMECHO	"ASCI occupies "
+	MEMECHO	SIZ_ASCI
+	MEMECHO	" bytes.\n"

Source/HBIOS/ay38910.asm

@@ -47,12 +47,20 @@ AY_RIN		.EQU	AY_RSEL
 AY_ACR		.EQU	N8_ACR
 		DEVECHO	"N8"
 #ENDIF
+
+#IF (AYMODE == AYMODE_N8PC)
+AY_RSEL		.EQU	$A0
+AY_RDAT		.EQU	$A1
+AY_RIN		.EQU	AY_RSEL
+AY_ACR		.EQU	N8_ACR
+		DEVECHO	"N8PC"
+#ENDIF
 ;
-#IF (AYMODE == AYMODE_RCZ80)
+#IF (AYMODE == AYMODE_RC2014)
 AY_RSEL		.EQU	$D8
 AY_RDAT		.EQU	$D0
 AY_RIN		.EQU	AY_RSEL+AY_RCSND
-		DEVECHO	"RCZ80"
+		DEVECHO	"RC2014"
 #ENDIF
 ;
 #IF (AYMODE == AYMODE_RCZ180)
@@ -69,6 +77,13 @@ AY_RIN		.EQU	$A2
 		DEVECHO	"MSX"
 #ENDIF
 ;
+#IF (AYMODE == AYMODE_COLECO)
+AY_RSEL		.EQU	$50
+AY_RDAT		.EQU	$51
+AY_RIN		.EQU	AY_RDAT
+		DEVECHO	"COLECO"
+#ENDIF
+;
 #IF (AYMODE == AYMODE_LINC)
 AY_RSEL		.EQU	$33
 AY_RDAT		.EQU	$32
@@ -114,6 +129,23 @@ AY_R3CHBP	.EQU	$03
 AY_R7ENAB	.EQU	$07
 AY_R8AVOL	.EQU	$08
 ;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE HEADER
+;--------------------------------------------------------------------------------------------------
+;
+ORG_AY	.EQU	$
+;
+	.DW	SIZ_AY			; MODULE SIZE
+	.DW	AY_INITPHASE		; ADR OF INIT PHASE HANDLER
+;
+AY_INITPHASE:
+	; INIT PHASE HANDLER, A=PHASE
+	;CP	HB_PHASE_PREINIT	; PREINIT PHASE?
+	;JP	Z,AY38910_PREINIT	; DO PREINIT
+	CP	HB_PHASE_INIT		; INIT PHASE?
+	JP	Z,AY38910_INIT		; DO INIT
+	RET				; DONE
+;
 ;======================================================================
 ;
 ;	DRIVER FUNCTION TABLE AND INSTANCE DATA
@@ -171,8 +203,12 @@ AY38910_INIT:
 	PRTS(" MODE=N8$")
 #ENDIF
 ;
-#IF (AYMODE == AYMODE_RCZ80)
-	PRTS(" MODE=RCZ80$")
+#IF (AYMODE == AYMODE_N8PC)
+	PRTS(" MODE=N8PC$")
+#ENDIF
+;
+#IF (AYMODE == AYMODE_RC2014)
+	PRTS(" MODE=RC2014$")
 #ENDIF
 ;
 #IF (AYMODE == AYMODE_RCZ180)
@@ -183,6 +219,10 @@ AY38910_INIT:
 	PRTS(" MODE=MSX$")
 #ENDIF
 ;
+#IF (AYMODE == AYMODE_COLECO)
+	PRTS(" MODE=COLECO$")
+#ENDIF
+;
 #IF (AYMODE == AYMODE_MBC)
 	PRTS(" MODE=MBC$")
 #ENDIF
@@ -199,7 +239,7 @@ AY38910_INIT:
 	LD	A,AY_RSEL
 	CALL	PRTHEXBYTE
 ;
-#IF ((AYMODE == AYMODE_SCG) | (AYMODE == AYMODE_N8) | (AYMODE == AYMODE_MBC))
+#IF ((AYMODE == AYMODE_SCG) | (AYMODE == AYMODE_N8) | (AYMODE == AYMODE_MBC) | (AYMODE == AYMODE_N8PC))
 	LD	A,$FF			; ACTIVATE DEVICE BIT 4 IS AY RESET CONTROL, BIT 3 IS ACTIVE LED
 	OUT	(AY_ACR),A		; SET INIT AUX CONTROL REG
 #ENDIF
@@ -635,3 +675,14 @@ AY3NOTETBL:
 	.DW	AY_RATIO / 5579		;
 	.DW	AY_RATIO / 5661		;
 	.DW	AY_RATIO / 5743		;
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE TRAILER
+;--------------------------------------------------------------------------------------------------
+;
+END_AY	.EQU	$
+SIZ_AY	.EQU	END_AY - ORG_AY
+;	
+	MEMECHO	"AY occupies "
+	MEMECHO	SIZ_AY
+	MEMECHO	" bytes.\n"

Source/HBIOS/bqrtc.asm

@@ -94,6 +94,23 @@ BQRTC_BUFSIZE	.EQU	6		; 6 BYTE BUFFER (YYMMDDHHMMSS)
 		DEVECHO	"BQRTC: IO="
 		DEVECHO	BQRTC_BASE
 		DEVECHO	"\n"
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE HEADER
+;--------------------------------------------------------------------------------------------------
+;
+ORG_BQRTC	.EQU	$
+;
+	.DW	SIZ_BQRTC		; MODULE SIZE
+	.DW	BQRTC_INITPHASE		; ADR OF INIT PHASE HANDLER
+;
+BQRTC_INITPHASE:
+	; INIT PHASE HANDLER, A=PHASE
+	;CP	HB_PHASE_PREINIT	; PREINIT PHASE?
+	;JP	Z,BQRTC_PREINIT		; DO PREINIT
+	CP	HB_PHASE_INIT		; INIT PHASE?
+	JP	Z,BQRTC_INIT		; DO INIT
+	RET				; DONE
 
 ; RTC Device Initialization Entry
 
@@ -395,3 +412,14 @@ BQRTC_BUF_DAY:	.DB	0		; Day
 BQRTC_BUF_HOUR:	.DB	0		; Hour
 BQRTC_BUF_MIN:	.DB	0		; Minute
 BQRTC_BUF_SEC:	.DB	0		; Second
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE TRAILER
+;--------------------------------------------------------------------------------------------------
+;
+END_BQRTC	.EQU	$
+SIZ_BQRTC	.EQU	END_BQRTC - ORG_BQRTC
+;	
+	MEMECHO	"BQRTC occupies "
+	MEMECHO	SIZ_BQRTC
+	MEMECHO	" bytes.\n"

Source/HBIOS/cfg_DUO.asm

@@ -45,12 +45,13 @@
 #DEFINE PLATFORM_NAME	"Duodyne", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS		; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -86,7 +87,7 @@ RTCIO		.SET	$94		; RTC LATCH REGISTER ADR
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$60		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
@@ -96,6 +97,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	(7372800/8)	; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 PCFBASE		.SET	$56		; PCF8584 BASE I/O ADDRESS
 PCFCLK		.SET	PCFCLK_12	; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
@@ -152,10 +155,8 @@ DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
 DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
-DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
 ;
 BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
-BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
 ;
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
@@ -247,7 +248,7 @@ CVDUMODE	.SET	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_DUO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_DUO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -256,6 +257,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -274,6 +276,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -345,7 +348,7 @@ PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.SET	$68		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.SET	$6C		; PIO 1: REGISTERS BASE ADR
 ;
-LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 LPTMODE		.SET	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
 LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -386,6 +389,8 @@ PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -394,7 +399,7 @@ SNMODE		.SET	SNMODE_DUO	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_DUO	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_DUO	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_DYNO.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -98,6 +99,8 @@ CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -263,7 +266,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -271,6 +274,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -289,6 +293,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -327,12 +332,6 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
-SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 ;
@@ -367,14 +366,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_EPITX.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_EPITX	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_EPITX	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -93,6 +94,8 @@ CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -259,7 +262,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -267,6 +270,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -285,6 +291,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -393,14 +400,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_EZZ80.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -89,12 +90,15 @@ KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
-CTCMODE		.SET	CTCMODE_TIM16	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.SET	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
 CTCPRE		.SET	256		; PRESCALE CONSTANT (1-256)
 CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
-CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
+CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+SCTIMIO		.SET	$0F		; SC737: PORT ADDRESS
 ;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
@@ -103,7 +107,7 @@ EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 ;
-WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+WDOGMODE	.SET	WDOG_EZZ80	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
@@ -118,7 +122,7 @@ DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
+LEDPORT		.SET	$6E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
@@ -146,7 +150,7 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
@@ -241,14 +245,14 @@ ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
 SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
-SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
-SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
-SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACLK	.SET	1843200		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
 SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCLK	.SET	1843200		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
@@ -261,6 +265,27 @@ SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	TRUE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	TRUE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	CPUOSC		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	CPUOSC		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	CPUOSC		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	CPUOSC		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
@@ -268,7 +293,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -276,6 +301,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -294,6 +322,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -334,7 +363,7 @@ PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
@@ -352,6 +381,9 @@ CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
 CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.SET	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
@@ -402,14 +434,24 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_GMZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_GMZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_GMZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -92,6 +93,8 @@ CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -258,7 +261,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -266,6 +269,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -284,6 +288,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_GIDE	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -392,14 +397,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
-SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_HEATH.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_HEATH	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_HEATH	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -96,6 +97,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -104,22 +107,13 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 ;
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
-WDOGIO		.SET	$6E		; WATCHDOG REGISTER ADR
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 DSKYDSKACT	.SET	FALSE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
@@ -128,7 +122,7 @@ ICMPPIBASE	.SET	$60		; BASE I/O ADDRESS OF ICM PPI
 PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
-H8PENABLE	.SET	TRUE		; ENABLES HEATH H8 FRONT PANEL
+H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
 LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
@@ -164,7 +158,6 @@ HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
 SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
 ;
 DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
-DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
@@ -177,27 +170,12 @@ DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
-SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
-SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
-SSERDATA	.SET	$FF		; SSER: DATA PORT
-SSERIRDY	.SET	%00000001	; SSER: INPUT READY BIT MASK
-SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
-SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
-SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
 DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
-TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-DUARTCNT	.SET	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
-DUART0BASE	.SET	$A0		; DUART 0: BASE ADDRESS OF CHIP
-DUART0ACFG	.SET	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
-DUART0BCFG	.SET	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
-DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
-DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
-DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
@@ -227,38 +205,8 @@ ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
-ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
-ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
-ACIA0CLK	.SET	CPUOSC		; ACIA 0: OSC FREQ IN HZ
-ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
-ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
-ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
-ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
-ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
-ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
 ;
 SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
-SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
-SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
-SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
-SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
-SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
-SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
-SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
-SIO1ACLK	.SET	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
-SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1BCLK	.SET	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
-SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
@@ -268,7 +216,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -276,6 +224,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -283,7 +232,7 @@ MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
@@ -294,28 +243,8 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
-IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]]
-IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
-IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
-IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
-IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
-IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
-IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
-IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
-IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
-IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
-IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
-IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
-IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
-IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
 PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
@@ -332,12 +261,6 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
-SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 ;
@@ -350,37 +273,14 @@ ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
-PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
-PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.SET	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
-LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
-LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
-LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
 PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
-PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
-PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
-PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
-PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
-IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
-IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
-IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
-IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
-SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
-SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
-SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
-SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 ;
@@ -392,20 +292,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
-SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
-DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.SET	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
 YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
-VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_MASTER.asm

@@ -49,8 +49,10 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_NONE	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.EQU	PLT_NONE	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.EQU	CPU_NONE	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.EQU	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
+TURBOZ80DISPRT	.EQU	$00		; DUMMY I/O PORT ADDRESS TO READ FROM, TO DISABLE TURBO BOOST FOR NEXT 31 CLOCK TICKS
 NMOSCPU		.EQU	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.EQU	BIOS_NONE	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -128,6 +130,9 @@ CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
 CTCOSC		.EQU	614400		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.EQU	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+SCTIMIO		.EQU	$0F		; SC737: PORT ADDRESS
+;
 PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
 PCFCLK		.EQU	PCFCLK_12	; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
@@ -319,6 +324,7 @@ SCCDEBUG	.EQU	FALSE		; SCC: ENABLE DEBUG OUTPUT
 SCCBOOT		.EQU	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
 SCCCNT		.EQU	2		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SCCINTS		.EQU	FALSE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.EQU	FALSE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
 SCC0MODE	.EQU	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
 SCC0BASE	.EQU	$FF		; SCC 0: REGISTERS BASE ADR
 SCC0ACLK	.EQU	4915200		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
@@ -347,7 +353,7 @@ GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 GDCMODE		.EQU	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
 GDCMON		.EQU	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.EQU	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -357,7 +363,7 @@ SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.EQU	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.EQU	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
 XOSENABLE	.EQU	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
-XOS_BASE	.EQU	$20		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOS_BASE	.EQU	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
 XOSSIZ		.EQU	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
@@ -410,7 +416,7 @@ PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 PPIDE1MODE	.EQU	PPIDEMODE_NONE	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
-PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 1B (SLAVE): 8 BIT XFER
 PPIDE2MODE	.EQU	PPIDEMODE_NONE	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
@@ -497,10 +503,15 @@ ESPSD1DUAL	.EQU	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
 ;
 SCSIENABLE	.EQU	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
 SCSITRACE	.EQU	1		; SCSI: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SCSICNT		.EQU	2		; SCSI: NUMBER OF TARGET DEVICES (1-2)
-SCSI_TID	.EQU	0		; SCSI: TARGET DEVICE ID (0-6)
-SCSI0_LUN	.EQU	0		; SCSI 0: TARGET LUN
-SCSI1_LUN	.EQU	1		; SCSI 1: TARGET LUN
+SCSICNT		.EQU	1		; SCSI: NUMBER OF TARGET DEVICES (1-4)
+SCSI0_TGT	.EQU	0		; SCSI 0: TARGET DEVICE ID (0-6)
+SCSI0_LUN	.EQU	0		; SCSI 0: TARGET LUN (0-7)
+SCSI1_TGT	.EQU	1		; SCSI 1: TARGET DEVICE ID (0-6)
+SCSI1_LUN	.EQU	0		; SCSI 1: TARGET LUN (0-7)
+SCSI2_TGT	.EQU	2		; SCSI 2: TARGET DEVICE ID (0-6)
+SCSI2_LUN	.EQU	0		; SCSI 2: TARGET LUN (0-7)
+SCSI3_TGT	.EQU	3		; SCSI 3: TARGET DEVICE ID (0-6)
+SCSI3_LUN	.EQU	0		; SCSI 3: TARGET LUN (0-7)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
@@ -512,6 +523,15 @@ PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
+CHNATIVEENABLE		.EQU	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.EQU	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.EQU	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.EQU	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.EQU	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.EQU	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.EQU	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.EQU	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.EQU	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -520,7 +540,7 @@ SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.EQU	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -564,13 +584,3 @@ EZ80_WSMD_TYP	.EQU	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
 EZ80_FLSH_WS		.EQU	1		; WAIT STATES FOR ON CHIP FLASH (0-7)
 EZ80_FLSH_MIN_NS	.EQU	60		; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
 EZ80_FWSMD_TYP		.EQU	EZ80WSMD_CALC	; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)
-
-CHNATIVEENABLE	.EQU	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
-CHSCSIENABLE	.EQU	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
-CHUFIENABLE	.EQU	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
-CHNATIVEFORCE	.EQU	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
-CHNATIVEEZ80	.EQU	FALSE		; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
-
-_CH376_DATA_PORT	.EQU	$FF88	; CH376: DATA PORT
-_CH376_COMMAND_PORT	.EQU	$FF89	; CH376: COMMAND PORT
-_USB_MODULE_LEDS	.EQU	$FF8A	; CH376: LED CONTROL PORT

Source/HBIOS/cfg_MBC.asm

@@ -45,12 +45,13 @@
 #DEFINE PLATFORM_NAME	"Nhyodyne", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS		; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -83,7 +84,7 @@ RTCIO		.SET	$70		; RTC LATCH REGISTER ADR
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
@@ -93,6 +94,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	(4915200/8)	; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -111,7 +114,7 @@ FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
-LEDENABLE	.SET	TRUE		; ENABLES STATUS LED (SINGLE LED)
+LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.SET	LEDMODE_RTC	; LEDMODE_[STD|SC|RTC|NABU]
 LEDPORT		.SET	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
@@ -139,16 +142,15 @@ KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPKKBLOUT	.SET	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
 DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
-DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
 ;
 BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
-BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
 ;
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
@@ -158,7 +160,6 @@ HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
 SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
 ;
 DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
-DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
@@ -186,7 +187,7 @@ TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	3		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -215,7 +216,7 @@ Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -235,12 +236,12 @@ XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 VDUSIZ		.SET	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
-CVDUENABLE	.SET	TRUE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.SET	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
-TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -249,6 +250,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -265,9 +267,9 @@ FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
-RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -326,9 +328,8 @@ ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 ESPCONENABLE	.SET	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
 ;
 HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
-HDSKTRACE	.SET	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
-PIOENABLE	.SET	TRUE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
@@ -373,16 +374,18 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
-UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
+;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 ;
 SPKENABLE	.SET	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 SPKPORT		.SET	RTCIO		; SPK: THE PORT WITH THE SPEAKER IO BIT

Source/HBIOS/cfg_MK4.asm

@@ -45,12 +45,13 @@
 #DEFINE PLATFORM_NAME	"Mark IV", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS		; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -91,12 +92,10 @@ MK4_RTC		.SET	$8A		; MK4: RTC LATCH REGISTER ADR
 RTCIO		.SET	MK4_RTC		; RTC LATCH REGISTER ADR
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
-KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
-CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.SET	$B0		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
@@ -107,19 +106,10 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
-FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
@@ -130,7 +120,6 @@ PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
 LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
-LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
 BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
@@ -146,15 +135,13 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
 DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
-DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
 ;
 BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
-BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
 ;
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
@@ -192,7 +179,7 @@ TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	6		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -215,7 +202,7 @@ UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
 UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
 UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
 ;
-ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.SET	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.SET	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.SET	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
@@ -251,7 +238,7 @@ CVDUMODE	.SET	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.SET	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -260,6 +247,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -278,7 +266,8 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
 ;
-IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_MK4	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -316,7 +305,7 @@ PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
-SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
@@ -368,6 +357,8 @@ PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -376,7 +367,7 @@ SNMODE		.SET	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_MON.asm

@@ -51,8 +51,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_MON		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_MON		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -93,6 +94,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -265,7 +268,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -273,6 +276,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -291,6 +295,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -329,12 +334,6 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
-SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -399,14 +398,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_MSX.asm

@@ -51,6 +51,7 @@
 ;
 PLATFORM	.SET	PLT_MSX		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80|MSX|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	TRUE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -96,10 +97,9 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
-PCFBASE		.SET	$F0		; PCF8584 BASE I/O ADDRESS
-PCFCLK		.SET	PCFCLK_8	; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
-PCFTRNS		.SET	PCFTRNS_90	; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15]
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
@@ -271,7 +271,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSXMKY	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSXMKY	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9938/V9958
 TMSTIMENABLE	.SET	TRUE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -279,6 +279,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
@@ -336,12 +337,6 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
-SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -406,14 +401,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_N8.asm

@@ -45,12 +45,13 @@
 #DEFINE PLATFORM_NAME	"RetroBrew N8", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS		; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -93,12 +94,10 @@ N8_DEFACR	.SET	$1B		; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
 RTCIO		.SET	N8_RTC		; RTC LATCH REGISTER ADR
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
-KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
-CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.SET	$B0		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
@@ -109,19 +108,10 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
-FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_RTC	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	RTCIO		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
@@ -132,7 +122,6 @@ PKDPPIBASE	.SET	N8_PPI0		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
 LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
-LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
 BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
@@ -168,6 +157,8 @@ SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
 DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
 DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
+DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+;
 PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
 ;
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
@@ -176,8 +167,6 @@ DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
 M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
-DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
-;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
@@ -217,7 +206,7 @@ UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
 UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
 UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
 ;
-ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.SET	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.SET	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.SET	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
@@ -252,8 +241,8 @@ CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.SET	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.SET	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
-TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -262,6 +251,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -269,7 +259,7 @@ MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_N8	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
@@ -281,6 +271,7 @@ RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -318,7 +309,7 @@ PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
-SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	N8_PPI0		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
@@ -370,6 +361,8 @@ PIOSBASE	.SET	N8_PPI0		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -378,7 +371,7 @@ SNMODE		.SET	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_N8PC.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_N8PC	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_N8PC	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -98,6 +99,8 @@ CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -110,9 +113,9 @@ FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
 FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.SET	$88		; FP: PORT ADDRESS FOR FP SWITCHES
+FPSW_INV	.SET	TRUE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
@@ -175,7 +178,7 @@ MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
 M6242RTCENABLE	.SET	TRUE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
-M6242RTC_BASE	.SET	$A0		; M6242RTC: I/O BASE ADDRESS
+M6242RTC_BASE	.SET	$B0		; M6242RTC: I/O BASE ADDRESS
 ;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
@@ -252,7 +255,7 @@ CVDUMODE	.SET	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.SET	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_N8PC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_N8PC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -261,6 +264,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -280,6 +284,7 @@ RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -369,6 +374,8 @@ PIOSBASE	.SET	N8_PPI0		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -377,7 +384,7 @@ SNMODE		.SET	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	3579545		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_N8PC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_NABU.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_NABU	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_NABU	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -96,6 +97,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -104,15 +107,9 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 ;
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
-WDOGIO		.SET	$6E		; WATCHDOG REGISTER ADR
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
@@ -164,7 +161,6 @@ HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
 SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
 ;
 DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
-DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
 DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
@@ -177,29 +173,14 @@ DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
-SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
-SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
-SSERDATA	.SET	$FF		; SSER: DATA PORT
-SSERIRDY	.SET	%00000001	; SSER: INPUT READY BIT MASK
-SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
-SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
-SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
 DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
-TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
 ;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
-DUARTCNT	.SET	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
-DUART0BASE	.SET	$A0		; DUART 0: BASE ADDRESS OF CHIP
-DUART0ACFG	.SET	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
-DUART0BCFG	.SET	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
-DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
-DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
-DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	1		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -227,38 +208,8 @@ ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
-ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
-ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
-ACIA0CLK	.SET	CPUOSC		; ACIA 0: OSC FREQ IN HZ
-ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
-ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
-ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
-ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
-ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
-ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
 ;
 SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
-SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
-SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
-SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
-SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
-SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
-SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
-SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
-SIO1ACLK	.SET	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
-SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO1BCLK	.SET	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
-SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 ;
@@ -268,7 +219,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_NABU	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_NABU	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	TRUE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -276,6 +227,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -284,38 +236,12 @@ MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
-FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
-FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMAUTO		.SET	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
-FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
-FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
-IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
-IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
-IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
-IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
-IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
-IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
-IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
-IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
-IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
-IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
-IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
-IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
-IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
 PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
@@ -332,24 +258,8 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
-SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
-CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-CHCNT		.SET	2		; CH: NUMBER OF BOARDS TO DETECT (1-2)
-CH0BASE		.SET	$3E		; CH 0: BASE I/O ADDRESS
-CH0USBENABLE	.SET	TRUE		; CH 0: ENABLE USB DISK
-CH0SDENABLE	.SET	FALSE		; CH 0: ENABLE SD DISK
-CH1BASE		.SET	$3C		; CH 1: BASE I/O ADDRESS
-CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
-CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
@@ -360,37 +270,14 @@ ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
-PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
-PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.SET	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
-LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
-LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
-LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
 PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
-PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
-PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
-PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
-PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
-IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
-IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
-IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
-IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
-SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
-SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
-SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
-SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 ;
@@ -402,21 +289,17 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
-AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
-SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_NABU	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_NABU	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
-DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.SET	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
 YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
-VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_RC2014.asm

@@ -0,0 +1,441 @@
+;
+;==================================================================================================
+;   ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: RC2014
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD,
+; YOU SHOULD OVERRIDE SETTINGS YOU WANT USING A CONFIGURATION FILE IN
+; THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
+;
+; THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.  IT IS MAINTAINED BY THE
+; AUTHORS OF ROMWBW.  TO OVERRIDE SETTINGS YOU SHOULD USE A
+; CONFIGURATION FILE IN THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.  TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE PLATFORM_NAME	"RC2014", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
+;
+#INCLUDE "cfg_MASTER.asm"
+;
+PLATFORM	.SET	PLT_RC2014	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC
+CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
+BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.SET	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.SET	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.SET	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+BT_REC_TYPE	.SET	BT_REC_NONE	; BOOT RECOVERY METHOD TO USE: BT_REC_[NONE|FORCE|SBCB0|SBC1B|SBCRI|DUORI]
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+STRICTPART	.SET	TRUE		; ENFORCE STRICT PARTITION TABLE VALIDATION
+;
+CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
+INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMFONTS	.SET	TRUE		; LOAD FONTS FROM ROM
+APP_BNKS	.SET	$FF		; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
+MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
+MPGSEL_0	.SET	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.SET	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.SET	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.SET	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.SET	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+RTCIO		.SET	$C0		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
+CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.SET	CTCMODE_TIM16	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.SET	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
+CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+SCTIMIO		.SET	$0F		; SC737: PORT ADDRESS
+;
+PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+;
+EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
+;
+WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
+;
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
+FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
+;
+DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
+LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.SET	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
+;
+BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
+SECCON		.SET	$FF		; SECONDARY CONSOLE DEVICE
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.SET	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.SET	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.SET	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.SET	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
+DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
+;
+DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+;
+MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
+;
+DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
+;
+M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+;
+SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
+SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
+SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
+SSERDATA	.SET	$FF		; SSER: DATA PORT
+SSERIRDY	.SET	%00000001	; SSER: INPUT READY BIT MASK
+SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
+SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
+SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
+;
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+;
+TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
+TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
+;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.SET	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.SET	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.SET	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.SET	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
+UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UART4UART	.SET	FALSE		; UART: SUPPORT 4UART ECB BOARD
+UART4UARTBASE	.SET	$C0		; UART: BASE IO ADDRESS OF 4UART ECB BOARD
+UART0BASE	.SET	$80		; UART 0: REGISTERS BASE ADR
+UART0CFG	.SET	DEFSERCFG	; UART 0: SERIAL LINE CONFIG
+UART1BASE	.SET	$88		; UART 1: REGISTERS BASE ADR
+UART1CFG	.SET	DEFSERCFG	; UART 1: SERIAL LINE CONFIG
+UART2BASE	.SET	$A0		; UART 2: REGISTERS BASE ADR
+UART2CFG	.SET	DEFSERCFG	; UART 2: SERIAL LINE CONFIG
+UART3BASE	.SET	$A8		; UART 3: REGISTERS BASE ADR
+UART3CFG	.SET	DEFSERCFG	; UART 3: SERIAL LINE CONFIG
+UART4BASE	.SET	$FF		; UART 4: REGISTERS BASE ADR
+UART4CFG	.SET	DEFSERCFG	; UART 4: SERIAL LINE CONFIG
+UART5BASE	.SET	$FF		; UART 5: REGISTERS BASE ADR
+UART5CFG	.SET	DEFSERCFG	; UART 5: SERIAL LINE CONFIG
+UART6BASE	.SET	$FF		; UART 6: REGISTERS BASE ADR
+UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
+UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
+UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
+;
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
+ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
+ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
+ACIA0CLK	.SET	CPUOSC		; ACIA 0: OSC FREQ IN HZ
+ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
+ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
+ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
+ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
+ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
+ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
+;
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
+SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.SET	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.SET	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+;
+XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
+TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+;
+MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.SET	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+;
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
+IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.SET	IDEMODE_RC	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$18		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.SET	IDEMODE_RC	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$20		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
+SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.SET	2		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.SET	$3E		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.SET	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.SET	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.SET	$3C		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.SET	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.SET	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
+LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
+SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
+;
+PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+;
+UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
+AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
+;
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
+;
+SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.SET	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
+;
+YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_RCEZ80.asm

@@ -42,15 +42,16 @@
 ; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
-#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
+#DEFINE PLATFORM_NAME	"RCBus", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCEZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_RCEZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_EZ80	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -60,6 +61,8 @@ TICKFREQ	.SET	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 BOOT_DELAY	.SET	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+BT_REC_TYPE	.SET	BT_REC_NONE	; BOOT RECOVERY METHOD TO USE: BT_REC_[NONE|FORCE|SBCB0|SBC1B|SBCRI|DUORI]
 AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
 STRICTPART	.SET	TRUE		; ENFORCE STRICT PARTITION TABLE VALIDATION
 ;
@@ -94,6 +97,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -259,6 +264,27 @@ SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	TRUE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	TRUE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	CPUOSC		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	CPUOSC		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	CPUOSC		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	CPUOSC		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
@@ -274,6 +300,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -292,6 +321,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -300,14 +330,14 @@ IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
 IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
 IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
 IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
+IDE1MODE	.SET	IDEMODE_RC	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$18		; IDE 1: IO BASE ADDRESS
 IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
 IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
 IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
 IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
+IDE2MODE	.SET	IDEMODE_RC	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$20		; IDE 2: IO BASE ADDRESS
 IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
 IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
 IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
@@ -330,14 +360,14 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
-CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -403,18 +433,27 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	TRUE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	CPUOSC/4	; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	CPUOSC/4	; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
-AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
@@ -425,36 +464,29 @@ VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
 ;
 ; EZ80 SETTINGS
 ;
-EZ80TMR_NONE	.SET	0		; DO NOT USE ON-BOARD TIMER TO GENERATE TICKS
-EZ80TMR_INT	.SET	1		; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
-EZ80TMR_FIRM	.SET	2		; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
+EZ80TMR_NONE		.SET	0		; DO NOT USE ON-BOARD TIMER TO GENERATE TICKS
+EZ80TMR_INT		.SET	1		; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
+EZ80TMR_FIRM		.SET	2		; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
 ;
-CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
-CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
-CHUFIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
-CHNATIVEFORCE	.SET	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
-CHNATIVEEZ80	.SET	TRUE		; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
-
-EZ80UARTENABLE	.SET	TRUE		; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
-EZ80RTCENABLE	.SET	TRUE		; EZ80 ON CHIP RTC
-EZ80TIMER	.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
-EZ80IOBASE	.SET	$FF		; EZ80 I/O BASE ADDRESS FOR EXTERNAL IO
+EZ80UARTENABLE		.SET	TRUE		; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
+EZ80RTCENABLE		.SET	TRUE		; EZ80 ON CHIP RTC
+EZ80TIMER		.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
+EZ80IOBASE		.SET	$FF		; EZ80 I/O BASE ADDRESS FOR EXTERNAL IO
 ;
 ; BUS TIMING FOR PAGED MEMORY ACCESS (CS3)
-EZ80_MEM_CYCLES	.SET	3		; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
-EZ80_MEM_MIN_NS	.SET	100		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-EZ80_MEM_MIN_BC	.SET	1		; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_MEM_CYCLES		.SET	3		; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
+EZ80_MEM_MIN_NS		.SET	100		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_MEM_MIN_BC		.SET	1		; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
 ;
 ; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2)
-EZ80_IO_CYCLES	.SET	4		; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
-EZ80_IO_MIN_NS	.SET	250		; CALCULATE AT BOOT TIME THE REQUIRED B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
-EZ80_IO_MIN_BC	.SET	4		; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_IO_CYCLES		.SET	4		; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
+EZ80_IO_MIN_NS		.SET	250		; CALCULATE AT BOOT TIME THE REQUIRED B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_IO_MIN_BC		.SET	4		; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
 ;
 ; APPLY BUS CYCLES OR CALCULATE CYCLES BASED ON DESIRED PERIOD
-EZ80_WSMD_TYP	.SET	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
+EZ80_WSMD_TYP		.SET	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
 ;
 ; BUS TIMING FOR ON CHIP ROM
-;
 EZ80_FLSH_WS		.SET	1		; WAIT STATES FOR ON CHIP FLASH (0-7)
 EZ80_FLSH_MIN_NS	.SET	60		; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
 EZ80_FWSMD_TYP		.SET	EZ80WSMD_CALC	; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)

Source/HBIOS/cfg_RCZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -94,9 +95,8 @@ KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
-CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
@@ -199,7 +199,7 @@ DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
 DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
 DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -256,6 +256,27 @@ SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	TRUE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	TRUE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	7372800		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	7372800		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	7372800		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	7372800		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
@@ -263,7 +284,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -271,6 +292,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -289,6 +313,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -297,14 +322,14 @@ IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
 IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
 IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
 IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
+IDE1MODE	.SET	IDEMODE_RC	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$18		; IDE 1: IO BASE ADDRESS
 IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
 IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
 IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
 IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
+IDE2MODE	.SET	IDEMODE_RC	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$20		; IDE 2: IO BASE ADDRESS
 IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
 IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
 IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
@@ -329,7 +354,7 @@ PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
@@ -366,7 +391,7 @@ LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 LPTMODE		.SET	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
 LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.SET	$0C		; LPT 0: REGISTERS BASE ADR
+LPT0BASE	.SET	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
 PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
@@ -400,14 +425,24 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_RCZ280.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -91,12 +92,10 @@ Z280_TIMER	.SET	TRUE		; Z280: ENABLE INTERNAL Z280 SYSTEM PERIODIC TIMER
 RTCIO		.SET	$C0		; RTC LATCH REGISTER ADR
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
-KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
-CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
@@ -106,7 +105,7 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
 FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
@@ -129,7 +128,7 @@ PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
@@ -146,7 +145,7 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
@@ -199,7 +198,7 @@ DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
 DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
 DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -231,19 +230,9 @@ Z2U0BASE	.SET	$10		; Z2U 0: BASE I/O ADDRESS
 Z2U0CFG		.SET	DEFSERCFG	; Z2U 0: SERIAL LINE CONFIG
 Z2U0HFC		.SET	FALSE		; Z2U 0: ENABLE HARDWARE FLOW CONTROL
 ;
-ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
-ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
-ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
-ACIA0CLK	.SET	7372800		; ACIA 0: OSC FREQ IN HZ
-ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
-ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
-ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
-ACIA1CLK	.SET	7372800		; ACIA 1: OSC FREQ IN HZ
-ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
-ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -266,6 +255,27 @@ SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	TRUE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	TRUE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	7372800		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	7372800		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	7372800		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	7372800		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
@@ -273,7 +283,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -281,6 +291,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -299,6 +312,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -307,14 +321,14 @@ IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
 IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
 IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
 IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
+IDE1MODE	.SET	IDEMODE_RC	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$18		; IDE 1: IO BASE ADDRESS
 IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
 IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
 IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
 IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
+IDE2MODE	.SET	IDEMODE_RC	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$20		; IDE 2: IO BASE ADDRESS
 IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
 IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
 IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
@@ -339,12 +353,12 @@ PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
-CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -410,14 +424,24 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_RCZ80.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC
+PLATFORM	.SET	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -96,10 +97,10 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+SCTIMIO		.SET	$0F		; SC737: PORT ADDRESS
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
-PCFBASE		.SET	$F0		; PCF8584 BASE I/O ADDRESS
-PCFCLK		.SET	PCFCLK_8	; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
-PCFTRNS		.SET	PCFTRNS_90	; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15]
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
@@ -264,6 +265,27 @@ SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	TRUE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	TRUE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	CPUOSC		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	CPUOSC		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	CPUOSC		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	CPUOSC		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
@@ -271,7 +293,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -279,6 +301,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -297,6 +322,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -337,7 +363,7 @@ PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
@@ -355,6 +381,9 @@ CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
 CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.SET	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
@@ -405,14 +434,24 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
 SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
 SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RC2014	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_RPH.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -98,6 +99,8 @@ CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -151,10 +154,8 @@ DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
 DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
-DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
 ;
 BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
-BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
 ;
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
@@ -215,7 +216,7 @@ UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
 UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
 UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
 ;
-ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.SET	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.SET	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.SET	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
@@ -241,7 +242,7 @@ GDCENABLE	.SET	TRUE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 GDCMODE		.SET	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
 GDCMON		.SET	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -250,6 +251,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -258,17 +260,11 @@ MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_N8	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
-FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
-FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
-FDMAUTO		.SET	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
-FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
-FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 ;
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
-RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -290,7 +286,7 @@ IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
 IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
 IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
 PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
@@ -307,12 +303,6 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
-SDPPIBASE	.SET	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
-SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
-SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
-SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 ;
@@ -325,9 +315,6 @@ ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
-PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
-PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
-PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
@@ -342,14 +329,10 @@ ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
-PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
-PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
-PIOZBASE	.SET	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
-PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
-PIOSBASE	.SET	RPH_PPI0	; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
-UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
+;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
 ;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
@@ -359,7 +342,7 @@ SNMODE		.SET	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_SBC.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -93,6 +94,8 @@ CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	614400		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -102,19 +105,10 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
-FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_RTC	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	RTCIO		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
@@ -125,7 +119,6 @@ PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
 LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
-LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
 BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
@@ -141,15 +134,13 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
 DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
-DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
 ;
 BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
-BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
 ;
 INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
@@ -241,7 +232,7 @@ CVDUMODE	.SET	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.SET	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -250,6 +241,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -269,6 +261,7 @@ RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -359,6 +352,8 @@ PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -367,7 +362,7 @@ SNMODE		.SET	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_SCZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -94,9 +95,8 @@ KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
-CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
-CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
 ;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
@@ -106,7 +106,7 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 ;
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
-FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
 FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
@@ -129,7 +129,7 @@ PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
-LCDENABLE	.SET	TRUE		; ENABLE LCD DISPLAY
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
 LCDBASE		.SET	$AA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
@@ -146,7 +146,7 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
@@ -199,7 +199,7 @@ DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
 DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
 DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
-UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTCNT		.SET	4		; UART: NUMBER OF CHIPS TO DETECT (1-8)
 UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -222,7 +222,7 @@ UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
 UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
 UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
 ;
-ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.SET	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.SET	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.SET	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
@@ -233,7 +233,7 @@ Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -241,21 +241,42 @@ SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
 SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
 SIO0ACLK	.SET	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0ACFG	.SET	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
 SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO0BCFG	.SET	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
 SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
 SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
 SIO1ACLK	.SET	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1ACFG	.SET	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
 SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 SIO1BCLK	.SET	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
-SIO1BCFG	.SET	SER_115200_8N1	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
 SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	TRUE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	TRUE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	7372800		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	7372800		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	7372800		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	7372800		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
@@ -263,7 +284,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -271,6 +292,9 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$A0		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -289,6 +313,7 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
 IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
 IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
@@ -297,14 +322,14 @@ IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
 IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
 IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
 IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
+IDE1MODE	.SET	IDEMODE_RC	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$18		; IDE 1: IO BASE ADDRESS
 IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
 IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
 IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
 IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
+IDE2MODE	.SET	IDEMODE_RC	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$20		; IDE 2: IO BASE ADDRESS
 IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
 IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
 IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
@@ -326,7 +351,7 @@ PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
-SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
@@ -334,7 +359,7 @@ SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
-CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
 CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -347,6 +372,9 @@ CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
 CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.SET	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.SET	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
@@ -397,6 +425,15 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
 AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
@@ -405,7 +442,7 @@ SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
-AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_SZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_SZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_SZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -95,6 +96,8 @@ KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -235,6 +238,7 @@ SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
 SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
 SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SCCINTS		.SET	FALSE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	FALSE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
 SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
 SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
 SCC0ACLK	.SET	4915200		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
@@ -258,7 +262,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -266,6 +270,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -284,26 +289,6 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
-IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
-IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
-IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
-IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
-IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
-IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
-IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
-IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
-IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
-IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
-IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
-IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
-IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -345,32 +330,12 @@ PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.SET	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
-LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
-LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.SET	$18		; LPT 0: REGISTERS BASE ADR
-LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
 ;
 PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
-PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
-PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
-PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
-PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
 ;
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
-IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
-IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
-IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
-IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
-SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
-SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
-SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
-SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
 ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
 ESPSDTRACE	.SET	1		; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -383,10 +348,15 @@ ESPSD1DUAL	.SET	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
 ;
 SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
 SCSITRACE	.SET	1		; SCSI: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SCSICNT		.SET	2		; SCSI: NUMBER OF TARGET DEVICES (1-2)
-SCSI_TID	.SET	0		; SCSI: TARGET DEVICE ID (0-6)
-SCSI0_LUN	.SET	0		; SCSI 0: TARGET LUN
-SCSI1_LUN	.SET	1		; SCSI 1: TARGET LUN
+SCSICNT		.SET	1		; SCSI: NUMBER OF TARGET DEVICES (1-4)
+SCSI0_TGT	.SET	0		; SCSI 0: TARGET DEVICE ID (0-6)
+SCSI0_LUN	.SET	0		; SCSI 0: TARGET LUN (0-7)
+SCSI1_TGT	.SET	1		; SCSI 1: TARGET DEVICE ID (0-6)
+SCSI1_LUN	.SET	0		; SCSI 1: TARGET LUN (0-7)
+SCSI2_TGT	.SET	2		; SCSI 2: TARGET DEVICE ID (0-6)
+SCSI2_LUN	.SET	0		; SCSI 2: TARGET LUN (0-7)
+SCSI3_TGT	.SET	3		; SCSI 3: TARGET DEVICE ID (0-6)
+SCSI3_LUN	.SET	0		; SCSI 3: TARGET LUN (0-7)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -394,6 +364,8 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/cfg_SZ80.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_SZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_SZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -88,6 +89,8 @@ KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -163,7 +166,6 @@ PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
 MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 ;
 DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
-DS12RTC_BASE	.SET	$70		; DS12RTC: I/O BASE ADDRESS
 ;
 M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
@@ -224,6 +226,7 @@ SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
 SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
 SCCCNT		.SET	1		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SCCINTS		.SET	FALSE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	FALSE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
 SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
 SCC0BASE	.SET	$A0		; SCC 0: REGISTERS BASE ADR
 SCC0ACLK	.SET	4915200		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
@@ -247,7 +250,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -255,6 +258,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
@@ -273,26 +277,6 @@ FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
 RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
-IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
-IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
-IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
-IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
-IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
-IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
-IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
-IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
-IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
-IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
-IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
-IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
-IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
-IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
-IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
-IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
-IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -372,10 +356,15 @@ ESPSD1DUAL	.SET	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
 ;
 SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
 SCSITRACE	.SET	1		; SCSI: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-SCSICNT		.SET	2		; SCSI: NUMBER OF TARGET DEVICES (1-2)
-SCSI_TID	.SET	0		; SCSI: TARGET DEVICE ID (0-6)
-SCSI0_LUN	.SET	0		; SCSI 0: TARGET LUN
-SCSI1_LUN	.SET	1		; SCSI 1: TARGET LUN
+SCSICNT		.SET	1		; SCSI: NUMBER OF TARGET DEVICES (1-4)
+SCSI0_TGT	.SET	0		; SCSI 0: TARGET DEVICE ID (0-6)
+SCSI0_LUN	.SET	0		; SCSI 0: TARGET LUN (0-7)
+SCSI1_TGT	.SET	1		; SCSI 1: TARGET DEVICE ID (0-6)
+SCSI1_LUN	.SET	0		; SCSI 1: TARGET LUN (0-7)
+SCSI2_TGT	.SET	2		; SCSI 2: TARGET DEVICE ID (0-6)
+SCSI2_LUN	.SET	0		; SCSI 2: TARGET LUN (0-7)
+SCSI3_TGT	.SET	3		; SCSI 3: TARGET DEVICE ID (0-6)
+SCSI3_LUN	.SET	0		; SCSI 3: TARGET LUN (0-7)
 ;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -383,6 +372,8 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/cfg_TEMPLATE.asm

@@ -0,0 +1,585 @@
+;
+;==================================================================================================
+;   ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: XXXXXX
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD,
+; YOU SHOULD OVERRIDE SETTINGS YOU WANT USING A CONFIGURATION FILE IN
+; THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
+;
+; THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.  IT IS MAINTAINED BY THE
+; AUTHORS OF ROMWBW.  TO OVERRIDE SETTINGS YOU SHOULD USE A
+; CONFIGURATION FILE IN THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.  TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE PLATFORM_NAME	"RomWBW", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG	SER_9600_8N1	; DEFAULT SERIAL CONFIGURATION
+;
+#INCLUDE "cfg_MASTER.asm"
+;
+PLATFORM	.SET	PLT_NONE	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+CPUFAM		.SET	CPU_NONE	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
+TURBOZ80DISPRT	.SET	$00		; DUMMY I/O PORT ADDRESS TO READ FROM, TO DISABLE TURBO BOOST FOR NEXT 31 CLOCK TICKS
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
+BIOS		.SET	BIOS_NONE	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.SET	FALSE		; ENABLE FONT COMPRESSION
+TICKFREQ	.SET	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.SET	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+BT_REC_TYPE	.SET	BT_REC_NONE	; BOOT RECOVERY METHOD TO USE: BT_REC_[NONE|FORCE|SBCB0|SBC1B|SBCRI|DUORI]
+AUTOCON		.SET	TRUE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+STRICTPART	.SET	TRUE		; ENFORCE STRICT PARTITION TABLE VALIDATION
+;
+CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.SET	1000000		; CPU OSC FREQ IN MHZ
+INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMFONTS	.SET	TRUE		; LOAD FONTS FROM ROM
+APP_BNKS	.SET	$FF		; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
+MEMMGR		.SET	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+MPCL_RAM	.SET	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
+MPCL_ROM	.SET	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
+MPGSEL_0	.SET	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.SET	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.SET	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.SET	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.SET	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+Z180_BASE	.SET	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_TIMER	.SET	FALSE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
+;
+Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
+Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
+Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
+Z280_TIMER	.SET	FALSE		; Z280: ENABLE INTERNAL Z280 SYSTEM PERIODIC TIMER
+;
+N8_PPI0		.SET	$80		; N8: FIRST PARALLEL PORT REGISTERS BASE ADR
+N8_PPI1		.SET	$84		; N8: SECOND PARALLEL PORT REGISTERS BASE ADR
+N8_RTC		.SET	$88		; N8: RTC LATCH REGISTER ADR
+N8_ACR		.SET	$94		; N8: AUXILLARY CONTROL REGISTER (ACR) ADR
+N8_RMAP		.SET	$96		; N8: ROM PAGE REGISTER ADR
+N8_DEFACR	.SET	$1B		; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
+;
+RPH_PPI0	.SET	$88		; RPH: FIRST PARALLEL PORT REGISTERS BASE ADR
+RPH_RTC		.SET	$84		; RPH: RTC LATCH REGISTER ADR
+RPH_ACR		.SET	$80		; RPH: AUXILLARY CONTROL REGISTER (ACR) ADR
+RPH_DEFACR	.SET	$00		; RPH: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
+;
+MK4_IDE		.SET	$80		; MK4: IDE REGISTERS BASE ADR
+MK4_XAR		.SET	$88		; MK4: EXTERNAL ADDRESS REGISTER (XAR) ADR
+MK4_SD		.SET	$89		; MK4: SD CARD CONTROL REGISTER ADR
+MK4_RTC		.SET	$8A		; MK4: RTC LATCH REGISTER ADR
+;
+RTCIO		.SET	$70		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.SET	$B0		; CTC BASE I/O ADDRESS
+CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.SET	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.SET	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
+CTCOSC		.SET	614400		; CTC CLOCK FREQUENCY
+;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+SCTIMIO		.SET	$0F		; SC737: PORT ADDRESS
+;
+PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.SET	$F0		; PCF8584 BASE I/O ADDRESS
+PCFCLK		.SET	PCFCLK_12	; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
+PCFTRNS		.SET	PCFTRNS_90	; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15]
+;
+EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
+;
+WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
+;
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
+FPLED_DSKACT	.SET	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
+;
+DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
+LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.SET	FALSE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.SET	FALSE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.SET	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
+GM7303BASE	.SET	$30		; BASE ADDRESS FOR GM3703 BOARD  
+;
+BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
+SECCON		.SET	$FF		; SECONDARY CONSOLE DEVICE
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.SET	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.SET	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.SET	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.SET	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
+DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
+;
+DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+;
+PCRTCENABLE	.SET	FALSE		; PCRTC: DISABLE DS12885 etc. RTC
+PCRTC_BASE	.SET	$C0		; Default port for PCRTC, like DSRTC.
+;
+MMRTCENABLE	.SET	FALSE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
+;
+DS12RTCENABLE	.SET	FALSE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
+DS12RTC_BASE	.SET	$70		; DS12RTC: I/O BASE ADDRESS
+;
+M6242RTCENABLE	.SET	TRUE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
+M6242RTC_BASE	.SET	$A0		; M6242RTC: I/O BASE ADDRESS
+;
+SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
+SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
+SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
+SSERDATA	.SET	$FF		; SSER: DATA PORT
+SSERIRDY	.SET	%00000001	; SSER: INPUT READY BIT MASK
+SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
+SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
+SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
+;
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.SET	1		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.SET	$FF		; DLPSER0: STATUS PORT ADDRESS
+DLPSER0DATA	.SET	$FF		; DLPSER0: DATA PORT ADDRESS
+DLPSER1STAT	.SET	$FF		; DLPSER1: STATUS PORT ADDRESS
+DLPSER1DATA	.SET	$FF		; DLPSER1: DATA PORT ADDRESS
+;
+TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
+TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
+;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.SET	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.SET	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.SET	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.SET	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTCNT		.SET	1		; UART: NUMBER OF CHIPS TO DETECT (1-8)
+UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UART4UART	.SET	FALSE		; UART: SUPPORT 4UART ECB BOARD
+UART4UARTBASE	.SET	$C0		; UART: BASE IO ADDRESS OF 4UART ECB BOARD
+UART0BASE	.SET	$FF		; UART 0: REGISTERS BASE ADR
+UART0CFG	.SET	DEFSERCFG	; UART 0: SERIAL LINE CONFIG
+UART1BASE	.SET	$FF		; UART 1: REGISTERS BASE ADR
+UART1CFG	.SET	DEFSERCFG	; UART 1: SERIAL LINE CONFIG
+UART2BASE	.SET	$FF		; UART 2: REGISTERS BASE ADR
+UART2CFG	.SET	DEFSERCFG	; UART 2: SERIAL LINE CONFIG
+UART3BASE	.SET	$FF		; UART 3: REGISTERS BASE ADR
+UART3CFG	.SET	DEFSERCFG	; UART 3: SERIAL LINE CONFIG
+UART4BASE	.SET	$FF		; UART 4: REGISTERS BASE ADR
+UART4CFG	.SET	DEFSERCFG	; UART 4: SERIAL LINE CONFIG
+UART5BASE	.SET	$FF		; UART 5: REGISTERS BASE ADR
+UART5CFG	.SET	DEFSERCFG	; UART 5: SERIAL LINE CONFIG
+UART6BASE	.SET	$FF		; UART 6: REGISTERS BASE ADR
+UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
+UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
+UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
+;
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.SET	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+ASCISWAP	.SET	FALSE		; ASCI: SWAP CHANNELS
+ASCIBOOT	.SET	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
+ASCI0CFG	.SET	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
+ASCI1CFG	.SET	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
+;
+Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+Z2UOSC		.SET	1843200		; Z2U: OSC FREQUENCY IN MHZ
+Z2UOSCEXT	.SET	TRUE		; Z2U: USE EXTERNAL OSCILLATOR
+Z2U0BASE	.SET	$10		; Z2U 0: BASE I/O ADDRESS
+Z2U0CFG		.SET	DEFSERCFG	; Z2U 0: SERIAL LINE CONFIG
+Z2U0HFC		.SET	FALSE		; Z2U 0: ENABLE HARDWARE FLOW CONTROL
+;
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
+ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
+ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
+ACIA0CLK	.SET	CPUOSC		; ACIA 0: OSC FREQ IN HZ
+ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
+ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
+ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
+ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
+ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
+ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
+;
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
+SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.SET	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.SET	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+SCCENABLE	.SET	FALSE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
+SCCDEBUG	.SET	FALSE		; SCC: ENABLE DEBUG OUTPUT
+SCCBOOT		.SET	0		; SCC: REBOOT ON RCV CHAR (0=DISABLED)
+SCCCNT		.SET	2		; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SCCINTS		.SET	FALSE		; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3
+SCCPCLK		.SET	FALSE		; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK
+SCC0MODE	.SET	SCCMODE_SZ80	; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80]
+SCC0BASE	.SET	$FF		; SCC 0: REGISTERS BASE ADR
+SCC0ACLK	.SET	4915200		; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0ACFG	.SET	DEFSERCFG	; SCC 0A: SERIAL LINE CONFIG
+SCC0ACTCC	.SET	-1		; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC0BCLK	.SET	4915200		; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC0BCFG	.SET	DEFSERCFG	; SCC 0B: SERIAL LINE CONFIG
+SCC0BCTCC	.SET	-1		; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1MODE	.SET	SCCMODE_SZ80	; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80]
+SCC1BASE	.SET	$FF		; SCC 1: REGISTERS BASE ADR
+SCC1ACLK	.SET	4915200		; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1ACFG	.SET	DEFSERCFG	; SCC 1A: SERIAL LINE CONFIG
+SCC1ACTCC	.SET	-1		; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SCC1BCLK	.SET	4915200		; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SCC1BCFG	.SET	DEFSERCFG	; SCC 1B: SERIAL LINE CONFIG
+SCC1BCTCC	.SET	-1		; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+VDUSIZ		.SET	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
+CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUMODE	.SET	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
+CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
+GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+GDCMODE		.SET	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
+GDCMON		.SET	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
+TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VGASIZ		.SET	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
+XOS_BASE	.SET	$20		; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES)
+XOSSIZ		.SET	V80X30		; XOSERA: DISPLAY FORMAT [V80X30|V80X60]
+;
+MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_NONE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.SET	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+RFCNT		.SET	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
+;
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDEDETECTMEDIA	.SET	FALSE		; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER
+IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.SET	IDEMODE_NONE	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE0BASE	.SET	$20		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.SET	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.SET	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_NONE	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_NONE	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE1BASE	.SET	$20		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.SET	FALSE		; PPIDE 1B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_NONE	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE2BASE	.SET	$14		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
+SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.SET	2		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.SET	$3E		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.SET	FALSE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.SET	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.SET	$3C		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.SET	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.SET	FALSE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.SET	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.SET	FALSE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+PPPBASE		.SET	$60		; PPP: PPI REGISTERS BASE ADDRESS
+PPPSDENABLE	.SET	FALSE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
+PPPSDTRACE	.SET	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPPCONENABLE	.SET	FALSE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
+;
+ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.SET	FALSE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
+HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+HDSKTRACE	.SET	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+;
+PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.SET	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35]
+LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.SET	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.SET	$EC		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.SET	PPAMODE_NONE	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.SET	IMMMODE_NONE	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.SET	IMMMODE_NONE	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDTRACE	.SET	1		; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+ESPSD_USECD	.SET	FALSE		; ESPSD: ENABLE CARD DETECT SIGNAL USAGE
+ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD0BASE	.SET	$80		; ESPSD 0: ESP32 INTERFACE IO BASE ADR
+ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
+ESPSD1BASE	.SET	$82		; ESPSD 1: ESP32 INTERFACE IO BASE ADR
+ESPSD1DUAL	.SET	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
+;
+SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
+SCSITRACE	.SET	1		; SCSI: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SCSICNT		.SET	1		; SCSI: NUMBER OF TARGET DEVICES (1-4)
+SCSI0_TGT	.SET	0		; SCSI 0: TARGET DEVICE ID (0-6)
+SCSI0_LUN	.SET	0		; SCSI 0: TARGET LUN (0-7)
+SCSI1_TGT	.SET	1		; SCSI 1: TARGET DEVICE ID (0-6)
+SCSI1_LUN	.SET	0		; SCSI 1: TARGET LUN (0-7)
+SCSI2_TGT	.SET	2		; SCSI 2: TARGET DEVICE ID (0-6)
+SCSI2_LUN	.SET	0		; SCSI 2: TARGET LUN (0-7)
+SCSI3_TGT	.SET	3		; SCSI 3: TARGET DEVICE ID (0-6)
+SCSI3_LUN	.SET	0		; SCSI 3: TARGET LUN (0-7)
+;
+PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
+PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIOZBASE	.SET	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
+PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
+;
+UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+UFBASE		.SET	$0C		; UF: REGISTERS BASE ADR
+;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE		.SET	FALSE	; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80		.SET	FALSE	; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+_CH376_DATA_PORT	.SET	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.SET	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.SET	$FF8A	; CH376: LED CONTROL PORT
+;
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+SN76489CHNOUT	.SET	SNCHAN_BOTH	; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT]
+AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.SET	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
+;
+AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.SET	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RC2014|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC|COLECO]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
+;
+SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+SPKPORT		.SET	RTCIO		; SPK: THE PORT WITH THE SPEAKER IO BIT
+SPKSHADOW	.SET	HB_RTCVAL	; SPK: THE SHADOW VALUE FOR THE PORT THAT HAS TO BE MAINTAINED
+SPKMASK		.SET	%00000100	; SPK: THE BIT MASK TO ACTUALLY TOGGLE
+;
+DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.SET	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
+;
+YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)
+;
+; EZ80 SETTINGS
+;
+EZ80TMR_NONE		.SET	0		; DO NOT USE ON-BOARD TIMER TO GENERATE TICKS
+EZ80TMR_INT		.SET	1		; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
+EZ80TMR_FIRM		.SET	2		; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
+;
+EZ80UARTENABLE		.SET	FALSE		; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
+EZ80RTCENABLE		.SET	FALSE		; EZ80 ON CHIP RTC
+EZ80TIMER		.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
+EZ80IOBASE		.SET	$FF		; EZ80 I/O BASE ADDRESS FOR EXTERNAL IO
+;
+; BUS TIMING FOR PAGED MEMORY ACCESS (CS3)
+EZ80_MEM_CYCLES		.SET	3		; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
+EZ80_MEM_MIN_NS		.SET	100		; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_MEM_MIN_BC		.SET	1		; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+;
+; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2)
+EZ80_IO_CYCLES		.SET	4		; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
+EZ80_IO_MIN_NS		.SET	250		; CALCULATE AT BOOT TIME THE REQUIRED B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_IO_MIN_BC		.SET	4		; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+;
+; APPLY BUS CYCLES OR CALCULATE CYCLES BASED ON DESIRED PERIOD
+EZ80_WSMD_TYP		.SET	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
+;
+; BUS TIMING FOR ON CHIP ROM
+EZ80_FLSH_WS		.SET	1		; WAIT STATES FOR ON CHIP FLASH (0-7)
+EZ80_FLSH_MIN_NS	.SET	60		; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
+EZ80_FWSMD_TYP		.SET	EZ80WSMD_CALC	; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)

Source/HBIOS/cfg_UNA.asm

@@ -15,8 +15,9 @@
 ;
 #INCLUDE "../UBIOS/ubios.inc"
 ;
-;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.EQU	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;
 FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES

Source/HBIOS/cfg_Z80RETRO.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_Z80RETRO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_Z80RETRO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -96,6 +97,8 @@ CTCPRECH	.SET	0		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	1		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	7372800		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -246,7 +249,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
+TMSMODE		.SET	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY|N8PC]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -254,6 +257,7 @@ VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -323,6 +327,8 @@ PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

Source/HBIOS/cfg_ZETA.asm

@@ -45,12 +45,13 @@
 #DEFINE PLATFORM_NAME	"Zeta", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS		; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_115200_8N1	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -81,10 +82,11 @@ MPCL_ROM	.SET	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 RTCIO		.SET	$70		; RTC LATCH REGISTER ADR
 ;
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
-KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
 CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -94,19 +96,10 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
-FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_RTC	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	RTCIO		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
@@ -117,7 +110,6 @@ PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
 LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
-LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
 BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
@@ -133,7 +125,7 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
@@ -174,6 +166,8 @@ SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
 DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
+TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
+;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
@@ -215,14 +209,12 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
-TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
-TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -230,7 +222,7 @@ MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_ZETA	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
 FDCNT		.SET	1		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
 FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
@@ -289,17 +281,15 @@ SCSIENABLE	.SET	FALSE		; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM)
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
-PIOSBASE	.SET	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
-DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.SET	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
 YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
-VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_ZETA2.asm

@@ -45,12 +45,13 @@
 #DEFINE PLATFORM_NAME	"Zeta 2", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_38400_8N1 | SER_RTS		; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
+PLATFORM	.SET	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RC2014|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|SZ180|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80|N8PC]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+TURBOZ80	.SET	FALSE		; TRUE FOR TURBO Z80 BOOSTING TO 20MHZ
 NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -86,6 +87,8 @@ RTCIO		.SET	$70		; RTC LATCH REGISTER ADR
 KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.SET	$20		; CTC BASE I/O ADDRESS
@@ -96,6 +99,8 @@ CTCPRECH	.SET	0		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.SET	1		; TIMER CHANNEL (0-3)
 CTCOSC		.SET	921600		; CTC CLOCK FREQUENCY
 ;
+SCTIMENABLE	.SET	FALSE		; ENABLE SC737 50HZ SYSTEM TIMER
+;
 PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 ;
 EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
@@ -105,19 +110,10 @@ SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 ;
 FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
-FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
-FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
-FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
-FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
-FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
-FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
 ;
 DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
-LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
-LEDPORT		.SET	RTCIO		; STATUS LED PORT ADDRESS
-LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
 DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
@@ -128,7 +124,6 @@ PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
 LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
-LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
 GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
 ;
 BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
@@ -144,7 +139,7 @@ KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
 KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
 ;
-DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
 DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
@@ -185,6 +180,8 @@ SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
 DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
+TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
+;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
@@ -226,14 +223,12 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC]
-TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
-TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
 TVGAENABLE	.SET	FALSE		; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM)
+XOSENABLE	.SET	FALSE		; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
@@ -303,13 +298,12 @@ PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
+CHNATIVEENABLE		.SET	FALSE	; CH376: ENABLE CH376 NATIVE USB DRIVER
+;
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
-DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.SET	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
 YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
-VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/ch.asm

@@ -79,6 +79,23 @@ CHSD_CFG0	.EQU	0		; DUMMY ENTRY
 CHSD_CFG1	.EQU	0		; DUMMY ENTRY
 #ENDIF
 ;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE HEADER
+;--------------------------------------------------------------------------------------------------
+;
+ORG_CH	.EQU	$
+;
+	.DW	SIZ_CH		; MODULE SIZE
+	.DW	CH_INITPHASE		; ADR OF INIT PHASE HANDLER
+;
+CH_INITPHASE:
+	; INIT PHASE HANDLER, A=PHASE
+	;CP	HB_PHASE_PREINIT	; PREINIT PHASE?
+	;JP	Z,CH_PREINIT		; DO PREINIT
+	CP	HB_PHASE_INIT		; INIT PHASE?
+	JP	Z,CH_INIT		; DO INIT
+	RET				; DONE
+;
 ; CH DEVICE CONFIGURATION
 ;
 CH_CFGSIZ	.EQU	9		; SIZE OF CFG TBL ENTRIES
@@ -470,3 +487,14 @@ CH_STR_376	.TEXT	"CH376$"
   #INCLUDE "chsd.asm"
 #ENDIF
 ;
+;
+;--------------------------------------------------------------------------------------------------
+;   HBIOS MODULE TRAILER
+;--------------------------------------------------------------------------------------------------
+;
+END_CH	.EQU	$
+SIZ_CH	.EQU	END_CH - ORG_CH
+;	
+	MEMECHO	"CH occupies "
+	MEMECHO	SIZ_CH
+	MEMECHO	" bytes.\n"

Source/HBIOS/ch376-native/keyboard.s

@@ -5,7 +5,7 @@
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/keyboard/class_hid_keyboard.c.s"
 #ENDIF
+#include "ch376-native/keyboard/kyb-init.c.s"
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/keyboard/kyb_driver.c.s"
 #ENDIF
-#include "ch376-native/keyboard/kyb-init.c.s"

Source/HBIOS/ch376-native/scsi-drv.s

@@ -2,7 +2,7 @@
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/scsi-drv/class_scsi.c.s"
 #ENDIF
+#include "ch376-native/scsi-drv/scsi-init.c.s"
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/scsi-drv/scsi_driver.c.s"
 #ENDIF
-#include "ch376-native/scsi-drv/scsi-init.c.s"

Source/HBIOS/ch376-native/ufi-drv.s

@@ -2,10 +2,10 @@
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/ufi-drv/class_ufi.c.s"
 #ENDIF
+#include "ch376-native/ufi-drv/ufi-init.c.s"
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/ufi-drv/ufi_driver.c.s"
 #ENDIF
-#include "ch376-native/ufi-drv/ufi-init.c.s"
 #IF (!CHNATIVEEZ80)
 #include "ch376-native/ufi-drv/usb_cbi.c.s"
 #ENDIF