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72 Commits

Author SHA1 Message Date
Wayne Warthen
4fdb89d651 Minor fixes 2017-08-24 15:06:04 -07:00
Wayne Warthen
c4e9a47048 XModem Enhancements
Added dynamic CPU speed adaptation to XModem
2017-08-24 12:50:24 -07:00
Wayne Warthen
2fd22922d5 Finalize 2.8.3 2017-08-23 20:32:44 -07:00
Wayne Warthen
1060cfd441 Added Mode command 2017-08-23 18:22:58 -07:00
Wayne Warthen
7db00165dd App updates
- All XM variants integrated into a single XM.COM app that auto-detects
primary serial port.
- Include all relevant FD variants for each platform.
2017-08-10 22:16:03 -07:00
Wayne Warthen
9d9018b455 Finalize Release 2.8.2
Minor correction to VGA3 timing parameters
2017-07-18 16:15:16 -07:00
Wayne Warthen
eb460e885a Finalize Release v2.8.1 2017-07-11 18:53:35 -07:00
Wayne Warthen
8ca34eb81f UNA Update
Update to current version of UNA and fix FDISK80 breakage.
2017-07-06 18:03:18 -07:00
Wayne Warthen
f509b0fa01 Finalize Release v2.8.0 2017-07-04 15:35:01 -07:00
Wayne Warthen
75282a33c9 Fix Filename Case 2017-06-30 21:55:30 -07:00
Wayne Warthen
db89164e1e Fix Filename Case 2017-06-30 21:55:00 -07:00
Wayne Warthen
fb6b1fd54a Add VGA3 Support 2017-06-30 21:50:10 -07:00
Wayne Warthen
939a822f65 More BPBIOS Cleanup 2016-11-28 21:19:22 -08:00
Wayne Warthen
4ab1cadfad BPBIOS and Date Stamping Cleanups
- Improved BPBIOS compatibility
- Enhanced STAMPS.DAT w/ NZT stamp
2016-11-27 20:15:12 -08:00
Wayne Warthen
97c36c0efc BPBIOS Related Fixes 2016-11-23 19:31:57 -08:00
Wayne Warthen
8d02b02ab4 Cleanup 2016-10-03 15:27:18 -07:00
Wayne Warthen
f1ada661c1 Additional directory cleanup 2016-09-30 20:00:13 -07:00
Wayne Warthen
90d7b9673c Revamp directory structure 2016-09-30 18:07:16 -07:00
Wayne Warthen
5e6196d541 Update Doc build process 2016-09-29 17:01:46 -07:00
Wayne Warthen
e350aa0672 Interrupt framework implementation
- Interrupt framework
- Documentation in progress w/ Latex conversion
2016-07-10 21:55:00 -07:00
Wayne Warthen
c478a04b48 Prerelease 5 2016-06-03 18:13:15 -07:00
Wayne Warthen
928a64147c Bug Fixes 2016-06-03 17:56:22 -07:00
Wayne Warthen
a57736ef2b Minor cleanup 2016-06-01 21:20:59 -07:00
Wayne Warthen
62641ba4a6 Prerelease 4 2016-05-29 16:52:28 -07:00
Wayne Warthen
5f205dd90b Boot and Bank Layout Cleanup
Revised hbios.asm to compile in 3 modes (ROM/APP/IMG boot).  Updated and
simplified ROM bank assignments.
2016-05-29 07:56:01 -07:00
Wayne Warthen
5115684dc2 Fix Compilation Error in XIO.ASM 2016-05-22 07:59:42 -07:00
Wayne Warthen
a2566d4de5 Revise Serial Driver Initialization
- Implement PREINIT
- Use detected CPU speed for initialization
2016-05-22 07:52:13 -07:00
Wayne Warthen
68c9813390 Bump Version 2016-04-26 16:18:02 -07:00
Wayne Warthen
0653a42984 Fix Delay Initialization 2016-04-25 22:12:13 -07:00
Wayne Warthen
a7d4459a01 Preserve Partition Table in SYSCOPY
Updated FLASH to latest version
2016-04-24 21:51:37 -07:00
Wayne Warthen
7da6c582a0 Bug Fixes 2016-04-22 15:45:10 -07:00
Wayne Warthen
684f59a73c Bug Fixes in ASSIGN Command 2016-04-21 13:16:41 -07:00
Wayne Warthen
97a09a6e33 Revised Serial Device Config Routines 2016-04-20 22:06:32 -07:00
Wayne Warthen
9e5a1ea41b UART Config Changes 2016-04-19 15:06:06 -07:00
Wayne Warthen
07d833473c Bug Fixes 2016-04-14 17:29:45 -07:00
Wayne Warthen
31f5388f9e Implement HBIOS Reset Function 2016-04-10 17:24:27 -07:00
Wayne Warthen
521af19e50 VDA Device Initialization Flow Cleanup 2016-04-10 16:21:29 -07:00
Wayne Warthen
9605d80b99 Code Cleaning 2016-04-08 18:04:06 -07:00
Wayne Warthen
67ede23694 Clean Up Drive Assignment Code 2016-04-07 22:56:46 -07:00
Wayne Warthen
5154713644 Config Files Overhaul 2016-04-06 18:14:14 -07:00
Wayne Warthen
5bb7bd6c44 Revise BPBIOS Prototype
Revise BPBIOS source to accommodate recent changes in HBIOS API.
2016-03-30 22:18:54 -07:00
Wayne Warthen
8fe3526ecd API Revisions / Cleanup
- Improved banked copy size and performance
- Revised API for SETCPY, BNKCPY, SETBNK, and GETBNK
2016-03-30 17:10:08 -07:00
Wayne Warthen
f9c7f30d2d Bug Fixes 2016-03-25 23:06:18 -07:00
Wayne Warthen
8aedfbb7f3 Add Device Summary Display 2016-03-25 21:20:05 -07:00
Wayne Warthen
b4fc05acfb Incorporate FDISK80 2016-03-21 17:05:57 -07:00
Wayne Warthen
5adbef5f68 Revised Emulation Services 2016-03-19 21:21:17 -07:00
Wayne Warthen
b63dfdf587 Revised Disk API 2016-03-10 17:44:42 -08:00
Wayne Warthen
6354bd300d Revised disk API 2016-03-04 20:09:47 -08:00
Wayne Warthen
53a74f78d7 HBIOS driver and BPBIOS refinements
- Refined sd, ide, and ppide drivers to improve hardware compatibility
- Improved BPBIOS build process
2016-02-01 14:50:58 -08:00
Wayne Warthen
b67106889e Add HBIOS Heap Memory
- New heap memory functions
- Restructured new disk I/O functions
2016-01-10 16:01:33 -08:00
Wayne Warthen
25974843e3 Storage Driver Refactoring 2015-12-06 20:10:00 -08:00
Wayne Warthen
6d8c2283b9 ParPortProp Driver Refactoring 2015-11-25 15:43:07 -08:00
Wayne Warthen
df74f73d5b PROPIO Driver Refactoring 2015-11-21 13:16:23 -08:00
Wayne Warthen
099172e44e IDE and PPIDE driver refactoring 2015-11-07 16:50:58 -08:00
Wayne Warthen
4626695b52 Overhaul PPIDE driver and sync with IDE driver 2015-11-05 19:37:49 -08:00
Wayne Warthen
8fbeb6eecc Continued cleanup of SD and IDE driver code 2015-10-24 12:52:27 -07:00
Wayne Warthen
d90c4dfed2 Correct capacity and geometry functions in sd and hsdk drivers 2015-10-04 12:22:45 -07:00
Wayne Warthen
803bb6a87d Refactor SD driver 2015-10-04 08:08:00 -07:00
Wayne Warthen
31d58909ce Refactor IDE driver
- Dynamic detection of devices
- Significant code clean up
2015-09-07 20:25:21 -07:00
Wayne Warthen
522b061fe6 Start of new geometry/capacity functions in HBIOS 2015-09-05 15:35:06 -07:00
Wayne Warthen
63c0289e28 Handle Output directory better
Git refuses to store empty directories.  So, build scripts modified to
create Output directory as needed.
2015-08-21 20:57:48 -07:00
Wayne Warthen
a0cc974323 Refactor Loader Code
Move loader code to an include file and create separate wrappers for
each of the loader functions.
2015-08-21 19:59:45 -07:00
Wayne Warthen
20f874d146 Create .gitattributes 2015-08-19 20:06:58 -07:00
wwarthen
de52c4f560 Reintegrate wbw -> trunk 2015-08-19 17:34:42 +00:00
wwarthen
c754fcdb99 Reintegrate wbw -> trunk 2015-04-08 04:09:08 +00:00
wwarthen
2148c3e1f7 Reintegrate wbw -> trunk 2015-04-03 06:02:14 +00:00
wwarthen
cc51d012de Reintegrate wbw -> trunk 2015-03-23 01:50:45 +00:00
wwarthen
ea547a012b Reintegrate wbw -> trunk 2015-03-16 01:37:54 +00:00
wwarthen
8e535d53f4 Reintegrate wbw26 -> trunk 2014-10-26 03:02:33 +00:00
wwarthen
5e08740456 Reintegrate wbw26 -> trunk 2014-10-18 19:02:13 +00:00
wwarthen
72dc548e6e Reintegrate wbw26 -> trunk 2014-10-14 03:20:39 +00:00
wwarthen
594ae07aa6 Reintegrate wbw26 -> trunk 2014-10-13 15:47:16 +00:00
1289 changed files with 171920 additions and 21639 deletions

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# Leave all line endings alone!
* -text

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@echo off
if exist *.bin del *.bin
if exist *.com del *.com
if exist *.img del *.img
if exist *.rom del *.rom
if exist *.pdf del *.pdf
if exist *.log del *.log
if exist *.eeprom del *.eeprom

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10. Automatic Licensing of Downstream Recipients.
Each time you convey a covered work, the recipient automatically
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propagate that work, subject to this License. You are not responsible
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An "entity transaction" is a transaction transferring control of an
organization, or substantially all assets of one, or subdividing an
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work results from an entity transaction, each party to that
transaction who receives a copy of the work also receives whatever
licenses to the work the party's predecessor in interest had or could
give under the previous paragraph, plus a right to possession of the
Corresponding Source of the work from the predecessor in interest, if
the predecessor has it or can get it with reasonable efforts.
You may not impose any further restrictions on the exercise of the
rights granted or affirmed under this License. For example, you may
not impose a license fee, royalty, or other charge for exercise of
rights granted under this License, and you may not initiate litigation
(including a cross-claim or counterclaim in a lawsuit) alleging that
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sale, or importing the Program or any portion of it.
11. Patents.
A "contributor" is a copyright holder who authorizes use under this
License of the Program or a work on which the Program is based. The
work thus licensed is called the contributor's "contributor version".
A contributor's "essential patent claims" are all patent claims
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Each contributor grants you a non-exclusive, worldwide, royalty-free
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In the following three paragraphs, a "patent license" is any express
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If you convey a covered work, knowingly relying on a patent license,
and the Corresponding Source of the work is not available for anyone
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then you must either (1) cause the Corresponding Source to be so
available, or (2) arrange to deprive yourself of the benefit of the
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consistent with the requirements of this License, to extend the patent
license to downstream recipients. "Knowingly relying" means you have
actual knowledge that, but for the patent license, your conveying the
covered work in a country, or your recipient's use of the covered work
in a country, would infringe one or more identifiable patents in that
country that you have reason to believe are valid.
If, pursuant to or in connection with a single transaction or
arrangement, you convey, or propagate by procuring conveyance of, a
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you grant is automatically extended to all recipients of the covered
work and works based on it.
A patent license is "discriminatory" if it does not include within
the scope of its coverage, prohibits the exercise of, or is
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for and in connection with specific products or compilations that
contain the covered work, unless you entered into that arrangement,
or that patent license was granted, prior to 28 March 2007.
Nothing in this License shall be construed as excluding or limiting
any implied license or other defenses to infringement that may
otherwise be available to you under applicable patent law.
12. No Surrender of Others' Freedom.
If conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot convey a
covered work so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you may
not convey it at all. For example, if you agree to terms that obligate you
to collect a royalty for further conveying from those to whom you convey
the Program, the only way you could satisfy both those terms and this
License would be to refrain entirely from conveying the Program.
13. Use with the GNU Affero General Public License.
Notwithstanding any other provision of this License, you have
permission to link or combine any covered work with a work licensed
under version 3 of the GNU Affero General Public License into a single
combined work, and to convey the resulting work. The terms of this
License will continue to apply to the part which is the covered work,
but the special requirements of the GNU Affero General Public License,
section 13, concerning interaction through a network will apply to the
combination as such.
14. Revised Versions of this License.
The Free Software Foundation may publish revised and/or new versions of
the GNU General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the
Program specifies that a certain numbered version of the GNU General
Public License "or any later version" applies to it, you have the
option of following the terms and conditions either of that numbered
version or of any later version published by the Free Software
Foundation. If the Program does not specify a version number of the
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by the Free Software Foundation.
If the Program specifies that a proxy can decide which future
versions of the GNU General Public License can be used, that proxy's
public statement of acceptance of a version permanently authorizes you
to choose that version for the Program.
Later license versions may give you additional or different
permissions. However, no additional obligations are imposed on any
author or copyright holder as a result of your choosing to follow a
later version.
15. Disclaimer of Warranty.
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
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IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
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IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
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THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.
17. Interpretation of Sections 15 and 16.
If the disclaimer of warranty and limitation of liability provided
above cannot be given local legal effect according to their terms,
reviewing courts shall apply local law that most closely approximates
an absolute waiver of all civil liability in connection with the
Program, unless a warranty or assumption of liability accompanies a
copy of the Program in return for a fee.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
state the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
Also add information on how to contact you by electronic and paper mail.
If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:
<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<http://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<http://www.gnu.org/philosophy/why-not-lgpl.html>.

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Binary/ReadMe.txt Normal file
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@@ -0,0 +1,107 @@
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Binary") is part of the RomWBW System Software
distribution archive. It contains the completed binary outputs of
the build process. As described below, these files are used to
assemble a working RetroBrew Computers system.
The files in this directory are created by the build process that is
documented in the ReadMe.txt file in the Source directory. When
released the directory is populated with the default output files.
However, the output of custom builds will be placed in this directory
as well.
ROM Firmware Images (<plt>_<cfg>.rom)
-------------------------------------
The files with a ".rom" extension are binary images ready to program
into an appropriate PROM. These files are named with the format
<plt>_<cfg>.rom. <plt> refers to the primary platform such as Zeta,
N8, Mark IV, etc. <cfg> refers to the specific configuration. When
released, there will be a standard configuration ("std") for each
platform. So, for example, the file called MK4_std.rom is a ROM
image for the Mark IV with the standard configuration. If a custom
configuration called "custom" is created and built, a new file called
MK4_custom.rom will be added to this directory.
Documentation of the pre-built ROM Images is contained in the
RomList.txt file.
ROM Executable Images (<plt>_<cfg>.com)
---------------------------------------
When a ROM image (".rom") is created, an executable version of the
ROM is also created. These files have the same naming convention as
the ROM Image files, but have the extension ".com". These files can
be copied to a working system and run like a normal application.
When run on the target system, they install in RAM just like they had
been programmed into the ROM. This allows a new ROM build to be
tested without reprogramming the actual ROM.
ROM Binary Images (<plt>_<cfg>.img)
-----------------------------------
Also when a ROM image is created, a third variation of the ROM is
created again with the same naming convention, but with the extension
of .img. These files are similar to the .com files in that they can
be used to test a ROM build without actually programming a new ROM.
The .img files are specifically for loading via UNA from a FAT file
system. The functionality of the UNA FAT file system loader is
beyond the scope of this document.
VDU ROM Image (vdu.rom)
-----------------------
The VDU video board requires a dedicated onboard ROM containing the
font data. The "vdu.rom" file contains the binary data to program
onto that chip.
Disk Images (fd*.img, hd*.img)
------------------------------
RomWBW includes a mechanism for generating floppy disk and hard disk
binary images that are ready to copy directly to a floppy, hard disk,
CF Card, or SD Card which will then be ready for use in any
RomWBW-based system.
Essentially, these files contain prepared floppy and hard disk images
with a large set of programs and related files. By copying the
contents of these files to appropriate media as described below, you
can quickly create ready-to-use media.
The fd*.img files are floppy disk images. They are sized for 1.44MB
floppy media and can be copied to actual floppy disks using
RawWriteWin (as long as you have access to a floppy drive on your
Windows computer). The resulting floppy disks will be usable on any
RomWBW-based system with floppy drive(s).
Likewise, the hd*.img files are hard disk images. Each file is
intended to be copied to the start of any type of hard disk media
(typically a CF Card or SD Card). The resulting media will be usable
on any RomWBW-based system that accepts the corresponding media type.
Note that the contents of the floppy/hard disk images are created by
the BuildImages.cmd script in the Source directory. Additional
information on how to generate custom disk images is found in the
Source\Images directory.
Propeller ROM Images (*.eeprom)
-------------------------------
The files with and extension of ".eeprom" contain the binary images
to be programmed into the Propeller-based boards. The list below
indicates which file targets each of the Propeller board variants:
ParPortProp ParPortProp.eeprom
PropIO V1 PropIO.eeprom
PropIO V2 PropIO2.eeprom
Refer to the board documentation of the boards for more information
on how to program the EEPROMs on these boards.

111
Binary/RomList.txt Normal file
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***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Binary") is part of the RomWBW System Software
distribution archive. Refer to the ReadMe.txt file in this
directory for more information on the overall contents of the
directory.
When distributed, RomWBW contains a set of pre-built ROM images that
are ready to program onto the EEPROM of any of the Z80/Z180 based
RetroBrew Computers CPU boards. Additionally, any custom built ROM
images will be placed in this directory.
All of the pre-built ROM images are 512KB. This size is compatible
with all of the Z80/Z180 systems. Some systems can accept different
size ROM images. Creating alternative sizes requires a custom ROM
build (see ReadMe.txt in the Source directory).
It is critical that the right ROM Imgae be selected for the target
platform being used. The table below indicates the correct ROM
image to use for each platform:
SBC V1/V2 SBC_std.rom
Zeta V1 ZETA_std.rom
Zeta V2 ZETA2_std.rom
N8 N8_std.rom
Mark IV MK4_std.rom
You will find there is one additional ROM image called
"UNA_std.rom". This ROM image is an UNA-based RomWBW ROM image. As
such, this ROM image can be used on any Z80/Z180 platform supported
by John Coffman's UNA BIOS. Refer to RetroBrew Computers Wiki for
more information on UNA hardware support.
For each of the ROM Images (".rom"), there are corresponding files
with the extensions of ".com" and ".img". The .com variant can be
copied to a functional RomWBW-based system and executed like a
normal application under CP/M or Z-System. This will load the new
ROM on-the-fly. It is an excellent way to test a ROM Image before
actually burning it. Similarly, the .img files can be loaded using
the UNA FAT loader for testing.
All of the standard ROM Images are configured with:
- 512KB ROM Disk
- 512KB RAM Disk
- 38.4Kbps baud serial console
- Auto-discovery of all serial ports
All hard disk type devices (IDE, PPIDE, CF Card, SD Card) will be
automatically assigned two drive letters per device. The drive
letters will refer to the first 2 slices of the device. The ASSIGN
command can be used to display and reassign drives to disk devices
and slices as desired.
Standard ROM Image Notes
------------------------
The standard ROM images will detect and install support for certain
devices and peripherals that are on-board or frequently used with
each platform as documented below. If the device or peripheral is
not detected at boot, the ROM will simply bypass support
appropriately.
SBC:
- Includes support for PPIDE/CF Card(s) connected to on-board
parallel port.
- Includes support for CVDU and VGA3 boards. If detected at
startup, support for video and keyboard is installed
including VT-100/ANSI terminal emulation.
- Auto-detects PropIO or PropIO V2 and installs associated
video, keyboard and SD Card support if present.
- If PropIO, PropIO V2, CVDU, or VGA hardware is detected,
initial console output is determined by JP2. If JP2 is
shorted, console will go to on-board serial port, if JP2
is open, console will go to the detected video and keyboard
ports.
- SBC V1 has a known race condition in the bank switching
circuit which is likely to cause system instability. SBC
V2 does not have this issue.
ZETA/ZETA2:
- Includes support for on-board floppy disk controller and
two attached floppy disks.
- Auto-detects ParPortProp and includes support for it if it
is attached.
- If ParPortProp is installed, initial console output is
determined by JP1. If JP1 is shorted, console will go to
on-board serial port, if JP1 is open, console will go to
ParPortProp video and keyboard ports.
N8:
- Includes support for on-board floppy disk controller and
two attached floppy disks.
- Includes support for on-board TMS9918 video and keyboard
including VT-100/ANSI terminal emulation.
- Includes support for on-board SD Card as hard disk and
assumes a production level N8 board (date code >= 2312).
MK4:
- Includes support for on-board IDE port (CF Card via adapter).
- Includes support for on-board SD Card port.
- Auto-detects PropIO or PropIO V2 and installs associated
video, keyboard and SD Card support if present.
- Includes support for CVDU and VGA3 boards. If detected at
startup, support for video and keyboard is installed
including VT-100/ANSI terminal emulation.

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@@ -1,4 +0,0 @@
@echo off
setlocal
cd Source
call Build %*

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@@ -1,4 +0,0 @@
@echo off
setlocal
cd Source
call BuildCommon %*

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@@ -1,9 +0,0 @@
@echo off
setlocal
pushd Source && call Clean && popd
if exist *.img del *.img /Q
if exist debug.log del debug.log
if exist Output\*.* del Output\*.* /Q

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@@ -1,340 +0,0 @@
Building a Custom ROM
---------------------
At present, the build environment assumes you are running
a current version of Microsoft Windows (either 32-bit or
64-bit).
If you are using Linux, David Giles has contributed a Linux
makefile that should work for you. Please read the
LinuxBuild.txt file for more information.
All required tools are included in the distribution. You
should not need anything other than what comes as part of
Windows or as part of the distribution.
In summary, the process involves the 4 steps below:
1) Create/update configuration file
2) Update/Add/Delete any files you want incorporated in
the ROM Disk
3) Run the build script (or makefile if you prefer) and
confirm there are no errors.
4) Burn the resultant ROM image and try it.
The process is really very simple. In fact, you can
essentially skip steps 1 & 2 if you want to try simply
building one of the existing configurations.
Each of the 4 steps above is described in more detail
below.
1. Create/Update Configuration File
-----------------------------------
The settings for a build are primarily controled by
a configuration file that is included in the build
process. In order to customize your settings, you
need to modify an existing configuration file or
create your own.
If you look in the Source directory, you will see
a series of files named config_xxxx_yyyy.asm. Each of
them corresponds to one of the standard configurations
listed in the ROMList.txt file.
You have two choices. You can simply modify the existing
configuration file that is closest to your situation, or
you can copy it to a new config_xxxx_yyyy.asm file and modify
that. I recommend that you copy one to your own name so
that you will always have the unmodified standard configuration
files left in place. So, for example, you could just
copy config_ZETA_std.asm to config_ZETA_wayne.asm. You MUST
name your config file as config_xxxx_yyyy.asm. The xxxx's
must match your platform (N8VEM, ZETA, N8, S2I, or S100).
The yyyy's can be whatever you want.
The config files are simply text files with various
settings. Open your target config file with your
favorite text editor and modify the settings as desired.
Unfortunately, I have not yet documented each of the
settings in detail; that will be a separate document
provided in the future. However, there are comments
in the config file that will probably be sufficient
for the most part.
2. Update/Add/Delete ROM Disk Files
-----------------------------------
The files that are included on the ROM Disk of your
ROM are copied from a set of directories during the
build process. This allows you to have complete
flexibility over the files you want included in your
ROM.
If you look at the RomDsk directory, you will see
a variety of subdirectories. These subdirectories
contain the files that will be included in the
ROM disk. The build process will determine
which subdirectories to include files from based
on the following rules:
First, all files from either std_512 or std_1024 will
be incuded depending on on the size of the ROM you
are building. If you are building a 512KB ROM, then
all the files from std_512KB will be included. If you
are building a 1MB ROM, then all the files from std_1024KB
will be included. Essentialy, the files in std_1204KB are
a superset of the ones in std_512KB because there is more
space available for the ROM drive.
Second, all files from the directory that corresponds to
your configuration file will be included. If you build
the "ZETA_std" configuration, all files in cfg_ZETA_std will
be added. Note that these files will be in addition
to the files from the std_XXXKB directory.
If you created your own config file (like config_ZETA_wayne.asm
described above), you MUST create a subdirectory within
the RomDsk directory and populate it with the files
you want added. Normally, you would include the
files from the original standard config. So, if
you created config_ZETA_wayne.asm from config_ZETA_std.asm,
then you would create a subdirectory in RomDsk called
cfg_ZETA_wayne and copy all the files from cfg_ZETA_std to
cfg_ZETA_wayne.
3. Run the Build Process
------------------------
NOTE: The process described here is the more commonly
used build script. If you wish to use a makefile
instead, refer to the comments in the makefile in
the Source directory as an alternative to the
process described here.
The build involves running commands at the command
prompt. From a Command Prompt window, you will need
to change to the high level directory for the build.
Normally, you would be changing to the RomWBW directory
unless you renamed it.
First, you will need to build the components that are
common to all configurations. These components do not
require any configuration. To build these, use the
following commands and ensure that they complete
without error:
BuildZCPR-DJ
BuildApps2
To run the main build and be prompted for required information,
just enter "Build". You will be prompted for the information
described below and the build should run. If an error is
encountered, the build should stop and display an error
in red text.
If you immediately receive the error "the execution of
scripts is disabled on this system", then you will need to
change the PowerShell Execution-Polcy to "RemoteSigned".
To do this, you need to right-click on FixPowerShell.cmd and
choose "Run as Administrator" to make the change. If is
critical that you right-click and use "Run as Administrator"
or the change will not work (you will get an error
indicating "Access to the registry denied" if you fail to
use "Run as Administrator".
The build script will prompt you for the following information
which you will need to provide (don't worry, it is simple):
Platform:
Respond with the name of the platform that you are targeting.
It must be one of N8VEM, ZETA, N8, S2I, or S100.
Configuration:
Respond with the name of the configuration you wish to build.
A list of all available configurations is displayed for your
convenience. For example, if you are building the provided
ZETA_std configuration, just enter "std". If you have created a
custom configuration as described above, you would enter
"wayne".
ROM Size [512|1024]:
Respond with either "512" for a 512KB ROM build or "1024" for a
1MB ROM build. Only the two choices are possible at this time.
It is important that you choose a ROM size that is no larger than
the szie of the ROM you will ultimately be burning. This is
dependant on your hardware.
At this point, the build should run and you will see output related
to the assembler runs and some utility invocations. Just review
the output for any obvioius errors. Normally, all errors will
cause the build to stop immediately and display an error message
in red.
You will see some lines in the output indicating the amount of
space variouis components have taken. You should check these
to make sure you do not see any negative numbers which would
indicate that you have included too many features/drivers for
the available memory space. Here are examples of the lines
showing the space used:
DATA space remaining: 39 bytes.
BOOT LOADER space remaining: 3503 bytes.
CBIOS space remaining: 161 bytes.
DBGMON space remaining: 860 bytes.
ROMX space remaining: 8191 bytes.
BOOT LOADER space remaining: 3503 bytes.
4. Deploy the ROM
-----------------
If you look in the Output directory. You should find the following files:
<config>.rom - binary ROM image to burn to EEPROM
<config>.sys - system image that can be written to the start of a
disk to enable boot from disk functionality
<config>.com - executable version of the system image that can be
copied via xmodem to a running system to test
the build.
The actual ROM image is the file ending in .rom. It should be exactly
512KB or 1MB depending on the ROM size you chose. Simply burn the .rom
image to your ROM and install it in your hardware.
Specifying Build Options on Command Line
----------------------------------------
If you don't want to be prompted for the options to the "Build"
command, you can specify the options right on the command line.
For example:
Build ZETA std 512
In this case, you will not be prompted. This is useful if you
wish to automate your build process.
Example Build Run
-----------------
C:\Users\WWarthen\Projects\N8VEM\Build\RomWBW>Build.cmd
Platform [N8VEM|ZETA|N8|S2I|S100]: ZETA
Configurations available:
> ppp
> std
Configuration: std
ROM Size [512|1024]: 512
Building ZETA_std: 512KB ROM configuration std for Z80...
tasm -t80 -g3 ccpb03.asm cp.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 bdosb01.asm dos.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 syscfg.asm syscfg.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 -dBLD_SYS=SYS_CPM cbios.asm cbios.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
INFOLIST occupies 18 bytes.
UTIL occupies 484 bytes.
FD_DATA occupies 340 bytes.
PPIDE_DATA occupies 1116 bytes.
CBIOS space remaining: 2092 bytes.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 dbgmon.asm dbgmon.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
DBGMON space remaining: 795 bytes.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 prefix.asm prefix.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 bootrom.asm bootrom.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 bootapp.asm bootapp.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 loader.asm loader.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
LOADER space remaining: 1205 bytes.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 pgzero.asm pgzero.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 hbios.asm hbios.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
UART occupies 146 bytes.
FD occupies 2071 bytes.
PPIDE occupies 809 bytes.
HBIOS space remaining: 24428 bytes.
STACK space remaining: 145 bytes.
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 hbfill.asm hbfill.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
Configuration: ZETA Z80 SBC, FLOPPY (AUTOSIZE), PPIDE (STD)
tasm: pass 2 complete.
tasm: Number of errors = 0
tasm -t80 -g3 romfill.asm romfill.bin
TASM Z80 Assembler. Version 3.2 September, 2001.
Copyright (C) 2001 Squak Valley Software
tasm: pass 1 complete.
tasm: pass 2 complete.
tasm: Number of errors = 0
Building ZETA_std output files...
Building 512KB ZETA_std ROM disk data file...
C:\Users\WWarthen\Projects\N8VEM\Build\RomWBW>

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@@ -1,3 +1,49 @@
Version 2.8.3
-------------
- WBW: Added MODE command
- WBW: Removed obsolete 1200.COM, 9600.COM, and 38400.COM
- WBW: New XM.COM that automatically adapts to primary port of platform
- WBW: XM.COM now handles 38400 baud at 4MHz
- WBW: Removed obsolete XM versions: XM5.COM, XM-A0.COM, XM-A1.COM
Version 2.8.2
-------------
- WBW: Adjusted VGA3 register setup per John's recommendations
Version 2.8.1
-------------
- WBW: Fix FDISK80
- WBW: Upgrade to latest production UNA 2.1-45
Version 2.8.0
-------------
- WBW: Add support for VGA3 board
Version 2.7.1
-------------
- WBW: Replace ZX with XP compatible build (no functional changes)
- WBW: Reset BDOS serial number on warm start
- WBW: Turn off DRAM refresh on Z180 (fixes Z180 CPU speed detection)
Version 2.7.0
-------------
- WBW: Memory page reorganization
- WBW: Support for Zeta 2 (from Sergey Kiselev)
- WBW: Support loading from image file (UNA FSFAT)
- WBW: Dynamic CPU speed detection
Version 2.6.5
-------------
- WBW: Yet more DS1302 clock driver delay mods
Version 2.6.4
-------------
- WBW: Yet more DS1302 clock driver delay mods
Version 2.6.3
-------------
- WBW: DS1302 clock driver modified to observe proper delays
Version 2.6.2
-------------
- WBW: ASSIGN.COM substantially improved to map all drive types

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@@ -5,21 +5,21 @@
= Warning =
FLASH4 has been tested and confirmed working on:
* SBCv2
* N8-2312
* Mark IV SBC
* N8VEM SBCv2
* N8VEM N8-2312
* N8VEM Mark IV SBC
* DX-Designs P112
* ZETA SBC v2
However it remains somewhat experimental. If it works for you, please let me
know. If it breaks please also let me know so I can fix it! Until it is more
widely tested please ensure you have some other means to reprogram your flash
ROM before exclusively trusting FLASH4.
know. If it breaks please also let me know so I can fix it!
= Introduction =
FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to
or from an image file stored on a CP/M filesystem. It is intended for in-system
programming of Flash ROM chips on N8VEM Z80 and Z180 systems.
programming of Flash ROM chips on Z80 and Z180 systems.
FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to
support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If
@@ -46,23 +46,26 @@ the "srec_cat" program from SRecord:
$ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary
$ srec_cat image.bin -binary -output image.hex -intel
FLASH4 can use three different methods to access the Flash ROM chip. The best
FLASH4 can use several different methods to access the Flash ROM chip. The best
available method is determined automatically at run time. Alternatively you may
provide a command-line option to force the use of a specific method.
The first two methods use bank switching to map sections of the ROM into the
CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and
use the bank switching methods they provide.
use the bank switching methods they provide.
If neither RomWBW nor UNA BIOS is detected and the system has a Z180 CPU,
FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This does not
require any bank switching but it is slower and will not work on all platforms.
On P112 systems the P112 B/P BIOS is detected and P112 bank switching is used.
If no bank switching method can be auto-detected, and the system has a Z180
CPU, FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This
does not require any bank switching but it is slower and will not work on all
platforms.
Z180 DMA access requires the flash ROM to be linearly mapped into the lower
region of physical memory, as it is on the Mark IV SBC. The N8-2312 has
additional memory mapping hardware, consequently Z180 DMA access on the N8-2312
is NOT SUPPORTED and if forced will corrupt the contents of RAM; use bank
switched access instead.
region of physical memory, as it is on the Mark IV SBC (for example). The
N8-2312 has additional memory mapping hardware, consequently Z180 DMA access on
the N8-2312 is NOT SUPPORTED and if forced will corrupt the contents of RAM;
use one of the supported bank switching methods instead.
Z180 DMA access requires the Z180 CPU I/O base control register configured to
locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1).
@@ -93,13 +96,27 @@ If your ROM chip is larger than the image you wish to write, use the "/PARTIAL"
the image file must be an exact multiple of 32KB in length. The portion of the
ROM not occupied by the image file is left either unmodified or erased.
If you are using an ROM/EPROM/EEPROM chip which cannot be programmed in-system,
FLASH4 will not be able to recognise it, however the software can still
usefully READ and VERIFY the chip. Use the "/ROM" command line option to enable
"READ" or "VERIFY" mode with unrecognised chips. This mode assumes a 512K ROM
is fitted; smaller ROMs will be treated as a 512K ROM with the data repated
multiple times -- with a 256K chip the data is repeated twice, four times for a
128K chip, etc.
One of the following optional command line arguments may be specified at the
end of the command line to force FLASH4 to use a particular method to access
the flash ROM chip:
/ROMWBW
/UNABIOS
/Z180DMA
BIOS interfaces:
/ROMWBW For ROMWBW BIOS version 2.6 and later
/ROMWBWOLD For ROMWBW BIOS version 2.5 and earlier
/UNABIOS For UNA BIOS
Direct hardware interfaces:
/Z180DMA For Z180 DMA
/P112 For DX-Designs P112
/N8VEMSBC For N8VEM SBC (v1, v2), Zeta (v1) SBC
If no option is specified FLASH4 attempts to determine the best available
method automatically.

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@@ -14,7 +14,7 @@ Beyond the construction and integration of the actual DOS itself, the majority o
The remainder of this document details the changes I made as I went along. In all cases, my goal was to keep the result as close to the original distribution as possible. I started by copying all of the files from the distribution (contained in zsdos2.zip) into Support\ZSDOS. From there I tested, modified, updated, and customized as documented below. Finally, I cherry picked files that made sense to include on the ZSystem ROM disks.
1. CLOCKS.DAT has been updated to include the N8VEM clock drivers, N8VEMCLK AND N8CLK. I have also added the SIMHCLOK clock driver.
1. CLOCKS.DAT has been updated to include the RomWBW clock driver, HBCLK. I have also added the SIMHCLOK clock driver.
2. STAMPS.DAT has been replaced with an updated version. The update was called STAMPS11.DAT and was found on the Walnut Creek CP/M CDROM. The original version has a bug that prevents RSX (resident system extension) mode to load properly.

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@@ -0,0 +1,42 @@
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
the system.
CPM Manual:
The original DRI CP/M 2.x Operating System Manual. This should be
considered the primary reference for system operation. The section
on CP/M 2 Alteration can be ignored since this work has already been
completed as part of the RomWBW distribution.
FDisk Manual:
The operational manual for John Coffman's hard disk partitioning
program. This program is included in RomWBW as FDISK80.
RomWBW Architecture:
Document describing the architecture of the RomWBW HBIOS. It
includes reference information for the HBIOS calls.
ZCPR Manual:
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
ZSDOS Manual:
ZSDOS is the DOS portion of Z-System. This is the manual fo ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.

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@@ -1,29 +0,0 @@
@echo off
echo By default, PowerShell is configured to block the
echo execution of unsigned scripts on your local system.
echo This command file will attempt to modify your
echo PowerShell ExecutionPolicy to "Unrestricted"
echo which means that local scripts can be run without
echo being signed. This is required to use the RomWBW
echo build process.
echo.
PowerShell -command Write-Host "Your PowerShell ExecutionPolicy is currently set to: `'(Get-ExecutionPolicy)`'"
echo.
echo In order to modify the ExecutionPolicy, this command
echo file *MUST* be run with administrator privileges.
echo Generally, this means you want to right-click the
echo command file called FixPowerShell.cmd and choose
echo "Run as Administrator". If you attempt to continue
echo without administrator privileges, the modification
echo will fail with an error message, but no harm is done.
echo.
choice /m "Do you want to proceed"
if errorlevel 2 goto :eof
echo.
echo Attempting to change Execution Policy...
echo.
PowerShell Set-ExecutionPolicy Unrestricted
echo.
PowerShell -command Write-Host "Your new PowerShell ExecutionPolicy is now set to: `'(Get-ExecutionPolicy)`'"
echo.
pause

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@@ -1,920 +0,0 @@
{{
SPI interface routines for SD & SDHC & MMC cards
Jonathan "lonesock" Dummer
version 0.3.0 2009 July 19
Using multiblock SPI mode exclusively.
This is the "SAFE" version...uses
* 1 instruction per bit writes
* 2 instructions per bit reads
For the fsrw project:
fsrw.sf.net
}}
CON
' possible card types
type_MMC = 1
type_SD = 2
type_SDHC = 3
' Error codes
ERR_CARD_NOT_RESET = -1
ERR_3v3_NOT_SUPPORTED = -2
ERR_OCR_FAILED = -3
ERR_BLOCK_NOT_LONG_ALIGNED = -4
'...
' These errors are for the assembly engine...they are negated inside, and need to be <= 511
ERR_ASM_NO_READ_TOKEN = 100
ERR_ASM_BLOCK_NOT_WRITTEN = 101
' NOTE: errors -128 to -255 are reserved for reporting R1 response errors
'...
ERR_SPI_ENGINE_NOT_RUNNING = -999
ERR_CARD_BUSY_TIMEOUT = -1000
' SDHC/SD/MMC command set for SPI
CMD0 = $40+0 ' GO_IDLE_STATE
CMD1 = $40+1 ' SEND_OP_COND (MMC)
ACMD41 = $C0+41 ' SEND_OP_COND (SDC)
CMD8 = $40+8 ' SEND_IF_COND
CMD9 = $40+9 ' SEND_CSD
CMD10 = $40+10 ' SEND_CID
CMD12 = $40+12 ' STOP_TRANSMISSION
CMD13 = $40+13 ' SEND_STATUS
ACMD13 = $C0+13 ' SD_STATUS (SDC)
CMD16 = $40+16 ' SET_BLOCKLEN
CMD17 = $40+17 ' READ_SINGLE_BLOCK
CMD18 = $40+18 ' READ_MULTIPLE_BLOCK
CMD23 = $40+23 ' SET_BLOCK_COUNT (MMC)
ACMD23 = $C0+23 ' SET_WR_BLK_ERASE_COUNT (SDC)
CMD24 = $40+24 ' WRITE_BLOCK
CMD25 = $40+25 ' WRITE_MULTIPLE_BLOCK
CMD55 = $40+55 ' APP_CMD
CMD58 = $40+58 ' READ_OCR
CMD59 = $40+59 ' CRC_ON_OFF
' buffer size for my debug cmd log
'LOG_SIZE = 256<<1
{
VAR
long SPI_engine_cog
' these are used for interfacing with the assembly engine | temporary initialization usage
long SPI_command ' "t", "r", "w", 0 =>done, <0 => error | pin mask
long SPI_block_index ' which 512-byte block to read/write | cnt at init
long SPI_buffer_address ' where to get/put the data in Hub RAM | unused
'}
DAT
'' I'm placing these variables in a DAT section to make this driver a singleton.
'' If for some reason you really need more than one driver (e.g. if you have more
'' than a single SD socket), move these back into VAR.
SPI_engine_cog long 0
' these are used for interfacing with the assembly engine | temporary initialization usage
SPI_command long 0 ' "t", "r", "w", 0 =>done, <0 => error | unused
SPI_block_index long 0 ' which 512-byte block to read/write | cnt at init
SPI_buffer_address long 0 ' where to get/put the data in Hub RAM | unused
{
VAR
' for debug ONLY
byte log_cmd_resp[LOG_SIZE+1]
PUB get_log_pointer
return @log_cmd_resp
'}
PUB start( basepin )
{{
This is a compatibility wrapper, and requires that the pins be
both consecutive, and in the order DO CLK DI CS.
}}
return start_explicit( basepin, basepin+1, basepin+2, basepin+3 )
PUB readblock( block_index, buffer_address )
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
if (buffer_address & 3)
abort ERR_BLOCK_NOT_LONG_ALIGNED
SPI_block_index := block_index
SPI_buffer_address := buffer_address
SPI_command := "r"
repeat while SPI_command == "r"
if SPI_command < 0
abort SPI_command
PUB writeblock( block_index, buffer_address )
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
if (buffer_address & 3)
abort ERR_BLOCK_NOT_LONG_ALIGNED
SPI_block_index := block_index
SPI_buffer_address := buffer_address
SPI_command := "w"
repeat while SPI_command == "w"
if SPI_command < 0
abort SPI_command
PUB get_seconds
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
SPI_command := "t"
repeat while SPI_command == "t"
' secods are in SPI_block_index, remainder is in SPI_buffer_address
return SPI_block_index
PUB get_milliseconds : ms
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
SPI_command := "t"
repeat while SPI_command == "t"
' secods are in SPI_block_index, remainder is in SPI_buffer_address
ms := SPI_block_index * 1000
ms += SPI_buffer_address * 1000 / clkfreq
PUB start_explicit( DO, CLK, DI, CS ) : card_type | tmp, i
{{
Do all of the card initialization in SPIN, then hand off the pin
information to the assembly cog for hot SPI block R/W action!
}}
' Start from scratch
stop
' clear my log buffer
{
bytefill( @log_cmd_resp, 0, LOG_SIZE+1 )
dbg_ptr := @log_cmd_resp
dbg_end := dbg_ptr + LOG_SIZE
'}
' wait ~4 milliseconds
waitcnt( 500 + (clkfreq>>8) + cnt )
' (start with cog variables, _BEFORE_ loading the cog)
pinDO := DO
maskDO := |< DO
pinCLK := CLK
pinDI := DI
maskDI := |< DI
maskCS := |< CS
adrShift := 9 ' block = 512 * index, and 512 = 1<<9
' pass the output pin mask via the command register
maskAll := maskCS | (|<pinCLK) | maskDI
dira |= maskAll
' get the card in a ready state: set DI and CS high, send => 74 clocks
outa |= maskAll
repeat 4096
outa[CLK]~~
outa[CLK]~
' time-hack
SPI_block_index := cnt
' reset the card
tmp~
repeat i from 0 to 9
if tmp <> 1
tmp := send_cmd_slow( CMD0, 0, $95 )
if (tmp & 4)
' the card said CMD0 ("go idle") was invalid, so we're possibly stuck in read or write mode
if i & 1
' exit multiblock read mode
repeat 4
read_32_slow ' these extra clocks are required for some MMC cards
send_slow( $FD, 8 ) ' stop token
read_32_slow
repeat while read_slow <> $FF
else
' exit multiblock read mode
send_cmd_slow( CMD12, 0, $61 )
if tmp <> 1
' the reset command failed!
crash( ERR_CARD_NOT_RESET )
' Is this a SD type 2 card?
if send_cmd_slow( CMD8, $1AA, $87 ) == 1
' Type2 SD, check to see if it's a SDHC card
tmp := read_32_slow
' check the supported voltage
if (tmp & $1FF) <> $1AA
crash( ERR_3v3_NOT_SUPPORTED )
' try to initialize the type 2 card with the High Capacity bit
repeat while send_cmd_slow( ACMD41, |<30, $77 )
' the card is initialized, let's read back the High Capacity bit
if send_cmd_slow( CMD58, 0, $FD ) <> 0
crash( ERR_OCR_FAILED )
' get back the data
tmp := read_32_slow
' check the bit
if tmp & |<30
card_type := type_SDHC
adrShift := 0
else
card_type := type_SD
else
' Either a type 1 SD card, or it's MMC, try SD 1st
if send_cmd_slow( ACMD41, 0, $E5 ) < 2
' this is a type 1 SD card (1 means busy, 0 means done initializing)
card_type := type_SD
repeat while send_cmd_slow( ACMD41, 0, $E5 )
else
' mark that it's MMC, and try to initialize
card_type := type_MMC
repeat while send_cmd_slow( CMD1, 0, $F9 )
' some SD or MMC cards may have the wrong block size, set it here
send_cmd_slow( CMD16, 512, $15 )
' card is mounted, make sure the CRC is turned off
send_cmd_slow( CMD59, 0, $91 )
' check the status
'send_cmd_slow( CMD13, 0, $0D )
' done with the SPI bus for now
outa |= maskCS
' set my counter modes for super fast SPI operation
' writing: NCO single-ended mode, output on DI
writeMode := (%00100 << 26) | (DI << 0)
' reading
'readMode := (%11000 << 26) | (DO << 0) | (CLK << 9)
' clock
'clockLineMode := (%00110 << 26) | (CLK << 0) ' DUTY, 25% duty cycle
' clock
clockLineMode := (%00100 << 26) | (CLK << 0) ' NCO, 50% duty cycle
' how many bytes (8 clocks, >>3) fit into 1/2 of a second (>>1), 4 clocks per instruction (>>2)?
N_in8_500ms := clkfreq >> constant(1+2+3)
' how long should we wait before auto-exiting any multiblock mode?
idle_limit := 125 ' ms, NEVER make this > 1000
idle_limit := clkfreq / (1000 / idle_limit) ' convert to counts
' Hand off control to the assembly engine's cog
bufAdr := @SPI_buffer_address
sdAdr := @SPI_block_index
SPI_command := 0 ' just make sure it's not 1
' start my driver cog and wait till I hear back that it's done
SPI_engine_cog := cognew( @SPI_engine_entry, @SPI_command ) + 1
if( SPI_engine_cog == 0 )
crash( ERR_SPI_ENGINE_NOT_RUNNING )
repeat while SPI_command <> -1
' and we no longer need to control any pins from here
dira &= !maskAll
' the return variable is card_type
PUB release
{{
I do not want to abort if the cog is not
running, as this is called from stop, which
is called from start/ [8^)
}}
if SPI_engine_cog
SPI_command := "z"
repeat while SPI_command == "z"
PUB stop
{{
kill the assembly driver cog.
}}
release
if SPI_engine_cog
cogstop( SPI_engine_cog~ - 1 )
PRI crash( abort_code )
{{
In case of Bad Things(TM) happening,
exit as gracefully as possible.
}}
' and we no longer need to control any pins from here
dira &= !maskAll
' and report our error
abort abort_code
PRI send_cmd_slow( cmd, val, crc ) : reply | time_stamp
{{
Send down a command and return the reply.
Note: slow is an understatement!
Note: this uses the assembly DAT variables for pin IDs,
which means that if you run this multiple times (say for
multiple SD cards), these values will change for each one.
But this is OK as all of these functions will be called
during the initialization only, before the PASM engine is
running.
}}
' if this is an application specific command, handle it
if (cmd & $80)
' ACMD<n> is the command sequense of CMD55-CMD<n>
cmd &= $7F
reply := send_cmd_slow( CMD55, 0, $65 )
if (reply > 1)
return reply
' the CS line needs to go low during this operation
outa |= maskCS
outa &= !maskCS
' give the card a few cocks to finish whatever it was doing
read_32_slow
' send the command byte
send_slow( cmd, 8 )
' send the value long
send_slow( val, 32 )
' send the CRC byte
send_slow( crc, 8 )
' is this a CMD12?, if so, stuff byte
if cmd == CMD12
read_slow
' read back the response (spec declares 1-8 reads max for SD, MMC is 0-8)
time_stamp := 9
repeat
reply := read_slow
while( reply & $80 ) and ( time_stamp-- )
' done, and 'reply' is already pre-loaded
{
if dbg_ptr < (dbg_end-1)
byte[dbg_ptr++] := cmd
byte[dbg_ptr++] := reply
if (cmd&63) == 13
' get the second byte
byte[dbg_ptr++] := cmd
byte[dbg_ptr++] := read_slow
'}
PRI send_slow( value, bits_to_send )
value ><= bits_to_send
repeat bits_to_send
outa[pinCLK]~
outa[pinDI] := value
value >>= 1
outa[pinCLK]~~
PRI read_32_slow : r
repeat 4
r <<= 8
r |= read_slow
PRI read_slow : r
{{
Read back 8 bits from the card
}}
' we need the DI line high so a read can occur
outa[pinDI]~~
' get 8 bits (remember, r is initialized to 0 by SPIN)
repeat 8
outa[pinCLK]~
outa[pinCLK]~~
r += r + ina[pinDO]
' error check
if( (cnt - SPI_block_index) > (clkfreq << 2) )
crash( ERR_CARD_BUSY_TIMEOUT )
DAT
{{
This is the assembly engine for doing fast block
reads and writes. This is *ALL* it does!
}}
ORG 0
SPI_engine_entry
' Counter A drives data out
mov ctra,writeMode
' Counter B will always drive my clock line
mov ctrb,clockLineMode
' set our output pins to match the pin mask
mov dira,maskAll
' handshake that we now control the pins
neg user_request,#1
wrlong user_request,par
' start my seconds' counter here
mov last_time,cnt
waiting_for_command
' update my seconds counter, but also track the idle
' time so we can to release the card after timeout.
call #handle_time
' read the command, and make sure it's from the user (> 0)
rdlong user_request,par
cmps user_request,#0 wz,wc
if_be jmp #waiting_for_command
' handle our card based commands
cmp user_request,#"r" wz
if_z jmp #read_ahead
cmp user_request,#"w" wz
if_z jmp #write_behind
cmp user_request,#"z" wz
if_z jmp #release_card
' time requests are handled differently
cmp user_request,#"t" wz ' time
if_z wrlong seconds,sdAdr ' seconds goes into the SD index register
if_z wrlong dtime,bufAdr ' the remainder goes into the buffer address register
' in all other cases, clear the user's request
mov user_request,#0
wrlong user_request,par
jmp #waiting_for_command
release_card
mov user_cmd,#"z" ' request a release
neg lastIndexPlus,#1 ' reset the last block index
neg user_idx,#1 ' and make this match it
call #handle_command
mov user_request,user_cmd
wrlong user_request,par
jmp #waiting_for_command
read_ahead
rdlong user_idx,sdAdr
' if the correct block is not already loaded, load it
mov tmp1,user_idx
add tmp1,#1
cmp tmp1,lastIndexPlus wz
if_z cmp lastCommand,#"r" wz
if_z jmp #:get_on_with_it
mov user_cmd,#"r"
call #handle_command
:get_on_with_it
' copy the data up into Hub RAM
movi transfer_long,#%000010_000 'set to wrlong
call #hub_cog_transfer
' signify that the data is ready, Spin can continue
mov user_request,user_cmd
wrlong user_request,par
' request the next block
mov user_cmd,#"r"
add user_idx,#1
call #handle_command
' done
jmp #waiting_for_command
write_behind
rdlong user_idx,sdAdr
' copy data in from Hub RAM
movi transfer_long,#%000010_001 'set to rdlong
call #hub_cog_transfer
' signify that we have the data, Spin can continue
mov user_request,user_cmd
wrlong user_request,par
' write out the block
mov user_cmd,#"w"
call #handle_command
' done
jmp #waiting_for_command
{{
Set user_cmd and user_idx before calling this
}}
handle_command
' Can we stay in the old mode? (address = old_address+1) && (old mode == new_mode)
cmp lastIndexPlus,user_idx wz
if_z cmp user_cmd,lastCommand wz
if_z jmp #:execute_block_command
' we fell through, must exit the old mode! (except if the old mode was "release")
cmp lastCommand,#"w" wz
if_z call #stop_mb_write
cmp lastCommand,#"r" wz
if_z call #stop_mb_read
' and start up the new mode!
cmp user_cmd,#"w" wz
if_z call #start_mb_write
cmp user_cmd,#"r" wz
if_z call #start_mb_read
cmp user_cmd,#"z" wz
if_z call #release_DO
:execute_block_command
' track the (new) last index and command
mov lastIndexPlus,user_idx
add lastIndexPlus,#1
mov lastCommand,user_cmd
' do the block read or write or terminate!
cmp user_cmd,#"w" wz
if_z call #write_single_block
cmp user_cmd,#"r" wz
if_z call #read_single_block
cmp user_cmd,#"z" wz
if_z mov user_cmd,#0
' done
handle_command_ret
ret
{=== these PASM functions get me in and out of multiblock mode ===}
release_DO
' we're already out of multiblock mode, so
' deselect the card and send out some clocks
or outa,maskCS
call #in8
call #in8
' if you are using pull-up resistors, and need all
' lines tristated, then uncomment the following line.
' for Cluso99
'mov dira,#0
release_DO_ret
ret
start_mb_read
movi block_cmd,#CMD18<<1
call #send_SPI_command_fast
start_mb_read_ret
ret
stop_mb_read
movi block_cmd,#CMD12<<1
call #send_SPI_command_fast
call #busy_fast
stop_mb_read_ret
ret
start_mb_write
movi block_cmd,#CMD25<<1
call #send_SPI_command_fast
start_mb_write_ret
ret
stop_mb_write
call #busy_fast
' only some cards need these extra clocks
mov tmp1,#16
:loopity
call #in8
djnz tmp1,#:loopity
' done with hack
movi phsa,#$FD<<1
call #out8
call #in8 ' stuff byte
call #busy_fast
stop_mb_write_ret
ret
send_SPI_command_fast
' make sure we have control of the output lines
mov dira,maskAll
' make sure the CS line transitions low
or outa,maskCS
andn outa,maskCS
' 8 clocks
call #in8
' send the data
mov phsa,block_cmd ' do which ever block command this is (already in the top 8 bits)
call #out8 ' write the byte
mov phsa,user_idx ' read in the desired block index
shl phsa,adrShift ' this will multiply by 512 (bytes/sector) for MMC and SD
call #out8 ' move out the 1st MSB '
rol phsa,#1
call #out8 ' move out the 1st MSB '
rol phsa,#1
call #out8 ' move out the 1st MSB '
rol phsa,#1
call #out8 ' move out the 1st MSB '
' bogus CRC value
call #in8 ' in8 looks like out8 with $FF
' CMD12 requires a stuff byte
shr block_cmd,#24
cmp block_cmd,#CMD12 wz
if_z call #in8 ' 8 clocks
' get the response
mov tmp1,#9
:cmd_response
call #in8
test readback,#$80 wc,wz
if_c djnz tmp1,#:cmd_response
if_nz neg user_cmd,readback
' done
send_SPI_command_fast_ret
ret
busy_fast
mov tmp1,N_in8_500ms
:still_busy
call #in8
cmp readback,#$FF wz
if_nz djnz tmp1,#:still_busy
busy_fast_ret
ret
out8
andn outa,maskDI
'movi phsb,#%11_0000000
mov phsb,#0
movi frqb,#%01_0000000
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
mov frqb,#0
' don't shift out the final bit...already sent, but be aware
' of this when sending consecutive bytes (send_cmd, for e.g.)
out8_ret
ret
{
in8
or outa,maskDI
mov ctra,readMode
' Start my clock
mov frqa,#1<<7
mov phsa,#0
movi phsb,#%11_0000000
movi frqb,#%01_0000000
' keep reading in my value, one bit at a time! (Kuneko - "Wh)
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
mov frqb,#0 ' stop the clock
mov readback,phsa
mov frqa,#0
mov ctra,writeMode
in8_ret
ret
}
in8
neg phsa,#1' DI high
mov readback,#0
' set up my clock, and start it
movi phsb,#%011_000000
movi frqb,#%001_000000
' keep reading in my value
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
mov frqb,#0 ' stop the clock
rcl readback,#1
mov phsa,#0 'DI low
in8_ret
ret
' this is called more frequently than 1 Hz, and
' is only called when the user command is 0.
handle_time
mov tmp1,cnt ' get the current timestamp
add idle_time,tmp1 ' add the current time to my idle time counter
sub idle_time,last_time ' subtract the last time from my idle counter (hence delta)
add dtime,tmp1 ' add to my accumulator,
sub dtime,last_time ' and subtract the old (adding delta)
mov last_time,tmp1 ' update my "last timestamp"
rdlong tmp1,#0 ' what is the clock frequency?
cmpsub dtime,tmp1 wc ' if I have more than a second in my accumulator
addx seconds,#0 ' then add it to "seconds"
' this part is to auto-release the card after a timeout
cmp idle_time,idle_limit wz,wc
if_b jmp #handle_time_ret ' don't clear if we haven't hit the limit
mov user_cmd,#"z" ' we can't overdo it, the command handler makes sure
neg lastIndexPlus,#1 ' reset the last block index
neg user_idx,#1 ' and make this match it
call #handle_command ' release the card, but don't mess with the user's request register
handle_time_ret
ret
hub_cog_transfer
' setup for all 4 passes
mov ctrb,clockXferMode
mov frqb,#1
rdlong buf_ptr,bufAdr
mov ops_left,#4
movd transfer_long,#speed_buf
four_transfer_passes
' sync to the Hub RAM access
rdlong tmp1,tmp1
' how many long to move on this pass? (512 bytes / 4)longs / 4 passes
mov tmp1,#(512 / 4 / 4)
' get my starting address right (phsb is incremented 1 per clock, so 16 each Hub access)
mov phsb,buf_ptr
' write the longs, stride 4...low 2 bits of phsb are ignored
transfer_long
rdlong 0-0,phsb
add transfer_long,incDest4
djnz tmp1,#transfer_long
' go back to where I started, but advanced 1 long
sub transfer_long,decDestNminus1
' offset my Hub pointer by one long per pass
add buf_ptr,#4
' do all 4 passes
djnz ops_left,#four_transfer_passes
' restore the counter mode
mov frqb,#0
mov phsb,#0
mov ctrb,clockLineMode
hub_cog_transfer_ret
ret
read_single_block
' where am I sending the data?
movd :store_read_long,#speed_buf
mov ops_left,#128
' wait until the card is ready
mov tmp1,N_in8_500ms
:get_resp
call #in8
cmp readback,#$FE wz
if_nz djnz tmp1,#:get_resp
if_nz neg user_cmd,#ERR_ASM_NO_READ_TOKEN
if_nz jmp #read_single_block_ret
' set DI high
neg phsa,#1
' read the data
mov ops_left,#128
:read_loop
mov tmp1,#4
movi phsb,#%011_000000
:in_byte
' Start my clock
movi frqb,#%001_000000
' keep reading in my value, BACKWARDS! (Brilliant idea by Tom Rokicki!)
test maskDO,ina wc
rcl readback,#8
test maskDO,ina wc
muxc readback,#2
test maskDO,ina wc
muxc readback,#4
test maskDO,ina wc
muxc readback,#8
test maskDO,ina wc
muxc readback,#16
test maskDO,ina wc
muxc readback,#32
test maskDO,ina wc
muxc readback,#64
test maskDO,ina wc
mov frqb,#0 ' stop the clock
muxc readback,#128
' go back for more
djnz tmp1,#:in_byte
' make it...NOT backwards [8^)
rev readback,#0
:store_read_long
mov 0-0,readback ' due to some counter weirdness, we need this mov
add :store_read_long,const512
djnz ops_left,#:read_loop
' set DI low
mov phsa,#0
' now read 2 trailing bytes (CRC)
call #in8 ' out8 is 2x faster than in8
call #in8 ' and I'm not using the CRC anyway
' give an extra 8 clocks in case we pause for a long time
call #in8 ' in8 looks like out8($FF)
' all done successfully
mov idle_time,#0
mov user_cmd,#0
read_single_block_ret
ret
write_single_block
' where am I getting the data? (all 512 bytes / 128 longs of it?)
movs :write_loop,#speed_buf
' read in 512 bytes (128 longs) from Hub RAM and write it to the card
mov ops_left,#128
' just hold your horses
call #busy_fast
' $FC for multiblock, $FE for single block
movi phsa,#$FC<<1
call #out8
mov phsb,#0 ' make sure my clock accumulator is right
'movi phsb,#%11_0000000
:write_loop
' read 4 bytes
mov phsa,speed_buf
add :write_loop,#1
' a long in LE order is DCBA
rol phsa,#24 ' move A7 into position, so I can do the swizzled version
movi frqb,#%010000000 ' start the clock (remember A7 is already in place)
rol phsa,#1 ' A7 is going out, at the end of this instr, A6 is in place
rol phsa,#1 ' A5
rol phsa,#1 ' A4
rol phsa,#1 ' A3
rol phsa,#1 ' A2
rol phsa,#1 ' A1
rol phsa,#1 ' A0
rol phsa,#17 ' B7
rol phsa,#1 ' B6
rol phsa,#1 ' B5
rol phsa,#1 ' B4
rol phsa,#1 ' B3
rol phsa,#1 ' B2
rol phsa,#1 ' B1
rol phsa,#1 ' B0
rol phsa,#17 ' C7
rol phsa,#1 ' C6
rol phsa,#1 ' C5
rol phsa,#1 ' C4
rol phsa,#1 ' C3
rol phsa,#1 ' C2
rol phsa,#1 ' C1
rol phsa,#1 ' C0
rol phsa,#17 ' D7
rol phsa,#1 ' D6
rol phsa,#1 ' D5
rol phsa,#1 ' D4
rol phsa,#1 ' D3
rol phsa,#1 ' D2
rol phsa,#1 ' D1
rol phsa,#1 ' D0 will be in place _after_ this instruction
mov frqb,#0 ' shuts the clock off, _after_ this instruction
djnz ops_left,#:write_loop
' write out my two (bogus, using $FF) CRC bytes
call #in8
call #in8
' now read response (I need this response, so can't spoof using out8)
call #in8
and readback,#$1F
cmp readback,#5 wz
if_z mov user_cmd,#0 ' great
if_nz neg user_cmd,#ERR_ASM_BLOCK_NOT_WRITTEN ' oops
' send out another 8 clocks
call #in8
' all done
mov idle_time,#0
write_single_block_ret
ret
{=== Assembly Interface Variables ===}
pinDO long 0 ' pin is controlled by a counter
pinCLK long 0 ' pin is controlled by a counter
pinDI long 0 ' pin is controlled by a counter
maskDO long 0 ' mask for reading the DO line from the card
maskDI long 0 ' mask for setting the pin high while reading
maskCS long 0 ' mask = (1<<pin), and is controlled directly
maskAll long 0
adrShift long 9 ' will be 0 for SDHC, 9 for MMC & SD
bufAdr long 0 ' where in Hub RAM is the buffer to copy to/from?
sdAdr long 0 ' where on the SD card does it read/write?
writeMode long 0 ' the counter setup in NCO single ended, clocking data out on pinDI
'clockOutMode long 0 ' the counter setup in NCO single ended, driving the clock line on pinCLK
N_in8_500ms long 1_000_000 ' used for timeout checking in PASM
'readMode long 0
clockLineMode long 0
clockXferMode long %11111 << 26
const512 long 512
const1024 long 1024
incDest4 long 4 << 9
decDestNminus1 long (512 / 4 - 1) << 9
{=== Initialized PASM Variables ===}
seconds long 0
dtime long 0
idle_time long 0
idle_limit long 0
{=== Multiblock State Machine ===}
lastIndexPlus long -1 ' state handler will check against lastIndexPlus, which will not have been -1
lastCommand long 0 ' this will never be the last command.
{=== Debug Logging Pointers ===}
{
dbg_ptr long 0
dbg_end long 0
'}
{=== Assembly Scratch Variables ===}
ops_left res 1 ' used as a counter for bytes, words, longs, whatever (start w/ # byte clocks out)
readback res 1 ' all reading from the card goes through here
tmp1 res 1 ' this may get used in all subroutines...don't use except in lowest
user_request res 1 ' the main command variable, read in from Hub: "r"-read single, "w"-write single
user_cmd res 1 ' used internally to handle actual commands to be executed
user_idx res 1 ' the pointer to the Hub RAM where the data block is/goes
block_cmd res 1 ' one of the SD/MMC command codes, no app-specific allowed
buf_ptr res 1 ' moving pointer to the Hub RAM buffer
last_time res 1 ' tracking the timestamp
{{
496 longs is my total available space in the cog,
and I want 128 longs for eventual use as one 512-
byte buffer. This gives me a total of 368 longs
to use for umount, and a readblock and writeblock
for both Hub RAM and Cog buffers.
}}
speed_buf res 128 ' 512 bytes to be used for read-ahead / write-behind
'fit 467
FIT 496
'' MIT LICENSE
{{
' Permission is hereby granted, free of charge, to any person obtaining
' a copy of this software and associated documentation files
' (the "Software"), to deal in the Software without restriction,
' including without limitation the rights to use, copy, modify, merge,
' publish, distribute, sublicense, and/or sell copies of the Software,
' and to permit persons to whom the Software is furnished to do so,
' subject to the following conditions:
'
' The above copyright notice and this permission notice shall be included
' in all copies or substantial portions of the Software.
'
' THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
' EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
' MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
' IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
' CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
' TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
' SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
}}

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'' VGA_1024.spin
''
'' MODIFIED BY VINCE BRIEL FOR POCKETERM FEATURES
'' MODIIFED BY JEFF LEDGER / AKA OLDBITCOLLECTOR
''
CON
cols = 80 '128 ' number of screen columns
lcols = cols / 4 ' number of long in columns
rows = 40 '64 ' number of screen rows
chars = rows*cols ' number of screen characters
esc = $CB ' keyboard esc char
rowsnow = 36 ' adjusted for split screen effect
maxChars = rowsnow*cols ' adjusted value for split screen effect
lastChar = maxChars / 4 ' last screen position in longs adjusted for split
lastLine = (rowsnow - 1) * cols ' character position of last row
cols1 = 81 ' adjusted value for 80th character
TURQUOISE = $29
OBJ
vga : "vga_Hires_Text"
VAR
byte screen[chars] ' screen character buffer
byte tmpl[cols] ' temporary line buffer
word colors[rows] ' color specs for each screen row (see ColorPtr description above)
byte cursor[6] ' cursor info array (see CursorPtr description above)
long sync, loc, xloc, yloc ' sync used by VGA routine, others are local screen pointers
long kbdreq ' global val of kbdflag
long BR[8]
long Brate
byte inverse
byte invs
byte state ' Current state of state machine
word pos ' Current Position on the screen
word oldpos ' Previous location of cursor before update
word regionTop, regionBot ' Scroll region top/bottom
long arg0 ' First argument of escape sequence
long arg1 ' Second argument of escape sequence
byte lastc ' Last displayed char
word statpos
long vgabasepin
PUB start(BasePin) | i, char
vgabasepin := BasePin
''init screen colors to gold on blue
repeat i from 0 to rows - 1
colors[i] := $08F0 '$2804 (if you want cyan on blue)
''init cursor attributes
cursor[2] := %110 ' init cursor to underscore with slow blink
BR[0]:=300
BR[1]:=1200
BR[2]:=2400
BR[3]:=4800
BR[4]:=9600
BR[5]:=19200
BR[6]:=38400
BR[7]:=57600
BR[8]:=115200
xloc := cursor[0] := 0
yloc := cursor[1] := 0
loc := xloc + yloc*cols
pos := 0
regionTop := 0
regionBot := 35 * cols
state := 0
statpos := 37 * cols
PUB vidon
if (!vga.start(vgabasepin, @screen, @colors, @cursor, @sync))
return false
waitcnt(clkfreq * 1 + cnt) 'wait 1 second for cogs to start
PUB vidoff
vga.stop
PUB inv(c)
inverse:=c
PUB color(colorVal) | i
repeat i from 0 to rows - 1
colors[i] := $0000 | colorVal
PUB cursorset(c) | i
i:=%000
if c == 1
i:= %001
if c == 2
i:= %010
if c == 3
i:= %011
if c == 4
i:= %101
if c == 5
i:= %110
if c == 6
i:= %111
if c == 7
i:= %000
cursor[2] := i
PUB bin(value, digits)
'' Print a binary number, specify number of digits
repeat while digits > 32
outc("0")
digits--
value <<= 32 - digits
repeat digits
outc((value <-= 1) & 1 + "0")
PUB clrbtm(ColorVal) | i
repeat i from 36 to rows - 1 'was 35
colors[i] := $0000 + ColorVal
PUB cls1(c,screencolor,pcport,ascii,CR) | i,x,y
longfill(@screen[0], $20202020, chars / 4)
clrbtm(TURQUOISE)
inverse := 1
statprint(36,0, string(" N8VEM PropIO | RomWBW v0.94"))
inverse := 0
statprint(37,0, string(" "))
statprint(38,0, string(" "))
statprint(39,0, string(" "))
{{
x :=xloc
y := yloc
invs := inverse
''clrbtm(TURQUOISE)
longfill(@screen, $20202020, chars/4)
xloc := 0
yloc :=0
loc := xloc + yloc*cols
repeat 80
outc(32)
xloc := 0
yloc :=36
loc := xloc + yloc*cols
inverse := 1
str(string(" propIO V 0.91 "))
inverse := 0
str(string("Baud Rate: "))
i:= BR[6]
dec(i)
str(string(" "))
xloc := 18
loc := xloc + yloc*cols
str(string("Color "))
str(string("PC Port: "))
if pcport == 1
str(string("OFF "))
if pcport == 0
str(string("ON "))
str(string(" Force 7 bit: "))
if ascii == 0
str(string("NO "))
if ascii == 1
str(string("YES "))
str(string(" Cursor CR W/LF: "))
if CR == 1
str(string("YES"))
if CR == 0
str(string("NO "))
outc(13)
outc(10)
inverse:=1
xloc := 6
loc := xloc + yloc*cols
str(string("F1"))
xloc := 19
loc := xloc + yloc*cols
str(string("F2"))
xloc := 30
loc := xloc + yloc*cols
str(string("F3"))
xloc := 46
loc := xloc + yloc*cols
str(string("F4"))
xloc := 58
loc := xloc + yloc*cols
str(string("F5"))
xloc := 70
loc := xloc + yloc*cols
str(string("F6"))
inverse := invs
xloc := cursor[0] := x 'right & left was 0
yloc := cursor[1] := y 'from top was 1
loc := xloc + yloc*cols
}}
PUB clsupdate(c,screencolor,PCPORT,ascii,CR) | i,x,y,locold
invs := inverse
locold := loc
x := xloc
y := yloc
''(TURQUOISE)
xloc := 0
yloc :=36
loc := xloc + yloc*cols
inverse := 1
str(string(" propIO V 0.81 "))
inverse := 0
xloc := 0
yloc :=37
loc := xloc + yloc*cols
str(string("Baud Rate: "))
i:= BR[6]
dec(i)
str(string(" "))
xloc := 18
loc := xloc + yloc*cols
str(string("Color "))
str(string("PC Port: "))
if pcport == 1
str(string("OFF "))
if pcport == 0
str(string("ON "))
str(string(" Force 7 bit: "))
if ascii == 0
str(string("NO "))
if ascii == 1
str(string("YES "))
str(string(" Cursor CR W/LF: "))
if CR == 1
str(string("YES"))
if CR == 0
str(string("NO "))
xloc := 0
yloc :=38
loc := xloc + yloc*cols
inverse:=1
xloc := 6
loc := xloc + yloc*cols
str(string("F1"))
xloc := 19
loc := xloc + yloc*cols
str(string("F2"))
xloc := 30
loc := xloc + yloc*cols
str(string("F3"))
xloc := 46
loc := xloc + yloc*cols
str(string("F4"))
xloc := 58
loc := xloc + yloc*cols
str(string("F5"))
xloc := 70
loc := xloc + yloc*cols
str(string("F6"))
inverse := invs
xloc := cursor[0] := x
yloc := cursor[1] := y
' loc := xloc + yloc*cols
loc := locold
PUB dec(value) | i
'' Print a decimal number
if value < 0
-value
outc("-")
i := 1_000_000_000
repeat 10
if value => i
outc(value/i + "0")
value //= i
result~~
elseif result or i == 1
outc("0")
i /= 10
PUB hex(value, digits)
'' Print a hexadecimal number, specify number of digits
repeat while digits > 8
outc("0")
digits--
value <<= (8 - digits) << 2
repeat digits
outc(lookupz((value <-= 4) & $f : "0".."9", "A".."F"))
PUB str(string_ptr)
'' Print a zero terminated string
repeat strsize(string_ptr)
process_char(byte[string_ptr++])
PUB statprint(r, c, str1) | x, ptr
ptr := r * cols + c
repeat x from 0 to STRSIZE(str1) - 1
putc(ptr++, BYTE[str1 + x])
PUB statnum(r, c, num1) | i, ptr
ptr := r * cols + c
if num1 < 0
-num1
putc(ptr++,"-")
i := 1_000_000_000
repeat 10
if num1 => i
putc(ptr++, (num1/i +"0"))
num1 //= i
result~~
elseif result or i == 1
putc(ptr++, "0")
i /= 10
PUB putc(position, c)
if inverse
c |= $80
screen[position] := c
PUB cls
longfill (@screen, $20202020, lastChar)
PUB fullcls
longfill(@screen, $20202020, 800)
PUB setInverse(val)
inverse := val
PUB setInv(c)
if c == 7
setInverse(1)
else
setInverse(0)
PUB clEOL(position) | count
count := cols - (position // cols)
bytefill(@screen + position, $20, count)
PUB clBOL(position) | count
count := position // cols
bytefill(@screen + position - count, $20, count)
PUB delLine(position) | src, count
position -= position // cols
src := position + cols
count := (maxChars - src) / 4
if count > 0
longmove(@screen + position, @screen + src, count)
longfill(@screen + lastLine, $20202020, lcols)
PUB clEOS(position)
cleol(position)
position += cols - (position // cols)
repeat while position < maxChars
longfill(@screen + position, $20202020, lcols)
pos += cols
PUB setCursorPos(position)
cursor[0] := position // cols
cursor[1] := position / cols
PUB insLine(position) | base, nxt
base := position - (position // cols)
position := lastLine
repeat while position > base
nxt := position - cols
longmove(@screen + position, @screen + nxt, lcols)
position := nxt
clEOL(base)
PUB insChar(position) | count
count := (cols - (position // cols)) - 1
bytemove(@tmpl, @screen + position, count)
screen[position] := " "
bytemove(@screen + position + 1, @tmpl, count)
PUB delChar(position) | count
count := (cols - (position // cols)) - 1
bytemove(@screen + position, @screen + position + 1, count)
screen[position + count] := " "
PRI inRegion : answer
answer := (pos => regionTop) AND (pos < regionBot)
PRI scrollUp
delLine(regionTop)
if regionBot < maxChars
insLine(regionBot)
PRI scrollDown
if regionBot < maxChars
delLine(regionBot)
insLine(regionTop)
PRI ansi(c) | x, defVal
state := 0
if (c <> "r") AND (c <> "J") AND (c <> "m") AND (c <> "K")
if arg0 == -1
arg0 := 1
if arg1 == -1
arg1 := 1
case c
"@":
repeat while arg0-- > 0
insChar(pos)
"b":
repeat while arg0-- > 0
outc(lastc)
"d":
if (arg0 < 1) OR (arg0 > rows)
arg0 := rows
pos := ((arg0 - 1) * cols) + (pos // cols)
"m":
setInv(arg0)
if arg1 <> -1
setInv(arg1)
"r":
if arg0 < 1
arg0 := 1
elseif arg0 > cols
arg0 := cols
if arg1 < 1
arg1 := 1
elseif arg1 > cols
arg1 := cols
if arg1 < arg0
arg1 := arg0
regionTop := (arg0 - 1) * cols
regionBot := arg1 * cols
pos := 0
"A":
repeat while arg0-- > 0
pos -= cols
if pos < 0
pos += cols
return
"B":
repeat while arg0-- > 0
pos += cols
if pos => maxChars
pos -= cols
return
"C":
repeat while arg0-- > 0
pos += 1
if pos => maxChars
pos -= 1
return
"D":
repeat while arg0-- > 0
pos -= 1
if pos < 0
pos := 0
return
"G":
if (arg0 < 1) OR (arg0 > cols)
arg0 := cols
pos := (pos - (pos // cols)) + (arg0 - 1)
"H", "f":
if arg0 =< 0
arg0 := 1
if arg1 =< 0
arg1 := 1
pos := (cols * (arg0 - 1)) + (arg1 - 1)
if pos < 0
pos := 0
if pos => maxChars
pos := maxChars - 1
"J":
if arg0 == 1
clBOL(pos)
x := pos - cols
x -= x // cols
repeat while x => 0
clEOL(x)
x -= cols
return
if arg0 == 2
pos := 0
clEOL(pos)
x := pos + cols
x -= (x // cols)
repeat while x < maxChars
clEOL(x)
x += cols
"K":
if arg0 == -1
clEOL(pos)
elseif arg0 == 1
clBOL(pos)
else
clEOL(pos - (pos // cols))
"L":
if inRegion
repeat while arg0-- > 0
if regionBot < maxChars
delLine(regionBot)
insLine(pos)
"M":
if inRegion
repeat while arg0-- > 0
delLine(pos)
if regionBot < maxChars
insLine(regionBot)
"P":
repeat while arg0--
delChar(pos)
PRI outc(c)
putc(pos++, lastc := c)
if pos == regionBot
scrollUp
pos -= cols
elseif pos == maxChars
pos := lastLine
PUB process_char(c)
case state
0:
if c > 127
c := $20
if c => $20
outc(c)
setCursorPos(pos)
return
if c == $1B
state := 1
return
if c == $0D
pos := pos - (pos // cols)
setCursorPos(pos)
return
if c == $0A
if inRegion
pos += cols
if pos => regionBot
scrollUp
pos -= cols
else
pos += cols
if pos => maxChars
pos -= cols
setCursorPos(pos)
return
if c == 9
pos += (8 - (pos // 8))
if pos => maxChars
pos := lastLine
delLine(0)
setCursorPos(pos)
return
if c == 8
if pos > 0
pos -= 1
setCursorPos(pos)
return
1:
case c
"[":
arg0 := arg1 := -1
state := 2
return
"P":
pos += cols
if pos => maxChars
pos -= cols
"K":
if pos > 0
pos -= 1
"H":
pos -= cols
if pos < 0
pos += cols
"D":
if inRegion
scrollUp
"M":
if inRegion
scrollDown
"G":
pos := 0
"(":
state := 5
return
state := 0
return
2:
if (c => "0") AND (c =< "9")
if arg0 == -1
arg0 := c - "0"
else
arg0 := (arg0 * 10) + (c - "0")
return
if c == ";"
state := 3
return
ansi(c)
setCursorPos(pos)
return
3:
if (c => "0") AND (c =< "9")
if arg1 == -1
arg1 := c - "0"
else
arg1 := (arg1 * 10) + (c - "0")
return
if c == ";"
state := 4
return
ansi(c)
setCursorPos(pos)
return
4:
if (c => "0") AND (c =< "9")
return
if c == ";"
return
ansi(c)
setCursorPos(pos)
return
5:
state := 0
return
return

View File

@@ -1,920 +0,0 @@
{{
SPI interface routines for SD & SDHC & MMC cards
Jonathan "lonesock" Dummer
version 0.3.0 2009 July 19
Using multiblock SPI mode exclusively.
This is the "SAFE" version...uses
* 1 instruction per bit writes
* 2 instructions per bit reads
For the fsrw project:
fsrw.sf.net
}}
CON
' possible card types
type_MMC = 1
type_SD = 2
type_SDHC = 3
' Error codes
ERR_CARD_NOT_RESET = -1
ERR_3v3_NOT_SUPPORTED = -2
ERR_OCR_FAILED = -3
ERR_BLOCK_NOT_LONG_ALIGNED = -4
'...
' These errors are for the assembly engine...they are negated inside, and need to be <= 511
ERR_ASM_NO_READ_TOKEN = 100
ERR_ASM_BLOCK_NOT_WRITTEN = 101
' NOTE: errors -128 to -255 are reserved for reporting R1 response errors
'...
ERR_SPI_ENGINE_NOT_RUNNING = -999
ERR_CARD_BUSY_TIMEOUT = -1000
' SDHC/SD/MMC command set for SPI
CMD0 = $40+0 ' GO_IDLE_STATE
CMD1 = $40+1 ' SEND_OP_COND (MMC)
ACMD41 = $C0+41 ' SEND_OP_COND (SDC)
CMD8 = $40+8 ' SEND_IF_COND
CMD9 = $40+9 ' SEND_CSD
CMD10 = $40+10 ' SEND_CID
CMD12 = $40+12 ' STOP_TRANSMISSION
CMD13 = $40+13 ' SEND_STATUS
ACMD13 = $C0+13 ' SD_STATUS (SDC)
CMD16 = $40+16 ' SET_BLOCKLEN
CMD17 = $40+17 ' READ_SINGLE_BLOCK
CMD18 = $40+18 ' READ_MULTIPLE_BLOCK
CMD23 = $40+23 ' SET_BLOCK_COUNT (MMC)
ACMD23 = $C0+23 ' SET_WR_BLK_ERASE_COUNT (SDC)
CMD24 = $40+24 ' WRITE_BLOCK
CMD25 = $40+25 ' WRITE_MULTIPLE_BLOCK
CMD55 = $40+55 ' APP_CMD
CMD58 = $40+58 ' READ_OCR
CMD59 = $40+59 ' CRC_ON_OFF
' buffer size for my debug cmd log
'LOG_SIZE = 256<<1
{
VAR
long SPI_engine_cog
' these are used for interfacing with the assembly engine | temporary initialization usage
long SPI_command ' "t", "r", "w", 0 =>done, <0 => error | pin mask
long SPI_block_index ' which 512-byte block to read/write | cnt at init
long SPI_buffer_address ' where to get/put the data in Hub RAM | unused
'}
DAT
'' I'm placing these variables in a DAT section to make this driver a singleton.
'' If for some reason you really need more than one driver (e.g. if you have more
'' than a single SD socket), move these back into VAR.
SPI_engine_cog long 0
' these are used for interfacing with the assembly engine | temporary initialization usage
SPI_command long 0 ' "t", "r", "w", 0 =>done, <0 => error | unused
SPI_block_index long 0 ' which 512-byte block to read/write | cnt at init
SPI_buffer_address long 0 ' where to get/put the data in Hub RAM | unused
{
VAR
' for debug ONLY
byte log_cmd_resp[LOG_SIZE+1]
PUB get_log_pointer
return @log_cmd_resp
'}
PUB start( basepin )
{{
This is a compatibility wrapper, and requires that the pins be
both consecutive, and in the order DO CLK DI CS.
}}
return start_explicit( basepin, basepin+1, basepin+2, basepin+3 )
PUB readblock( block_index, buffer_address )
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
if (buffer_address & 3)
abort ERR_BLOCK_NOT_LONG_ALIGNED
SPI_block_index := block_index
SPI_buffer_address := buffer_address
SPI_command := "r"
repeat while SPI_command == "r"
if SPI_command < 0
abort SPI_command
PUB writeblock( block_index, buffer_address )
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
if (buffer_address & 3)
abort ERR_BLOCK_NOT_LONG_ALIGNED
SPI_block_index := block_index
SPI_buffer_address := buffer_address
SPI_command := "w"
repeat while SPI_command == "w"
if SPI_command < 0
abort SPI_command
PUB get_seconds
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
SPI_command := "t"
repeat while SPI_command == "t"
' secods are in SPI_block_index, remainder is in SPI_buffer_address
return SPI_block_index
PUB get_milliseconds : ms
if SPI_engine_cog == 0
abort ERR_SPI_ENGINE_NOT_RUNNING
SPI_command := "t"
repeat while SPI_command == "t"
' secods are in SPI_block_index, remainder is in SPI_buffer_address
ms := SPI_block_index * 1000
ms += SPI_buffer_address * 1000 / clkfreq
PUB start_explicit( DO, CLK, DI, CS ) : card_type | tmp, i
{{
Do all of the card initialization in SPIN, then hand off the pin
information to the assembly cog for hot SPI block R/W action!
}}
' Start from scratch
stop
' clear my log buffer
{
bytefill( @log_cmd_resp, 0, LOG_SIZE+1 )
dbg_ptr := @log_cmd_resp
dbg_end := dbg_ptr + LOG_SIZE
'}
' wait ~4 milliseconds
waitcnt( 500 + (clkfreq>>8) + cnt )
' (start with cog variables, _BEFORE_ loading the cog)
pinDO := DO
maskDO := |< DO
pinCLK := CLK
pinDI := DI
maskDI := |< DI
maskCS := |< CS
adrShift := 9 ' block = 512 * index, and 512 = 1<<9
' pass the output pin mask via the command register
maskAll := maskCS | (|<pinCLK) | maskDI
dira |= maskAll
' get the card in a ready state: set DI and CS high, send => 74 clocks
outa |= maskAll
repeat 4096
outa[CLK]~~
outa[CLK]~
' time-hack
SPI_block_index := cnt
' reset the card
tmp~
repeat i from 0 to 9
if tmp <> 1
tmp := send_cmd_slow( CMD0, 0, $95 )
if (tmp & 4)
' the card said CMD0 ("go idle") was invalid, so we're possibly stuck in read or write mode
if i & 1
' exit multiblock read mode
repeat 4
read_32_slow ' these extra clocks are required for some MMC cards
send_slow( $FD, 8 ) ' stop token
read_32_slow
repeat while read_slow <> $FF
else
' exit multiblock read mode
send_cmd_slow( CMD12, 0, $61 )
if tmp <> 1
' the reset command failed!
crash( ERR_CARD_NOT_RESET )
' Is this a SD type 2 card?
if send_cmd_slow( CMD8, $1AA, $87 ) == 1
' Type2 SD, check to see if it's a SDHC card
tmp := read_32_slow
' check the supported voltage
if (tmp & $1FF) <> $1AA
crash( ERR_3v3_NOT_SUPPORTED )
' try to initialize the type 2 card with the High Capacity bit
repeat while send_cmd_slow( ACMD41, |<30, $77 )
' the card is initialized, let's read back the High Capacity bit
if send_cmd_slow( CMD58, 0, $FD ) <> 0
crash( ERR_OCR_FAILED )
' get back the data
tmp := read_32_slow
' check the bit
if tmp & |<30
card_type := type_SDHC
adrShift := 0
else
card_type := type_SD
else
' Either a type 1 SD card, or it's MMC, try SD 1st
if send_cmd_slow( ACMD41, 0, $E5 ) < 2
' this is a type 1 SD card (1 means busy, 0 means done initializing)
card_type := type_SD
repeat while send_cmd_slow( ACMD41, 0, $E5 )
else
' mark that it's MMC, and try to initialize
card_type := type_MMC
repeat while send_cmd_slow( CMD1, 0, $F9 )
' some SD or MMC cards may have the wrong block size, set it here
send_cmd_slow( CMD16, 512, $15 )
' card is mounted, make sure the CRC is turned off
send_cmd_slow( CMD59, 0, $91 )
' check the status
'send_cmd_slow( CMD13, 0, $0D )
' done with the SPI bus for now
outa |= maskCS
' set my counter modes for super fast SPI operation
' writing: NCO single-ended mode, output on DI
writeMode := (%00100 << 26) | (DI << 0)
' reading
'readMode := (%11000 << 26) | (DO << 0) | (CLK << 9)
' clock
'clockLineMode := (%00110 << 26) | (CLK << 0) ' DUTY, 25% duty cycle
' clock
clockLineMode := (%00100 << 26) | (CLK << 0) ' NCO, 50% duty cycle
' how many bytes (8 clocks, >>3) fit into 1/2 of a second (>>1), 4 clocks per instruction (>>2)?
N_in8_500ms := clkfreq >> constant(1+2+3)
' how long should we wait before auto-exiting any multiblock mode?
idle_limit := 125 ' ms, NEVER make this > 1000
idle_limit := clkfreq / (1000 / idle_limit) ' convert to counts
' Hand off control to the assembly engine's cog
bufAdr := @SPI_buffer_address
sdAdr := @SPI_block_index
SPI_command := 0 ' just make sure it's not 1
' start my driver cog and wait till I hear back that it's done
SPI_engine_cog := cognew( @SPI_engine_entry, @SPI_command ) + 1
if( SPI_engine_cog == 0 )
crash( ERR_SPI_ENGINE_NOT_RUNNING )
repeat while SPI_command <> -1
' and we no longer need to control any pins from here
dira &= !maskAll
' the return variable is card_type
PUB release
{{
I do not want to abort if the cog is not
running, as this is called from stop, which
is called from start/ [8^)
}}
if SPI_engine_cog
SPI_command := "z"
repeat while SPI_command == "z"
PUB stop
{{
kill the assembly driver cog.
}}
release
if SPI_engine_cog
cogstop( SPI_engine_cog~ - 1 )
PRI crash( abort_code )
{{
In case of Bad Things(TM) happening,
exit as gracefully as possible.
}}
' and we no longer need to control any pins from here
dira &= !maskAll
' and report our error
abort abort_code
PRI send_cmd_slow( cmd, val, crc ) : reply | time_stamp
{{
Send down a command and return the reply.
Note: slow is an understatement!
Note: this uses the assembly DAT variables for pin IDs,
which means that if you run this multiple times (say for
multiple SD cards), these values will change for each one.
But this is OK as all of these functions will be called
during the initialization only, before the PASM engine is
running.
}}
' if this is an application specific command, handle it
if (cmd & $80)
' ACMD<n> is the command sequense of CMD55-CMD<n>
cmd &= $7F
reply := send_cmd_slow( CMD55, 0, $65 )
if (reply > 1)
return reply
' the CS line needs to go low during this operation
outa |= maskCS
outa &= !maskCS
' give the card a few cocks to finish whatever it was doing
read_32_slow
' send the command byte
send_slow( cmd, 8 )
' send the value long
send_slow( val, 32 )
' send the CRC byte
send_slow( crc, 8 )
' is this a CMD12?, if so, stuff byte
if cmd == CMD12
read_slow
' read back the response (spec declares 1-8 reads max for SD, MMC is 0-8)
time_stamp := 9
repeat
reply := read_slow
while( reply & $80 ) and ( time_stamp-- )
' done, and 'reply' is already pre-loaded
{
if dbg_ptr < (dbg_end-1)
byte[dbg_ptr++] := cmd
byte[dbg_ptr++] := reply
if (cmd&63) == 13
' get the second byte
byte[dbg_ptr++] := cmd
byte[dbg_ptr++] := read_slow
'}
PRI send_slow( value, bits_to_send )
value ><= bits_to_send
repeat bits_to_send
outa[pinCLK]~
outa[pinDI] := value
value >>= 1
outa[pinCLK]~~
PRI read_32_slow : r
repeat 4
r <<= 8
r |= read_slow
PRI read_slow : r
{{
Read back 8 bits from the card
}}
' we need the DI line high so a read can occur
outa[pinDI]~~
' get 8 bits (remember, r is initialized to 0 by SPIN)
repeat 8
outa[pinCLK]~
outa[pinCLK]~~
r += r + ina[pinDO]
' error check
if( (cnt - SPI_block_index) > (clkfreq << 2) )
crash( ERR_CARD_BUSY_TIMEOUT )
DAT
{{
This is the assembly engine for doing fast block
reads and writes. This is *ALL* it does!
}}
ORG 0
SPI_engine_entry
' Counter A drives data out
mov ctra,writeMode
' Counter B will always drive my clock line
mov ctrb,clockLineMode
' set our output pins to match the pin mask
mov dira,maskAll
' handshake that we now control the pins
neg user_request,#1
wrlong user_request,par
' start my seconds' counter here
mov last_time,cnt
waiting_for_command
' update my seconds counter, but also track the idle
' time so we can to release the card after timeout.
call #handle_time
' read the command, and make sure it's from the user (> 0)
rdlong user_request,par
cmps user_request,#0 wz,wc
if_be jmp #waiting_for_command
' handle our card based commands
cmp user_request,#"r" wz
if_z jmp #read_ahead
cmp user_request,#"w" wz
if_z jmp #write_behind
cmp user_request,#"z" wz
if_z jmp #release_card
' time requests are handled differently
cmp user_request,#"t" wz ' time
if_z wrlong seconds,sdAdr ' seconds goes into the SD index register
if_z wrlong dtime,bufAdr ' the remainder goes into the buffer address register
' in all other cases, clear the user's request
mov user_request,#0
wrlong user_request,par
jmp #waiting_for_command
release_card
mov user_cmd,#"z" ' request a release
neg lastIndexPlus,#1 ' reset the last block index
neg user_idx,#1 ' and make this match it
call #handle_command
mov user_request,user_cmd
wrlong user_request,par
jmp #waiting_for_command
read_ahead
rdlong user_idx,sdAdr
' if the correct block is not already loaded, load it
mov tmp1,user_idx
add tmp1,#1
cmp tmp1,lastIndexPlus wz
if_z cmp lastCommand,#"r" wz
if_z jmp #:get_on_with_it
mov user_cmd,#"r"
call #handle_command
:get_on_with_it
' copy the data up into Hub RAM
movi transfer_long,#%000010_000 'set to wrlong
call #hub_cog_transfer
' signify that the data is ready, Spin can continue
mov user_request,user_cmd
wrlong user_request,par
' request the next block
mov user_cmd,#"r"
add user_idx,#1
call #handle_command
' done
jmp #waiting_for_command
write_behind
rdlong user_idx,sdAdr
' copy data in from Hub RAM
movi transfer_long,#%000010_001 'set to rdlong
call #hub_cog_transfer
' signify that we have the data, Spin can continue
mov user_request,user_cmd
wrlong user_request,par
' write out the block
mov user_cmd,#"w"
call #handle_command
' done
jmp #waiting_for_command
{{
Set user_cmd and user_idx before calling this
}}
handle_command
' Can we stay in the old mode? (address = old_address+1) && (old mode == new_mode)
cmp lastIndexPlus,user_idx wz
if_z cmp user_cmd,lastCommand wz
if_z jmp #:execute_block_command
' we fell through, must exit the old mode! (except if the old mode was "release")
cmp lastCommand,#"w" wz
if_z call #stop_mb_write
cmp lastCommand,#"r" wz
if_z call #stop_mb_read
' and start up the new mode!
cmp user_cmd,#"w" wz
if_z call #start_mb_write
cmp user_cmd,#"r" wz
if_z call #start_mb_read
cmp user_cmd,#"z" wz
if_z call #release_DO
:execute_block_command
' track the (new) last index and command
mov lastIndexPlus,user_idx
add lastIndexPlus,#1
mov lastCommand,user_cmd
' do the block read or write or terminate!
cmp user_cmd,#"w" wz
if_z call #write_single_block
cmp user_cmd,#"r" wz
if_z call #read_single_block
cmp user_cmd,#"z" wz
if_z mov user_cmd,#0
' done
handle_command_ret
ret
{=== these PASM functions get me in and out of multiblock mode ===}
release_DO
' we're already out of multiblock mode, so
' deselect the card and send out some clocks
or outa,maskCS
call #in8
call #in8
' if you are using pull-up resistors, and need all
' lines tristated, then uncomment the following line.
' for Cluso99
'mov dira,#0
release_DO_ret
ret
start_mb_read
movi block_cmd,#CMD18<<1
call #send_SPI_command_fast
start_mb_read_ret
ret
stop_mb_read
movi block_cmd,#CMD12<<1
call #send_SPI_command_fast
call #busy_fast
stop_mb_read_ret
ret
start_mb_write
movi block_cmd,#CMD25<<1
call #send_SPI_command_fast
start_mb_write_ret
ret
stop_mb_write
call #busy_fast
' only some cards need these extra clocks
mov tmp1,#16
:loopity
call #in8
djnz tmp1,#:loopity
' done with hack
movi phsa,#$FD<<1
call #out8
call #in8 ' stuff byte
call #busy_fast
stop_mb_write_ret
ret
send_SPI_command_fast
' make sure we have control of the output lines
mov dira,maskAll
' make sure the CS line transitions low
or outa,maskCS
andn outa,maskCS
' 8 clocks
call #in8
' send the data
mov phsa,block_cmd ' do which ever block command this is (already in the top 8 bits)
call #out8 ' write the byte
mov phsa,user_idx ' read in the desired block index
shl phsa,adrShift ' this will multiply by 512 (bytes/sector) for MMC and SD
call #out8 ' move out the 1st MSB '
rol phsa,#1
call #out8 ' move out the 1st MSB '
rol phsa,#1
call #out8 ' move out the 1st MSB '
rol phsa,#1
call #out8 ' move out the 1st MSB '
' bogus CRC value
call #in8 ' in8 looks like out8 with $FF
' CMD12 requires a stuff byte
shr block_cmd,#24
cmp block_cmd,#CMD12 wz
if_z call #in8 ' 8 clocks
' get the response
mov tmp1,#9
:cmd_response
call #in8
test readback,#$80 wc,wz
if_c djnz tmp1,#:cmd_response
if_nz neg user_cmd,readback
' done
send_SPI_command_fast_ret
ret
busy_fast
mov tmp1,N_in8_500ms
:still_busy
call #in8
cmp readback,#$FF wz
if_nz djnz tmp1,#:still_busy
busy_fast_ret
ret
out8
andn outa,maskDI
'movi phsb,#%11_0000000
mov phsb,#0
movi frqb,#%01_0000000
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
rol phsa,#1
mov frqb,#0
' don't shift out the final bit...already sent, but be aware
' of this when sending consecutive bytes (send_cmd, for e.g.)
out8_ret
ret
{
in8
or outa,maskDI
mov ctra,readMode
' Start my clock
mov frqa,#1<<7
mov phsa,#0
movi phsb,#%11_0000000
movi frqb,#%01_0000000
' keep reading in my value, one bit at a time! (Kuneko - "Wh)
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
shr frqa,#1
mov frqb,#0 ' stop the clock
mov readback,phsa
mov frqa,#0
mov ctra,writeMode
in8_ret
ret
}
in8
neg phsa,#1' DI high
mov readback,#0
' set up my clock, and start it
movi phsb,#%011_000000
movi frqb,#%001_000000
' keep reading in my value
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
rcl readback,#1
test maskDO,ina wc
mov frqb,#0 ' stop the clock
rcl readback,#1
mov phsa,#0 'DI low
in8_ret
ret
' this is called more frequently than 1 Hz, and
' is only called when the user command is 0.
handle_time
mov tmp1,cnt ' get the current timestamp
add idle_time,tmp1 ' add the current time to my idle time counter
sub idle_time,last_time ' subtract the last time from my idle counter (hence delta)
add dtime,tmp1 ' add to my accumulator,
sub dtime,last_time ' and subtract the old (adding delta)
mov last_time,tmp1 ' update my "last timestamp"
rdlong tmp1,#0 ' what is the clock frequency?
cmpsub dtime,tmp1 wc ' if I have more than a second in my accumulator
addx seconds,#0 ' then add it to "seconds"
' this part is to auto-release the card after a timeout
cmp idle_time,idle_limit wz,wc
if_b jmp #handle_time_ret ' don't clear if we haven't hit the limit
mov user_cmd,#"z" ' we can't overdo it, the command handler makes sure
neg lastIndexPlus,#1 ' reset the last block index
neg user_idx,#1 ' and make this match it
call #handle_command ' release the card, but don't mess with the user's request register
handle_time_ret
ret
hub_cog_transfer
' setup for all 4 passes
mov ctrb,clockXferMode
mov frqb,#1
rdlong buf_ptr,bufAdr
mov ops_left,#4
movd transfer_long,#speed_buf
four_transfer_passes
' sync to the Hub RAM access
rdlong tmp1,tmp1
' how many long to move on this pass? (512 bytes / 4)longs / 4 passes
mov tmp1,#(512 / 4 / 4)
' get my starting address right (phsb is incremented 1 per clock, so 16 each Hub access)
mov phsb,buf_ptr
' write the longs, stride 4...low 2 bits of phsb are ignored
transfer_long
rdlong 0-0,phsb
add transfer_long,incDest4
djnz tmp1,#transfer_long
' go back to where I started, but advanced 1 long
sub transfer_long,decDestNminus1
' offset my Hub pointer by one long per pass
add buf_ptr,#4
' do all 4 passes
djnz ops_left,#four_transfer_passes
' restore the counter mode
mov frqb,#0
mov phsb,#0
mov ctrb,clockLineMode
hub_cog_transfer_ret
ret
read_single_block
' where am I sending the data?
movd :store_read_long,#speed_buf
mov ops_left,#128
' wait until the card is ready
mov tmp1,N_in8_500ms
:get_resp
call #in8
cmp readback,#$FE wz
if_nz djnz tmp1,#:get_resp
if_nz neg user_cmd,#ERR_ASM_NO_READ_TOKEN
if_nz jmp #read_single_block_ret
' set DI high
neg phsa,#1
' read the data
mov ops_left,#128
:read_loop
mov tmp1,#4
movi phsb,#%011_000000
:in_byte
' Start my clock
movi frqb,#%001_000000
' keep reading in my value, BACKWARDS! (Brilliant idea by Tom Rokicki!)
test maskDO,ina wc
rcl readback,#8
test maskDO,ina wc
muxc readback,#2
test maskDO,ina wc
muxc readback,#4
test maskDO,ina wc
muxc readback,#8
test maskDO,ina wc
muxc readback,#16
test maskDO,ina wc
muxc readback,#32
test maskDO,ina wc
muxc readback,#64
test maskDO,ina wc
mov frqb,#0 ' stop the clock
muxc readback,#128
' go back for more
djnz tmp1,#:in_byte
' make it...NOT backwards [8^)
rev readback,#0
:store_read_long
mov 0-0,readback ' due to some counter weirdness, we need this mov
add :store_read_long,const512
djnz ops_left,#:read_loop
' set DI low
mov phsa,#0
' now read 2 trailing bytes (CRC)
call #in8 ' out8 is 2x faster than in8
call #in8 ' and I'm not using the CRC anyway
' give an extra 8 clocks in case we pause for a long time
call #in8 ' in8 looks like out8($FF)
' all done successfully
mov idle_time,#0
mov user_cmd,#0
read_single_block_ret
ret
write_single_block
' where am I getting the data? (all 512 bytes / 128 longs of it?)
movs :write_loop,#speed_buf
' read in 512 bytes (128 longs) from Hub RAM and write it to the card
mov ops_left,#128
' just hold your horses
call #busy_fast
' $FC for multiblock, $FE for single block
movi phsa,#$FC<<1
call #out8
mov phsb,#0 ' make sure my clock accumulator is right
'movi phsb,#%11_0000000
:write_loop
' read 4 bytes
mov phsa,speed_buf
add :write_loop,#1
' a long in LE order is DCBA
rol phsa,#24 ' move A7 into position, so I can do the swizzled version
movi frqb,#%010000000 ' start the clock (remember A7 is already in place)
rol phsa,#1 ' A7 is going out, at the end of this instr, A6 is in place
rol phsa,#1 ' A5
rol phsa,#1 ' A4
rol phsa,#1 ' A3
rol phsa,#1 ' A2
rol phsa,#1 ' A1
rol phsa,#1 ' A0
rol phsa,#17 ' B7
rol phsa,#1 ' B6
rol phsa,#1 ' B5
rol phsa,#1 ' B4
rol phsa,#1 ' B3
rol phsa,#1 ' B2
rol phsa,#1 ' B1
rol phsa,#1 ' B0
rol phsa,#17 ' C7
rol phsa,#1 ' C6
rol phsa,#1 ' C5
rol phsa,#1 ' C4
rol phsa,#1 ' C3
rol phsa,#1 ' C2
rol phsa,#1 ' C1
rol phsa,#1 ' C0
rol phsa,#17 ' D7
rol phsa,#1 ' D6
rol phsa,#1 ' D5
rol phsa,#1 ' D4
rol phsa,#1 ' D3
rol phsa,#1 ' D2
rol phsa,#1 ' D1
rol phsa,#1 ' D0 will be in place _after_ this instruction
mov frqb,#0 ' shuts the clock off, _after_ this instruction
djnz ops_left,#:write_loop
' write out my two (bogus, using $FF) CRC bytes
call #in8
call #in8
' now read response (I need this response, so can't spoof using out8)
call #in8
and readback,#$1F
cmp readback,#5 wz
if_z mov user_cmd,#0 ' great
if_nz neg user_cmd,#ERR_ASM_BLOCK_NOT_WRITTEN ' oops
' send out another 8 clocks
call #in8
' all done
mov idle_time,#0
write_single_block_ret
ret
{=== Assembly Interface Variables ===}
pinDO long 0 ' pin is controlled by a counter
pinCLK long 0 ' pin is controlled by a counter
pinDI long 0 ' pin is controlled by a counter
maskDO long 0 ' mask for reading the DO line from the card
maskDI long 0 ' mask for setting the pin high while reading
maskCS long 0 ' mask = (1<<pin), and is controlled directly
maskAll long 0
adrShift long 9 ' will be 0 for SDHC, 9 for MMC & SD
bufAdr long 0 ' where in Hub RAM is the buffer to copy to/from?
sdAdr long 0 ' where on the SD card does it read/write?
writeMode long 0 ' the counter setup in NCO single ended, clocking data out on pinDI
'clockOutMode long 0 ' the counter setup in NCO single ended, driving the clock line on pinCLK
N_in8_500ms long 1_000_000 ' used for timeout checking in PASM
'readMode long 0
clockLineMode long 0
clockXferMode long %11111 << 26
const512 long 512
const1024 long 1024
incDest4 long 4 << 9
decDestNminus1 long (512 / 4 - 1) << 9
{=== Initialized PASM Variables ===}
seconds long 0
dtime long 0
idle_time long 0
idle_limit long 0
{=== Multiblock State Machine ===}
lastIndexPlus long -1 ' state handler will check against lastIndexPlus, which will not have been -1
lastCommand long 0 ' this will never be the last command.
{=== Debug Logging Pointers ===}
{
dbg_ptr long 0
dbg_end long 0
'}
{=== Assembly Scratch Variables ===}
ops_left res 1 ' used as a counter for bytes, words, longs, whatever (start w/ # byte clocks out)
readback res 1 ' all reading from the card goes through here
tmp1 res 1 ' this may get used in all subroutines...don't use except in lowest
user_request res 1 ' the main command variable, read in from Hub: "r"-read single, "w"-write single
user_cmd res 1 ' used internally to handle actual commands to be executed
user_idx res 1 ' the pointer to the Hub RAM where the data block is/goes
block_cmd res 1 ' one of the SD/MMC command codes, no app-specific allowed
buf_ptr res 1 ' moving pointer to the Hub RAM buffer
last_time res 1 ' tracking the timestamp
{{
496 longs is my total available space in the cog,
and I want 128 longs for eventual use as one 512-
byte buffer. This gives me a total of 368 longs
to use for umount, and a readblock and writeblock
for both Hub RAM and Cog buffers.
}}
speed_buf res 128 ' 512 bytes to be used for read-ahead / write-behind
'fit 467
FIT 496
'' MIT LICENSE
{{
' Permission is hereby granted, free of charge, to any person obtaining
' a copy of this software and associated documentation files
' (the "Software"), to deal in the Software without restriction,
' including without limitation the rights to use, copy, modify, merge,
' publish, distribute, sublicense, and/or sell copies of the Software,
' and to permit persons to whom the Software is furnished to do so,
' subject to the following conditions:
'
' The above copyright notice and this permission notice shall be included
' in all copies or substantial portions of the Software.
'
' THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
' EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
' MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
' IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
' CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
' TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
' SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
}}

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{{

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'' VGA_1024.spin
''
'' MODIFIED BY VINCE BRIEL FOR POCKETERM FEATURES
'' MODIIFED BY JEFF LEDGER / AKA OLDBITCOLLECTOR
''
CON
cols = 80 '128 ' number of screen columns
lcols = cols / 4 ' number of long in columns
rows = 40 '64 ' number of screen rows
chars = rows*cols ' number of screen characters
esc = $CB ' keyboard esc char
rowsnow = 36 ' adjusted for split screen effect
maxChars = rowsnow*cols ' adjusted value for split screen effect
lastChar = maxChars / 4 ' last screen position in longs adjusted for split
lastLine = (rowsnow - 1) * cols ' character position of last row
cols1 = 81 ' adjusted value for 80th character
TURQUOISE = $29
OBJ
vga : "vga_Hires_Text"
VAR
byte screen[chars] ' screen character buffer
byte tmpl[cols] ' temporary line buffer
word colors[rows] ' color specs for each screen row (see ColorPtr description above)
byte cursor[6] ' cursor info array (see CursorPtr description above)
long sync, loc, xloc, yloc ' sync used by VGA routine, others are local screen pointers
long kbdreq ' global val of kbdflag
long BR[8]
long Brate
byte inverse
byte invs
byte state ' Current state of state machine
word pos ' Current Position on the screen
word oldpos ' Previous location of cursor before update
word regionTop, regionBot ' Scroll region top/bottom
long arg0 ' First argument of escape sequence
long arg1 ' Second argument of escape sequence
byte lastc ' Last displayed char
word statpos
long vgabasepin
PUB start(BasePin) | i, char
vgabasepin := BasePin
''init screen colors to gold on blue
repeat i from 0 to rows - 1
colors[i] := $08F0 '$2804 (if you want cyan on blue)
''init cursor attributes
cursor[2] := %110 ' init cursor to underscore with slow blink
BR[0]:=300
BR[1]:=1200
BR[2]:=2400
BR[3]:=4800
BR[4]:=9600
BR[5]:=19200
BR[6]:=38400
BR[7]:=57600
BR[8]:=115200
xloc := cursor[0] := 0
yloc := cursor[1] := 0
loc := xloc + yloc*cols
pos := 0
regionTop := 0
regionBot := 35 * cols
state := 0
statpos := 37 * cols
PUB vidon
if (!vga.start(vgabasepin, @screen, @colors, @cursor, @sync))
return false
waitcnt(clkfreq * 1 + cnt) 'wait 1 second for cogs to start
PUB vidoff
vga.stop
PUB inv(c)
inverse:=c
PUB color(colorVal) | i
repeat i from 0 to rows - 1
colors[i] := $0000 | colorVal
PUB cursorset(c) | i
i:=%000
if c == 1
i:= %001
if c == 2
i:= %010
if c == 3
i:= %011
if c == 4
i:= %101
if c == 5
i:= %110
if c == 6
i:= %111
if c == 7
i:= %000
cursor[2] := i
PUB bin(value, digits)
'' Print a binary number, specify number of digits
repeat while digits > 32
outc("0")
digits--
value <<= 32 - digits
repeat digits
outc((value <-= 1) & 1 + "0")
PUB clrbtm(ColorVal) | i
repeat i from 36 to rows - 1 'was 35
colors[i] := $0000 + ColorVal
PUB cls1(c,screencolor,pcport,ascii,CR) | i,x,y
longfill(@screen[0], $20202020, chars / 4)
clrbtm(TURQUOISE)
inverse := 1
statprint(36,0, string(" N8VEM PropIO V2 | RomWBW v0.94"))
inverse := 0
statprint(37,0, string(" "))
statprint(38,0, string(" "))
statprint(39,0, string(" "))
{{
x :=xloc
y := yloc
invs := inverse
''clrbtm(TURQUOISE)
longfill(@screen, $20202020, chars/4)
xloc := 0
yloc :=0
loc := xloc + yloc*cols
repeat 80
outc(32)
xloc := 0
yloc :=36
loc := xloc + yloc*cols
inverse := 1
str(string(" propIO V 0.91 "))
inverse := 0
str(string("Baud Rate: "))
i:= BR[6]
dec(i)
str(string(" "))
xloc := 18
loc := xloc + yloc*cols
str(string("Color "))
str(string("PC Port: "))
if pcport == 1
str(string("OFF "))
if pcport == 0
str(string("ON "))
str(string(" Force 7 bit: "))
if ascii == 0
str(string("NO "))
if ascii == 1
str(string("YES "))
str(string(" Cursor CR W/LF: "))
if CR == 1
str(string("YES"))
if CR == 0
str(string("NO "))
outc(13)
outc(10)
inverse:=1
xloc := 6
loc := xloc + yloc*cols
str(string("F1"))
xloc := 19
loc := xloc + yloc*cols
str(string("F2"))
xloc := 30
loc := xloc + yloc*cols
str(string("F3"))
xloc := 46
loc := xloc + yloc*cols
str(string("F4"))
xloc := 58
loc := xloc + yloc*cols
str(string("F5"))
xloc := 70
loc := xloc + yloc*cols
str(string("F6"))
inverse := invs
xloc := cursor[0] := x 'right & left was 0
yloc := cursor[1] := y 'from top was 1
loc := xloc + yloc*cols
}}
PUB clsupdate(c,screencolor,PCPORT,ascii,CR) | i,x,y,locold
invs := inverse
locold := loc
x := xloc
y := yloc
''(TURQUOISE)
xloc := 0
yloc :=36
loc := xloc + yloc*cols
inverse := 1
str(string(" propIO V 0.81 "))
inverse := 0
xloc := 0
yloc :=37
loc := xloc + yloc*cols
str(string("Baud Rate: "))
i:= BR[6]
dec(i)
str(string(" "))
xloc := 18
loc := xloc + yloc*cols
str(string("Color "))
str(string("PC Port: "))
if pcport == 1
str(string("OFF "))
if pcport == 0
str(string("ON "))
str(string(" Force 7 bit: "))
if ascii == 0
str(string("NO "))
if ascii == 1
str(string("YES "))
str(string(" Cursor CR W/LF: "))
if CR == 1
str(string("YES"))
if CR == 0
str(string("NO "))
xloc := 0
yloc :=38
loc := xloc + yloc*cols
inverse:=1
xloc := 6
loc := xloc + yloc*cols
str(string("F1"))
xloc := 19
loc := xloc + yloc*cols
str(string("F2"))
xloc := 30
loc := xloc + yloc*cols
str(string("F3"))
xloc := 46
loc := xloc + yloc*cols
str(string("F4"))
xloc := 58
loc := xloc + yloc*cols
str(string("F5"))
xloc := 70
loc := xloc + yloc*cols
str(string("F6"))
inverse := invs
xloc := cursor[0] := x
yloc := cursor[1] := y
' loc := xloc + yloc*cols
loc := locold
PUB dec(value) | i
'' Print a decimal number
if value < 0
-value
outc("-")
i := 1_000_000_000
repeat 10
if value => i
outc(value/i + "0")
value //= i
result~~
elseif result or i == 1
outc("0")
i /= 10
PUB hex(value, digits)
'' Print a hexadecimal number, specify number of digits
repeat while digits > 8
outc("0")
digits--
value <<= (8 - digits) << 2
repeat digits
outc(lookupz((value <-= 4) & $f : "0".."9", "A".."F"))
PUB str(string_ptr)
'' Print a zero terminated string
repeat strsize(string_ptr)
process_char(byte[string_ptr++])
PUB statprint(r, c, str1) | x, ptr
ptr := r * cols + c
repeat x from 0 to STRSIZE(str1) - 1
putc(ptr++, BYTE[str1 + x])
PUB statnum(r, c, num1) | i, ptr
ptr := r * cols + c
if num1 < 0
-num1
putc(ptr++,"-")
i := 1_000_000_000
repeat 10
if num1 => i
putc(ptr++, (num1/i +"0"))
num1 //= i
result~~
elseif result or i == 1
putc(ptr++, "0")
i /= 10
PUB putc(position, c)
if inverse
c |= $80
screen[position] := c
PUB cls
longfill (@screen, $20202020, lastChar)
PUB fullcls
longfill(@screen, $20202020, 800)
PUB setInverse(val)
inverse := val
PUB setInv(c)
if c == 7
setInverse(1)
else
setInverse(0)
PUB clEOL(position) | count
count := cols - (position // cols)
bytefill(@screen + position, $20, count)
PUB clBOL(position) | count
count := position // cols
bytefill(@screen + position - count, $20, count)
PUB delLine(position) | src, count
position -= position // cols
src := position + cols
count := (maxChars - src) / 4
if count > 0
longmove(@screen + position, @screen + src, count)
longfill(@screen + lastLine, $20202020, lcols)
PUB clEOS(position)
cleol(position)
position += cols - (position // cols)
repeat while position < maxChars
longfill(@screen + position, $20202020, lcols)
pos += cols
PUB setCursorPos(position)
cursor[0] := position // cols
cursor[1] := position / cols
PUB insLine(position) | base, nxt
base := position - (position // cols)
position := lastLine
repeat while position > base
nxt := position - cols
longmove(@screen + position, @screen + nxt, lcols)
position := nxt
clEOL(base)
PUB insChar(position) | count
count := (cols - (position // cols)) - 1
bytemove(@tmpl, @screen + position, count)
screen[position] := " "
bytemove(@screen + position + 1, @tmpl, count)
PUB delChar(position) | count
count := (cols - (position // cols)) - 1
bytemove(@screen + position, @screen + position + 1, count)
screen[position + count] := " "
PRI inRegion : answer
answer := (pos => regionTop) AND (pos < regionBot)
PRI scrollUp
delLine(regionTop)
if regionBot < maxChars
insLine(regionBot)
PRI scrollDown
if regionBot < maxChars
delLine(regionBot)
insLine(regionTop)
PRI ansi(c) | x, defVal
state := 0
if (c <> "r") AND (c <> "J") AND (c <> "m") AND (c <> "K")
if arg0 == -1
arg0 := 1
if arg1 == -1
arg1 := 1
case c
"@":
repeat while arg0-- > 0
insChar(pos)
"b":
repeat while arg0-- > 0
outc(lastc)
"d":
if (arg0 < 1) OR (arg0 > rows)
arg0 := rows
pos := ((arg0 - 1) * cols) + (pos // cols)
"m":
setInv(arg0)
if arg1 <> -1
setInv(arg1)
"r":
if arg0 < 1
arg0 := 1
elseif arg0 > cols
arg0 := cols
if arg1 < 1
arg1 := 1
elseif arg1 > cols
arg1 := cols
if arg1 < arg0
arg1 := arg0
regionTop := (arg0 - 1) * cols
regionBot := arg1 * cols
pos := 0
"A":
repeat while arg0-- > 0
pos -= cols
if pos < 0
pos += cols
return
"B":
repeat while arg0-- > 0
pos += cols
if pos => maxChars
pos -= cols
return
"C":
repeat while arg0-- > 0
pos += 1
if pos => maxChars
pos -= 1
return
"D":
repeat while arg0-- > 0
pos -= 1
if pos < 0
pos := 0
return
"G":
if (arg0 < 1) OR (arg0 > cols)
arg0 := cols
pos := (pos - (pos // cols)) + (arg0 - 1)
"H", "f":
if arg0 =< 0
arg0 := 1
if arg1 =< 0
arg1 := 1
pos := (cols * (arg0 - 1)) + (arg1 - 1)
if pos < 0
pos := 0
if pos => maxChars
pos := maxChars - 1
"J":
if arg0 == 1
clBOL(pos)
x := pos - cols
x -= x // cols
repeat while x => 0
clEOL(x)
x -= cols
return
if arg0 == 2
pos := 0
clEOL(pos)
x := pos + cols
x -= (x // cols)
repeat while x < maxChars
clEOL(x)
x += cols
"K":
if arg0 == -1
clEOL(pos)
elseif arg0 == 1
clBOL(pos)
else
clEOL(pos - (pos // cols))
"L":
if inRegion
repeat while arg0-- > 0
if regionBot < maxChars
delLine(regionBot)
insLine(pos)
"M":
if inRegion
repeat while arg0-- > 0
delLine(pos)
if regionBot < maxChars
insLine(regionBot)
"P":
repeat while arg0--
delChar(pos)
PRI outc(c)
putc(pos++, lastc := c)
if pos == regionBot
scrollUp
pos -= cols
elseif pos == maxChars
pos := lastLine
PUB process_char(c)
case state
0:
if c > 127
c := $20
if c => $20
outc(c)
setCursorPos(pos)
return
if c == $1B
state := 1
return
if c == $0D
pos := pos - (pos // cols)
setCursorPos(pos)
return
if c == $0A
if inRegion
pos += cols
if pos => regionBot
scrollUp
pos -= cols
else
pos += cols
if pos => maxChars
pos -= cols
setCursorPos(pos)
return
if c == 9
pos += (8 - (pos // 8))
if pos => maxChars
pos := lastLine
delLine(0)
setCursorPos(pos)
return
if c == 8
if pos > 0
pos -= 1
setCursorPos(pos)
return
1:
case c
"[":
arg0 := arg1 := -1
state := 2
return
"P":
pos += cols
if pos => maxChars
pos -= cols
"K":
if pos > 0
pos -= 1
"H":
pos -= cols
if pos < 0
pos += cols
"D":
if inRegion
scrollUp
"M":
if inRegion
scrollDown
"G":
pos := 0
"(":
state := 5
return
state := 0
return
2:
if (c => "0") AND (c =< "9")
if arg0 == -1
arg0 := c - "0"
else
arg0 := (arg0 * 10) + (c - "0")
return
if c == ";"
state := 3
return
ansi(c)
setCursorPos(pos)
return
3:
if (c => "0") AND (c =< "9")
if arg1 == -1
arg1 := c - "0"
else
arg1 := (arg1 * 10) + (c - "0")
return
if c == ";"
state := 4
return
ansi(c)
setCursorPos(pos)
return
4:
if (c => "0") AND (c =< "9")
return
if c == ";"
return
ansi(c)
setCursorPos(pos)
return
5:
state := 0
return
return

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@@ -1,169 +1,266 @@
************************************************************
*** R o m W B W ***
*** ***
*** System Software for N8VEM Z80 Projects ***
************************************************************
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
Builders: Wayne Warthen (wwarthen@gmail.com)
Douglas Goodall (douglas_goodall@mac.com)
David Giles (vk5dg@internode.on.net)
Wayne Warthen (wwarthen@gmail.com)
Version 2.8.3, 2017-08-23
https://www.retrobrewcomputers.org/
Updated: 2014-09-19
Version: 2.6.2
RomWBW is a ROM-based implementation of CP/M-80 2.2 and Z-System for
all RetroBrew Computers Z80/Z180 hardware platforms including SBC
1/2, Zeta 1/2, N8, and Mark IV. Virtually all RetroBrew hardware is
supported including floppy, hard disk (IDE, CF Card, SD Card), Video,
and keyboard. VT-100 terminal emulation is built-in.
This is an adaptation of CP/M-80 2.2 and ZSDOS/ZCPR
targeting ROMs for all N8VEM Z80 hardware variations
including SBC, Zeta, N8, and Mark IV.
The RomWBW ROM loads and runs the built-in operating systems directly
from the ROM and includes a selection of standard/useful applications
accessed via a ROM disk drive. A RAM disk drive is also provided
to allow temporary file storage.
NOTE: This is very much a work-in-progress. It is
severely lacking appropriate documentation. I am
happy to answer questions and provide support though.
Pre-built ROM images are included for all platforms. Detailed system
customization is achieved by making simple modifications to a
configuration file and running a build script to generate a custom
ROM image. All source and build tools are included in the
distribution. As distributed, the build scripts run under any modern
32 or 64 bit version of Microsoft Windows.
Acknowledgements
----------------
John Coffman's UNA hardware BIOS is fully supported by RomWBW. In the
case of UNA, a single ROM image (pre-built) is used for all supported
platforms and is customized using a ROM-based setup program. See the
UNA section below for more information.
While I have heavily modified much of the code, I want
to acknowledge that much of this is derived or
copied from the work of others in the N8VEM
project including Andrew Lynch, Dan Werner, Max Scane,
David Giles, John Coffman, and probably many others
I am not clearly aware of (let me know if I omitted
someone!).
Quick Start
-----------
I especially want to credit Douglas Goodall for
contributing code, time, testing, and advice. He created
an entire suite of application programs to enhance the
use of RomWBW. However, he is looking for someone to
continue the maintenance of these applications and
they have become unusable due to changes within
RomWBW. As of RomWBW 2.6, these applications are
no longer provided.
A pre-built ROM image is included for each of the hardware platforms
supported. These ROM images are found in the Binary directory of the
distribution and have a file extension of ".rom". Simply program the
ROM of your system with the appropriate ROM image. Please see the
RomList.txt file in the Binary directory for details on selecting the
correct ROM image for your system and platform specific information.
David Giles has contributed support for building the
ROM under Linux and the CSIO support in the SD Card driver.
Connect a serial terminal or computer with terminal emulation
software to the primary RS-232 port of your CPU board. A null-modem
connection is generally required. Set the line characteristics to
38400 baud, 8 data bits, 1 stop bit, no parity, and no flow control.
Select VT-100 terminal emulation.
Usage Instructions
------------------
Upon power-up, your terminal should display a sign-on banner within 2
seconds followed by hardware inventory and discovery information.
When hardware initialization is completed, a boot loader prompt
allows you to choose a ROM-based operating system, system monitor, or
boot from a disk device.
The distribution includes many pre-built ROM
images in the Output directory. The simplest way of
using this ROM is to simply pick the pre-built ROM
that most closely matches your preferences, burn it,
and use it.
CPU Speed
---------
Refer to the file called RomList.txt for a complete
list of the ROMs that are included and the required
hardware configuration that they support.
RomWBW ROM images support virtually any CPU speed your system is
running. However, there are some hardware-oriented caveats to be
aware of.
The use of high density floppy disks requires a CPU speed of 8 MHz or
greater.
The latest X-Modem file transfer programs (XM.COM, XM-A0.COM, and
XM-A1.COM) require a CPU speeed of 6 MHz or greater to support the
default RomWBW serial port speed of 38400 baud. Older variants of
the X-Modem programs are included (XM5.COM, XM5-A0, and XM5-A1) which
will handle 38400 baud on system running down to 4 MHz.
Upgrading from Previous Versions
--------------------------------
Burn a new ROM image appropriate for your system
and boot under that new ROM. You may want to use
a different ROM chip in case the new version does
not work.
Program a new ROM chip from an image in the new distribution. Install
the new ROM chip and boot your system. At the boot loader "Boot:"
prompt, select either CP/M or Z-System to load the OS from ROM.
If you are using "boot from disk", you will need
to update the OS image on all drives you boot from.
To do this, use SYSCOPY. Something like this
would make sense:
If you have spare rom chips for your system, it is always safest to
keep your existing, work rom chip and program a new one so that you
can return to the old one if the new one does not work properly.
B:SYSCOPY C:=B:ZSYS.SYS
If you use a customized ROM image, it is recommended that you first
try the pre-built ROM image first and then move on to generating a
custom image.
CPU Speed & Baud Rate
---------------------
It is entirely possible to reprogram your system ROM using the FLASH
utility from Will Sowerbutts on your ROM drive (B:). In this case,
you would need to transfer the new ROM image to your system using
X-Modem. Obviously, there is some risk to this approach since any
issues with the programming or ROM image could result in a
non-functional system.
The startup serial port baud rate in all pre-built
RomWBW variants is 38.4Kbps. While this speed is
nice in that it provides great display and file
transfer performance, it does push the limits of
slower hardware. Specifically, XModem v12.5 (the
default XM.COM) on the distribution is unable to
service the serial port fast enough if the CPU is
running at 4MHz. Your options are to 1) use the
old version of XModem (XM5.COM), put a faster CPU
oscillator in your system (6MHz or above), or
3) decrease the baud rate by building a custom
ROM.
If your system has any bootable drives, then update the OS image on
each drive using SYSCOPY. For example, if C: is a bootable drive
with the Z-System OS, you would update the OS image on this drive
with the command:
UNA Variant
-----------
B>SYSCOPY C:=B:ZSYS.SYS
RomWBW will now run under it's native BIOS (HBIOS) or
under UNA BIOS (UBIOS). There are pre-built ROM
images for UNA in the Output directory.
If you have copies of any of the system utilities on drives other
than the ROM disk drive, you need to copy the latest version of the
programs from the ROM drive (B:) to any drives containing these
programs. For example, if you have a copy of the ASSIGN.COM program
on C:, you would update it from the new ROM using the COPY command:
CP/M vs. ZSystem
----------------
B>COPY B:ASSIGN.COM C:
There are two OS variants included in this distribution
and you may choose which one you prefer to use.
The following programs are maintained with the ROM images and all
copies of these programs should be updated when upgrading to a new
ROM version:
The traditional Digital Research (DRI) CP/M code is the first
choice. The Doc
directory contains a manual for CP/M usage (cpm22-m.pdf).
If you are new to the N8VEM systems, I would currently
recommend using the CP/M variant to start with simply
because they have gone through more testing and you
are less likely to encounter problems.
- ASSIGN.COM
- FORMAT.COM
- OSLDR.COM
- SYSCOPY.COM
- TALK.COM
- FD.COM
- XM*.COM
The other choice is to use the most popular non-DRI
CP/M "clone" which is generally referred to as
ZSystem. These are intended to be
functionally equivalent to CP/M and should run all
CP/M 2.2 code. They are optimized for the Z80 CPU
(as opposed to 8080 for CP/M) and have some potentially
useful improvements. Please refer to the Doc directory
and look at the files for zsdos and zcpr (zsdos.pdf &
zcpr.doc as well as ZSystem.txt).
UNA Hardware BIOS
-----------------
Both variants are now included in the pre-built ROM images.
You will be given the choice to boot either CP/M or
ZSystem at startup.
John Coffman has produced a new generation of hardware BIOS called
UNA. In addition to the classic ROM images, RomWBW comes with a
UNA-based image that combines the UNA BIOS with the RomWBW OS
implementations and applications.
Building a Custom ROM
---------------------
UNA is customized dynamically using a ROM based setup routine and the
setup is persisted in the system NVRAM of the RTC chip. This means
that a single UNA-based ROM image can be used on most of the
RetroBrew platforms and is easily customized. UNA also supports FAT
file system access that can be used for in-situ ROM programming and
loading system images.
I strongly suggest you start with burning one of the
pre-built ROMs and making sure that works first. Once
you have gotten past that hurdle, you should consider
building a custom ROM. It is very easy and the
distribution comes with everything that is needed to
run a build on a Windows 32 bit or 64 bit system --
basically Windows XP or above. There is also a
Linux build now available.
While John is likely to enhance UNA over time, there are currently a
few things that UNA does not support:
Creating a custom ROM allows you to customize a lot
of useful stuff like adding support for a DSKY if
you have one.
- Floppy Drives
- Video/Keyboard/Terminal Emulation
- Zeta 1 and N8 Systems
- Some older support boards
Please refer to the Build.txt file in the Doc directory
for detailed instructions for building a custom ROM. If
you are using Linux, also read the LinuxBuild.txt file.
If you wish to try the UNA variant of RomWBW, then just program your
ROM with the ROM image called "UNA_std.rom" in the Binary directory.
This one image is suitable on all of the platforms and hardware UNA
supports.
Formatting Media
----------------
Please refer to the RetroBrew Computers Wiki for more information on
UNA.
<TBD>
CP/M vs. Z-System
-----------------
Creating Bootable Media
There are two OS variants included in this distribution and you may
choose which one you prefer to use. Both variants are now included
in the pre-built ROM images. You will be given the choice to boot
either CP/M or Z-System at startup.
The traditional Digital Research (DRI) CP/M OS is the first choice.
The Doc directory contains a manual for CP/M usage ("CPM
Manual.pdf"). If you are new to the RetroBrew Computer systems, I
would currently recommend using the CP/M variant to start with simply
because it has gone through more testing and you are less likely to
encounter problems.
The other choice is to use the most popular non-DRI CP/M "clone"
which is generally referred to as Z-System. It is intended to be
functionally equivalent to CP/M and should run all CP/M 2.2 code. It
is optimized for the Z80 CPU (as opposed to 8080 for CP/M) and has
some potentially useful improvements. Please refer to "ZSDOS
Manual.pdf" and "ZCPR Manual.pdf" in the Doc directory for more
information on Z-System usage.
ROM Customization
-----------------
The pre-built ROM images are configured for the basic capabilities of
each platform. If you add board(s) to your system, you will need to
customize your ROM image to include support for the added board(s).
Essentially, the creation of a custom ROM is accomplished by updating
a small configuration file, then running a script to compile the
software and generate the custom ROM image. At this time, the build
process runs on Windows 32 or 64 bit versions. All tools (compilers,
assemblers, etc.) are included in the distribution, so it is not
necessary to setup a build environment on your computer.
For those who are interested in more than basic system customization,
note that all source code is included (including the operating
systems).
Note that the ROM customization process does not apply to UNA. All
UNA customization is performed within the ROM setup script.
Complete documentation of the customization process is found in the
ReadMe.txt file in the Source directory.
Source Code Respository
-----------------------
<TBD>
All source code and distributions are maintained on GitHub at
"https://github.com/wwarthen/RomWBW". Code contributions are very
welcome.
Using Slices on Mass Storage Devices
------------------------------------
Distribution Directory Layout
-----------------------------
<TBD>
The RomWBW distribution is a compressed zip archive file organized in
a set of directories. Each of these directories has it's own
ReadMe.txt file describing the contents in detail. In summary, these
directories are:
Managing Console I/O
--------------------
Binary: The final output files of the build process are placed
here. Most importantly, are the ROM images with the
file names ending in ".rom".
<TBD>
Doc: Contains various detailed documentation including the
operating systems, RomWBW architecture, etc.
Notes
Source: Contains the source code files used to build the software
and ROM images.
Tools: Contains the MS Windows programs that are used by the
build process or that may be useful in setting up your
system.
Acknowledgements
----------------
While I have heavily modified much of the code, I want to acknowledge
that much of the work is derived or copied from the work of others in
the RetroBrew Computers project including Andrew Lynch, Dan Werner,
Max Scane, David Giles, John Coffman, and probably many others I am
not clearly aware of (let me know if I omitted someone!).
I especially want to credit Douglas Goodall for contributing code,
time, testing, and advice. He created an entire suite of application
programs to enhance the use of RomWBW. However, he is looking for
someone to continue the maintenance of these applications and they
have become unusable due to changes within RomWBW. As of RomWBW 2.6,
these applications are no longer provided.
David Giles has contributed support for the CSIO support in the SD
Card driver.
The UNA BIOS is a product of John Coffman.
Getting Assistance
------------------
The best way to get assistance with RomWBW or any aspect of the
RetroBrew Computers projects is via the community forum at
"https://www.retrobrewcomputers.org/forum/".
Also feel free to email Wayne Warthen at wwarthen@gmail.com.
To Do
-----
I realize these instructions are very minimal. I am happy to answer
questions. You will find the Google Group 'N8VEM' to be a great
source of information as well.
- Formatting Media
- Making a Disk Bootable
- Assigning disks/slices to drives
- Managing the Console

View File

@@ -1,221 +0,0 @@
You should find the following ROM
images in the Output driectory.
Refer to the descriptions below to select
one that matches your hardware
configuration, burn it, and use it.
Note that there are no longer separate
ROM images for CP/M and ZSystem. Both
OS variants are now imbedded in the ROM
image and you are given the ability to
choose the one you want to boot at
startup.
Note that all builds are now set for 512KB ROMs.
The builds will work fine in 1MB ROMs. If you
want to use the full 1MB ROM address space, just
do a cutom build.
Note that all builds are now set for 38.4Kbps
baud rate on the console with 8 data bits, no
parity, and 1 stop bit. The baud rate can be
changed in the config file if you want to do a
custom build.
N8VEM_std.rom for N8VEM Z80 SBC V1/V2:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- Drives A:=ROM, B:=RAM
N8VEM_diskio.rom for N8VEM Z80 SBC V1/V2 + DISKIO:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via DISKIO
- IDE support via DISKIO
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=IDE0-00, F:=IDE0-01, G:=IDE0-02, H:=IDE0-03
N8VEM_dide.rom for N8VEM Z80 SBC V1/V2 + DUAL IDE:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via DISKIO
- IDE support via DISKIO
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=IDE0-00, F:=IDE0-01, G:=IDE0-02, H:=IDE0-03
N8VEM_diskio3.rom for N8VEM Z80 SBC V1/V2 + DISKIO3:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via DISKIO3
- IDE support via DISKIO3
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=IDE0-00, F:=IDE0-01, G:=IDE0-02, H:=IDE0-03
N8VEM_diskio3+cvdu.rom for N8VEM Z80 SBC V1/V2 + DISKIO3:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via DISKIO3
- IDE support via DISKIO3
- ColorVDU board support
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=IDE0-00, F:=IDE0-01, G:=IDE0-02, H:=IDE0-03
- NOTE: Console defaults to CRT & PS/2 Keyboard. Short JP2
(one bit input port) to use the serial port as the console.
N8VEM_ppide.rom for N8VEM Z80 SBC V1/V2 + PPIDE:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- IDE support via DISKIO
- Drives A:=ROM, B:=RAM, C:=PPIDE0-00, D:=PPIDE0-01, E:=PPIDE0-02, F:=PPIDE0-03
N8VEM_ppisd.rom for N8VEM Z80 SBC V1/V2 + PPISD:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- PPISD support
- Drives A:=ROM, B:=RAM, C:=SD0-00, D:=SD0-01, E:=SD0-02, F:=SD0-03
N8VEM_dsd.rom for N8VEM Z80 SBC V1/V2 + Dual SD:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Dual SD support
- Drives A:=ROM, B:=RAM, C:=SD0-00, D:=SD0-01, E:=SD0-02, F:=SD0-03
N8VEM_propio.rom for N8VEM Z80 SBC V1/V2 + PROPIO:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- SD Card support via PropIO
- VGA console support via PropIO
- PS/2 Keyboard support via PropIO
- Drives A:=ROM, B:=RAM, C:=PRPSD0-00, D:=PRPSD0-01, E:=PRPSD0-02, F:=PRPSD0-03
- WARNING: You must use the RomWBW specific firmware
for the Propeller found in the Support directory!
- NOTE: Console defaults to VGA & PS/2 Keyboard. Short JP2
(one bit input port) to use the serial port as the console.
N8VEM_mfp.rom for N8VEM Z80 SBC V1/V2:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy)
- Drives A:=ROM, B:=RAM, C:=PPIDE0-00, D:=PPIDE0-01, E:=PPIDE0-02, F:=PPIDE0-03
- IDE support via Multifunction / PIC
- Second UART via Multifunction / PIC
N8VEM_ci.rom for N8VEM Z80 SBC V1/V2:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- Drives A:=ROM, B:=RAM
- Cassette Interface mapped to RDR/PUN
N8VEM_simh.rom for N8VEM SIMH Simulator:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- Drives A:=ROM, B:=RAM, C:=HDSK0-00, D:=HDSK0-01, E:=HDSK0-02, F:=HDSK0-03
N8VEM_rf.rom for N8VEM Z80 SBC V1/2 + RAM Flopppy:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- RAM Floppy support
- Drives A:=ROM, B:=RAM, C:=RF0, D:=RF1
N8VEM_vdu.rom for N8VEM Z80 SBC V1/V2:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- VDU board support
- Drives A:=ROM, B:=RAM
- NOTE: Console defaults to CRT & PS/2 Keyboard. Short JP2
(one bit input port) to use the serial port as the console.
N8VEM_cvdu.rom for N8VEM Z80 SBC V1/V2:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- ColorVDU board support
- Drives A:=ROM, B:=RAM
- NOTE: Console defaults to CRT & PS/2 Keyboard. Short JP2
(one bit input port) to use the serial port as the console.
ZETA_std.rom for Zeta Z80 SBC:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via built-in FDC
- PPIDE support via built-in PPI
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=PPIDE00-0, F:=PPIDE0-01, G:=PPIDE0-02, H:=PPIDE0-03
ZETA_ppp.rom for Zeta Z80 SBC w/ ParPortProp:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via built-in FDC
- SD Card support via ParPortProp
- VGA console support via ParPortProp
- PS/2 Keyboard support via ParPortProp
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=PPPSD0-00, F:=PPPSD0-01, F:=PPPSD0-02, G:=PPPSD0-03
- WARNING: You must use the RomWBW specific firmware
for the Propeller found in the Support directory!
- NOTE: Console defaults to VGA & PS/2 Keyboard. Short JP1 (CONFIG)
to use the serial port as the console.
N8_2511.rom for N8 2511 Z180:
- Assumes oscillator frequency of 18.432MHz
- CPU clock at X1 (18.432MHz)
- 512KB ROM, 1MB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via built-in FDC
- SD card support via built-in SD card slot
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=SD0-00, F:=SD0-01, G:=SD0-02, H:=SD0-03
N8_2312.rom for N8 2312 Z180:
- Assumes oscillator frequency of 18.432MHz
- CPU clock at X1 (18.432MHz)
- 512KB ROM, 1MB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk
- Floppy support via built-in FDC
- SD card support via built-in SD card slot
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=SD0-00, F:=SD0-01, G:=SD0-02, H:=SD0-03
MK4_std.rom for Mark IV Z180 SBC:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- Onboard SD Card
- Onboard IDE
- Drives A:=ROM, B:=RAM, C:=SD0-0, D:=SD0-1, E:=IDE0-00, F:=IDE0-01
MK4_diskio3.rom for Mark IV Z180 SBC:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- Floppy support via DISKIO3
- IDE support via DISKIO3
- Drives A:=ROM, B:=RAM, C:=FD0, D:=FD1, E:=IDE0-00, F:=IDE0-01, G:=IDE0-02, H:=IDE0-03
MK4_propio.rom for Mark IV Z180 SBC:
- 512KB ROM, 512KB RAM
- 38.4KB serial console baud rate
- Basic ROM/RAM disk (no floppy/IDE)
- SD Card support via PropIO
- VGA console support via PropIO
- PS/2 Keyboard support via PropIO
- Drives A:=ROM, B:=RAM, C:=PRPSD0-00, D:=PRPSD0-01, E:=PRPSD0-02, F:=PRPSD0-03
- WARNING: You must use the RomWBW specific firmware
for the Propeller found in the Support directory!
- NOTE: Console defaults to VGA & PS/2 Keyboard. Short JP2
(one bit input port) to use the serial port as the console.
UNA_std.rom for all UNA support platforms (SBC V1/2, Zeta, N8, Mark IV)
- 512KB ROM
- Initial baud rate is 9600, but can be configured
- Resources are managed dynamically by UNA BIOS
- Refer to UNA project for more details

File diff suppressed because it is too large Load Diff

View File

@@ -18,6 +18,8 @@
;_______________________________________________________________________________
;
; Change Log:
; 2016-03-21 [WBW] Updated for HBIOS 2.8
; 2016-04-08 [WBW] Determine key memory addresses dynamically
;_______________________________________________________________________________
;
; ToDo:
@@ -37,7 +39,7 @@ bdos .equ $0005 ; BDOS invocation vector
stamp .equ $40 ; loc of RomWBW CBIOS zero page stamp
;
rmj .equ 2 ; CBIOS version - major
rmn .equ 6 ; CBIOS version - minor
rmn .equ 8 ; CBIOS version - minor
;
;===============================================================================
; Code Section
@@ -76,11 +78,11 @@ exit: ; clean up and return to command processor
;
init:
;
; locate cbios function table address
; locate start of cbios (function jump table)
ld hl,(restart+1) ; load address of CP/M restart vector
ld de,-3 ; adjustment for start of table
add hl,de ; HL now has start of table
ld (cbftbl),hl ; save it
ld (bioloc),hl ; save it
;
; get location of config data and verify integrity
ld hl,stamp ; HL := adr or RomWBW zero page stamp
@@ -132,23 +134,60 @@ init:
ld c,a ; set BC := 0A
ld b,0 ; ... so BC is length to copy
ldir ; do the copy
;
; determine end of CBIOS (assume HBIOS for now)
ld hl,($FFFE) ; get proxy start address
ld (bioend),hl ; save as CBIOS end address
;
; check for UNA (UBIOS)
ld a,($fffd) ; fixed location of UNA API vector
cp $c3 ; jp instruction?
ld a,($FFFD) ; fixed location of UNA API vector
cp $C3 ; jp instruction?
jr nz,initx ; if not, not UNA
ld hl,($fffe) ; get jp address
ld hl,($FFFE) ; get jp address
ld a,(hl) ; get byte at target address
cp $fd ; first byte of UNA push ix instruction
cp $FD ; first byte of UNA push ix instruction
jr nz,initx ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $e5 ; second byte of UNA push ix instruction
cp $E5 ; second byte of UNA push ix instruction
jr nz,initx ; if not, not UNA
ld hl,unamod ; point to UNA mode flag
ld (hl),$ff ; set UNA mode
ld (hl),$FF ; set UNA mode flag
ld c,$F1 ; UNA func: Get HMA
rst 08 ; call UNA, HL := UNA proxy start address
ld (bioend),hl ; save as CBIOS end address
;
initx:
; compute size of CBIOS
ld hl,(bioend) ; HL := end address
ld de,(bioloc) ; DE := starting address
xor a ; clear carry
sbc hl,de ; subtract to get size in HL
ld (biosiz),hl ; and save it
;
; establish heap limit
ld hl,(bioend) ; HL := end of CBIOS address
ld de,-$40 ; allow 40 bytes for CBIOS stack
add hl,de ; adjust
ld (heaplim),hl ; save it
;
#if 0
ld a,' '
call crlf
ld bc,(bioloc)
call prthexword
call prtchr
ld bc,(bioend)
call prthexword
call prtchr
ld bc,(maploc)
call prthexword
call prtchr
ld bc,(heaplim)
call prthexword
#endif
;
; return success
xor a ; signal success
ret ; return
@@ -274,7 +313,7 @@ usage:
call crlf2 ; blank line
ld de,msguse ; point to usage message
call prtstr ; print it
or $ff ; signal no action performed
or $FF ; signal no action performed
ret ; and return
;
devlist:
@@ -283,28 +322,24 @@ devlist:
or a ; set flags
jr nz,devlstu ; do UNA mode dev list
;
ld b,$1a ; hbios func: diodevcnt
rst 08 ; call hbios, device count to B
ld b,$F8 ; hbios func: sysget
ld c,$10 ; sysget subfunc: diocnt
rst 08 ; call hbios, E := device count
ld b,e ; use device count for loop count
ld c,0 ; use C for device index
devlist1:
call crlf ; formatting
ld de,indent ; indent
call prtstr ; ... to look nice
push bc ; preserve loop control
ld b,$1b ; hbios func: diodevinf
rst 08 ; call hbios, return device/unit in C
ld a,c ; device/unit to A
push af ; save it
ld a,c ; device to A
call prtdev ; print device mnemonic
pop af ; get device/unit back
and $0f ; isolate unit num
call prtdecb ; append unit num
ld a,':' ; colon for device/unit format
call prtchr ; print it
pop bc ; restore loop control
inc c ; next device index
djnz devlist1 ; loop as needed
or $ff ; signal no action taken
or $FF ; signal no action taken
ret ; done
;
devlstu:
@@ -339,19 +374,19 @@ devlstu1:
;
install:
; capture CBIOS snapshot and stack frame for error recovery
ld hl,$e600 ; start of CBIOS
ld hl,(bioloc) ; start of CBIOS
ld de,$8000 ; save it here
ld bc,$fc00 - $e600 ; size of CBIOS
ld bc,(biosiz) ; size of CBIOS
ldir ; save it
ld (xstksav),sp ; save stack frame
; clear CBIOS buffer area
ld hl,(maploc) ; start fill at drive map
ld a,$FC ; stop when msb is $FC
ld a,(bioend + 1) ; msb of CBIOS end address to A
install1:
ld e,0 ; fill with null
ld (hl),e ; fill next byte
inc hl ; point to next byte
cp h ; is H == $FC?
cp h ; is H == msb of CBIOS end address?
jr nz,install1 ; if not, loop
;
; determine the drive map entry count
@@ -387,15 +422,13 @@ install3:
ld de,(maploc) ; target is CBIOS map loc
ldir ; do it
;
; set start of allocation memory
ld (buftop),de ; DE has next byte available
; set start of memory allocation heap
ld (heaptop),de ; DE has next byte available
;
; allocate directory buffer
ld bc,128 ; size of directory buffer
ld hl,128 ; size of directory buffer
call alloc ; allocate the space
jp nz,instovf ; handle overflow error
push bc ; move mem pointer
pop hl ; ... to hl
jp c,instovf ; handle overflow error
ld (dirbuf),hl ; ... and save in dirbuf
;
dph_init:
@@ -412,22 +445,22 @@ dph_init:
dph_init1:
; no DPH if drive not assigned
ld a,(hl)
cp $ff
cp $FF
jr nz,dph_init2
ld de,0 ; not assigned, use DPH pointer of zero
jr dph_init3
;
dph_init2:
ld a,(hl) ; unit to A
push bc ; save loop control
push hl ; save drive map pointer
ld bc,16 ; size of a DPH structure
ld hl,16 ; size of a DPH structure
call alloc ; allocate space for dph
jp nz,instovf ; handle overflow error
push bc ; save DPH location
push bc ; move DPH location
jp c,instovf ; handle overflow error
push hl ; save DPH location
push hl ; move DPH location
pop de ; ... to DE
ld a,(hl) ; device/unit to A
call makdph ; make the DPH
call makdph ; make the DPH, unit in A from above
pop de ; restore DPH pointer to DE
pop hl ; restore drive map pointer to HL
pop bc ; restore loop control
@@ -446,8 +479,8 @@ dph_init3:
call crlf2
ld de,indent
call prtstr
ld hl,$fc00 - $40 ; subtract high water
ld de,(buftop) ; ... from top of cbios
ld hl,(heaplim) ; subtract high water
ld de,(heaptop) ; ... from top of cbios
or a ; ... with cf clear
sbc hl,de ; ... so hl gets bytes free
call prtdecw ; print it
@@ -504,7 +537,7 @@ makdphwbw: ; determine appropriate dpb (WBW mode)
ld e,2 ; assume ram
cp $00+1 ; ram?
jr z,makdph0 ; yes, jump ahead
and $f0 ; ignore unit nibble now
and $F0 ; ignore unit nibble now
ld e,6 ; assume floppy
cp $10 ; floppy?
jr z,makdph0 ; yes, jump ahead
@@ -547,19 +580,57 @@ makdph1:
dec de ; ... prefix data (cks & als buf sizes)
call makdph2 ; handle cks buf, then fall thru for als buf
ret nz ; bail out on error
;makdph2:
; ex de,hl ; point hl to cks/als size adr
; ld c,(hl) ; bc := cks/als size
; inc hl ; ... and bump
; ld b,(hl) ; ... past
; inc hl ; ... cks/als size
; ex de,hl ; bc and hl roles restored
; ld a,b ; check to see
; or c ; ... if bc is zero
; jr z,makdph3 ; if zero, bypass alloc, use zero for address
; call alloc ; alloc bc bytes, address returned in bc
; jp nz,instovf ; handle overflow error
;makdph3:
; ld (hl),c ; save cks/als buf
; inc hl ; ... address in
; ld (hl),b ; ... dph and bump
; inc hl ; ... to next dph entry
; xor a ; signal success
; ret
makdph2:
ex de,hl ; point hl to cks/als size adr
ld c,(hl) ; bc := cks/als size
inc hl ; ... and bump
ld b,(hl) ; ... past
inc hl ; ... cks/als size
ex de,hl ; bc and hl roles restored
ld a,b ; check to see
or c ; ... if bc is zero
jr z,makdph3 ; if zero, bypass alloc, use zero for address
call alloc ; alloc bc bytes, address returned in bc
jp nz,instovf ; handle overflow error
; DE = address of CKS or ALS buf to allocate
; HL = address of field in DPH to get allocated address
push hl ; save DPH field ptr
pop bc ; into BC
;
; HL := alloc size, DE bumped
ex de,hl
ld e,(hl) ; get size to allocate
inc hl ; ...
ld d,(hl) ; ... into HL
inc hl ; and bump DE
ex de,hl
;
; check for size of zero, special case
ld a,h ; check to see
or l ; ... if hl is zero
jr z,makdph3 ; if so, jump ahead using hl as address
;
; allocate memory
call alloc ; do the allocation
jp c,instovf ; bail out on overflow
makdph3:
; swap hl and bc
push bc ; bc -> (sp)
ex (sp),hl ; (sp) -> hl, hl -> (sp)
pop bc ; (sp) -> bc
;
; save allocated address
ld (hl),c ; save cks/als buf
inc hl ; ... address in
ld (hl),b ; ... dph and bump
@@ -573,40 +644,30 @@ instovf:
; restore stack frame and CBIOS image
ld sp,(xstksav) ; restore stack frame
ld hl,$8000 ; start of CBIOS image buffer
ld de,$e600 ; start of CBIOS
ld bc,$fc00 - $e600 ; size of CBIOS
ld de,(bioloc) ; start of CBIOS
ld bc,(biosiz) ; size of CBIOS
ldir ; restore it
jp errovf
;
; Allocate HL bytes from heap
; Return pointer to allocated memory in HL
; On overflow error, C set
;
alloc:
;
; allocate bc bytes from buf pool, return starting
; address in bc. leave all other regs alone except a
; z for success, nz for failure
;
push de ; save original de
push hl ; save original hl
ld hl,(buftop) ; hl := current buffer top
push hl ; save as start of new buffer
push bc ; get byte count
pop de ; ... into de
add hl,de ; add it to buffer top
ld a,$ff ; assume overflow failure
jr c,alloc1 ; if overflow, bypass with a == $ff
push hl ; save it
ld de,$10000 - $FC00 + $40 ; setup de for overflow test
add hl,de ; check for overflow
pop hl ; recover hl
ld a,$ff ; assume failure
jr c,alloc1 ; if overflow, continue with a == $ff
ld (buftop),hl ; save new top
inc a ; signal success
;
alloc1:
pop bc ; buf start address to bc
pop hl ; restore original hl
pop de ; restore original de
or a ; signal success
push de ; save de so we can use it for work reg
ld de,(heaptop) ; get current heap top
push de ; and save for return value
add hl,de ; add requested space, hl := new heap top
jr c,allocx ; test for cpu memory space overflow
ld de,(heaplim) ; load de with heap limit
ex de,hl ; de=new heaptop, hl=heaplim
sbc hl,de ; heaplim - heaptop
jr c,allocx ; c set on overflow error
; allocation succeeded, commit new heaptop
ld (heaptop),de ; save new heaptop
allocx:
pop hl ; return value to hl
pop de ; recover de
ret
;
; Scan drive map table for integrity
@@ -618,7 +679,7 @@ valid:
ld b,16 - 1 ; loop one less times than num entries
;
; check that drive A: is assigned
ld a,$ff ; value that indicates unassigned
ld a,$FF ; value that indicates unassigned
cp (hl) ; compare to A: value
jp z,errnoa ; handle failure
;
@@ -644,11 +705,11 @@ valid2: ; setup for inner loop
;
valid3: ; inner loop
; bypass unassigned drives (only need to test 1)
ld a,(hl) ; get first drive device/unit in A
cp $ff ; unassigned?
ld a,(hl) ; get first drive unit in A
cp $FF ; unassigned?
jr z,valid4 ; yes, skip
;
; compare device/unit/slice values
; compare unit/slice values
ld a,(de) ; first byte to A
cp (hl) ; compare
jr nz,valid4 ; if not equal, continue loop
@@ -692,7 +753,7 @@ drvdel:
rlca ; ... as drive num * 4
call addhl ; get final table offset
; wipe out the drive letter
ld a,$ff ; dev/unit := $FF (unassigned)
ld a,$FF ; dev/unit := $FF (unassigned)
ld (hl),a ; do it
xor a ; zero accum
inc hl ; slice := 0
@@ -768,7 +829,7 @@ drvswap:
xor a ; signal success
ret ; exit
;
; Assign drive to specified device/unit/slice
; Assign drive to specified unit/slice
;
drvmap:
; check for UNA mode
@@ -801,32 +862,46 @@ drvmap1: ; loop through device table looking for a match
djnz drvmap1 ; and loop
jp errdev
;
drvmap2: ; verify the unit is eligible for assignment (hard disk unit only!)
ld a,c ; get the specified device number
; call chktyp ; check it
; jp nz,errtyp ; abort with bad unit error
;
; construct the requested dph table entry
ld a,c ; C has device num
drvmap2:
; convert index to device type id
ld a,c ; index to accum
rlca ; move it to upper nibble
rlca ; ...
rlca ; ...
rlca ; ...
ld c,a ; stash it back in C
ld a,(unit) ; get the unit number
or c ; combine device and unit
ld c,a ; and save in C
ld a,(slice) ; get the slice
ld b,a ; and save in B
ld (device),a ; save as device id
;
; check for valid device/unit (supported by BIOS)
push bc ; save device/unit/slice
ld a,c ; device/unit to A
call chkdev ; device/unit OK?
pop bc ; restore device/unit/slice
; jp nz,errdev ; invalid device specified
ret nz
; loop thru hbios units looking for device type/unit match
ld b,$F8 ; hbios func: sysget
ld c,$10 ; sysget subfunc: diocnt
rst 08 ; call hbios, E := device count
ld b,e ; use device count for loop count
ld c,0 ; use C for device index
drvmap3:
push bc ; preserve loop control
ld b,$17 ; hbios func: diodevice
rst 08 ; call hbios, D := device, E := unit
pop bc ; restore loop control
ld a,(device)
cp d
jr nz,drvmap4
ld a,(unit)
cp e
jr z,drvmap5 ; match, continue, C = BIOS unit
drvmap4:
; continue looping
inc c
djnz drvmap3
jp errdev ; invalid device specified
;
drvmap5:
; check for valid unit (supported by BIOS)
push bc ; save unit
ld a,c ; unit to A
call chkdev ; check validity
pop bc ; restore unit
ret nz ; bail out on error
; resolve the CBIOS DPH table entry
ld a,(dstdrv) ; dest drv num to A
call chkdrv ; valid drive?
@@ -837,10 +912,11 @@ drvmap2: ; verify the unit is eligible for assignment (hard disk unit only!)
call addhl ; adjust HL to point to entry
ld (dstptr),hl ; save it
;
; shove updated device/unit/slice into the entry
ld (hl),c ; save device/unit byte
; shove updated unit/slice into the entry
ld (hl),c ; save unit byte
inc hl ; bump to next byte
ld (hl),b ; save slice
ld a,(slice)
ld (hl),a ; save slice
;
; finish up
ld a,(dstdrv) ; get the destination drive
@@ -911,14 +987,7 @@ drvmapu1:
call addhl ; adjust HL to point to entry
ld (dstptr),hl ; save it
;
; ; verify the drive letter being assigned is a hard disk
; ld a,(hl) ; get the device/unit byte
; push hl ; save pointer
; call chktypu ; check it
; pop hl ; recover pointer
; jp nz,errtyp ; abort with bad device type error
;
; shove updated device/unit/slice into the entry
; shove updated unit/slice into the entry
ld a,(unit) ; get specified unit
ld (hl),a ; save it
inc hl ; next byte is slice
@@ -940,15 +1009,17 @@ showall:
ld c,0 ; map index (drive letter)
;
ld a,b ; load count
or $ff ; signal no action
or $FF ; signal no action
ret z ; bail out if zero
;
showall1: ; loop
ld a,c ;
push bc ; save loop control
call showass
pop bc ; restore loop control
inc c
djnz showall1
or $ff
or $FF
ret
;
; Display drive letter assignment IF it is assigned
@@ -962,8 +1033,8 @@ showass:
rlca
rlca
call addhl ; HL = address of drive map table entry
ld a,(hl) ; get device/unit value
cp $ff ; compare to unassigned value
ld a,(hl) ; get unit value
cp $FF ; compare to unassigned value
ld a,c ; recover original drive num
ret z ; bail out if unassigned drive
; fall thru to display drive
@@ -997,16 +1068,15 @@ showone:
call prtchr ; print it
;
; render the map entry
ld a,(hl) ; load device/unit
ld a,(hl) ; load unit
cp $FF ; empty?
ret z ; yes, bypass
push hl ; preserve HL
call prtdev ; print device mnemonic
ld a,(hl) ; load device/unit again
and $0f ; isolate unit num
call prtdecb ; print it
inc hl ; point to slice num
ld a,':' ; colon to separate slice
ld a,':' ; colon for device/unit format
call prtchr ; print it
pop hl ; recover HL
inc hl ; point to slice num
ld a,(hl) ; load slice num
call prtdecb ; print it
;
@@ -1015,11 +1085,11 @@ showone:
; Force BDOS to reset (logout) all drives
;
drvrst:
ld c,$0d ; BDOS Reset Disk function
ld c,$0D ; BDOS Reset Disk function
call bdos ; do it
;
ld c,$25 ; BDOS Reset Multiple Drives
ld de,$ffff ; all drives
ld de,$FFFF ; all drives
call bdos ; do it
;
xor a ; signal success
@@ -1033,11 +1103,16 @@ prtdev:
or a ; set flags
ld a,e ; put device num back
jr nz,prtdevu ; print device in UNA mode
ld b,$17 ; hbios func: diodevice
ld c,a ; unit to C
rst 08 ; call hbios, D := device, E := unit
push de ; save results
ld a,d ; device to A
rrca ; isolate high nibble (device)
rrca ; ...
rrca ; ...
rrca ; ... into low nibble
and $0f ; mask out undesired bits
and $0F ; mask out undesired bits
push hl ; save HL
add a,a ; multiple A by two for word table
ld hl,devtbl ; point to start of device name table
@@ -1048,54 +1123,63 @@ prtdev:
ld e,a ; ...
call prtstr ; print the device nmemonic
pop hl ; restore HL
pop de ; get device/unit data back
ld a,e ; device id to a
call prtdecb ; print it
ret ; done
;
prtdevu:
ld e,a ; save unit num in E
push bc
push de
push hl
;
; UNA mode version of print device
ld b,a ; B := unit num
push bc ; save for later
ld c,$48 ; UNA func: get disk type
rst 08 ; call UNA
ld a,d ; disk type to A
pop hl
pop de
pop bc
pop bc ; get unit num back in C
;
; pick string based on disk type
cp $40 ; RAM/ROM?
jr z,prtdevu1 ; if so, handle it
cp $41 ; IDE?
ld de,udevide ; load string
jp z,prtstr ; if IDE, print and return
jr z,prtdevu2 ; if IDE, print and return
cp $42 ; PPIDE?
ld de,udevppide ; load string
jp z,prtstr ; if PPIDE, print and return
jr z,prtdevu2 ; if PPIDE, print and return
cp $43 ; SD?
ld de,udevsd ; load string
jp z,prtstr ; if SD, print and return
jr z,prtdevu2 ; if SD, print and return
cp $44 ; DSD?
ld de,udevdsd ; load string
jp z,prtstr ; if DSD, print and return
jr z,prtdevu2 ; if DSD, print and return
ld de,udevunk ; load string for unknown
jp prtstr ; and print it
jr prtdevu2 ; and print it
;
prtdevu1:
; handle RAM/ROM
push bc
push hl
ld b,e ; unit num to B
push bc ; save unit num
ld c,$45 ; UNA func: get disk info
ld de,$9000 ; 512 byte buffer *** FIX!!! ***
rst 08 ; call UNA
bit 7,b ; test RAM drive bit
pop hl
pop bc
pop bc ; restore unit num
ld de,udevrom ; load string
jp z,prtstr ; print and return
jr z,prtdevu2 ; print and return
ld de,udevram ; load string
jp prtstr ; print and return
jr prtdevu2 ; print and return
;
prtdevu2:
call prtstr ; print the device nmemonic
ld a,b ; get the unit num back
call prtdecb ; append it
pop hl
pop de
pop bc
ret
;
; Check that specified drive num is valid
;
@@ -1105,36 +1189,32 @@ chkdrv:
cp a ; set Z to signal good
ret ; and return
;
; Check that the device/unit value in A is valid
; Check that the unit value in A is valid
; according to active BIOS support.
;
;
chkdev: ; HBIOS variant
push af ; save incoming device/unit
ld b,$1a ; hbios func: diodevcnt
rst 08 ; call hbios, device count to B
ld c,0 ; use C for device index
pop af ; restore incoming device/unit
chkdev1:
push bc ; preserve loop control
push af ; save incoming device/unit
ld b,$1b ; hbios func: diodevinf
rst 08 ; call hbios, return device/unit in C
pop af ; restore incoming device/unit
cp c ; match to device/unit from BIOS list?
pop bc ; restore loop control
jr z,chkdev2 ; yes, match
inc c ; next device list entry
djnz chkdev1 ; loop as needed
jp errdev ; no match, handle error
push af ; save incoming unit
ld b,$F8 ; hbios func: sysget
ld c,$10 ; sysget subfunc: diocnt
rst 08 ; call hbios, E := device count
pop af ; restore incoming unit
cp e ; compare to unit count
jp nc,errdev ; if too high, error
;
chkdev2: ; check slice support
; get device/unit info
ld b,$17 ; hbios func: diodevice
ld c,a ; unit to C
rst 08 ; call hbios, D := device, E := unit
ld a,d ; device to A
;
; check slice support
cp $30 ; A has device/unit, in hard disk range?
jr c,chkdev3 ; if not hard disk, check slice val
jr c,chkdev1 ; if not hard disk, check slice val
xor a ; otherwise, signal OK
ret
;
chkdev3: ; not a hard disk, make sure slice == 0
chkdev1: ; not a hard disk, make sure slice == 0
ld a,(slice) ; get specified slice
or a ; set flags
jp nz,errslc ; invalid slice error
@@ -1248,7 +1328,7 @@ hexascii:
; Convert low nibble of A to ascii hex
;
hexconv:
and $0f ; low nibble only
and $0F ; low nibble only
add a,$90
daa
adc a,$40
@@ -1342,7 +1422,7 @@ delim: or a
ret z
cp ':' ; colon
ret z
cp $3b ; semicolon
cp $3B ; semicolon
ret z
cp '<' ; less than
ret z
@@ -1440,14 +1520,14 @@ strcmp:
; The CBIOS function offset must be stored in the byte
; following the call instruction. ex:
; call cbios
; .db $0c ; offset of CONOUT CBIOS function
; .db $0C ; offset of CONOUT CBIOS function
;
cbios:
ex (sp),hl
ld a,(hl) ; get the function offset
inc hl ; point past value following call instruction
ex (sp),hl ; put address back at top of stack and recover HL
ld hl,(cbftbl) ; address of CBIOS function table to HL
ld hl,(bioloc) ; address of CBIOS function table to HL
call addhl ; determine specific function address
jp (hl) ; invoke CBIOS
;
@@ -1543,16 +1623,20 @@ err1: ; without the leading crlf
;
err2: ; without the string
; call crlf ; print newline
or $ff ; signal error
or $FF ; signal error
ret ; done
;
;===============================================================================
; Storage Section
;===============================================================================
;
cbftbl .dw 0 ; address of CBIOS function table
;
bioloc .dw 0 ; CBIOS starting address
bioend .dw 0 ; CBIOS ending address
biosiz .dw 0 ; CBIOS size (in bytes)
maploc .dw 0 ; location of CBIOS drive map table
dpbloc .dw 0 ; location of CBIOS DPB map table
;
drives:
dstdrv .db 0 ; destination drive
srcdrv .db 0 ; source drive
@@ -1560,7 +1644,7 @@ device .db 0 ; source device
unit .db 0 ; source unit
slice .db 0 ; source slice
;
unamod .db 0 ; $ff indicates UNA UBIOS active
unamod .db 0 ; $FF indicates UNA UBIOS active
modcnt .db 0 ; count of drive map modifications
;
srcptr .dw 0 ; source pointer for copy
@@ -1568,7 +1652,9 @@ dstptr .dw 0 ; destination pointer for copy
tmpent .fill 4,0 ; space to save a table entry
tmpstr .fill 9,0 ; temporary string of up to 8 chars, zero term
;
buftop .dw 0 ; memory allocation buffer top
heaptop .dw 0 ; current address of top of heap memory
heaplim .dw 0 ; heap limit address
;
dirbuf .dw 0 ; directory buffer location
;
mapwrk .fill (4 * 16),$FF ; working copy of drive map
@@ -1615,10 +1701,10 @@ stack .equ $ ; stack top
; Messages
;
indent .db " ",0
msgban1 .db "ASSIGN v1.0 for RomWBW CP/M 2.2, 19-Sep-2014",0
msgban1 .db "ASSIGN v1.0c for RomWBW CP/M 2.2, 21-Apr-2016",0
msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0
msgban2 .db "Copyright 2014, Wayne Warthen, GNU GPL v3",0
msgban2 .db "Copyright 2016, Wayne Warthen, GNU GPL v3",0
msguse .db "Usage: ASSIGN D:[=[{D:|<device>[<unitnum>]:[<slicenum>]}]][,...]",13,10
.db " ex. ASSIGN (display all active assignments)",13,10
.db " ASSIGN /? (display version and usage)",13,10
@@ -1643,4 +1729,4 @@ msgnoa .db "Drive A: is unassigned, aborting!",0
msgdos .db "DOS error, return code=0x",0
msgmem .db " Disk Buffer Bytes Free",0
;
.end
.end

View File

@@ -15,13 +15,17 @@ call :asm SysCopy || goto :eof
call :asm Assign || goto :eof
call :asm Format || goto :eof
call :asm Talk || goto :eof
call :asm OSLdr || goto :eof
call :asm Mode || goto :eof
zx Z80ASM -SYSGEN/F
setlocal & cd XM125 && call Build || exit /b 1 & endlocal
goto :eof
:asm
echo.
echo Building %1...
tasm -t80 -b -g3 -fFF %1.asm %1.com %1.lst
tasm -t80 -g3 -fFF %1.asm %1.com %1.lst
goto :eof

View File

@@ -1,4 +1,8 @@
@echo off
setlocal
if exist *.bin del *.bin
if exist *.com del *.com
if exist *.lst del *.lst
if exist *.lst del *.lst
setlocal & cd XM125 && call Clean || exit /b 1 & endlocal

79
Source/Apps/Decode.asm Normal file
View File

@@ -0,0 +1,79 @@
;
;==================================================================================================
; DECODE 32-BIT VALUES FROM A 5-BIT SHIFT-ENCODED VALUE
;==================================================================================================
;
; Copyright (C) 2014 John R. Coffman. All rights reserved.
; Provided for hobbyist use on the Z180 SBC Mark IV board.
;
; This program is free software: you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; THE FUNCTION(S) IN THIS FILE ARE BASED ON LIKE FUNCTIONS CREATED BY JOHN COFFMAN
; IN HIS UNA BIOS PROJECT. THEY ARE INCLUDED HERE BASED ON GPLV3 PERMISSIBLE USE.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; An encoded value (V) is defined as V = C * 2^X * 3^Y
; where C is a prearranged constant, X is 0 or 1 and Y is 0-15
; The encoded value is stored as 5 bits: YXXXX
; At present, C=75 for baud rate encoding and C=3 for CPU OSC encoding
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; DECODE
;
; Enter with:
; HL = word to be decoded (5-bits) FXXXX
; F=extra 3 factor, XXXX=shift factor, reg H must be zero
; DE = encode divisor OSC_DIV = 3, or BAUD_DIV = 75
;
; Exit with:
; DE:HL = decoded value
; A = non-zero on error
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
decode:
ld a,h ; set to test
ld c,$ff ; presume error condition
or a ; test for zero
jr nz,decode9 ; not an encoded value
ld a,l ; get low order 5 bits
cp 32 ; test for error
jr nc,decode9 ; error return if not below
; argument hl is validated
ld h,d
ld l,e ; copy to hl
cp 16
jr c,decode2 ; if < 16, no 3 factor
add hl,de ; introduce factor of 3
add hl,de ; **
decode2:
ld de,0 ; zero the high order
and 15 ; mask to 4 bits
jr z,decode8 ; good exit
ld c,b ; save b-reg
ld b,a ;
decode3:
add hl,hl ; shift left by 1, set carry
rl e
rl d ; **
djnz decode3
ld b,c ; restore b-reg
decode8:
ld c,0 ; signal good return
decode9:
ld a,c ; error code test
or a ; error code in reg-c and z-flag
ret

75
Source/Apps/Encode.asm Normal file
View File

@@ -0,0 +1,75 @@
;
;==================================================================================================
; ENCODE 32-BIT VALUES TO A 5-BIT SHIFT-ENCODED VALUE
;==================================================================================================
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; An encoded value (V) is defined as V = C * 2^X * 3^Y
; where C is a prearranged constant, Y is 0 or 1 and X is 0-15
; The encoded value is stored as 5 bits: YXXXX
; At present, C=75 for baud rate encoding and C=3 for CPU OSC encoding
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; ENCODE
;
; Enter with:
; DE:HL = dword value to be encoded
; C = divisor (0 < C < 256)
; encode divisor OSC_DIV = 3, or BAUD_DIV = 75
;
; Exit with:
; C = encoded value
; A = non-zero on error
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
encode:
; incoming value of zero is a failure
call encode5 ; test DE:HL for zero
jr z,encode4 ; if zero, failure return
;
; apply encoding divisor
call div32x8 ; DE:HL / C (remainder in A)
or a ; set flags to test for zero
ret nz ; error if not evenly divisible
;
; test divide by 3 to see if it is possible
push de ; save working
push hl ; ... value
ld c,3 ; divide by 3
call div32x8 ; ... test
pop hl ; restore working
pop de ; ... value
;
; implmement divide by 3 if possible
ld c,$00 ; init result in c w/ div 3 flag clear
or a ; set flags to test for remainder
jr nz,encode2 ; jump if it failed
;
; if divide by 3 worked, do it again for real
ld c,3 ; setup to divide by 3 again
call div32x8 ; do it
ld c,$10 ; init result in c w/ div 3 flag set
;
encode2:
; loop to determine power of 2
ld b,16 ; can only represent up to 2^15
encode3:
srl d ; right shift de:hl into carry
rr e ; ...
rr h ; ...
rr l ; ...
jr c,encode5 ; if carry, then done, c has result
inc c ; bump the result value
djnz encode3 ; keep shifting if possible
encode4:
or $ff ; signal error
ret ; and done
;
encode5:
; test de:hl for zero (sets zf, clobbers a)
ld a,h
or l
or d
or e
ret ; ret w/ Z set if DE:HL == 0

View File

@@ -5,24 +5,210 @@
; AUTHOR: WAYNE WARTHEN (wwarthen@gmail.com)
;_______________________________________________________________________________
;
; CHANGELOG:
; Usage:
; FORMAT D:
; ex: FORMAT (display version and usage)
; FORMAT /? (display version and usage)
; FORMAT C: (format drive C:)
;_______________________________________________________________________________
;
; TODO:
;
; Change Log:
;_______________________________________________________________________________
;
; ToDo:
; 1) Actually implement this
;_______________________________________________________________________________
;
;===============================================================================
; MAIN PROGRAM PROCEDURE
; Definitions
;===============================================================================
;
.ORG 00100H
RET
stksiz .equ $40 ; Working stack size
;
STACKSAV .DW 0
STACKSIZ .EQU 40H ; WE ARE A STACK PIG
.FILL STACKSIZ,0
STACK .EQU $
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;;
;stamp .equ $40 ; loc of RomWBW CBIOS zero page stamp
;
.END
rmj .equ 2 ; CBIOS version - major
rmn .equ 8 ; CBIOS version - minor
;
;===============================================================================
; Code Section
;===============================================================================
;
;
.org $100
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
; do the real work
call process ; parse and process command line
jr nz,exit ; done if error or no action
;
exit: ; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
jp restart ; return to CP/M via restart
ret ; return to CP/M w/o restart
;
; Initialization
;
init:
;
; locate start of cbios (function jump table)
ld hl,(restart+1) ; load address of CP/M restart vector
ld de,-3 ; adjustment for start of table
add hl,de ; HL now has start of table
ld (bioloc),hl ; save it
;
; check for UNA (UBIOS)
ld a,($FFFD) ; fixed location of UNA API vector
cp $C3 ; jp instruction?
jr nz,initx ; if not, not UNA
ld hl,($FFFE) ; get jp address
ld a,(hl) ; get byte at target address
cp $FD ; first byte of UNA push ix instruction
jr nz,initx ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $E5 ; second byte of UNA push ix instruction
jr nz,initx ; if not, not UNA
ld hl,unamod ; point to UNA mode flag
ld (hl),$FF ; set UNA mode flag
;
initx:
;
xor a
ret
;
; Process command line
;
process:
jr usage
;
xor a
ret
;
usage:
;
call crlf ; formatting
ld de,msgban1 ; point to version message part 1
call prtstr ; print it
ld a,(unamod) ; get UNA flag
or a ; set flags
ld de,msghb ; point to HBIOS mode message
call z,prtstr ; if not UNA, say so
ld de,msgub ; point to UBIOS mode message
call nz,prtstr ; if UNA, say so
call crlf ; formatting
ld de,msgban2 ; point to version message part 2
call prtstr ; print it
call crlf2 ; blank line
ld de,msguse ; point to usage message
call prtstr ; print it
xor a ; signal success
ret ; and return
;
; Print character in A without destroying any registers
;
prtchr:
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
ret
;
; Print a zero terminated string at (HL) without destroying any registers
;
prtstr:
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Invoke CBIOS function
; The CBIOS function offset must be stored in the byte
; following the call instruction. ex:
; call cbios
; .db $0C ; offset of CONOUT CBIOS function
;
cbios:
ex (sp),hl
ld a,(hl) ; get the function offset
inc hl ; point past value following call instruction
ex (sp),hl ; put address back at top of stack and recover HL
ld hl,(bioloc) ; address of CBIOS function table to HL
call addhl ; determine specific function address
jp (hl) ; invoke CBIOS
;
; Add the value in A to HL (HL := HL + A)
;
addhl:
add a,l ; A := A + L
ld l,a ; Put result back in L
ret nc ; if no carry, we are done
inc h ; if carry, increment H
ret ; and return
;
; Jump indirect to address in HL
;
jphl:
jp (hl)
;
;===============================================================================
; Storage Section
;===============================================================================
;
bioloc .dw 0 ; CBIOS starting address
;
unamod .db 0 ; $FF indicates UNA UBIOS active
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
msgban1 .db "FORMAT v0.1 for RomWBW CP/M 2.2, 24-Apr-2016",0
msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0
msgban2 .db "Copyright 2016, Wayne Warthen, GNU GPL v3",0
msguse .db "FORMAT command is not yet implemented!",13,10,13,10
.db "Use FD command to physically format floppy diskettes",13,10
.db "Use CLRDIR command to (re)initialize directories",13,10
.db "Use SYSCOPY command to make disks bootable",13,10
.db "Use FDISK80 command to partition mass storage media",0
;
.end

1039
Source/Apps/Mode.asm Normal file

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1014
Source/Apps/OSLdr.asm Normal file

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@@ -15,6 +15,7 @@
;_______________________________________________________________________________
;
; Change Log:
; 2016-04-24 [WBW] Updated to preserve MBR partition table
;_______________________________________________________________________________
;
; ToDo:
@@ -31,7 +32,8 @@ stksiz .equ $40 ; we are a stack pig
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
buf .equ $900 ; load point for system image (from original SYSGEN)
imgbuf .equ $900 ; load point for system image (from original SYSGEN)
mbrbuf .equ imgbuf+$4000 ; load point for MBR storage
;
;===============================================================================
; Code Section
@@ -142,16 +144,16 @@ confirm:
ld de,sconf3
call prtstr
;
; get input
; get input (imgbuf is used for temp storage)
ld c,$0A ; get console buffer
ld de,buf ; into buf
ld de,imgbuf ; into buf
ld a,1 ; max of 1 character
ld (de),a ; set up buffer
call bdos ; invoke BDOS
ld a,(buf+1) ; get num chars entered
ld a,(imgbuf+1) ; get num chars entered
dec a ; check that we got exactly one char
jr nz,confirm ; bad input, re-prompt
ld a,(buf+2) ; get the character
ld a,(imgbuf+2) ; get the character
and $DF ; force upper case
cp 'Y' ; compare to Y
ret ; return with Z set appropriately
@@ -190,7 +192,7 @@ rdfil:
ld (rwfun),a ; save bdos function
ld a,12 ; start with 1536 byte header (12 records)
ld (reccnt),a ; init record counter
ld hl,buf ; start of buffer
ld hl,imgbuf ; start of buffer
ld (bufptr),hl ; init buffer pointer
call rwfil ; read the header
ret nz ; abort on error (no need to close file)
@@ -237,7 +239,7 @@ wrfil1: ; create target file
ld (rwfun),a ; save bdos function
ld a,(imgsiz) ; number of records to read
ld (reccnt),a ; init record counter
ld hl,buf ; start of buffer
ld hl,imgbuf ; start of buffer
ld (bufptr),hl ; init buffer pointer
call rwfil ; do it
ret nz ; abort on error
@@ -329,7 +331,36 @@ wrdsk:
; force return to go through disk reset
ld hl,resdsk ; load address of reset disk routine
push hl ; and put it on the stack
; set drive for subsequent writes
; setup to read existing MBR
ld a,(destfcb) ; get the drive
dec a ; adjust for zero indexing
call setdsk ; setup disk
ret nz ; abort on error
ld hl,mbrbuf ; override to read
ld (bufptr),hl ; ... into MBR buffer
ld a,4 ; 4 records = 1 512 byte sector
; set function to read
ld hl,(cbftbl) ; get address of CBIOS function table
ld a,$27 ; $27 is CBIOS READ entry offset
call addhl ; set HL to resultant entry point
ld (actfnc),hl ; save it
; read the existing MBR into memory
call rwdsk ; read the sector
ret nz ; abort on error
; test for valid partition table ($55, $AA at offset $1FE)
ld hl,(mbrbuf+$1FE); HL := signature
ld a,$55 ; load expected value of first byte
cp l ; check for proper value
jr nz,wrdsk1 ; mismatch, ignore old partition table
ld a,$AA ; load expected value of second byte
cp h ; check for proper value
jr nz,wrdsk1 ; mismatch, ignore old partition table
; valid MBR, copy existing partition table over to new image
ld hl,mbrbuf+$1BE ; copy from MBR offset of existing MBR
ld de,imgbuf+$1BE ; copy to MBR offset of new image
ld bc,$40 ; size of MBR
ldir ; do it
wrdsk1: ; setup to write the image from memory to disk
ld a,(destfcb) ; get the drive
dec a ; adjust for zero indexing
call setdsk ; setup disk
@@ -396,7 +427,7 @@ setdsk:
ld hl,0
ld (acttrk),hl ; active track := 0
ld (actsec),hl ; active sector := 0
ld hl,buf
ld hl,imgbuf ; assume r/w to image buffer
ld (bufptr),hl ; reset buffer pointer
;
xor a ; signal success
@@ -458,14 +489,14 @@ jphl: jp (hl) ; indirect jump
;
chkhdr:
; check signature
ld hl,(buf+$580) ; get signature
ld hl,(imgbuf+$580) ; get signature
ld de,$A55A ; signature value
or a ; clear CF
sbc hl,de ; compare
jp nz,errsig ; invalid signature
; compute the image size (does not include size of header)
ld hl,(buf+$5FC) ; get CPM_END
ld de,(buf+$5FA) ; get CPM_LOC
ld hl,(imgbuf+$5FC) ; get CPM_END
ld de,(imgbuf+$5FA) ; get CPM_LOC
or a ; clear CF
sbc hl,de ; image size := CPM_END - CPM_LOC
xor a ; signal success

View File

@@ -0,0 +1,19 @@
@echo off
setlocal
set TOOLS=..\..\..\Tools
set PATH=%TOOLS%\zx;%PATH%
set ZXBINDIR=%TOOLS%\cpm\bin\
set ZXLIBDIR=%TOOLS%\cpm\lib\
set ZXINCDIR=%TOOLS%\cpm\include\
zx mac xmdm125
zx slr180 -xmhb/HF
zx mload25 XM=xmdm125,xmhb
rem set PROMPT=[Build] %PROMPT%
rem %comspec%
move /Y XM.com ..

View File

@@ -0,0 +1,7 @@
@echo off
setlocal
if exist *.hex del *.hex
if exist *.prn del *.prn
if exist *.lst del *.lst
if exist xm.com del xm.com

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Binary file not shown.

361
Source/Apps/XM125/xmhb.180 Normal file
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@@ -0,0 +1,361 @@
;=======================================================================
;
; XMHB.Z80 - XMODEMXX PATCH FILE FOR ROMWBW HBIOS
;
; Wayne Warthen - wwarthen@gmail.com
; Updated: 2017-08-09
;
;=======================================================================
;
; Overlay file is Z80, build with M80:
; M80 =XMHB
; L80 XMHB,XMHB/N/X/E
;
.Z80
ASEG
;
NO EQU 0
YES EQU NOT NO
;
ERRDET EQU NO ; detect parity/framing/overrun errs
;
BASE EQU 100H ; start of cp/m normal program area
;
;=======================================================================
;
; Jump table: The jump table must be in exactly the same sequence as the
; one in XMODEM. Note the ORG of 103H - This jump table has no jump to
; 'BEGIN'.
;
ORG BASE + 3 ;start after 'JMP BEGIN'
;
JP CONOUT ;must be 00000h if not used, see below
JP MINIT ;initialization routine (if needed)
JP UNINIT ;undo whatever 'MINIT' did (or return)
JPTBL:
JP SENDR ;send character (via pop psw)
JP CAROK ;test for carrier
JP MDIN ;receive data byte
JP GETCHR ;get character from modem
JP RCVRDY ;check receive ready
JP SNDRDY ;check send ready
JP SPEED ;get speed value for file transfer time
JP EXTRA1 ;extra for custom routine
JP EXTRA2 ;extra for custom routine
JP EXTRA3 ;extra for custom routine
;
;-----------------------------------------------------------------------
;
; Output character to console
;
CONOUT EQU 0 ; not used
;
;-----------------------------------------------------------------------
;
; Initialize modem
;
; This procedure has been usurped to dynamically detect the type
; of system we are running on and install the *real* jump table
; entries as appropriate.
;
MINIT:
; Get system type
LD D,2
LD E,2
MLT DE
BIT 2,E ; bit 2 wil be set if mlt happend
LD HL,U_JPTBL ; assume Z80 (UART)
LD A,10 ; assume 10MHz CPU in case of Z80
JR Z,MINIT2 ; yes, Z80, do vector copy
LD HL,A_JPTBL ; otherwise Z180 (ASCI)
LD A,20 ; assume 20MHz CPU in case of Z180
;
MINIT2:
; Copy real vectors into active jump table
LD DE,JPTBL
LD BC,7 * 3 ; copy 7 3-byte entries
LDIR
;
; Check for UNA (UBIOS)
LD A,(0FFFDH) ; fixed location of UNA API vector
CP 0C3H ; jp instruction?
JR NZ,MINIT3 ; if not, not UNA
LD HL,(0FFFEH) ; get jp address
LD A,(HL) ; get byte at target address
CP 0FDH ; first byte of UNA push ix instruction
JR NZ,MINIT3 ; if not, not UNA
INC HL ; point to next byte
LD A,(HL) ; get next byte
CP 0E5H ; second byte of UNA push ix instruction
JR NZ,MINIT3 ; if not, not UNA
;
; Get CPU speed from UNA
LD C,0F8H ; UNA BIOS Get PHI function
RST 08 ; Returns speed in Hz in DE:HL
LD A,E ; Hack to get approx speed in MHz
SRL A ; ... by dividing by 1,048,576
SRL A ; ...
SRL A ; ...
SRL A ; ...
INC A ; Fix up for value truncation
RET ; done
;
MINIT3:
; Not UNA, use HBIOS for CPU speed lookup
LD B,0F8H ; HBIOS SYSGET function 0xF8
LD C,0F0H ; CPUINFO subfunction 0xF0
RST 08 ; do it, L := CPU speed in MHz
LD A,L ; move it to A
RET ; done
;
;-----------------------------------------------------------------------
;
; Uninitialize modem
;
UNINIT:
RET ; not initialized, so no 'UN-INITIALIZE'
;
;-----------------------------------------------------------------------
;
; The following are all dummy routines that are unused because MINIT
; dynamically installs the real jump table.
;
SENDR:
CAROK:
MDIN:
GETCHR:
RCVRDY:
SNDRDY:
SPEED:
EXTRA1:
EXTRA2:
EXTRA3:
RET
;
;=======================================================================
;=======================================================================
;
; Standard RBC Projects 8250-like UART port @ 68H
;
; Will be used for all RBC Z80 systems.
;
;=======================================================================
;=======================================================================
;
; UART port constants
;
U_BASE EQU 68H ; UART base port
U_DATP EQU U_BASE + 0 ; data in port
U_DATO EQU U_BASE + 0 ; data out port
U_CTLP EQU U_BASE + 5 ; control/status port
U_SNDB EQU 20H ; bit to test for send ready
U_SNDR EQU 20H ; value when ready to send
U_RCVB EQU 01H ; bit to test for receive ready
U_RCVR EQU 01H ; value when ready to receive
U_PARE EQU 04H ; bit for parity error
U_OVRE EQU 02H ; bit for overrun error
U_FRME EQU 08H ; bit for framing error
;
; Following jump table is dynamically patched into real jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
U_JPTBL:
JP U_SENDR ; send character (via pop psw)
JP U_CAROK ; test for carrier
JP U_MDIN ; receive data byte
JP U_GETCHR ; get character from modem
JP U_RCVRDY ; check receive ready
JP U_SNDRDY ; check send ready
JP U_SPEED ; get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
U_SENDR:
POP AF ; get character to send from stack
OUT (U_DATO),A ; send to port
RET
;
;-----------------------------------------------------------------------
;
; Test and rep;ort carrier status, Z set if carrier present
;
U_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
U_MDIN:
U_GETCHR:
IN A,(U_DATP) ; read character from port
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
U_RCVRDY:
IN A,(U_CTLP) ; get modem status
;
IF ERRDET
;
; With error detection (slower)
PUSH BC ; save scratch register
PUSH AF ; save full status on stack
AND U_FRME | U_OVRE | U_PARE ; isolate line err bits
LD B,A ; save err status in B
POP AF ; get full status back
AND U_RCVB ; isolate ready bit
CP U_RCVR ; test it (set flags)
LD A,B ; get the error code back
POP BC ; restore scratch register
;
ELSE
;
; No error detection (faster)
AND U_RCVB ; isolate ready bit
CP U_RCVR ; test it (set flags)
LD A,0 ; report no line errors
;
ENDIF
;
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
U_SNDRDY:
IN A,(U_CTLP) ; get status
AND U_SNDB ; isolate transmit ready bit
CP U_SNDR ; test for ready value
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in regsiter A)
;
U_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
;=======================================================================
;=======================================================================
;
; Standard RBC Projects Z180 primary ASCI port
;
; Will be used for all RBC Z180 systems.
;
;=======================================================================
;=======================================================================
;
; ASCI port constants
;
A_DATP EQU 48H ;Z180 TSR - ASCI receive data port
A_DATO EQU 46H ;Z180 TDR - ASCI transmit data port
A_CTLP EQU 44H ;Z180 STAT - ASCI status port
A_CTL2 EQU 40H ;Z180 CNTLA - ASCI control port
A_SNDB EQU 02H ;Z180 STAT:TDRE - xmit data reg empty bit
A_SNDR EQU 02H ;Z180 STAT:TDRE - xmit data reg empty value
A_RCVB EQU 80H ;Z180 STAT:RDRF - rcv data reg full bit
A_RCVR EQU 80H ;Z180 STAT:RDRF - rcv data reg full value
A_PARE EQU 20H ;Z180 STAT:PE - parity error bit
A_OVRE EQU 40H ;Z180 STAT:OVRN - overrun error bit
A_FRME EQU 10H ;Z180 STAT:FE - framing error bit
;
; Following jump table is dynamically patched over initial jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
A_JPTBL:
JP A_SENDR ;send character (via pop psw)
JP A_CAROK ;test for carrier
JP A_MDIN ;receive data byte
JP A_GETCHR ;get character from modem
JP A_RCVRDY ;check receive ready
JP A_SNDRDY ;check send ready
JP A_SPEED ;get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
A_SENDR:
POP AF ; get character to send from stack
OUT0 (A_DATO),A ; send to port
RET
;
;-----------------------------------------------------------------------
;
; Test and rep;ort carrier status, Z set if carrier present
;
A_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
A_MDIN:
A_GETCHR:
IN0 A,(A_DATP) ; read character from port
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
A_RCVRDY:
IN0 A,(A_CTLP) ; get modem status
PUSH BC ; save scratch register
PUSH AF ; save full status on stack
AND A_FRME | A_OVRE | A_PARE ; isolate line err bits
LD B,A ; save err status in B
; Z180 ASCI ports will stall if there are errors.
; Error bits are NOT cleared by merely reading
; the status register. Below, bit 3 of ASCI
; control register is written with a zero to
; clear error(s) if needed.
JP Z,A_RCVRDY2 ; if no errs, continue
IN0 A,(A_CTL2) ; get current control register
AND 0F7H ; force err reset bit to zero
OUT0 (A_CTL2),A ; write control register
A_RCVRDY2:
POP AF ; get full status back
AND A_RCVB ; isolate ready bit
CP A_RCVR ; test it (set flags)
LD A,B ; get the error code back
POP BC ; restore scratch register
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
A_SNDRDY:
IN A,(A_CTLP) ; get status
AND A_SNDB ; isolate transmit ready bit
CP A_SNDR ; test for ready value
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in regsiter A)
;
A_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
END

104
Source/Apps/bcd.asm Normal file
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@@ -0,0 +1,104 @@
;;
;; make a bcd number from a binary number
;; 32 bit binary number in hl:bc, result stored at (de)
;; de is preserved, all other regs destroyed
;;
;bin2bcd:
; push ix ; save ix
; push bc ; move bc
; pop ix ; ... to ix
; ld c,32 ; loop for 32 bits of binary dword
;;
;bin2bcd0:
; ; outer loop (once for each bit in binary number)
; ld b,5 ; loop for 5 bytes of result
; push de ; save de
; add ix,ix ; left shift next bit from hl:ix
; adc hl,hl ; ... into carry
;;
;bin2bcd1:
; ; inner loop (once for each byte of bcd number)
; ld a,(de) ; get it
; adc a,a ; double it w/ carry
; daa ; decimal adjust
; ld (de),a ; save it
; inc de ; point to next bcd byte
; djnz bin2bcd1 ; loop thru all bcd bytes
;;
; ; remainder of outer loop
; pop de ; recover de
; dec c ; dec bit counter
; jr nz,bin2bcd0 ; loop till done with all bits
; pop ix ; restore ix
;
; make a bcd number from a binary number
; 32 bit binary number in de:hl, result stored at (bc)
; on output hl = bcd buf adr
;
bin2bcd:
push ix ; save ix
; convert from de:hl -> (bc) to hl:ix -> (de)
; hl -> ix, de -> hl, bc -> de
ex de,hl
push de
pop ix
push bc
pop de
;
ld c,32 ; loop for 32 bits of binary dword
;
bin2bcd0:
; outer loop (once for each bit in binary number)
ld b,5 ; loop for 5 bytes of result
push de ; save de
add ix,ix ; left shift next bit from hl:ix
adc hl,hl ; ... into carry
;
bin2bcd1:
; inner loop (once for each byte of bcd number)
ld a,(de) ; get it
adc a,a ; double it w/ carry
daa ; decimal adjust
ld (de),a ; save it
inc de ; point to next bcd byte
djnz bin2bcd1 ; loop thru all bcd bytes
;
; remainder of outer loop
pop de ; recover de
dec c ; dec bit counter
jr nz,bin2bcd0 ; loop till done with all bits
ex de,hl ; hl -> bcd buf
pop ix ; restore ix
ret
;
; print contents of 5 byte bcd number at (hl)
; with leading zero suppression
; all regs destroyed
;
prtbcd:
inc hl ; bump hl to point to
inc hl ; ...
inc hl ; ...
inc hl ; ... last byte of bcd
ld b,5 ; loop for 5 bytes
ld c,0 ; start by suppressing leading zeroes
;
prtbcd1:
; loop to print one bcd byte (two digits)
xor a ; clear accum
rld ; rotate first nibble into a
call prtbcd2 ; print it
xor a ; clear accum
rld ; rotate second nibble into a
call prtbcd2 ; print it
dec hl ; point to prior byte
djnz prtbcd1 ; loop till done
ret ; return
;
prtbcd2:
; subroutine to print a digit in a
cp c ; compare incoming to c
ret z ; if equal, suppressing, abort
dec c ; make c negative to stop suppression
add a,'0' ; offset to printable value
jp prtchr ; exit via character out

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@@ -1,159 +0,0 @@
param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "", [string]$SYS = "", [string]$RomName = "")
$Platform = $Platform.ToUpper()
while ($true)
{
if (($Platform -eq "N8VEM") -or ($Platform -eq "ZETA") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "S2I") -or ($Platform -eq "S100")) {break}
$Platform = (Read-Host -prompt "Platform [N8VEM|ZETA|N8|MK4|S2I|S100]").Trim().ToUpper()
}
while ($true)
{
$ConfigFile = "config_${Platform}_${Config}.asm"
if (Test-Path $ConfigFile) {break}
if ($Config -ne "") {Write-Host "${ConfigFile} does not exist!"}
"Configurations available:"
Get-Item "config_${Platform}_*.asm" | foreach {Write-Host " >", $_.Name.Substring(8 + $Platform.Length, $_.Name.Length - 12 - $Platform.Length)}
$Config = (Read-Host -prompt "Configuration").Trim()
}
while ($true)
{
if (($RomSize -eq "512") -or ($RomSize -eq "1024")) {break}
$RomSize = (Read-Host -prompt "ROM Size [512|1024]").Trim()
}
if (($Platform -eq "N8") -or ($Platform -eq "MK4")) {$CPUType = "180"} else {$CPUType = "80"}
$SYS = $SYS.ToUpper()
while ($true)
{
if (($SYS -eq "CPM") -or ($SYS -eq "ZSYS")) {break}
$SYS = (Read-Host -prompt "System [CPM|ZSYS]").Trim().ToUpper()
}
if ($RomName -eq "") {$RomName = "${Platform}_${Config}"}
while ($RomName -eq "")
{
$CP = (Read-Host -prompt "ROM Name [${Config}]").Trim()
if ($RomName -eq "") {$RomName = $Config}
}
$ErrorAction = 'Stop'
$TasmPath = '..\tools\tasm32'
$CpmToolsPath = '..\tools\cpmtools'
$env:TASMTABS = $TasmPath
$env:PATH = $TasmPath + ';' + $CpmToolsPath + ';' + $env:PATH
$OutDir = "../OutputUNALOAD"
$RomFmt = "n8vem_rom${RomSize}"
$BlankFile = "blank${RomSize}KB-UNALOAD.dat"
$RomDiskFile = "RomDisk.tmp"
$RomFile = "${OutDir}/${RomName}.rom"
$SysImgFile = "${OutDir}/${RomName}.sys"
$LoaderFile = "${OutDir}/${RomName}.com"
""
"Building ${RomName}: ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..."
""
$TimeStamp = '"' + (Get-Date -Format 'dd-MMM-yyyy') + '"'
Function Asm($Component, $Opt, $Architecture=$CPUType, $Output="${Component}.bin")
{
$Cmd = "tasm -t${Architecture} -g3 ${Opt} ${Component}.asm ${Output}"
$Cmd | write-host
Invoke-Expression $Cmd | write-host
if ($LASTEXITCODE -gt 0) {throw "TASM returned exit code $LASTEXITCODE"}
}
Function Concat($InputFileList, $OutputFile)
{
Set-Content $OutputFile -Value $null
foreach ($InputFile in $InputFileList)
{
Add-Content $OutputFile -Value ([System.IO.File]::ReadAllBytes($InputFile)) -Encoding byte
}
}
# Generate the build settings include file
@"
; RomWBW Configured for ${Platform} ${Config}, $(Get-Date -Format "s")
;
#DEFINE TIMESTAMP ${TimeStamp}
;
#DEFINE UNALOAD
;
ROMSIZE .EQU ${ROMSize} ; SIZE OF ROM IN KB
PLATFORM .EQU PLT_${Platform} ; HARDWARE PLATFORM
;
; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS
;
#INCLUDE "std-n8vem.inc"
;
#INCLUDE "${ConfigFile}"
;
"@ | Out-File "build.inc" -Encoding ASCII
# Build components
if ($SYS -eq "CPM")
{
# Asm 'ccpb03' -Output 'cp.bin'
# Asm 'bdosb01' -Output 'dos.bin'
# Copy-Item '..\cpm22\ccpb03.bin' 'cp.bin'
# Copy-Item '..\cpm22\bdosb01.bin' 'dos.bin'
# Copy-Item '..\cpm22\ccp22.bin' 'cp.bin'
# Copy-Item '..\cpm22\bdos22.bin' 'dos.bin'
Copy-Item '..\cpm22\os2ccp.bin' 'cp.bin'
Copy-Item '..\cpm22\os3bdos.bin' 'dos.bin'
}
if ($SYS -eq "ZSYS")
{
Copy-Item '..\zcpr-dj\zcpr.bin' 'cp.bin'
Copy-Item '..\zsdos\zsdos.bin' 'dos.bin'
}
Asm 'syscfg'
Asm 'cbios' "-dBLD_SYS=SYS_${SYS}"
Asm 'dbgmon'
Asm 'prefix'
Asm 'bootrom'
Asm 'bootapp'
Asm 'loader'
Asm 'pgzero'
Asm 'hbios'
Asm 'hbfill'
Asm 'romfill'
# Generate result files using components above
"Building ${RomName} output files..."
Concat 'cp.bin','dos.bin','cbios.bin' 'os.bin'
Concat 'prefix.bin','os.bin' $SysImgFile
Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','romfill.bin','dbgmon.bin','os.bin','hbfill.bin' 'rom1.bin'
Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','hbios.bin' 'rom2.bin'
Concat 'bootapp.bin','syscfg.bin','loader.bin','hbios.bin','dbgmon.bin','os.bin' $LoaderFile
# Create the RomDisk image
"Building ${RomSize}KB ${RomName} ROM disk data file..."
Copy-Item $BlankFile $RomDiskFile
cpmcp -f $RomFmt $RomDiskFile ../RomDsk/${SYS}_${RomSize}KB/*.* 0:
cpmcp -f $RomFmt $RomDiskFile ../RomDsk/cfg_${Platform}_${Config}/*.* 0:
cpmcp -f $RomFmt $RomDiskFile ../Apps/*.com 0:
cpmcp -f $RomFmt $RomDiskFile ${OutDir}/${RomName}.sys 0:${SYS}.sys
Concat '..\UNA\unaboot.bin','..\UNA\unabios.bin','rom1.bin','..\UNA\unafat.bin','rom2.bin',$RomDiskFile $RomFile
# Cleanup
Remove-Item $RomDiskFile

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@@ -1,120 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8 2312
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO3 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $20 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_MK4 ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
; 18.432MHz XTAL @ FULL SPEED, 38.4Kbps
;
;Z180_CLKDIV .EQU 1 ; 0=XTAL/2, 1=XTAL, 2=XTAL*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;
; 18.432MHz XTAL @ DOUBLE SPEED, 38.4Kbps
;
Z180_CLKDIV .EQU 2 ; 0=XTAL/2, 1=XTAL, 2=XTAL*2
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

View File

@@ -1,120 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8 2312
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_PRPCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $01 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_N8 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_MK4 ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
; 18.432MHz XTAL @ FULL SPEED, 38.4Kbps
;
;Z180_CLKDIV .EQU 1 ; 0=XTAL/2, 1=XTAL, 2=XTAL*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
;
; 18.432MHz XTAL @ DOUBLE SPEED, 38.4Kbps
;
Z180_CLKDIV .EQU 2 ; 0=XTAL/2, 1=XTAL, 2=XTAL*2
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

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@@ -1,110 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8 2511
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS
;
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_N8 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $80 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU TRUE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_N8 ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU TRUE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M
;
Z180_CLKDIV .EQU 1 ; 0=XTAL/2, 1=XTAL/1
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT

View File

@@ -1,112 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ CASSETTE INTERFACE
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 2 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
UART1IOB .EQU $80 ; UART1 IOBASE IS $80 FOR CASSETTE INTERFACE
UART1BAUD .EQU 300 ; UART1 BAUDRATE IS 300 FOR CASSETTE INTERFACE
UART1FIFO .EQU TRUE ; UART1 FIFO ENABLED FOR CASSETTE INTERFACE
UART1AFC .EQU FALSE ; UART1 AUTO FLOW CONTROL DISABLED FOR CASSETTE INTERFACE
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

View File

@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ COLOR VDU
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_CVDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU TRUE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU TRUE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ DUAL IDE + FLOPPY
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIDE ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIDE ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM W/ DISKIO (ORIGINAL V1)
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ COLOR VDU
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_CVDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO3 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $20 ; PPIDE IOBASE IS $20 FOR DISKIO V3
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU TRUE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ DISKIO V3
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO3 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $20 ; PPIDE IOBASE IS $20 FOR DISKIO V3
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ DUAL SD
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU TRUE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_DSD ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,112 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ MULTIFUNCTION PIC
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 2 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
UART1IOB .EQU $88 ; UART1 IOBASE AT $88 FOR MFPIC
UART1BAUD .EQU 38400 ; UART1 BAUDRATE IS 38400 FOR MFPIC
UART1FIFO .EQU TRUE ; UART1 FIFO ENABLED FOR MFPIC
UART1AFC .EQU FALSE ; UART1 AUTO FLOW CONTROL DISABLED FOR MFPIC (ENABLE IF DESIRED)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $84 ; PPIDE IOBASE IS $84 FOR MFPIC (PRELIMINARY ADDRESS)
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ PPIDE
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ PPISD
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU TRUE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_PPI ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ PROP IO
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_PRPCON ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR SIMH EMULATOR
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU TRUE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR SIMH EMULATOR
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU TRUE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU FALSE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU TRUE ; TRUE FOR HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ VDU
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 8 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_VDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU TRUE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_DIO ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU TRUE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR ZETA W/ PPISD
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_ZETA ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU TRUE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_PPI ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR ZETA W/ PARPORTPROP
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_PPPCON ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_ZETA ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1,108 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR ZETA
;==================================================================================================
;
; BUILD CONFIGURATION OPTIONS
;
CPUFREQ .EQU 20 ; IN MHZ, USED TO COMPUTE DELAY FACTORS
;
BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
;
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS
UART0IOB .EQU $68 ; UART0 IOBASE
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
;
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT
ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT
N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
;
DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
;
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
;
FDENABLE .EQU TRUE ; TRUE FOR FLOPPY SUPPORT
FDMODE .EQU FDMODE_ZETA ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
;
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT
;
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT
IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $60 ; PPIDE IOBASE
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_PPI ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER
;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB)
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
;
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT
HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
;
PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD
PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242
KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
;
TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT
ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT
ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
;
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
;
#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M

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@@ -1 +0,0 @@
@..\tools\gcc\mingw32-make %*

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@@ -1,10 +0,0 @@
# Create a "dummy" rom image, filled with hex E5
#
Set-Content -Value ([byte[]](0xE5) * (512KB - 64KB)) -Encoding byte -Path 'Blank512KB.dat'
Set-Content -Value ([byte[]](0xE5) * (1MB - 64KB)) -Encoding byte -Path 'Blank1024KB.dat'
Set-Content -Value ([byte[]](0xE5) * (512KB - 128KB)) -Encoding byte -Path 'Blank512KB-UNA.dat'
Set-Content -Value ([byte[]](0xE5) * (1MB - 128KB)) -Encoding byte -Path 'Blank1024KB-UNA.dat'
Set-Content -Value ([byte[]](0xE5) * (512KB - 160KB)) -Encoding byte -Path 'Blank512KB-UNALOAD.dat'
Set-Content -Value ([byte[]](0xE5) * (1MB - 160KB)) -Encoding byte -Path 'Blank1024KB-UNALOAD.dat'

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@@ -1,193 +0,0 @@
;
;==================================================================================================
; ASCI DRIVER (Z180 SERIAL PORTS)
;==================================================================================================
;
; CHARACTER DEVICE DRIVER ENTRY
; A: RESULT (OUT), CF=ERR
; B: FUNCTION (IN)
; C: CHARACTER (IN/OUT)
; E: DEVICE/UNIT (IN)
;
;
ASCI_DISPATCH:
LD A,C ; GET DEVICE/UNIT
AND $0F ; ISOLATE UNIT
JP Z,ASCI0
DEC A
JP Z,ASCI1
CALL PANIC
;
ASCI0:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JP Z,ASCI0_IN
DEC A
JP Z,ASCI0_OUT
DEC A
JP Z,ASCI0_IST
DEC A
JP Z,ASCI0_OST
CALL PANIC
;
;
;
ASCI_INIT:
; ASCI0
PRTS("ASCI0: IO=0x$")
LD A,CPU_TDR0
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR0
CALL PRTHEXBYTE
; PRTS(" BAUD=$")
; LD HL,ASCI0BAUD / 10
; CALL PRTDEC
; PRTC('0')
#IF (PLATFORM != PLT_MK4)
LD A,66H
OUT0 (CPU_ASEXT0),A
LD A,64H
OUT0 (CPU_CNTLA0),A
LD A,Z180_CNTLB0
OUT0 (CPU_CNTLB0),A
#ENDIF
; ASCI1
CALL NEWLINE
PRTS("ASCI1: IO=0x$")
LD A,CPU_TDR1
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR1
CALL PRTHEXBYTE
; PRTS(" BAUD=$")
; LD HL,ASCI1BAUD / 10
; CALL PRTDEC
; PRTC('0')
#IF (PLATFORM != PLT_MK4)
LD A,66H
OUT0 (CPU_ASEXT1),A
LD A,64H
OUT0 (CPU_CNTLA1),A
LD A,Z180_CNTLB1
OUT0 (CPU_CNTLB1),A
#ENDIF
RET
;
;
;
ASCI0_IN:
CALL ASCI0_IST
OR A
JR Z,ASCI0_IN
IN0 A,(CPU_RDR0) ; READ THE CHAR FROM THE ASCI
LD E,A
RET
;
;
;
ASCI0_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(CPU_STAT0)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,ASCI0_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA0)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (CPU_CNTLA0),A
ASCI0_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT0) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
;
;
ASCI0_OUT:
CALL ASCI0_OST
OR A
JR Z,ASCI0_OUT
LD A,E
OUT0 (CPU_TDR0),A
RET
;
ASCI0_OST:
IN0 A,(CPU_STAT0)
AND $02
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET
;
;
;
ASCI1:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JR Z,ASCI0_IN
DEC A
JR Z,ASCI0_OUT
DEC A
JR Z,ASCI0_IST
DEC A
JR Z,ASCI0_OST
CALL PANIC
;
;
;
ASCI1_IN:
CALL ASCI1_IST
OR A
JR Z,ASCI1_IN
IN0 A,(CPU_RDR1) ; READ THE CHAR FROM THE ASCI
LD E,A
RET
;
;
;
ASCI1_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(CPU_STAT1)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,ASCI1_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA1)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (CPU_CNTLA1),A
ASCI1_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT1) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
;
;
ASCI1_OUT:
CALL ASCI1_OST
OR A
JR Z,ASCI1_OUT
LD A,E
OUT0 (CPU_TDR1),A
RET
;
ASCI1_OST:
IN0 A,(CPU_STAT1)
AND $02
JR Z,ASCI1_OST
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET

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@@ -1,131 +0,0 @@
; bioshdr.inc 5/10/2012 dwg - offsets into the BIOS Header data
B_BOOT .equ 0e600h
B_WBOOT .equ 0e603h
B_CONST .equ 0e606h
B_CONIN .equ 0e609h
B_CONOUT .equ 0e60ch
B_LIST .equ 0e60fh
B_PUNCH .equ 0e612h
B_READER .equ 0e615h
B_HOME .equ 0e618h
B_SELDSK .equ 0e61bh
B_SETTRK .equ 0e61eh
B_SETSEC .equ 0e621h
B_SETDMA .equ 0e624h
B_READ .equ 0e627h
B_WRITE .equ 0e62ah
B_LISTST .equ 0e62dh
B_SECTRN .equ 0e630h
B_BNKSEL .equ 0e633h
B_GETLU .equ 0e636h
B_SETLU .equ 0e639h
B_GETINFO .equ 0e63ch
B_RSVD1 .equ 0e63fh
B_RSVD2 .equ 0e642h
B_RSVD3 .equ 0e645h
B_RSVD4 .equ 0e648h
B_CNFGDATA .equ 0e64bh
B_RMJ .equ 0e64bh
B_RMN .equ 0e64ch
B_RUP .equ 0e64dh
B_RTP .equ 0e64eh
B_DSKBOOT .equ 0e64fh
B_BOOTDRV .equ 0e650h
B_MONTH .equ 0e651h
B_DAY .equ 0e652h
B_YEAR .equ 0e653h
B_HOUR .equ 0e654h
B_MIN .equ 0e655h
B_SEC .equ 0e656h
; Config Proper Start Here
B_FREQ .equ 0e657h
B_PLATFORM .equ B_FREQ+1
B_DIOPLAT .equ B_PLATFORM+1
B_VDUMODE .equ B_DIOPLAT+1
B_ROMSIZE .equ B_VDUMODE+1
B_RAMSIZE .equ B_ROMSIZE+2
B_CLRRAMDSK .equ B_RAMSIZE+2
B_DSKYENABLE .equ B_CLRRAMDSK+1
B_UARTENABLE .equ B_DSKYENABLE+1
B_VDUENABLE .equ B_UARTENABLE+1
B_FDENABLE .equ B_VDUENABLE+1
B_FDTRACE .equ B_FDENABLE+1
B_FDMEDIA .equ B_FDTRACE+1
B_FDMEDIAALT .equ B_FDMEDIA+1
B_FDMAUTO .equ B_FDMEDIAALT+1
B_IDEENABLE .equ B_FDMAUTO+1
B_IDETRACE .equ B_IDEENABLE+1
B_IDE8BIT .equ B_IDETRACE+1
B_IDECAPACITY .equ B_IDE8BIT+1
B_PPIDEENABLE .equ B_IDECAPACITY+2
B_PPIDETRACE .equ B_PPIDEENABLE+1
B_PPIDE8BIT .equ B_PPIDETRACE+1
B_PPIDECAPACITY .equ B_PPIDE8BIT+1
B_PPIDESLOW .equ B_PPIDECAPACITY+2
B_BOOTTYPE .equ B_PPIDESLOW+1
B_BAUDRATE .equ B_BOOTTYPE+1
B_CLKDIV .equ B_BAUDRATE+2
B_MEMWAIT .equ B_CLKDIV+1
B_IOWAIT .equ B_MEMWAIT+1
B_CNTLB0 .equ B_IOWAIT+1
B_CNTLB1 .equ B_CNTLB0+1
B_SDCAPACITY .equ B_CNTLB1+1
B_SDCSIO .equ B_SDCAPACITY+2
B_SDCSIOFAST .equ B_SDCSIO+1
B_DEFIOBYTE .equ B_SDCSIOFAST+1
B_TERMTYPE .equ B_DEFIOBYTE+1
B_REVISION .equ B_TERMTYPE+1
B_PRPSDENABLE .equ B_REVISION+2
B_PRPSDTRACE .equ B_PRPSDENABLE+1
B_PRPSDCAPACITY .equ B_PRPSDTRACE+1
B_PRPCONENABLE .equ B_PRPSDCAPACITY+2
B_DATASIZE .equ B_PRPCONENABLE+1
B_INFOVER .equ 0
B_STRBANNER .equ B_INFOVER+2
B_VARLOC .equ B_STRBANNER+2
B_TSTLOC .equ B_VARLOC+2
B_SECADR .equ B_TSTLOC+2
B_SEKDSK .equ B_SECADR+2
B_SEKTRK .equ B_SEKDSK+2
B_SEKSEC .equ B_SEKTRK+2
B_DSKOP .equ B_SEKSEC+2
B_DMAADR .equ B_DSKOP+2
B_DPHADR .equ B_DMAADR+2
B_XLT .equ B_DPHADR+2
B_HST .equ B_XLT+2
B_DIRBF .equ B_HST+2
B_DPBMAP .equ B_DIRBF+2
B_DSKMAP .equ B_DPBMAP+2
B_DPHMAP .equ B_DSKMAP+2
B_CIOMAP .equ B_DPHMAP+2
B_SECBUF .equ B_CIOMAP+2
B_ORGFDDATA .equ B_SECBUF+2
B_ORGIDEDATA .equ B_ORGFDDATA+2
B_ORGSDDATA .equ B_ORGIDEDATA+2
B_ORGPRPSDDATA .equ B_ORGSDDATA+2
B_ORGPPPSDDATA .equ B_ORGPRPSDDATA+2
B_INFOTBLSIZE .equ B_ORGPPPSDDATA+2
;;;;;;;;;;;;;;;;;;;;;
; eof - bioshdr.inc ;
;;;;;;;;;;;;;;;;;;;;;

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@@ -1,180 +0,0 @@
;___BOOTAPP____________________________________________________________________________________________________________
;
; APPLICATION BOOT MANAGER
;
; USED TO LOAD AN APPLICATION IMAGE BASED COPY OF THE SYSTEM
; REFER TO BANKEDBIOS.TXT FOR MORE INFORMATION.
;______________________________________________________________________________________________________________________
;
;
#INCLUDE "std.asm"
;
.ORG $100
;
DI ; NO INTERRUPTS
IM 1 ; INTERRUPT MODE 1
;LD SP,STACK ; SP IN RAM
LD SP,HBX_LOC ; SP IN RAM
;
; PERFORM MINIMAL Z180 SPECIFIC INITIALIZATION
;
#IFNDEF UNALOAD
;
#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
; SET BASE FOR CPU IO REGISTERS
LD A,CPU_BASE
OUT0 (CPU_ICR),A
; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
XOR A
OUT0 (CPU_CCR),A
OUT0 (CPU_CMR),A
; SET DEFAULT WAIT STATES
LD A,$F0
OUT0 (CPU_DCNTL),A
#IF (Z180_CLKDIV >= 1)
; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
LD A,$80
OUT0 (CPU_CCR),A
#ENDIF
#IF (Z180_CLKDIV >= 2)
; SET CPU MULTIPLIER TO 1 RESULTING IN XTAL * 2 SPEED
LD A,$80
OUT0 (CPU_CMR),A
#ENDIF
; SET DESIRED WAIT STATES
LD A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4)
OUT0 (CPU_DCNTL),A
; CANNOT CHANGE MMU SETUP DURING AN APP BASED BOOT
;; MMU SETUP
;LD A,$80
;OUT0 (CPU_CBAR),A ; SETUP FOR 32K/32K BANK CONFIG
;LD A,RAMBIAS >> 2
;OUT0 (CPU_BBR),A ; BANK BASE SET TO START OF RAM
;LD A,(RAMSIZE + RAMBIAS - 64) >> 2
;OUT0 (CPU_CBR),A ; COMMON BASE = LAST (TOP) BANK
#ENDIF
;
#ENDIF
;
; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
;
CALL XIO_INIT ; INIT SERIAL PORT
LD HL,STR_BOOT ; POINT TO MESSAGE
CALL XIO_OUTS ; SAY HELLO
;
; RELOCATE MONITOR/OS CODE FROM 8000H TO C000H
; THIS INCLUDES OURSELVES (FOR PHASE 2) AND THE LOADER CODE
; CAREFUL, WORKING STACK AREA IS WIPED OUT!!!
;
LD HL,$8000 ; COPY MEMORY FROM $8000
LD DE,$C000 ; TO $C000
LD BC,$4000 - $400 ; ALL BUT TOP 1K TO AVOID OVERLAYING PROXY
LDIR
;
CALL XIO_DOT ; MARK PROGRESS
;
; COPY FIRST $1000 BYTES TO $8000 (UPPER, NON-BANKED MEMORY)
; THIS INCLUDES OURSELVES AND THE LOADER CODE
; STACK AREA IS WIPED OUT!!!
;
LD HL,$0000 ; COPY MEMORY FROM 0000
LD DE,$8000 ; TO 8000H
LD BC,$1000 ; COPY 1000H BYTES
LDIR
;
CALL XIO_DOT ; MARK PROGRESS
;
#IF (PLATFORM == PLT_UNA)
; IF RUNNING UNDER UNA, WE ARE DONE, PROCEED TO LOADER
LD DE,$0100 ; *** FIX *** ASSUME WE WANT DEFAULT DRIVE TO BE ROM
JP CPM_ENT ; JUMP TO OS
#ELSE
; NON-UNA REQUIRES PHASE 2
JP PHASE2 ; JUMP TO PHASE 2 BOOT IN UPPER MEMORY
#ENDIF
;
STR_BOOT .DB "RomWBW$"
;
; IMBED DIRECT SERIAL I/O ROUTINES
;
#INCLUDE "xio.asm"
;
;______________________________________________________________________________________________________________________
;
; THIS IS THE PHASE 2 CODE THAT MUST EXECUTE IN UPPER MEMORY
;
.ORG $ + $8000 ; WE ARE NOW EXECUTING IN UPPER MEMORY
#IF (PLATFORM != PLT_UNA)
;
PHASE2:
LD SP,HBX_LOC ; MOVE SP TO HIMEM JUST BELOW HBIOS
;
CALL XIO_DOT ; MARK PROGRESS
;
; COPY NEW HBIOS IMAGE INTO TARGET RAM PAGE
;
LD HL,0 ; HL = LOCATION IN LOMEM TO COPY FROM/TO
LOOP:
LD DE,$9000 ; DE = BUFFER ADDRESS
LD BC,$1000 ; BYTES TO COPY (4K CHUNKS)
PUSH BC ; SAVE COPY SIZE
PUSH DE ; SAVE COPY DEST
PUSH HL ; SAVE COPY SOURCE
LD A,BID_USR ; RAM PAGE WITH NEW HBIOS IMAGE
CALL PGSEL ; SELECT IT
LDIR ; COPY ROM -> BUFFER
POP DE ; RESTORE SOURCE AS NEW DESTINATION
POP HL ; RESTORE DESTINATION AS NEW SOURCE
POP BC ; RESTORE COPY SIZE
LD A,BID_HB ; HBIOS RAM PAGE
CALL PGSEL ; SELECT IT
LDIR ; COPY BUFFER -> RAM
EX DE,HL ; GET LOMEM POINTER BACK TO HL
LD A,H ; HIGH BYTE OF POINTER TO A
CP $80 ; HIGH BYTE WILL BE 80H WHEN WE ARE DONE
JP NZ,LOOP ; IF NOT DONE, LOOP TO DO NEXT 4K CHUNK
;
LD A,BID_USR ; RAM PAGE WITH NEW HBIOS IMAGE
CALL PGSEL ; SELECT IT
CALL XIO_DOT ; MARK PROGRESS
;
; INITIALIZE HBIOS AND JUMP TO LOADER
;
; CALL HBIOS HARDWARE INITIALIZATION
; CALL HBIOS HARDWARE INITIALIZATION
LD A,BID_HB ; HBIOS RAM PAGE
CALL PGSEL ; SELECT IT
CALL $1000 ; CALL HBIOS INITIALIZATION
;
; CALL HBIOS PROXY INITIALIZATION
LD A,BID_USR ; USER RAM PAGE
CALL PGSEL ; SELECT IT
CALL HBX_LOC ; CALL HBIOS PROXY INITIALIZATION
;
LD DE,$0000 ; ASSUME WE WANT DEFAULT DRIVE TO BE ROM
JP CPM_ENT ; JUMP TO OS
;______________________________________________________________________________________________________________________
;
; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!
;
#INCLUDE "memmgr.asm"
;
#ENDIF
;______________________________________________________________________________________________________________________
;
; PAD OUT REMAINDER OF PAGE
;
.FILL $8200 - $,$FF ; PAD OUT REMAINDER OF PAGE
;
STACK .EQU $ ; STACK IN HIMEM SLACK SPACE
;
.END

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@@ -1,424 +0,0 @@
;___BOOTGEN___________________________________________________________________________________________________________
;
; COPY THE SYSTEM TO THE BOOT SECTORS OF AN IDE HDD
;
; CREATED BY : DAN WERNER 09 12.2009
;
;
;
;
;__CONSTANTS_________________________________________________________________________________________________________________________
;
CR: .EQU 0DH ; ASCII CARRIAGE RETURN CHARACTER
LF: .EQU 0AH ; ASCII LINE FEED CHARACTER
ESC: .EQU 1BH ; ASCII ESCAPE CHARACTER
BS: .EQU 08H ; ASCII BACKSPACE CHARACTER
;
;
;
;__MAIN_PROGRAM_____________________________________________________________________________________________________________________
;
.ORG 00100h ; FOR DEBUG IN CP/M (AS .COM)
LD HL,(0001H) ; GET WBOOT ADDRESS
LD BC,1603H ; GET CP/M TOP
SBC HL,BC ;
LD (CPMSTART),HL ; SET IT
DEC HL ;
LD SP,HL ; SETUP STACK
; PARSE COMMAND LINE
LD HL,0081H ; SET INDEX POINTER
LD B,(0080H) ; NUMBER OF BYTES
PARSECMD:
LD A,(HL) ; GET DRIVE LETTER ON COMMAND LINE
INC HL
CP 20H ; IS SPACE?
JP NZ,PARSEGOT ; JUMP ON NON-BLANK
DJNZ PARSECMD ; LOOP
PARSEERR:
LD DE,MSG_VALID ;
LD C,09H ; CP/M WRITE START STRING TO CONSOLE CALL
CALL 0005H
JP EXIT ; EXIT
PARSEGOT:
SUB 'A' ; TURN IT INTO A NUMERIC
JP C,PARSEERR ;
CP 16 ; VALID CP/M DRIVE?
JP P,PARSEERR ;
LD (DEVICENUMBER),A ; DEVICE ID
; GET NUMBER OF SECTORS PER TRACK
LD L,A ; L=DISK NUMBER 0,1,2,3,4
LD H,0 ; HIGH ORDER ZERO
ADD HL,HL ; *2
ADD HL,HL ; *4
ADD HL,HL ; *8
ADD HL,HL ; *16 (SIZE OF EACH HEADER)
PUSH HL ;
POP DE
LD HL,(0001H) ;
LD BC,0058 ;
ADD HL,BC ;
ADD HL,DE ; HL= DPBASE(DISKNO*16)
EX DE,HL ;
LD A,(DE) ;
LD L,A ;
INC DE ;
LD A,(DE) ;
LD H,A ;
EX DE,HL ;
LD A,(DE) ;
LD (SECTRACK),A ;
INC DE ;
LD A,(DE) ;
LD (SECTRACK+1),A ;
LD DE,DRIVE_MSG ;
LD C,09H ; CP/M WRITE START STRING TO CONSOLE CALL
CALL 0005H
LD A,(DEVICENUMBER) ;
ADD A,'A' ;
CALL COUT ;
LD A,':' ;
CALL COUT ;
CALL CRLF ;
LD DE,BASE_MSG ;
LD C,09H ; CP/M WRITE START STRING TO CONSOLE CALL
CALL 0005H
LD HL,(CPMSTART) ;
CALL PHL ;
LD DE,END_MSG ;
LD C,09H ; CP/M WRITE START STRING TO CONSOLE CALL
CALL 0005H
LD HL,(CPMEND) ;
CALL PHL ;
CALL CRLF ;
LD DE,SECTOR_MSG ;
LD C,09H ; CP/M WRITE START STRING TO CONSOLE CALL
CALL 0005H
LD HL,(SECTRACK) ;
CALL PHL ;
CALL CRLF ;
; RUN WITH GOOD OUTPUT
LD A,(DEVICENUMBER) ; SET DEVICE NUMBER
LD C,A
CALL SELDSK ; SELECT DISK
LD HL,000CH ; SET INITIAL SECTOR
LD (CURSECTOR),HL
LD HL,0000H ; SET INITIAL TRACK
LD (CURTRACK),HL ;
LD HL,(CPMSTART) ; SET BEGINNING OF CPM
LD (CURADDRESS),HL ;
LD BC,(DMAAD) ; SETUP THE DMA AREA
CALL SETDMA ;
LOOP:
LD BC,(CURSECTOR) ; SET SECTOR
CALL SETSEC ;
LD BC,(CURTRACK) ;
CALL SETTRK ;
CALL COPYTODMA ; COPY BYTES TO DMA
CALL WRITE ; WRITE SECTOR
LD HL,(CURADDRESS) ; IF IX>CPMEND, EXIT PROGRAM
LD BC,(CPMEND) ;
LD A,H ;
CP B ;
JP NZ,CONTINUE ;
LD A,L ;
CP C ;
JP M,ENDLOOP ;
CONTINUE:
LD HL,(CURSECTOR) ; GET NEXT TRACK & SECTOR
INC HL ;
LD (CURSECTOR),HL ;
LD BC,(SECTRACK) ;
LD A,H ;
CP B ;
JP NZ,LOOP ;
LD A,L ;
CP C ;
JP NZ,LOOP ;
LD HL,(CURTRACK) ;
INC HL ;
LD (CURTRACK),HL ;
LD HL,0000H ;
LD (CURSECTOR),HL ;
JP LOOP ;
ENDLOOP:
; WRITE CP/M BOOT START AND END ADDRESSES IN LAST TWO WORDS OF MEDIA INFO SECTOR
LD BC,000BH ; SET SECTOR
CALL SETSEC ;
LD BC,0000H ;
CALL SETTRK ;
CALL READ ;
LD HL,(DMAAD) ; SET ADDRESS IN BUFFER TO LAST TWO WORDS
LD BC,122 ;
ADD HL,BC ;
LD A,(CPMSTART) ;
LD (HL),A ;
LD A,(CPMSTART+1) ;
INC HL
LD (HL),A ;
LD A,(CPMEND) ;
INC HL
LD (HL),A ;
LD A,(CPMEND+1) ;
INC HL
LD (HL),A ;
LD A,(0001H) ;
DEC A ;
DEC A ;
DEC A ;
INC HL
LD (HL),A ;
LD A,(0002H) ;
INC HL
LD (HL),A ;
CALL WRITE ; WRITE SECTOR
EXIT:
LD DE,MSG_END ;
LD C,09H ; CP/M WRITE END STRING TO CONSOLE CALL
CALL 0005H ;
;
LD C,00H ; CP/M SYSTEM RESET CALL
CALL 0005H ; RETURN TO PROMPT
;___COPYTODMA_____________________________________________________________________________________
;
; COPY CURRENT ADDRESS BLOCK TO DMA
;_________________________________________________________________________________________________
COPYTODMA:
LD HL,(DMAAD) ; LOAD HL WITH DMA ADDRESS
LD E,L ;
LD D,H ; GET IT INTO DE
LD HL,(CURADDRESS) ; GET RAM ADDRESS TO COPY
LD BC,128 ; BC IS COUNTER FOR FIXED SIZE TRANSFER (128 BYTES)
LDIR ; TRANSFER
LD HL,(CURADDRESS) ; INCREMENT ADDRESS POINTER BY COPY SIZE
LD BC,128 ;
ADD HL,BC ;
LD (CURADDRESS),HL ;
RET
;__HXOUT_________________________________________________________________________________________________________________________
;
; PRINT THE ACCUMULATOR CONTENTS AS HEX DATA ON THE SERIAL PORT
;________________________________________________________________________________________________________________________________
;
HXOUT:
PUSH BC ; SAVE BC
LD B,A ;
RLC A ; DO HIGH NIBBLE FIRST
RLC A ;
RLC A ;
RLC A ;
AND 0FH ; ONLY THIS NOW
ADD A,30H ; TRY A NUMBER
CP 3AH ; TEST IT
JR C,OUT1 ; IF CY SET PRINT 'NUMBER'
ADD A,07H ; MAKE IT AN ALPHA
OUT1:
CALL COUT ; SCREEN IT
LD A,B ; NEXT NIBBLE
AND 0FH ; JUST THIS
ADD A,30H ; TRY A NUMBER
CP 3AH ; TEST IT
JR C,OUT2 ; PRINT 'NUMBER'
ADD A,07H ; MAKE IT ALPHA
OUT2:
CALL COUT ; SCREEN IT
POP BC ; RESTORE BC
RET ;
;__SPACE_________________________________________________________________________________________________________________________
;
; PRINT A SPACE CHARACTER ON THE SERIAL PORT
;________________________________________________________________________________________________________________________________
;
SPACE:
PUSH AF ; STORE AF
LD A,20H ; LOAD A "SPACE"
CALL COUT ; SCREEN IT
POP AF ; RESTORE AF
RET ; DONE
;__CRLF_________________________________________________________________________________________________________________________
;
; PRINT A CR/LF
;________________________________________________________________________________________________________________________________
;
CRLF:
PUSH AF ; STORE AF
LD A,0DH ; LOAD A "SPACE"
CALL COUT ; SCREEN IT
LD A,0AH ; LOAD A "SPACE"
CALL COUT ; SCREEN IT
POP AF ; RESTORE AF
RET ; DONE
;__COUT_________________________________________________________________________________________________________________________
;
; PRINT CONTENTS OF A
;________________________________________________________________________________________________________________________________
;
COUT:
PUSH BC ;
PUSH AF ;
PUSH HL ;
PUSH DE ;
LD (COUT_BUFFER),A ;
LD DE,COUT_BUFFER ;
LD C,09H ; CP/M WRITE START STRING TO CONSOLE CALL
CALL 0005H
POP DE ;
POP HL ;
POP AF ;
POP BC ;
RET ; DONE
;__PHL_________________________________________________________________________________________________________________________
;
; PRINT THE HL REG ON THE SERIAL PORT
;________________________________________________________________________________________________________________________________
;
PHL:
LD A,H ; GET HI BYTE
CALL HXOUT ; DO HEX OUT ROUTINE
LD A,L ; GET LOW BYTE
CALL HXOUT ; HEX IT
CALL SPACE ;
RET ; DONE
COUT_BUFFER:
.DB 00
.DB "$"
BASE_MSG:
.TEXT "CP/M IMAGE="
.db "$"
END_MSG:
.TEXT "TO "
.db "$"
SECTOR_MSG:
.TEXT "SECTORS/TRACK="
.db "$"
DRIVE_MSG:
.TEXT "DRIVE="
.db "$"
;__CBIOS_________________________________________________________________________________________________________________________
;
; CBIOS JUMP TABLE
;________________________________________________________________________________________________________________________________
;
SELDSK: ;SELECT DISK
PUSH BC ;
LD HL,(0001H) ;
LD BC,0024 ;
ADD HL,BC ;
POP BC ;
JP (HL) ;
SETTRK: ;SET DISK TRACK ADDR
PUSH BC ;
LD HL,(0001H) ;
LD BC,0027 ;
ADD HL,BC ;
POP BC ;
JP (HL) ;
SETSEC: ;SET DISK SECTOR ADDR
PUSH BC ;
LD HL,(0001H) ;
LD BC,0030 ;
ADD HL,BC ;
POP BC ;
JP (HL) ;
SETDMA: ;SET DMA BUFFER ADDR
PUSH BC ;
LD HL,(0001H) ;
LD BC,0033 ;
ADD HL,BC ;
POP BC ;
JP (HL) ;
READ: ;READ SECTOR
PUSH BC ;
LD HL,(0001H) ;
LD BC,0036 ;
ADD HL,BC ;
POP BC ;
JP (HL) ;
WRITE: ;WRITE SECTOR
PUSH BC ;
LD HL,(0001H) ;
LD BC,0039 ;
ADD HL,BC ;
POP BC ;
JP (HL) ;
CURTRACK: .DW 0 ; CURRENT TRACK
CURSECTOR: .DW 0 ; CURRENT SECTOR
CURADDRESS: .DW 0 ; CURRENT CP/M ADDRESS
DMAAD: .DW 5000H ; DIRECT MEMORY ADDRESS
CPMEND: .DW 0FDFFH ; END OF CP/M
SECTRACK: .DW 0100H ; SECTORS PER TRACK
CPMSTART: .DW 0D000H ; START OF CP/M
DEVICENUMBER: .DB 2 ; DEVICE ID
MSG_END:
.DB LF, CR ; LINE FEED AND CARRIAGE RETURN
.TEXT "BOOTGEN COMPLETED."
.DB LF, CR ; LINE FEED AND CARRIAGE RETURN
.DB "$" ; LINE TERMINATOR
MSG_VALID:
.DB LF, CR ; LINE FEED AND CARRIAGE RETURN
.TEXT "USAGE: BOOTGEN (DRIVE):"
.DB LF, CR ; LINE FEED AND CARRIAGE RETURN
.TEXT "(DRIVE) IS ANY VALID CP/M DRIVE:"
.DB LF, CR ; LINE FEED AND CARRIAGE RETURN
.DB "$" ; LINE TERMINATOR
.END

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@@ -1,179 +0,0 @@
;___BOOTROM____________________________________________________________________________________________________________
;
; ROM BOOT MANAGER
;
; HARDWARE COLD START WILL JUMP HERE FOR INITIALIZATION
; REFER TO BANKEDBIOS.TXT FOR MORE INFORMATION.
;______________________________________________________________________________________________________________________
;
;
#INCLUDE "std.asm"
;
.ORG $100
;
DI ; NO INTERRUPTS
IM 1 ; INTERRUPT MODE 1
;LD SP,STACK ; SP IN RAM
LD SP,HBX_LOC ; SP IN RAM
;
;
; PERFORM MINIMAL Z180 SPECIFIC INITIALIZATION
;
#IFNDEF UNALOAD
;
#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
; SET BASE FOR CPU IO REGISTERS
LD A,CPU_BASE
OUT0 (CPU_ICR),A
; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
XOR A
OUT0 (CPU_CCR),A
OUT0 (CPU_CMR),A
; SET DEFAULT WAIT STATES
LD A,$F0
OUT0 (CPU_DCNTL),A
#IF (Z180_CLKDIV >= 1)
; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
LD A,$80
OUT0 (CPU_CCR),A
#ENDIF
#IF (Z180_CLKDIV >= 2)
; SET CPU MULTIPLIER TO 1 RESULTINT IN XTAL * 2 SPEED
LD A,$80
OUT0 (CPU_CMR),A
#ENDIF
; SET DESIRED WAIT STATES
LD A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4)
OUT0 (CPU_DCNTL),A
; MMU SETUP
LD A,$80
OUT0 (CPU_CBAR),A ; SETUP FOR 32K/32K BANK CONFIG
XOR A
OUT0 (CPU_BBR),A ; BANK BASE = 0
LD A,(RAMSIZE + RAMBIAS - 64) >> 2
OUT0 (CPU_CBR),A ; COMMON BASE = LAST (TOP) BANK
#ENDIF
;
#ENDIF
;
; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
;
CALL XIO_INIT ; INIT SERIAL PORT
LD HL,STR_BOOT ; POINT TO MESSAGE
CALL XIO_OUTS ; SAY HELLO
;
; COPY OURSELVES AND LOADER TO HI RAM FOR PHASE 2
;
LD HL,0 ; COPY FROM START OF ROM IMAGE
LD DE,$8000 ; TO HIMEM $8000
LD BC,$1000 ; COPY 4K
LDIR
;
CALL XIO_DOT ; MARK PROGRESS
;
JP PHASE2 ; JUMP TO PHASE 2 BOOT IN UPPER MEMORY
;
STR_BOOT .DB "RomWBW$"
;
; IMBED DIRECT SERIAL I/O ROUTINES
;
#INCLUDE "xio.asm"
;
;______________________________________________________________________________________________________________________
;
; THIS IS THE PHASE 2 CODE THAT MUST EXECUTE IN UPPER MEMORY
;
.ORG $ + $8000 ; WE ARE NOW EXECUTING IN UPPER MEMORY
;
PHASE2:
CALL XIO_DOT ; MARK PROGRESS
;
#IF (PLATFORM == PLT_UNA)
; SWITCH TO EXEC PAGE IN BANKED MEMORY
LD BC,$01FB ; SET BANK
LD DE,$800E ; EXEC_PAGE (SEE PAGES.INC)
CALL $FFFD ; DO IT
;
; MARK PROGRESS VIA UNA CHAR OUTPUT
LD BC,$0012 ; UNA UNIT = 0, FUNC WRITE CHAR
LD E,'.' ; DOT
CALL $FFFD ; CALL UNA ENTRY DIRECTLY, RST 08 NOT SETUP YET
;
; INSTALL UNA INVOCATION VECTOR FOR RST 08
LD A,$C3 ; JP INSTRUCTION
LD (8),A ; STORE AT 0x0008
LD HL,($FFFE) ; UNA ENTRY VECTOR
LD (9),HL ; STORE AT 0x0009
;
LD BC,$0012 ; UNA UNIT = 0, FUNC = WRITE CHAR
LD E,'.' ; DOT
RST 08 ; RST 08 IS NOW POSSIBLE
; IF RUNNING UNDER UNA, WE ARE DONE, PROCEED TO LOADER
JP $8400 ; JUMP TO LOADER
#ELSE
;
; COPY HBIOS IMAGE FROM ROM TO RAM
;
LD HL,0 ; HL = LOCATION IN LOMEM TO COPY FROM/TO
LOOP:
LD DE,$9000 ; DE = BUFFER ADDRESS
LD BC,$1000 ; BYTES TO COPY (4K CHUNKS)
PUSH BC ; SAVE COPY SIZE
PUSH DE ; SAVE COPY DEST
PUSH HL ; SAVE COPY SOURCE
LD A,BID_HBIMG ; ROM PAGE WITH HBIOS IMAGE
CALL PGSEL ; SELECT IT
LDIR ; COPY ROM -> BUFFER
POP DE ; RESTORE SOURCE AS NEW DESTINATION
POP HL ; RESTORE DESTINATION AS NEW SOURCE
POP BC ; RESTORE COPY SIZE
LD A,BID_HB ; HBIOS RAM PAGE
CALL PGSEL ; SELECT IT
LDIR ; COPY BUFFER -> RAM
EX DE,HL ; GET LOMEM POINTER BACK TO HL
LD A,H ; HIGH BYTE OF POINTER TO A
CP $80 ; HIGH BYTE WILL BE $80 WHEN WE ARE DONE
JP NZ,LOOP ; IF NOT DONE, LOOP TO DO NEXT 4K CHUNK
;
LD A,BID_BOOT ; ROM PAGE WITH BOOT IMAGE
CALL PGSEL ; SELECT IT
CALL XIO_DOT ; MARK PROGRESS
;
; INITIALIZE HBIOS AND JUMP TO LOADER
;
; CALL HBIOS HARDWARE INITIALIZATION
LD A,BID_HB ; HBIOS RAM PAGE
CALL PGSEL ; SELECT IT
CALL $1000 ; CALL HBIOS INITIALIZATION
;
; CALL HBIOS PROXY INITIALIZATION
LD A,BID_USR ; USER RAM PAGE
CALL PGSEL ; SELECT IT
CALL HBX_LOC ; CALL HBIOS PROXY INITIALIZATION
;
JP $8400 ; JUMP TO LOADER
;______________________________________________________________________________________________________________________
;
; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!
;
#INCLUDE "memmgr.asm"
#ENDIF
;______________________________________________________________________________________________________________________
;
; PAD OUT REMAINDER OF PAGE
;
.FILL $8200 - $,$FF ; PAD OUT REMAINDER OF PAGE
;
STACK .EQU $ ; STACK IN HIMEM SLACK SPACE
;
.END

File diff suppressed because it is too large Load Diff

View File

@@ -1,264 +0,0 @@
;
;==================================================================================================
; DALLAS SEMICONDUCTOR DS1302 RTC DRIVER
;==================================================================================================
;
; CONSTANTS
;
DSRTC_BASE .EQU RTC ; RTC PORT ON ALL N8VEM SERIES Z80 PLATFORMS
;
DSRTC_DATA .EQU %10000000 ; BIT 7 CONTROLS RTC DATA (I/O) LINE
DSRTC_CLK .EQU %01000000 ; BIT 6 CONTROLS RTC CLOCK LINE, 1 = HIGH
DSRTC_RD .EQU %00100000 ; BIT 5 CONTROLS DATA DIRECTION, 1 = READ
DSRTC_CE .EQU %00010000 ; BIT 4 CONTROLS RTC CE LINE, 1 = HIGH (ENABLED)
;
DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
;
; RTC DEVICE INITIALIZATION ENTRY
;
DSRTC_INIT:
PRTS("DSRTC: $")
;
; CHECK FOR CLOCK HALTED
CALL DSRTC_TSTCLK
JR Z,DSRTC_INIT1
PRTS("INIT CLOCK $")
LD HL,DSRTC_TIMDEF
CALL DSRTC_SETTIM
;
DSRTC_INIT1:
; DISPLAY CURRENT TIME
LD HL,DSRTC_TIMBUF
PUSH HL
CALL DSRTC_GETTIM
POP HL
CALL PRTDT
;
XOR A ; SIGNAL SUCCESS
RET
;
; RTC DEVICE FUNCTION DISPATCH ENTRY
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; B: FUNCTION (IN)
;
DSRTC_DISPATCH:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JP Z,DSRTC_GETTIM ; GET TIME
DEC A
JP Z,DSRTC_SETTIM ; SET TIME
DEC A
JP Z,DSRTC_GETBYT ; GET NVRAM BYTE VALUE
DEC A
JP Z,DSRTC_SETBYT ; SET NVRAM BYTE VALUE
DEC A
JP Z,DSRTC_GETBLK ; GET NVRAM DATA BLOCK VALUES
DEC A
JP Z,DSRTC_SETBLK ; SET NVRAM DATA BLOCK VALUES
CALL PANIC
;
; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
;
DSRTC_GETBYT:
DSRTC_SETBYT:
DSRTC_GETBLK:
DSRTC_SETBLK:
CALL PANIC
;
; RTC GET TIME
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; HL: DATE/TIME BUFFER (OUT)
; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
; 24 HOUR TIME FORMAT IS ASSUMED
;
DSRTC_GETTIM:
;
; READ THE CLOCK
PUSH HL ; SAVE ADR OF OUTPUT BUF
LD HL,DSRTC_BUF ; USE WORK BUF TO READ CLOCK
CALL DSRTC_RDCLK ; READ THE CLOCK
;
; TRANSLATE FROM TEMP BUF TO OUTPUT BUF
POP HL ; RESTORE THE OUTPUT BUF ADR
LD A,(DSRTC_YR)
LD (HL),A
INC HL
LD A,(DSRTC_MON)
LD (HL),A
INC HL
LD A,(DSRTC_DT)
LD (HL),A
INC HL
LD A,(DSRTC_HR)
LD (HL),A
INC HL
LD A,(DSRTC_MIN)
LD (HL),A
INC HL
LD A,(DSRTC_SEC)
LD (HL),A
;
; CLEAN UP AND RETURN
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
; RTC SET TIME
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; HL: DATE/TIME BUFFER (IN)
; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
; 24 HOUR TIME FORMAT IS ASSUMED
;
DSRTC_SETTIM:
;
; TRANSLATE FROM INPUT BUF TO WORK BUF
LD A,(HL)
LD (DSRTC_YR),A
INC HL
LD A,(HL)
LD (DSRTC_MON),A
INC HL
LD A,(HL)
LD (DSRTC_DT),A
INC HL
LD A,(HL)
LD (DSRTC_HR),A
INC HL
LD A,(HL)
LD (DSRTC_MIN),A
INC HL
LD A,(HL)
LD (DSRTC_SEC),A
XOR A ; FIX: DERIVE DAY OF WEEK!!!
LD (DSRTC_DAY),A
;
; WRITE TO CLOCK
LD HL,DSRTC_BUF ; POINT TO WORK BUF
CALL DSRTC_WRCLK ; SEND IT TO RTC
;
; CLEAN UP AND RETURN
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
; TEST CLOCK FOR VALID DATA
; READ CLOCK HALT BIT AND RETURN ZF BASED ON BIT VALUE
; 0 = RUNNING
; 1 = HALTED
;
DSRTC_TSTCLK:
LD C,$81 ; SECONDS REGISTER HAS CLOCK HALT FLAG
CALL DSRTC_CMD ; SEND THE COMMAND
CALL DSRTC_GET ; READ THE REGISTER
AND %10000000 ; HIGH ORDER BIT IS CLOCK HALT
RET
;
; BURST READ CLOCK DATA INTO BUFFER AT HL
;
DSRTC_RDCLK:
LD C,$BF ; COMMAND = $BF TO BURST READ CLOCK
CALL DSRTC_CMD ; SEND COMMAND TO RTC
LD B,DSRTC_BUFSIZ ; B IS LOOP COUNTER
DSRTC_RDCLK1:
PUSH BC ; PRESERVE BC
CALL DSRTC_GET ; GET NEXT BYTE
LD (HL),A ; SAVE IN BUFFER
INC HL ; INC BUF POINTER
POP BC ; RESTORE BC
DJNZ DSRTC_RDCLK1 ; LOOP IF NOT DONE
XOR A ; ALL LINES OFF TO CLEAN UP
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
RET
;
; BURST WRITE CLOCK DATA FROM BUFFER AT HL
;
DSRTC_WRCLK:
LD C,$8E ; COMMAND = $8E TO WRITE CONTROL REGISTER
CALL DSRTC_CMD ; SEND COMMAND
XOR A ; $00 = UNPROTECT
CALL DSRTC_PUT ; SEND VALUE TO CONTROL REGISTER
;
LD C,$BE ; COMMAND = $BE TO BURST WRITE CLOCK
CALL DSRTC_CMD ; SEND COMMAND TO RTC
LD B,DSRTC_BUFSIZ ; B IS LOOP COUNTER
DSRTC_WRCLK1:
PUSH BC ; PRESERVE BC
LD A,(HL) ; GET NEXT BYTE TO WRITE
CALL DSRTC_PUT ; PUT NEXT BYTE
INC HL ; INC BUF POINTER
POP BC ; RESTORE BC
DJNZ DSRTC_WRCLK1 ; LOOP IF NOT DONE
LD A,$80 ; ADD CONTROL REG BYTE, $80 = PROTECT ON
CALL DSRTC_PUT ; WRITE REQUIRED 8TH BYTE
XOR A ; ALL LINES OFF TO CLEAN UP
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
RET
;
; SEND COMMAND IN C TO RTC
;
DSRTC_CMD:
LD A,DSRTC_RD ; CE LOW TO RESET RTC
OUT (DSRTC_BASE),A ; WRITE IT
LD A,C ; LOAD COMMAND
CALL DSRTC_PUT ; WRITE IT
RET
;
; WRITE BYTE IN A TO THE RTC
;
DSRTC_PUT:
LD B,8 ; LOOP FOR 8 BITS
DSRTC_PUT1:
RRCA ; ROTATE NEXT BIT TO SEND INTO BIT 7
LD C,A ; SAVE WORKING VALUE
AND %10000000 ; ISOLATE THE DATA BIT
OR DSRTC_CE ; ADD CHIP ENABLE, CLOCK HIGH
OUT (DSRTC_BASE),A ; WRITE TO PORT WITH CLOCK LOW
XOR DSRTC_CLK ; TURN CLOCK BACK ON
OUT (DSRTC_BASE),A ; WRITE TO PORT WITH CLOCK HIGH
LD A,C ; RECOVER WORKING VALUE
DJNZ DSRTC_PUT1 ; LOOP IF NOT DONE
RET
;
; READ BYTE FROM RTC, RETURN VALUE IN A
;
DSRTC_GET:
LD C,0 ; INITIALIZE WORKING VALUE TO 0
LD B,8 ; LOOP FOR 8 BITS
DSRTC_GET1:
LD A,DSRTC_RD+DSRTC_CE ; LOWER CLOCK, CE STAYS HI, READ IS ON
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
NOP ; SETTLE
IN A,(DSRTC_BASE) ; READ THE RTC PORT
AND %00000001 ; ISOLATE THE DATA BIT
OR C ; COMBINE WITH WORKING VALUE
RRCA ; ROTATE FOR NEXT BIT
LD C,A ; SAVE WORKING VALUE
LD A,DSRTC_CLK+DSRTC_RD+DSRTC_CE ; CLOCK BACK TO HIGH NOW
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
DJNZ DSRTC_GET1 ; LOOP IF NOT DONE
LD A,C ; GET RESULT INTO A
RET
;
; WORKING VARIABLES
;
; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302
; FIELDS BELOW MATCH ORDER OF DS-1302 FIELDS (BCD)
;
DSRTC_BUF:
DSRTC_SEC: .DB 0 ; SECOND
DSRTC_MIN: .DB 0 ; MINUTE
DSRTC_HR: .DB 0 ; HOUR
DSRTC_DT: .DB 0 ; DATE
DSRTC_MON: .DB 0 ; MONTH
DSRTC_DAY: .DB 0 ; DAY OF WEEK
DSRTC_YR: .DB 0 ; YEAR
;
; DSRTC_TIMBUF IS TEMP BUF USED TO STORE TIME TEMPORARILY TO DISPLAY
; IT.
;
DSRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM
;
; DSRTC_TIMDEF IS DEFAULT TIME VALUE TO INITIALIZE CLOCK IF IT IS
; NOT RUNNING.
;
DSRTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK
.DB $00,$01,$01 ; 2000-01-01
.DB $00,$00,$00 ; 00:00:00

View File

@@ -1,10 +0,0 @@
;
;==================================================================================================
; FILLER FOR HBIOS PROXY, JUST A 256 BYTE FILLER
;==================================================================================================
;
#INCLUDE "std.asm"
;
.FILL HBX_SIZ,0FFH
;
.END

File diff suppressed because it is too large Load Diff

View File

@@ -1,274 +0,0 @@
;
;==================================================================================================
; HDSK DISK DRIVER
;==================================================================================================
;
; IO PORT ADDRESSES
;
HDSK_IO .EQU $FD
;
HDSK_CMDNONE .EQU 0
HDSK_CMDRESET .EQU 1
HDSK_CMDREAD .EQU 2
HDSK_CMDWRITE .EQU 3
HDSK_CMDPARAM .EQU 4
;
; STATUS
;
HDSKRC_OK .EQU 0
;
;
;
HDSK_DISPATCH:
LD A,B ; GET REQUESTED FUNCTION
AND $0F
JR Z,HDSK_READ
DEC A
JR Z,HDSK_WRITE
DEC A
JR Z,HDSK_STATUS
DEC A
JR Z,HDSK_MEDIA
CALL PANIC
;
; HDSK_MEDIA
;
HDSK_MEDIA:
LD A,C ; GET THE DEVICE/UNIT
AND $0F ; ISOLATE UNIT
CP 2 ; 2 UNITS
LD A,MID_HD ; ASSUME WE ARE OK
RET C ; RETURN
XOR A ; NO MEDIA
RET ; AND RETURN
;
;
;
HDSK_INIT:
PRTS("HDSK: UNITS=4$")
;
XOR A
DEC A ; INITIAL STATUS IS NOT READY $FF
LD (HDSK_STAT),A ; SAVE IT
XOR A ; INIT SUCCEEDED
RET ; RETURN
;
;
;
HDSK_STATUS:
LD A,(HDSK_STAT) ; LOAD STATUS
OR A ; SET FLAGS
RET
;
;
;
HDSK_READ:
LD A,HDSK_CMDREAD
JR HDSK_RW
;
;
;
HDSK_WRITE:
LD A,HDSK_CMDWRITE
JR HDSK_RW
;
;
;
HDSK_RW:
LD (HDSK_CMD),A
; CLEAR RESULTS
XOR A ; A = 0
LD (HDSK_RC),A ; CLEAR RETURN CODE
; INIT IF NEEDED
LD A,(HDSK_STAT) ; GET CURRENT STATUS
OR A ; SET FLAGS
CALL NZ,HDSK_RESET ; RESET IF NOT READY
; SET DEVICE
LD A,(HSTDSK)
AND $0F
LD (HDSK_DEVICE),A
; INCOMING TRK:SEC ACTUALLY REPRESENTS 32 BIT LBA
; MAP TRK:SEC TO HDSK DRIVER AS TTSS:SS
LD A,(HSTTRK) ; LSB OF TRACK
LD (HDSK_TRK + 1),A ; MAPS TO MSB OF HDSK TRK
LD A,(HSTSEC + 1) ; MSB OF SECTOR
LD (HDSK_TRK),A ; MAPS TO LSB OF HDSK TRK
LD A,(HSTSEC) ; LSB OF SECTOR
LD (HDSK_SEC),A ; MAPS TO LSB OF HDSK SEC
; SET TRANSFER ADDRESS
LD BC,(DIOBUF)
LD (HDSK_DMA),BC
; EXECUTE COMMAND
LD B,7 ; SIZE OF PARAMETER BLOCK
LD HL,HDSK_PARMBLK ; START ADDRESS OF PARAMETER BLOCK
HDSK_RW1:
LD A,(HL) ; GET BYTE OF PARAMETER BLOCK
OUT ($FD),A ; SEND IT TO PORT
INC HL ; POINT TO NEXT BYTE
DJNZ HDSK_RW1
IN A,($FD) ; GET RESULT CODE
LD (HDSK_RC),A
OR A
JR Z,HDSK_OK
JR HDSK_ERR
HDSK_ERR:
XOR A
DEC A ; A=$FF TO SIGNAL ERROR
LD (HDSK_STAT),A ; SAVE IT
#IF (HDSKTRACE >= 1)
PUSH AF
CALL HDSK_PRT
POP AF
#ENDIF
RET
HDSK_OK:
#IF (HDSKTRACE >= 2)
CALL HDSK_PRT
#ENDIF
XOR A
RET
;
;
;
HDSK_RESET:
LD B,32
LD A,HDSK_CMDRESET
HDSK_RESET1:
OUT ($FD),A
DJNZ HDSK_RESET1
XOR A ; STATUS = OK
LD (HDSK_STAT),A ; SAVE IT
#IF (HDSKTRACE >= 2)
CALL NEWLINE
LD DE,HDSKSTR_PREFIX
CALL WRITESTR
CALL PC_SPACE
LD DE,HDSKSTR_RESET
CALL WRITESTR
#ENDIF
RET
;
;
;
HDSK_PRT:
CALL NEWLINE
LD DE,HDSKSTR_PREFIX
CALL WRITESTR
CALL PC_SPACE
LD DE,HDSKSTR_CMD
CALL WRITESTR
LD A,(HDSK_CMD)
CALL PRTHEXBYTE
CALL PC_SPACE
CALL PC_LBKT
LD A,(HDSK_CMD)
LD DE,HDSKSTR_NONE
CP HDSK_CMDNONE
JP Z,HDSK_PRTCMD
LD DE,HDSKSTR_RESET
CP HDSK_CMDRESET
JP Z,HDSK_PRTCMD
LD DE,HDSKSTR_READ
CP HDSK_CMDREAD
JP Z,HDSK_PRTCMD
LD DE,HDSKSTR_WRITE
CP HDSK_CMDWRITE
JP Z,HDSK_PRTCMD
LD DE,HDSKSTR_PARAM
CP HDSK_CMDPARAM
JP Z,HDSK_PRTCMD
LD DE,HDSKSTR_UNKCMD
HDSK_PRTCMD:
CALL WRITESTR
CALL PC_RBKT
LD A,(HDSK_CMD)
CP HDSK_CMDREAD
JR Z,HDSK_PRTRW
CP HDSK_CMDWRITE
JR Z,HDSK_PRTRW
RET
HDSK_PRTRW:
CALL PC_SPACE
LD A,(HDSK_DEVICE)
CALL PRTHEXBYTE
CALL PC_SPACE
LD BC,(HDSK_TRK)
CALL PRTHEXWORD
CALL PC_SPACE
LD A,(HDSK_SEC)
CALL PRTHEXBYTE
CALL PC_SPACE
LD BC,(HDSK_DMA)
CALL PRTHEXWORD
CALL PC_SPACE
LD DE,HDSKSTR_ARROW
CALL WRITESTR
CALL PC_SPACE
LD DE,HDSKSTR_RC
CALL WRITESTR
LD A,(HDSK_RC)
CALL PRTHEXBYTE
CALL PC_SPACE
CALL PC_LBKT
LD A,(HDSK_RC)
LD DE,HDSKSTR_RCOK
CP HDSKRC_OK
JP Z,HDSK_PRTRC
LD DE,HDSKSTR_RCUNK
HDSK_PRTRC:
CALL WRITESTR
CALL PC_RBKT
RET
;
;
;
HDSKSTR_PREFIX .TEXT "HDSK:$"
HDSKSTR_CMD .TEXT "CMD=$"
HDSKSTR_RC .TEXT "RC=$"
HDSKSTR_ARROW .TEXT "-->$"
HDSKSTR_NONE .TEXT "NONE$"
HDSKSTR_RESET .TEXT "RESET$"
HDSKSTR_READ .TEXT "READ$"
HDSKSTR_WRITE .TEXT "WRITE$"
HDSKSTR_PARAM .TEXT "PARAM$"
HDSKSTR_UNKCMD .TEXT "UNKCMD$"
HDSKSTR_RCOK .TEXT "OK$"
HDSKSTR_RCUNK .TEXT "UNKNOWN ERROR$"
;
;==================================================================================================
; HDSK DISK DRIVER - DATA
;==================================================================================================
;
HDSK_STAT .DB 0
HDSK_RC .DB 0
;
HDSK_PARMBLK:
HDSK_CMD .DB 0 ; COMMAND (HDSK_READ, HDSK_WRITE, ...)
HDSK_DEVICE .DB 0 ; 0..7, HARD DISK UNIT
HDSK_SEC .DB 0 ; 0..255 SECTOR
HDSK_TRK .DW 0 ; 0..2047 TRACK
HDSK_DMA .DW 0 ; DEFINES WHERE RESULT IS PLACED IN MEMORY

View File

@@ -1,519 +0,0 @@
;
;==================================================================================================
; IDE DISK DRIVER
;==================================================================================================
;
; IO PORT ADDRESSES
;
#IF (IDEMODE == IDEMODE_MK4)
IDEBASE .EQU MK4_IDE
#ELSE
IDEBASE .EQU $20
#ENDIF
#IF ((IDEMODE == IDEMODE_DIO) | (IDEMODE == IDEMODE_MK4))
#IF (IDE8BIT)
IDEDATA: .EQU $IDEBASE + $00 ; DATA PORT (8 BIT)
#ELSE
IDEDATALO: .EQU $IDEBASE + $00 ; DATA PORT (16 BIT LO BYTE)
IDEDATAHI: .EQU $IDEBASE + $08 ; DATA PORT (16 BIT HI BYTE)
IDEDATA: .EQU IDEDATALO
#ENDIF
#ENDIF
;
#IF (IDEMODE == IDEMODE_DIDE)
#IF (IDE8BIT)
IDEDATA: .EQU $IDEBASE + $00 ; DATA PORT (8 BIT OR 16 BIT PIO LO/HI BYTES)
#ELSE
IDEDATA: .EQU $IDEBASE + $08 ; DATA PORT (16 BIT PIO LO/HI BYTES)
IDEDMA: .EQU $IDEBASE + $09 ; DATA PORT (16 BIT DMA LO/HI BYTES)
#ENDIF
#ENDIF
;
IDEERR: .EQU $IDEBASE + $01 ; READ: ERROR REGISTER; WRITE: PRECOMP
IDESECTC: .EQU $IDEBASE + $02 ; SECTOR COUNT
IDESECTN: .EQU $IDEBASE + $03 ; SECTOR NUMBER
IDECYLLO: .EQU $IDEBASE + $04 ; CYLINDER LOW
IDECYLHI: .EQU $IDEBASE + $05 ; CYLINDER HIGH
IDEDEVICE: .EQU $IDEBASE + $06 ; DRIVE/HEAD
IDESTTS: .EQU $IDEBASE + $07 ; READ: STATUS; WRITE: COMMAND
IDECTRL: .EQU $IDEBASE + $0E ; READ: ALTERNATIVE STATUS; WRITE; DEVICE CONTROL
IDEADDR: .EQU $IDEBASE + $0F ; DRIVE ADDRESS (READ ONLY)
;
;
;
IDECMD_READ .EQU 020H
IDECMD_WRITE .EQU 030H
IDECMD_SETFEAT .EQU 0EFH
;
IDERC_OK .EQU 0
IDERC_CMDERR .EQU 1
IDERC_RDYTO .EQU 2
IDERC_BUFTO .EQU 3
;
; UNIT CONFIGURATION
;
IDE0_DEVICE .DB 11100000B ; LBA, MASTER DEVICE
IDE1_DEVICE .DB 11110000B ; LBA, SLAVE DEVICE
;
;
;
IDE_DISPATCH:
LD A,B ; GET REQUESTED FUNCTION
AND $0F
JR Z,IDE_RD
DEC A
JR Z,IDE_WR
DEC A
JR Z,IDE_ST
DEC A
JR Z,IDE_MED
CALL PANIC
;
IDE_RD:
JP IDE_READ
IDE_WR:
JP IDE_WRITE
IDE_ST:
JP IDE_STATUS
IDE_MED:
JP IDE_MEDIA
;
; IDE_MEDIA
;
IDE_MEDIA:
LD A,MID_HD
RET
;
;
;
IDE_INIT:
PRTS("IDE: IO=0x$")
LD A,IDEDATA
CALL PRTHEXBYTE
PRTS(" UNITS=2$")
;
CALL IDE_RESET
XOR A
DEC A ; INITIAL STATUS IS NOT READY $FF
LD (IDE_STAT),A ; SAVE IT
RET
;
;
;
IDE_STATUS:
LD A,(IDE_STAT) ; LOAD STATUS
OR A ; SET FLAGS
RET
;
;
;
IDE_READ:
LD A,IDECMD_READ
LD (IDE_CMD),A
JP IDE_RW
;
;
;
IDE_WRITE:
LD A,IDECMD_WRITE
LD (IDE_CMD),A
JP IDE_RW
;
;
;
IDE_RW:
; CLEAR RESULTS
XOR A ; A = 0
LD (IDE_RC),A ; CLEAR RETURN CODE
LD (IDE_STTS),A ; CLEAR SAVED STTS
LD (IDE_ERRS),A ; CLEAR SAVED ERR
; INIT REQUIRED?
LD A,(IDE_STAT) ; GET CURRENT STATUS
OR A ; SET FLAGS
JR Z,IDE_RW0 ; IF STATUS OK, BYPASS RESET
CALL IDE_RESET ; DO THE RESET
#IF (IDE8BIT)
CALL IDE_WAITRDY
LD A,01H
OUT (IDEERR),A
LD A,IDECMD_SETFEAT
OUT (IDESTTS),A
CALL IDE_WAITRDY
JP NC,IDE_ERR
CALL IDE_CHKERR ; CHECK FOR ERRORS
JP NC,IDE_ERR
#IF (IDETRACE >= 2)
CALL IDE_PRT
#ENDIF
#ENDIF
IDE_RW0:
CALL IDE_WAITRDY ; WAIT FOR DRIVE READY
JP NC,IDE_ERR
CALL IDE_SETUP ; SETUP CYL, TRK, HEAD
LD A,(IDE_CMD)
OUT (IDESTTS),A
CALL IDE_WAITRDY ; WAIT FOR DRIVE READY
JP NC,IDE_ERR
CALL IDE_CHKERR ; CHECK FOR ERRORS
JP NC,IDE_ERR
CALL IDE_WAITBUF ; WAIT FOR BUFFER READY
JP NC,IDE_ERR
LD A,(IDE_CMD) ; DISPATCH TO READ OR WRITE SPECIFIC LOGIC
CP IDECMD_WRITE
JP Z,IDE_RW1
CALL IDE_BUFRD ; READ BUFFER
CALL IDE_WAITRDY ; WAIT FOR DRIVE READY
JP NC,IDE_ERR
CALL IDE_CHKERR ; CHECK FOR ERRORS
JP NC,IDE_ERR
JP IDE_OK
IDE_RW1:
CALL IDE_BUFWR ; WRITE BUFFER
CALL IDE_WAITRDY ; WAIT FOR DRIVE READY
JP NC,IDE_ERR
CALL IDE_CHKERR ; CHECK FOR ERRORS
JP NC,IDE_ERR
JP IDE_OK
IDE_ERR:
XOR A
DEC A ; A = $FF TO SIGNAL ERROR
LD (IDE_STAT),A ; SAVE IT
#IF (IDETRACE >= 1)
PUSH AF
CALL IDE_PRT
POP AF
#ENDIF
RET
IDE_OK:
#IF (IDETRACE >= 2)
CALL IDE_PRT
#ENDIF
XOR A
RET
;
;
;
IDE_RESET:
LD A,000001110B ; NO INTERRUPTS, ASSERT RESET BOTH DRIVES
OUT (IDECTRL),A
LD DE,8 ; DELAY ABOUT 200ms
CALL VDELAY
LD A,000001010B ; NO INTERRUPTS, DEASSERT RESET
OUT (IDECTRL),A
XOR A
LD (IDE_STAT),A ; STATUS OK
RET ; SAVE IT
;
;
;
IDE_WAITRDY:
LD DE,0 ; TIMEOUT IS 250us * 65536 = 15 SECONDS
IDE_WBSY:
PUSH DE
LD DE,10 ; INNER LOOP DELAY IS 250us (25us * 10)
CALL VDELAY
POP DE
DEC DE
LD A,D
OR E
JP Z,IDE_TO
IN A,(IDESTTS) ; READ STATUS
LD (IDE_STTS),A ; SAVE IT
AND 011000000b ; ISOLATE BUSY AND RDY BITS
XOR 001000000b ; WE WANT BUSY(7) TO BE 0 AND RDY(6) TO BE 1
JP NZ,IDE_WBSY
SCF ; CARRY 1 = OK
RET
IDE_TO:
LD A,IDERC_RDYTO
LD (IDE_RC),A
XOR A ; CARRY 0 = TIMEOUT
RET
;
;
;
IDE_CHKERR:
IN A,(IDESTTS) ; GET STATUS
LD (IDE_STTS),A ; SAVE IT
AND 000000001B ; ERROR BIT SET?
SCF ; ASSUME NO ERR
RET Z ; NO ERR, RETURN WITH CF SET
IN A,(IDEERR) ; READ ERROR FLAGS
LD (IDE_ERRS),A ; SAVE IT
LD A,IDERC_CMDERR ; COMMAND ERROR
LD (IDE_RC),A ; SAVE IT
OR A ; CLEAR CF TO SIGNAL ERROR
RET
;
;
;
IDE_WAITBUF:
LD DE,0
IDE_WDRQ:
CALL DELAY
INC DE
LD A,D
OR E
JP Z,IDE_TO2
IN A,(IDESTTS) ; WAIT FOR DRIVE'S 512 BYTE READ BUFFER
LD (IDE_STTS),A ; SAVE IT
AND 000001000B ; TO FILL (OR READY TO FILL)
JP Z,IDE_WDRQ
SCF ; CARRY 1 = OK
RET
IDE_TO2:
LD A,IDERC_BUFTO
LD (IDE_RC),A
XOR A ; CARRY 0 = TIMED OUT
RET
;
;
;
IDE_BUFRD:
LD HL,(DIOBUF)
LD B,0
#IF (IDE8BIT | (IDEMODE == IDEMODE_DIDE))
LD C,IDEDATA
INIR
INIR
#ELSE
LD C,IDEDATAHI
IDE_BUFRD1:
IN A,(IDEDATALO) ; READ THE LO BYTE
LD (HL),A ; SAVE IN BUFFER
INC HL ; INC BUFFER POINTER
INI ; READ AND SAVE HI BYTE, INC HL, DEC B
JP NZ,IDE_BUFRD1 ; LOOP AS NEEDED
#ENDIF
RET
;
;
;
IDE_BUFWR:
LD HL,(DIOBUF)
LD B,0
#IF (IDE8BIT | (IDEMODE == IDEMODE_DIDE))
LD C,IDEDATA
OTIR
OTIR
#ELSE
LD C,IDEDATAHI
IDE_BUFWR1:
LD A,(HL) ; GET THE LO BYTE AND KEEP IT IN A FOR LATER
INC HL ; BUMP TO NEXT BYTE IN BUFFER
OUTI ; WRITE HI BYTE, INC HL, DEC B
OUT (IDEDATALO),A ; NOW WRITE THE SAVED LO BYTE TO LO BYTE
JP NZ,IDE_BUFWR1 ; LOOP AS NEEDED
#ENDIF
RET
;
;
;
IDE_SETUP:
LD A,1
OUT (IDESECTC),A
LD A,(HSTDSK) ; HSTDSK -> HEAD BIT 4 TO SELECT UNIT
AND 0FH
CP 0
JP Z,IDE_SETUP_UNIT0
CP 1
JP Z,IDE_SETUP_UNIT1
CALL NC,PANIC
IDE_SETUP_UNIT0:
LD A,(IDE0_DEVICE)
; LD DE,(IDE0_OFFSET)
JP IDE_SETUP1
IDE_SETUP_UNIT1:
LD A,(IDE1_DEVICE)
; LD DE,(IDE1_OFFSET)
JP IDE_SETUP1
IDE_SETUP1:
LD (IDE_DEVICE),A
OUT (IDEDEVICE),A
; SEND 3 BYTES OF LBA (HSTTRK:HSTSEC) T:SS -> CYL:SEC (CC:S)
LD A,(HSTTRK) ; HSTTRK LSB
LD (IDE_CYLHI),A ; SAVE IT
OUT (IDECYLHI),A ; -> CYLINDER HI
LD A,(HSTSEC + 1) ; HSTSEC MSB
LD (IDE_CYLLO),A ; SAVE IT
OUT (IDECYLLO),A ; -> CYLINDER LO
LD A,(HSTSEC) ; HSTSEC LSB
LD (IDE_SEC),A ; SAVE IT
OUT (IDESECTN),A ; -> SECTOR NUM
#IF (DSKYENABLE)
CALL IDE_DSKY
#ENDIF
RET
;
;
;
#IF (DSKYENABLE)
IDE_DSKY:
LD HL,DSKY_HEXBUF
LD A,(IDE_DEVICE)
LD (HL),A
INC HL
LD A,(IDE_CYLHI)
LD (HL),A
INC HL
LD A,(IDE_CYLLO)
LD (HL),A
INC HL
LD A,(IDE_SEC)
LD (HL),A
CALL DSKY_HEXOUT
RET
#ENDIF
;
;
;
IDE_PRT:
CALL NEWLINE
LD DE,IDESTR_PREFIX
CALL WRITESTR
CALL PC_SPACE
LD DE,IDESTR_CMD
CALL WRITESTR
LD A,(IDE_CMD)
CALL PRTHEXBYTE
CALL PC_SPACE
CALL PC_LBKT
LD A,(IDE_CMD)
LD DE,IDESTR_READ
CP IDECMD_READ
JP Z,IDE_PRTCMD
LD DE,IDESTR_WRITE
CP IDECMD_WRITE
JP Z,IDE_PRTCMD
LD DE,IDESTR_UNKCMD
IDE_PRTCMD:
CALL WRITESTR
CALL PC_RBKT
CALL PC_SPACE
LD A,(IDE_DEVICE)
CALL PRTHEXBYTE
LD A,(IDE_CYLHI)
CALL PRTHEXBYTE
LD A,(IDE_CYLLO)
CALL PRTHEXBYTE
LD A,(IDE_SEC)
CALL PRTHEXBYTE
CALL PC_SPACE
LD DE,IDESTR_ARROW
CALL WRITESTR
CALL PC_SPACE
IN A,(IDESTTS)
CALL PRTHEXBYTE
CALL PC_SPACE
IN A,(IDEERR)
CALL PRTHEXBYTE
CALL PC_SPACE
LD DE,IDESTR_RC
CALL WRITESTR
LD A,(IDE_RC)
CALL PRTHEXBYTE
CALL PC_SPACE
CALL PC_LBKT
LD A,(IDE_RC)
LD DE,IDESTR_RCOK
CP IDERC_OK
JP Z,IDE_PRTRC
LD DE,IDESTR_RCCMDERR
CP IDERC_CMDERR
JP Z,IDE_PRTRC
LD DE,IDESTR_RCRDYTO
CP IDERC_RDYTO
JP Z,IDE_PRTRC
LD DE,IDESTR_RCBUFTO
CP IDERC_BUFTO
JP Z,IDE_PRTRC
LD DE,IDESTR_RCUNK
IDE_PRTRC:
CALL WRITESTR
CALL PC_RBKT
RET
;
;
;
IDESTR_PREFIX .TEXT "IDE:$"
IDESTR_CMD .TEXT "CMD=$"
IDESTR_RC .TEXT "RC=$"
IDESTR_ARROW .TEXT "-->$"
IDESTR_READ .TEXT "READ$"
IDESTR_WRITE .TEXT "WRITE$"
IDESTR_UNKCMD .TEXT "UNKCMD$"
IDESTR_RCOK .TEXT "OK$"
IDESTR_RCCMDERR .TEXT "COMMAND ERROR$"
IDESTR_RCRDYTO .TEXT "READY TIMEOUT$"
IDESTR_RCBUFTO .TEXT "BUFFER TIMEOUT$"
IDESTR_RCUNK .TEXT "UNKNOWN ERROR$"
;
;==================================================================================================
; IDE DISK DRIVER - DATA
;==================================================================================================
;
IDE_STAT .DB 0
IDE_RC .DB 0
;
IDE_CMD: .DB 0
IDE_DEVICE .DB 0
IDE_CYLHI: .DB 0
IDE_CYLLO: .DB 0
IDE_SEC: .DB 0
IDE_STTS: .DB 0
IDE_ERRS .DB 0
;
;
;
;
; Error Register (ERR bit being set in the Status Register)
;
; Bit 7: BBK (Bad Block Detected) Set when a Bad Block is detected.
; Bit 6: UNC (Uncorrectable Data Error) Set when Uncorrectable Error is encountered.
; Bit 5: MC (Media Changed) Set to 0.
; Bit 4: IDNF (ID Not Found) Set when Sector ID not found.
; Bit 3: MCR (Media Change Request) Set to 0.
; Bit 2: ABRT (Aborted Command) Set when Command Aborted due to drive error.
; Bit 1: TKONF (Track 0 Not Found) Set when Executive Drive Diagnostic Command.
; Bit 0: AMNF (Address mark Not Found) Set in case of a general error.
;
; Status Register (When the contents of this register are read by the host, the IREQ# bit is cleared)
;
; Bit 7: BSY (Busy) Set when the drive is busy and unable to process any new ATA commands.
; Bit 6: DRDY (Data Ready) Set when the device is ready to accept ATA commands from the host.
; Bit 5: DWF (Drive Write Fault) Always set to 0.
; Bit 4: DSC (Drive Seek Complete) Set when the drive heads have been positioned over a specific track.
; Bit 3: DRQ (Data Request) Set when device is ready to transfer a word or byte of data to or from the host and the device.
; Bit 2: CORR (Corrected Data) Always set to 0.
; Bit 1: IDX (Index) Always set to 0.
; Bit 0: ERR (Error) Set when an error occurred during the previous ATA command.

View File

@@ -1,24 +0,0 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; infolist.inc 6/ 7/2012 dwg - removed DSK_MAP pointer ;
; infolist.inc 5/16/2012 dwg - BIOS information pointers ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; The putpose of this table is to provide pointers that can
; be used by utility programs to access BIOS internals for
; debugging and informative purposes. Any time the format
; changes, the first word should be incremented to the Apps
; can determine the lineage of a specific BIOS. This table
; was created in support of the 2.0.0.0 banked BIOS.
INFOLIST:
.DW 2 ; INFOLIST version 2 6/7/2012
.DW STR_BANNER
.DW STR_BUILD
.DW STR_TIMESTAMP
.DW DPB_MAP
.DW DPH_MAP
.DW CIO_MAP
;;;;;;;;;;;;;;;;;;;;;;
; eof - infolist.inc ;
;;;;;;;;;;;;;;;;;;;;;;

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