Improve S100 Z80 FPGA Config

Improvements to the PPIDE interface discovery configuration.

.github/workflows/commit.yml

@@ -26,7 +26,8 @@ jobs:
         run: |
           export TZ='America/Los_Angeles'
           sudo apt-get install srecord
-          make distlog
+          make transpile-c-code
+          make distlog --trace
           rm -rf .git*
 
       - name: List Output

.github/workflows/release.yml

@@ -19,7 +19,8 @@ jobs:
           export TZ='America/Los_Angeles'
           sudo apt-get install libncurses-dev
           sudo apt-get install srecord
-          make distlog
+          make transpile-c-code
+          make distlog --trace
           rm -rf .git*
       
       - name: Create Package Archive

.gitignore

@@ -100,7 +100,7 @@ Tools/unix/zx/zx
 !Source/EZ512/*.bin
 !Source/Z1RCC/*.bin
 !Source/ZZRCC/*.bin
-!Source/FZ80/*.bin
+!Source/SZ80/*.bin
 !Tools/cpm/**
 !Tools/unix/zx/*
 !Tools/zx/*
@@ -114,20 +114,24 @@ Source/ZPM3/genbnk.dat
 Source/ZSDOS/zsdos.err
 
 # Lets explicit list all generate untracked binary files
+Binary/*.upd
+Binary/Apps/bbcbasic.txt
+Binary/Apps/copysl.doc
+Binary/Apps/copysl.doc
+Binary/Apps/fdu.doc
+Binary/Apps/fdu.doc
 Binary/Apps/Tunes/bgm.vgm
 Binary/Apps/Tunes/ending.vgm
 Binary/Apps/Tunes/inchina.vgm
 Binary/Apps/Tunes/shirakaw.vgm
 Binary/Apps/Tunes/startdem.vgm
 Binary/Apps/Tunes/wonder01.vgm
-Binary/Apps/copysl.doc
-Binary/Apps/fdu.doc
 Binary/Apps/zmconfig.ovr
 Binary/Apps/zminit.ovr
-Binary/Apps/zmp.doc
-Binary/Apps/zmp.hlp
 Binary/Apps/zmp.cfg
+Binary/Apps/zmp.doc
 Binary/Apps/zmp.fon
+Binary/Apps/zmp.hlp
 Binary/Apps/zmterm.ovr
 Binary/Apps/zmxfer.ovr
 Binary/CPM3/bdos3.spr
@@ -146,13 +150,12 @@ Binary/CPNET/cpn12ser.lbr
 Binary/CPNET/cpn3duo.lbr
 Binary/CPNET/cpn3mt.lbr
 Binary/CPNET/cpn3ser.lbr
-Binary/*.upd
+Binary/hd1k_prefix.dat
 Binary/ZPM3/bnkbdos3.spr
 Binary/ZPM3/bnkbios3.spr
 Binary/ZPM3/gencpm.dat
 Binary/ZPM3/resbdos3.spr
 Binary/ZPM3/zinstal.zpm
-Binary/hd1k_prefix.dat
 Source/BPBIOS/def-ww.lib
 Source/CPNET/cpn12duo.lbr
 Source/CPNET/cpn12mt.lbr
@@ -180,6 +183,8 @@ Source/Fonts/fontvgarcc.bin
 Source/Fonts/fontvgarcu.asm
 Source/HBIOS/*.upd
 Source/HBIOS/build_env.cmd
+Source/HBIOS/build_env.cmd
+Source/HBIOS/hbios_env.sh
 Source/HBIOS/hbios_env.sh
 Source/HBIOS/netboot.mod
 Source/Images/*.cat
@@ -197,4 +202,3 @@ Source/ZPM3/setz3.com
 Tools/unix/OpenSpin/build/
 Tools/unix/zxcc/config.h
 Tools/unix/zxcc/zxcc
-Binary/Apps/bbcbasic.txt

.vscode/settings.json

@@ -1,4 +1,38 @@
 {
+  "z80-macroasm.format.enabled": true,
+  "z80-macroasm.format.baseIndent": 1,
+  "z80-macroasm.format.whitespaceAfterInstruction": "tab",
+  "z80-macroasm.format.uppercaseKeywords": true,
+  "z80-macroasm.format.spaceAfterArgument": true,
+  "z80-macroasm.format.hexaNumberStyle": "motorola",
+  "z80-macroasm.format.hexaNumberCase": true,
   "files.trimTrailingWhitespace": false,
-  "files.eol": "\r\n"
+  "files.eol": "\r\n",
+  "files.associations": {
+    "*.inc": "z80-macroasm",
+    "*.asm": "z80-macroasm",
+    "*.180": "z80-macroasm",
+    "*.asm.m4": "z80-macroasm",
+    "*.inc.m4": "z80-macroasm",
+    "*.mac": "z80-macroasm",
+    "*.asmpp": "z80-macroasm",
+    "*.zdsproj": "xml",
+    "*.Z80": "z80-macroasm",
+    "ch376.h": "c",
+    "protocol.h": "c",
+    "usb_state.h": "c",
+    "functional": "c",
+    "class_scsi.h": "c",
+    "z80.h": "c",
+    "dev_transfers.h": "c",
+    "usb-base-drv.h": "c",
+    "critical-section.h": "c",
+    "enumerate.h": "c",
+    "ch376inc.h": "c",
+    "enumerate_storage.h": "c",
+    "work-area.h": "c",
+    "hbios-driver-storage.h": "c",
+    "class_hid_keyboard.h": "c",
+    "print.h": "c"
+  }
 }

Doc/CPM/ReadMe.txt

@@ -62,6 +62,7 @@ ZCPR D&J User Manual.  This manual supplements the ZCPR Manual.
 
 
 ZSDOS Manual ("ZSDOS Manual.pdf")
+ZSDOS Programmer's Manual ("ZSDOS Programmers Manual.pdf")
 ---------------------------------
 
 ZSDOS is the DOS portion of Z-System.  This is the manual for ZSDOS
@@ -69,6 +70,10 @@ ZSDOS is the DOS portion of Z-System.  This is the manual for ZSDOS
 ignored since that work has already been completed as part of the
 RomWBW distribution.
 
+The ZSDOS Programmer's Manual is also included courtesy of Wayne 
+Hortensius and Randy Merkel.  This manual includes documentation of the
+ZSDOS BDOS API enhancements.
+
 ZPM3 ("ZPM3.txt")
 -----------------
 

Doc/ChangeLog.txt

@@ -14,6 +14,23 @@ Version 3.6
 - J?L: Source for ZSDOS2 and BPBIOS Utilities (from disassembly)
 - WBW: Support ROM-based font storage
 - MAP: New Slice Inventory Rom App "S" display bootable slices, during boot
+- MAP: Device Inventory moved from HBIOS to Rom App, saving >1k space in HBIOS
+- MAP: Added disk image for all Infocom text adventure Games
+- M?R: Fixed formatting issue with SLABEL where Slice # < 10
+- WBW: Improved image creation process to allow user defined aggregates
+- WBW: Implemented config driven slice name and system image specification
+- D?N: Added native USB driver support (keyboard, floppy, mass storage)
+- MGG: Added sample program source files for all language disk iamges
+- WBW: Added support for S100 Dual CF Interface
+- WBW: Added support for S100 ESP32 SD Interface
+- MAP: User guide. Reorder sections around disk formatting
+- R?M: Randy Merkel provided ZSDOS Programmer's Manual as translated by Wayne Hortensius
+- WBW: Updated Cowgol disk image with latest COWFIX.COM from Ladislau Szilagyi
+- WBW: Preliminary support for S100 Computers Z80 CPU
+- HJB: Added MSX platform
+- M?R: Update Timer app with "zero" option
+- HJB: Update PPIDE driver, add support for MSX BEER IDE interface
+- HJB: Added loader for MSX
 
 Version 3.5.1
 -------------
@@ -84,7 +101,7 @@ Version 3.5
 - WBW: Add options to TUNE/HBIOS to force detection of MSX and RC AY/YM standard PSG ports
 - MAP: Added /B=OPTIONS for automated drive assignment to ASSIGN.COM
 - WBW: Added TE Editor (Ladislau Szilagyi)
-- WBW: Refrech Cowgol disk image (Ladislau Szilagyi)
+- WBW: Refresh Cowgol disk image (Ladislau Szilagyi)
 
 Version 3.4
 -----------

Doc/Language/ReadMe.txt

@@ -23,10 +23,14 @@ Borland TurboPascal User Manual ("Turbo_Pascal_Version_3.0_Reference_Manual_1986
 Official user manual Borland TurboPascal included in the pascal disk image.
 
 
-Cowgol Lanaguage ("Cowgol Language.pdf")
+The Cowgol Lanaguage ("The Cowgol Language.pdf")
+Cowgol Compiler Manual ("Cowgol Compiler Manual.pdf")
+
 --------------------------------------
 
-Documentation for Cowgol Language included in the cowgol disk image
+Documentation for Cowgol Language included in the cowgol disk image.
+The Cowgol Language describes the Cowgol Language itself while the
+Cowgol Compiler Manual describes the compiler operation.
 
 
 HI-TECH C Compiler User Manual ("HI-TECH Z80 C Compiler Manual.txt")

Dockerfile

@@ -1,4 +1,4 @@
-FROM ubuntu:jammy-20240111 as basebuilder
+FROM ubuntu:jammy-20240111 AS basebuilder
 
 # This docker file can be used to build a tool chain docker image for building RomWBW images.
 
@@ -10,7 +10,7 @@ FROM ubuntu:jammy-20240111 as basebuilder
 # After you have built the above image (called romwbw-chain), you can use it to compile and build the RomWBW images
 # as per the standard make scripts within RomWBW.
 # Start a new terminal, cd to where you have clone RomWBW, and then run this command: 
-# docker run --rm -v ${PWD}:/src/ --privileged=true -u $(id -u ${USER}):$(id -g ${USER}) -it romwbw-chain:latest
+# docker run --rm -v ${PWD}:/src/ --privileged=true -u $(id -u ${USER}):$(id -g ${USER}) -it romwbw-chain
 
 # you can now compile and build the required images:
 
@@ -21,13 +21,11 @@ FROM ubuntu:jammy-20240111 as basebuilder
 # when finish, type 'exit' to return to back to your standard terminal session
 
 LABEL Maintainer="Dean Netherton" \
-      Description="spike to use clang for ez80 target"
+      Description="RomWBW builder platform"
 
 ENV DEBIAN_FRONTEND=noninteractive
 
-
 RUN dpkg --add-architecture i386
-RUN sed -i 's/http:\/\/archive\.ubuntu\.com\/ubuntu/http:\/\/au.archive.ubuntu.com\/ubuntu/g' /etc/apt/sources.list
 RUN apt update -y
 RUN apt dist-upgrade -y
 RUN apt install -y --no-install-recommends cmake lzip ca-certificates mtools build-essential dos2unix libboost-all-dev texinfo texi2html libxml2-dev subversion bison flex zlib1g-dev m4 git wget dosfstools curl
@@ -35,10 +33,10 @@ RUN apt install -y --no-install-recommends cmake lzip ca-certificates mtools bui
 RUN mkdir work
 WORKDIR /work
 
-FROM basebuilder as main
+FROM basebuilder AS main
 
 LABEL Maintainer="Dean Netherton" \
-      Description="spike to build RomWBW"
+      Description="RomWBW builder platform"
 
 RUN mkdir /src
 WORKDIR /src/

Makefile

@@ -1,7 +1,7 @@
 .PHONY: tools source clean clobber diff dist
 
 .ONESHELL:
-.SHELLFLAGS = -cex
+.SHELLFLAGS = -ce
 
 all: tools source
 
@@ -22,6 +22,11 @@ clobber: clean
 diff:
 	$(MAKE) --directory Source diff
 
+# Convert c code to assembly code
+transpile-c-code:
+	@cd Source/HBIOS/ch376-native
+	$(MAKE) -j
+
 dist:
 	$(MAKE) ROM_PLATFORM=dist
 	$(MAKE) --directory Tools clean

RELEASE_NOTES.md

@@ -8,10 +8,27 @@ release of RomWBW.
 - **Please** review the "Upgrading" Section of the RomWBW User Guide.
 
 - The RomWBW ROM and the RomWBW disk images are intended to be a
-  matched set.  After upgrading your ROM, it is important to update
-  the OS boot tracks of your disks as well as the RomWBW-specific
-  applications.  This is discussed in the "Upgrading" section of the
-  RomWBW User Guide.
+  matched set.  After upgrading your ROM, you need to update your
+  boot disk media by doing one of the following:
+  
+  - Write a new disk image (typically hd1k_combo.img) onto your
+    disk media (will overwrite existing data/files).
+  - Update the boot tracks of the bootable OS images as described in
+    the RomWBW User Guid.
+
+## Version 3.6
+
+### Upgrade Notes
+
+- The FZ80 (S100 FPGA Z80) platform has been renamed to SZ80 (S100 Z80)
+  and has two configurations.  SZ80_std is for the generic S100
+  Z80 CPU.  SZ80_fpga is for the FPGA Z80 SBC.
+
+### New Features
+
+### New Hardware Support
+
+- Support for MSX systems.
 
 ## Version 3.5.1
 
@@ -94,7 +111,6 @@ This is a patch release of v3.5.
 - Enhancements to ASSIGN command to automatically assign drives
   (Mark Pruden).
 
-
 ### New Hardware Support
 
 - NABU w/ RomWBW Option Board.

ReadMe.md

@@ -1,431 +1,445 @@
-
-
-
-
-
-
-**RomWBW Introduction** \
-Version 3.6 \
-Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-29 Jun 2025
-
-# Overview
-
-RomWBW software provides a complete, commercial quality implementation
-of CP/M (and work-alike) operating systems and applications for modern
-Z80/180/280 retro-computing hardware systems.
-
-A wide variety of platforms are supported including those produced by
-these developer communities:
-
-- [RetroBrew Computers](https://www.retrobrewcomputers.org)
-  (<https://www.retrobrewcomputers.org>)
-- [RC2014](https://rc2014.co.uk) (<https://rc2014.co.uk>),  
-  [RC2014-Z80](https://groups.google.com/g/rc2014-z80)
-  (<https://groups.google.com/g/rc2014-z80>)
-- [Retro Computing](https://groups.google.com/g/retro-comp)
-  (<https://groups.google.com/g/retro-comp>)
-- [Small Computer Central](https://smallcomputercentral.com/)
-  (<https://smallcomputercentral.com/>)
-
-A complete list of the currently supported platforms is found in [RomWBW
-Hardware](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Hardware.pdf)
-.
-
-# Description
-
-## Primary Features
-
-By design, RomWBW isolates all of the hardware specific functions in the
-ROM chip itself. The ROM provides a hardware abstraction layer such that
-all of the operating systems and applications on a disk will run on any
-RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
-Card) and move it between systems transparently.
-
-Supported hardware features of RomWBW include:
-
-- Z80 Family CPUs including Z80, Z180, and Z280
-- Banked memory services for several banking designs
-- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
-  Iomega
-- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
-- Video drivers including TMS9918, SY6545, MOS8563, HD6445, Xosera
-- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
-- Real time clock drivers including DS1302, BQ4845
-- Support for CP/NET networking using Wiznet, MT011 or Serial
-- Built-in VT-100 terminal emulation support
-
-A dynamic disk drive letter assignment mechanism allows mapping
-operating system drive letters to any available disk media.
-Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
-support the use of multiple slices (up to 256 per device). Each slice
-contains a complete CP/M filesystem and can be mapped independently to
-any drive letter. This overcomes the inherent size limitations in legacy
-OSes and allows up to 2GB of addressable storage on a single device,
-with up to 128MB accessible at any one time.
-
-## Included Software
-
-Multiple disk images are provided in the distribution. Most disk images
-contain a complete, bootable, ready-to-run implementation of a specific
-operating system. A “combo” disk image contains multiple slices, each
-with a full operating system implementation. If you use this disk image,
-you can easily pick whichever operating system you want to boot without
-changing media.
-
-Some of the included software:
-
-- Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS, QPM
-  )
-- Support for other operating systems, p-System, FreeRTOS, and FUZIX.
-- Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
-- C Compiler’s including Aztec-C, and HI-TECH C
-- Microsoft Basic Compiler, and Microsoft Fortran
-- Some games such as Colossal Cave, Zork, etc
-- Wordstar Word processing software
-
-Some of the provided software can be launched directly from the ROM
-firmware itself:
-
-- System Monitor
-- Operating Systems (CP/M 2.2, ZSDOS)
-- ROM BASIC (Nascom BASIC and Tasty BASIC)
-- ROM Forth
-
-A tool is provided that allows you to access a FAT-12/16/32 filesystem.
-The FAT filesystem may be coresident on the same disk media as RomWBW
-slices or on stand-alone media. This makes exchanging files with modern
-OSes such as Windows, MacOS, and Linux very easy.
-
-## ROM Distribution
-
-The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
-(<https://github.com/wwarthen/RomWBW>) on GitHub is the official
-distribution location for all project source and documentation.
-
-RomWBW is distributed as both source code and pre-built ROM and disk
-images.
-
-The pre-built ROM images distributed with RomWBW are based on the
-default system configurations as determined by the hardware
-provider/designer. The pre-built ROM firmware images are generally
-suitable for most users.
-
-The fully-built distribution releases are available on the [RomWBW
-Releases Page](https://github.com/wwarthen/RomWBW/releases)
-(<https://github.com/wwarthen/RomWBW/releases>) of the repository.
-
-On this page, you will normally see a Development Snapshot as well as
-recent stable releases. Unless you have a specific reason, I suggest you
-stick to the most recent stable release.
-
-The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM and
-Disk images as well as full source code. The other assets contain only
-source code and do not have the pre-built ROM or disk images.
-
-#### Distribution Directory Layout
-
-The RomWBW distribution is a compressed zip archive file organized in a
-set of directories. Each of these directories has its own ReadMe.txt
-file describing the contents in detail. In summary, these directories
-are:
-
-| **Directory** | **Description** |
-|----|----|
-| **Binary** | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in “.rom” and disk images ending in .img. |
-| **Doc** | Contains various detailed documentation, both RomWBW specifically as well as the operating systems and applications. |
-| **Source** | Contains the source code files used to build the software and ROM images. |
-| **Tools** | Contains the programs that are used by the build process or that may be useful in setting up your system. |
-
-#### Building from Source
-
-It is also very easy to modify and build custom ROM images that fully
-tailor the firmware to your specific preferences. All tools required to
-build custom ROM firmware under Windows are included – no need to
-install assemblers, etc. The firmware can also be built using Linux or
-MacOS after confirming a few standard tools have been installed.
-
-## Installation & Operation
-
-In general, installation of RomWBW on your platform is very simple. You
-just need to program your ROM with the correct ROM image from the RomWBW
-distribution. Subsequently, you can write disk images on your disk
-drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
-functionality.
-
-Complete instructions for installation and operation of RomWBW are found
-in the [RomWBW User
-Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf).
-It is also a good idea to review the [Release
-Notes](https://github.com/wwarthen/RomWBW/blob/master/RELEASE_NOTES.md)
-for helpful release-specific information.
-
-## Documentation
-
-There are several documents that form the core of the RomWBW
-documentation:
-
-- [RomWBW User
-  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf)
-  is the main user guide for RomWBW, it covers the major topics of how
-  to install, manage and use RomWBW, and includes additional guidance to
-  the use of some of the operating systems supported by RomWBW
-
-- [RomWBW
-  Hardware](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Hardware.pdf)
-  contains a description of all the hardware platforms, and devices
-  supported by RomWBW.
-
-- [RomWBW
-  Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Applications.pdf)
-  is a reference for the ROM-hosted and OS-hosted applications created
-  or customized to enhance the operation of RomWBW.
-
-- [RomWBW Disk
-  Catalog](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Disk%20Catalog.pdf)
-  is a reference for the contents of the disk images provided with
-  RomWBW, with a description of many of the files on each image
-
-- [RomWBW System
-  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
-  discusses much of the internal design and construction of RomWBW. It
-  includes a reference for the RomWBW HBIOS API functions.
-
-An online HTML version of this documentation is hosted at
-<https://wwarthen.github.io/RomWBW>.
-
-Each of the operating systems and ROM applications included with RomWBW
-are sophisticated tools in their own right. It is not reasonable to
-fully document their usage. However, you will find complete manuals in
-PDF format in the Doc directory of the distribution. The intention of
-this documentation is to describe the operation of RomWBW and the ways
-in which it enhances the operation of the included applications and
-operating systems.
-
-Since RomWBW is purely a software product for many different platforms,
-the documentation does **not** cover hardware construction,
-configuration, or troubleshooting – please see your hardware provider
-for this information.
-
-# Support
-
-## Getting Assistance
-
-The best way to get assistance with RomWBW or any aspect of the
-RetroBrew Computers projects is via one of the community forums:
-
-- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
-- [RC2014 Google
-  Group](https://groups.google.com/forum/#!forum/rc2014-z80)
-- [retro-comp Google
-  Group](https://groups.google.com/forum/#!forum/retro-comp)
-
-Submission of issues and bugs are welcome at the [RomWBW GitHub
-Repository](https://github.com/wwarthen/RomWBW).
-
-Also feel free to email Wayne Warthen at <wwarthen@gmail.com>. I am
-happy to provide support adapting RomWBW to new or modified systems
-
-# Contributions
-
-All source code and distributions are maintained on GitHub.
-Contributions of all kinds to RomWBW are very welcome.
-
-## Acknowledgments
-
-I want to acknowledge that a great deal of the code and inspiration for
-RomWBW has been provided by or derived from the work of others in the
-RetroBrew Computers Community. I sincerely appreciate all of their
-contributions. The list below is probably missing many names – please
-let me know if I missed you!
-
-- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
-  became the first platform RomWBW supported. Some of his original code
-  can still be found in RomWBW.
-
-- Dan Werner wrote much of the code from which RomWBW was originally
-  derived and he has always been a great source of knowledge and advice.
-
-- Douglas Goodall contributed code, time, testing, and advice in “the
-  early days”. He created an entire suite of application programs to
-  enhance the use of RomWBW. Unfortunately, they have become unusable
-  due to internal changes within RomWBW. As of RomWBW 2.6, these
-  applications are no longer provided.
-
-- Sergey Kiselev created several hardware platforms for RomWBW including
-  the very popular Zeta.
-
-- David Giles created support for the Z180 CSIO which is now included SD
-  Card driver.
-
-- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-  AY-3-8910 sound driver, DMA support, and a long list of general code
-  and documentation enhancements.
-
-- Ed Brindley contributed some of the code that supports the RCBus
-  platform.
-
-- Spencer Owen created the RC2014 series of hobbyist kit computers which
-  has exponentially increased RomWBW usage. Some of his kits include
-  RomWBW.
-
-- Stephen Cousins has likewise created a series of hobbyist kit
-  computers at Small Computer Central and is distributing RomWBW with
-  many of them.
-
-- Alan Cox has contributed some driver code and has provided a great
-  deal of advice.
-
-- The CP/NET client files were developed by Douglas Miller.
-
-- Phillip Stevens contributed support for FreeRTOS.
-
-- Curt Mayer contributed the original Linux / MacOS build process.
-
-- UNA BIOS and FDISK80 are the products of John Coffman.
-
-- FLASH4 is a product of Will Sowerbutts.
-
-- CLRDIR is a product of Max Scane.
-
-- Tasty Basic is a product of Dimitri Theulings.
-
-- Dean Netherton contributed eZ80 CPU support, the sound driver
-  interface, and the SN76489 sound driver.
-
-- The RomWBW Disk Catalog document was produced by Mykl Orders.
-
-- Rob Prouse has created many of the supplemental disk images including
-  Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
-  Microsoft Fortran Compiler, and a Games compendium.
-
-- Martin R has provided substantial help reviewing and improving the
-  User Guide and Applications documents.
-
-- Mark Pruden has made a wide variety of contributions including:
-
-  - significant content in the Disk Catalog and User Guide
-  - creation of the Introduction and Hardware documents
-  - Z3PLUS operating system disk image
-  - COPYSL, and SLABEL utilities
-  - Display of bootable slices via “S” command during startup
-  - a feature for RomWBW configuration by NVRAM
-  - the /B bulk mode of disk assignment to the ASSIGN utility
-
-- Jacques Pelletier has contributed the DS1501 RTC driver code.
-
-- Jose Collado has contributed enhancements to the TMS driver including
-  compatibility with standard TMS register configuration.
-
-- Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
-
-- Matt Carroll has contributed a fix to XM.COM that corrects the port
-  specification when doing a send.
-
-- Dean Jenkins enhanced the build process to accommodate the Raspberry
-  Pi 4.
-
-- Tom Plano has contributed a new utility (HTALK) to allow talking
-  directly to HBIOS COM ports.
-
-- Lars Nelson has contributed several generic utilities such as a
-  universal (OS agnostic) UNARC application.
-
-- Dylan Hall added support for specifying a secondary console.
-
-- Bill Shen has contributed boot loaders for several of his systems.
-
-- Laszlo Szolnoki has contributed an EF9345 video display controller
-  driver.
-
-- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
-  that leverages RomWBW memory banking.
-
-- Les Bird has contributed support for the NABU w/ Option Board
-
-- Rob Gowin created an online documentation site via MkDocs, and
-  contributed a driver for the Xosera FPGA-based video controller.
-
-- Jörg Linder has contributed disassembled and nicely commented source
-  for ZSDOS2 and the BPBIOS utilities.
-
-## Related Projects
-
-Outside of the hardware platforms adapted to RomWBW, there are a variety
-of projects that either target RomWBW specifically or provide a
-RomWBW-specific variation. These efforts are greatly appreciated and are
-listed below. Please contact the author if there are any other such
-projects that are not listed.
-
-#### Z88DK
-
-Z88DK is a software powerful development kit for Z80 computers
-supporting both C and assembly language. This kit now provides specific
-library support for RomWBW HBIOS. The Z88DK project is hosted at
-<https://github.com/z88dk/z88dk>.
-
-#### Paleo Editor
-
-Steve Garcia has created a Windows-hosted IDE that is tailored to
-development of RomWBW. The project can be found at
-<https://github.com/alloidian/PaleoEditor>.
-
-#### Z80 fig-FORTH
-
-Dimitri Theulings’ implementation of fig-FORTH for the Z80 has a
-RomWBW-specific variant. The project is hosted at
-<https://github.com/dimitrit/figforth>.
-
-#### Assembly Language Programming for the RC2014 Zed
-
-Bruce Hall has written a very nice document that describes how to
-develop assembly language applications on RomWBW. It begins with the
-setup and configuration of a new RC2014 Zed system running RomWBW. It
-describes not only generic CP/M application development, but also RomWBW
-HBIOS programming and bare metal programming. The latest copy of this
-document is hosted at [http://w8bh.net/Assembly for
-RC2014Z.pdf](http://w8bh.net/Assembly%20for%20RC2014Z.pdf).
-
-# Licensing
-
-## License Terms
-
-RomWBW is free software: you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation, either version 3 of the License, or (at your
-option) any later version.
-
-RomWBW is distributed in the hope that it will be useful, but WITHOUT
-ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-more details.
-
-You should have received a copy of the GNU General Public License along
-with RomWBW. If not, see <https://www.gnu.org/licenses/>.
-
-Portions of RomWBW were created by, contributed by, or derived from the
-work of others. It is believed that these works are being used in
-accordance with the intentions and/or licensing of their creators.
-
-If anyone feels their work is being used outside of its intended
-licensing, please notify:
-
-> Wayne Warthen  
-> <wwarthen@gmail.com>
-
-RomWBW is an aggregate work. It is composed of many individual,
-standalone programs that are distributed as a whole to function as a
-cohesive system. Each program may have its own licensing which may be
-different from other programs within the aggregate.
-
-In some cases, a single program (e.g., CP/M Operating System) is
-composed of multiple components with different licenses. It is believed
-that in all such cases the licenses are compatible with GPL version 3.
-
-RomWBW encourages code contributions from others. Contributors may
-assert their own copyright in their contributions by annotating the
-contributed source code appropriately. Contributors are further
-encouraged to submit their contributions via the RomWBW source code
-control system to ensure their contributions are clearly documented.
-
-All contributions to RomWBW are subject to this license.
+
+
+
+
+
+
+**RomWBW Introduction** \
+Version 3.6 \
+Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
+29 Sep 2025
+
+# Overview
+
+RomWBW software provides a complete, commercial quality implementation
+of CP/M (and work-alike) operating systems and applications for modern
+Z80/180/280 retro-computing hardware systems.
+
+A wide variety of platforms are supported including those produced by
+these developer communities:
+
+- [RetroBrew Computers](https://www.retrobrewcomputers.org)
+  (<https://www.retrobrewcomputers.org>)
+- [RC2014](https://rc2014.co.uk) (<https://rc2014.co.uk>),  
+  [RC2014-Z80](https://groups.google.com/g/rc2014-z80)
+  (<https://groups.google.com/g/rc2014-z80>)
+- [Retro Computing](https://groups.google.com/g/retro-comp)
+  (<https://groups.google.com/g/retro-comp>)
+- [Small Computer Central](https://smallcomputercentral.com/)
+  (<https://smallcomputercentral.com/>)
+
+A complete list of the currently supported platforms is found in [RomWBW
+Hardware](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Hardware.pdf)
+.
+
+# Description
+
+## Primary Features
+
+By design, RomWBW isolates all of the hardware specific functions in the
+ROM chip itself. The ROM provides a hardware abstraction layer such that
+all of the operating systems and applications on a disk will run on any
+RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
+Card) and move it between systems transparently.
+
+Supported hardware features of RomWBW include:
+
+- Z80 Family CPUs including Z80, Z180, and Z280
+- Banked memory services for several banking designs
+- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
+  Iomega
+- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
+- Video drivers including TMS9918, SY6545, MOS8563, HD6445, Xosera
+- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
+- Real time clock drivers including DS1302, BQ4845
+- Support for CP/NET networking using Wiznet, MT011 or Serial
+- Built-in VT-100 terminal emulation support
+
+A dynamic disk drive letter assignment mechanism allows mapping
+operating system drive letters to any available disk media.
+Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
+support the use of multiple slices (up to 256 per device). Each slice
+contains a complete CP/M filesystem and can be mapped independently to
+any drive letter. This overcomes the inherent size limitations in legacy
+OSes and allows up to 2GB of addressable storage on a single device,
+with up to 128MB accessible at any one time.
+
+## Included Software
+
+Multiple disk images are provided in the distribution. Most disk images
+contain a complete, bootable, ready-to-run implementation of a specific
+operating system. A “combo” disk image contains multiple slices, each
+with a full operating system implementation. If you use this disk image,
+you can easily pick whichever operating system you want to boot without
+changing media.
+
+Some of the included software:
+
+- Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS, QPM
+  )
+- Support for other operating systems, p-System, FreeRTOS, and FUZIX.
+- Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
+- C Compiler’s including Aztec-C, and HI-TECH C
+- Microsoft Basic Compiler, Microsoft Fortran, and Microsoft COBOL
+- Some games such as Colossal Cave, Zork, etc
+- Wordstar Word processing software
+
+Some of the provided software can be launched directly from the ROM
+firmware itself:
+
+- System Monitor
+- Operating Systems (CP/M 2.2, ZSDOS)
+- ROM BASIC (Nascom BASIC and Tasty BASIC)
+- ROM Forth
+
+A tool is provided that allows you to access a FAT-12/16/32 filesystem.
+The FAT filesystem may be coresident on the same disk media as RomWBW
+slices or on stand-alone media. This makes exchanging files with modern
+OSes such as Windows, MacOS, and Linux very easy.
+
+## ROM Distribution
+
+The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
+(<https://github.com/wwarthen/RomWBW>) on GitHub is the official
+distribution location for all project source and documentation.
+
+RomWBW is distributed as both source code and pre-built ROM and disk
+images.
+
+The pre-built ROM images distributed with RomWBW are based on the
+default system configurations as determined by the hardware
+provider/designer. The pre-built ROM firmware images are generally
+suitable for most users.
+
+The fully-built distribution releases are available on the [RomWBW
+Releases Page](https://github.com/wwarthen/RomWBW/releases)
+(<https://github.com/wwarthen/RomWBW/releases>) of the repository.
+
+On this page, you will normally see a Development Snapshot as well as
+recent stable releases. Unless you have a specific reason, I suggest you
+stick to the most recent stable release.
+
+The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM and
+Disk images as well as full source code. The other assets contain only
+source code and do not have the pre-built ROM or disk images.
+
+#### Distribution Directory Layout
+
+The RomWBW distribution is a compressed zip archive file organized in a
+set of directories. Each of these directories has its own ReadMe.txt
+file describing the contents in detail. In summary, these directories
+are:
+
+| **Directory** | **Description** |
+|----|----|
+| **Binary** | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in “.rom” and disk images ending in .img. |
+| **Doc** | Contains various detailed documentation, both RomWBW specifically as well as the operating systems and applications. |
+| **Source** | Contains the source code files used to build the software and ROM images. |
+| **Tools** | Contains the programs that are used by the build process or that may be useful in setting up your system. |
+
+#### Building from Source
+
+It is also very easy to modify and build custom ROM images that fully
+tailor the firmware to your specific preferences. All tools required to
+build custom ROM firmware under Windows are included – no need to
+install assemblers, etc. The firmware can also be built using Linux or
+MacOS after confirming a few standard tools have been installed.
+
+## Installation & Operation
+
+In general, installation of RomWBW on your platform is very simple. You
+just need to program your ROM with the correct ROM image from the RomWBW
+distribution. Subsequently, you can write disk images on your disk
+drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
+functionality.
+
+Complete instructions for installation and operation of RomWBW are found
+in the [RomWBW User
+Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf).
+It is also a good idea to review the [Release
+Notes](https://github.com/wwarthen/RomWBW/blob/master/RELEASE_NOTES.md)
+for helpful release-specific information.
+
+## Documentation
+
+There are several documents that form the core of the RomWBW
+documentation:
+
+- [RomWBW User
+  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf)
+  is the main user guide for RomWBW, it covers the major topics of how
+  to install, manage and use RomWBW, and includes additional guidance to
+  the use of some of the operating systems supported by RomWBW
+
+- [RomWBW
+  Hardware](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Hardware.pdf)
+  contains a description of all the hardware platforms, and devices
+  supported by RomWBW.
+
+- [RomWBW
+  Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Applications.pdf)
+  is a reference for the ROM-hosted and OS-hosted applications created
+  or customized to enhance the operation of RomWBW.
+
+- [RomWBW Disk
+  Catalog](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Disk%20Catalog.pdf)
+  is a reference for the contents of the disk images provided with
+  RomWBW, with a description of many of the files on each image
+
+- [RomWBW System
+  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
+  discusses much of the internal design and construction of RomWBW. It
+  includes a reference for the RomWBW HBIOS API functions.
+
+An online HTML version of this documentation is hosted at
+<https://wwarthen.github.io/RomWBW>.
+
+Each of the operating systems and ROM applications included with RomWBW
+are sophisticated tools in their own right. It is not reasonable to
+fully document their usage. However, you will find complete manuals in
+PDF format in the Doc directory of the distribution. The intention of
+this documentation is to describe the operation of RomWBW and the ways
+in which it enhances the operation of the included applications and
+operating systems.
+
+Since RomWBW is purely a software product for many different platforms,
+the documentation does **not** cover hardware construction,
+configuration, or troubleshooting – please see your hardware provider
+for this information.
+
+# Support
+
+## Getting Assistance
+
+The best way to get assistance with RomWBW or any aspect of the
+RetroBrew Computers projects is via one of the community forums:
+
+- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
+- [RC2014 Google
+  Group](https://groups.google.com/forum/#!forum/rc2014-z80)
+- [retro-comp Google
+  Group](https://groups.google.com/forum/#!forum/retro-comp)
+
+Submission of issues and bugs are welcome at the [RomWBW GitHub
+Repository](https://github.com/wwarthen/RomWBW).
+
+Also feel free to email Wayne Warthen at <wwarthen@gmail.com>. I am
+happy to provide support adapting RomWBW to new or modified systems
+
+# Contributions
+
+All source code and distributions are maintained on GitHub.
+Contributions of all kinds to RomWBW are very welcome.
+
+## Acknowledgments
+
+I want to acknowledge that a great deal of the code and inspiration for
+RomWBW has been provided by or derived from the work of others in the
+RetroBrew Computers Community. I sincerely appreciate all of their
+contributions. The list below is probably missing many names – please
+let me know if I missed you!
+
+- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
+  became the first platform RomWBW supported. Some of his original code
+  can still be found in RomWBW.
+
+- Dan Werner wrote much of the code from which RomWBW was originally
+  derived and he has always been a great source of knowledge and advice.
+
+- Douglas Goodall contributed code, time, testing, and advice in “the
+  early days”. He created an entire suite of application programs to
+  enhance the use of RomWBW. Unfortunately, they have become unusable
+  due to internal changes within RomWBW. As of RomWBW 2.6, these
+  applications are no longer provided.
+
+- Sergey Kiselev created several hardware platforms for RomWBW including
+  the very popular Zeta.
+
+- David Giles created support for the Z180 CSIO which is now included SD
+  Card driver.
+
+- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver, DMA support, and a long list of general code
+  and documentation enhancements.
+
+- Ed Brindley contributed some of the code that supports the RCBus
+  platform.
+
+- Spencer Owen created the RC2014 series of hobbyist kit computers which
+  has exponentially increased RomWBW usage. Some of his kits include
+  RomWBW.
+
+- Stephen Cousins has likewise created a series of hobbyist kit
+  computers at Small Computer Central and is distributing RomWBW with
+  many of them.
+
+- Alan Cox has contributed some driver code and has provided a great
+  deal of advice.
+
+- The CP/NET client files were developed by Douglas Miller.
+
+- Phillip Stevens contributed support for FreeRTOS.
+
+- Curt Mayer contributed the original Linux / MacOS build process.
+
+- UNA BIOS and FDISK80 are the products of John Coffman.
+
+- FLASH4 is a product of Will Sowerbutts.
+
+- CLRDIR is a product of Max Scane.
+
+- Tasty Basic is a product of Dimitri Theulings.
+
+- Dean Netherton contributed multiple components:
+
+  - eZ80 CPU support
+  - Sound driver infrastructure
+  - SN76489 sound driver
+  - Native USB driver (keyboard, floppy, mass storage)
+
+- The RomWBW Disk Catalog document was produced by Mykl Orders.
+
+- Rob Prouse has created many of the supplemental disk images including
+  Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
+  Microsoft Fortran Compiler, and a Games compendium.
+
+- Martin R has provided substantial help reviewing and improving the
+  User Guide and Applications documents.
+
+- Mark Pruden has made a wide variety of contributions including:
+
+  - significant content in the Disk Catalog and User Guide
+  - creation of the Introduction and Hardware documents
+  - Z3PLUS operating system disk image
+  - Infocom text adventure game disk image
+  - COPYSL, and SLABEL utilities
+  - Display of bootable slices via “S” command during startup
+  - Optimisations of HBIOS and CBIOS to reduce overall code size
+  - a feature for RomWBW configuration by NVRAM
+  - the /B bulk mode of disk assignment to the ASSIGN utility
+
+- Jacques Pelletier has contributed the DS1501 RTC driver code.
+
+- Jose Collado has contributed enhancements to the TMS driver including
+  compatibility with standard TMS register configuration.
+
+- Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
+
+- Matt Carroll has contributed a fix to XM.COM that corrects the port
+  specification when doing a send.
+
+- Dean Jenkins enhanced the build process to accommodate the Raspberry
+  Pi 4.
+
+- Tom Plano has contributed a new utility (HTALK) to allow talking
+  directly to HBIOS COM ports.
+
+- Lars Nelson has contributed several generic utilities such as a
+  universal (OS agnostic) UNARC application.
+
+- Dylan Hall added support for specifying a secondary console.
+
+- Bill Shen has contributed boot loaders for several of his systems.
+
+- Laszlo Szolnoki has contributed an EF9345 video display controller
+  driver.
+
+- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
+  that leverages RomWBW memory banking.
+
+- Les Bird has contributed support for the NABU w/ Option Board
+
+- Rob Gowin created an online documentation site via MkDocs, and
+  contributed a driver for the Xosera FPGA-based video controller.
+
+- Jörg Linder has contributed disassembled and nicely commented source
+  for ZSDOS2 and the BPBIOS utilities.
+
+- Marshall Gates has contriubed sample program source files for all of
+  the language disk images.
+
+- Randy Merkel provided the ZSDOS Programmer’s Manual as translated by
+  Wayne Hortensius.
+
+- Henk Berends added support for the MSX platform.
+
+## Related Projects
+
+Outside of the hardware platforms adapted to RomWBW, there are a variety
+of projects that either target RomWBW specifically or provide a
+RomWBW-specific variation. These efforts are greatly appreciated and are
+listed below. Please contact the author if there are any other such
+projects that are not listed.
+
+#### Z88DK
+
+Z88DK is a software powerful development kit for Z80 computers
+supporting both C and assembly language. This kit now provides specific
+library support for RomWBW HBIOS. The Z88DK project is hosted at
+<https://github.com/z88dk/z88dk>.
+
+#### Paleo Editor
+
+Steve Garcia has created a Windows-hosted IDE that is tailored to
+development of RomWBW. The project can be found at
+<https://github.com/alloidian/PaleoEditor>.
+
+#### Z80 fig-FORTH
+
+Dimitri Theulings’ implementation of fig-FORTH for the Z80 has a
+RomWBW-specific variant. The project is hosted at
+<https://github.com/dimitrit/figforth>.
+
+#### Assembly Language Programming for the RC2014 Zed
+
+Bruce Hall has written a very nice document that describes how to
+develop assembly language applications on RomWBW. It begins with the
+setup and configuration of a new RC2014 Zed system running RomWBW. It
+describes not only generic CP/M application development, but also RomWBW
+HBIOS programming and bare metal programming. The latest copy of this
+document is hosted at [http://w8bh.net/Assembly for
+RC2014Z.pdf](http://w8bh.net/Assembly%20for%20RC2014Z.pdf).
+
+# Licensing
+
+## License Terms
+
+RomWBW is free software: you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation, either version 3 of the License, or (at your
+option) any later version.
+
+RomWBW is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+more details.
+
+You should have received a copy of the GNU General Public License along
+with RomWBW. If not, see <https://www.gnu.org/licenses/>.
+
+Portions of RomWBW were created by, contributed by, or derived from the
+work of others. It is believed that these works are being used in
+accordance with the intentions and/or licensing of their creators.
+
+If anyone feels their work is being used outside of its intended
+licensing, please notify:
+
+> Wayne Warthen  
+> <wwarthen@gmail.com>
+
+RomWBW is an aggregate work. It is composed of many individual,
+standalone programs that are distributed as a whole to function as a
+cohesive system. Each program may have its own licensing which may be
+different from other programs within the aggregate.
+
+In some cases, a single program (e.g., CP/M Operating System) is
+composed of multiple components with different licenses. It is believed
+that in all such cases the licenses are compatible with GPL version 3.
+
+RomWBW encourages code contributions from others. Contributors may
+assert their own copyright in their contributions by annotating the
+contributed source code appropriately. Contributors are further
+encouraged to submit their contributions via the RomWBW source code
+control system to ensure their contributions are clearly documented.
+
+All contributions to RomWBW are subject to this license.

ReadMe.txt

@@ -1,441 +1,455 @@
-RomWBW Introduction
-Wayne Warthen (wwarthen@gmail.com)
-29 Jun 2025
-
-
-
-
-
-
-OVERVIEW
-
-
-RomWBW software provides a complete, commercial quality implementation
-of CP/M (and work-alike) operating systems and applications for modern
-Z80/180/280 retro-computing hardware systems.
-
-A wide variety of platforms are supported including those produced by
-these developer communities:
-
-- RetroBrew Computers (https://www.retrobrewcomputers.org)
-- RC2014 (https://rc2014.co.uk),
-  RC2014-Z80 (https://groups.google.com/g/rc2014-z80)
-- Retro Computing (https://groups.google.com/g/retro-comp)
-- Small Computer Central (https://smallcomputercentral.com/)
-
-A complete list of the currently supported platforms is found in RomWBW
-Hardware .
-
-
-
-DESCRIPTION
-
-
-Primary Features
-
-By design, RomWBW isolates all of the hardware specific functions in the
-ROM chip itself. The ROM provides a hardware abstraction layer such that
-all of the operating systems and applications on a disk will run on any
-RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
-Card) and move it between systems transparently.
-
-Supported hardware features of RomWBW include:
-
-- Z80 Family CPUs including Z80, Z180, and Z280
-- Banked memory services for several banking designs
-- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
-  Iomega
-- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
-- Video drivers including TMS9918, SY6545, MOS8563, HD6445, Xosera
-- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
-- Real time clock drivers including DS1302, BQ4845
-- Support for CP/NET networking using Wiznet, MT011 or Serial
-- Built-in VT-100 terminal emulation support
-
-A dynamic disk drive letter assignment mechanism allows mapping
-operating system drive letters to any available disk media.
-Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
-support the use of multiple slices (up to 256 per device). Each slice
-contains a complete CP/M filesystem and can be mapped independently to
-any drive letter. This overcomes the inherent size limitations in legacy
-OSes and allows up to 2GB of addressable storage on a single device,
-with up to 128MB accessible at any one time.
-
-
-Included Software
-
-Multiple disk images are provided in the distribution. Most disk images
-contain a complete, bootable, ready-to-run implementation of a specific
-operating system. A “combo” disk image contains multiple slices, each
-with a full operating system implementation. If you use this disk image,
-you can easily pick whichever operating system you want to boot without
-changing media.
-
-Some of the included software:
-
-- Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS, QPM
-  )
-- Support for other operating systems, p-System, FreeRTOS, and FUZIX.
-- Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
-- C Compiler’s including Aztec-C, and HI-TECH C
-- Microsoft Basic Compiler, and Microsoft Fortran
-- Some games such as Colossal Cave, Zork, etc
-- Wordstar Word processing software
-
-Some of the provided software can be launched directly from the ROM
-firmware itself:
-
-- System Monitor
-- Operating Systems (CP/M 2.2, ZSDOS)
-- ROM BASIC (Nascom BASIC and Tasty BASIC)
-- ROM Forth
-
-A tool is provided that allows you to access a FAT-12/16/32 filesystem.
-The FAT filesystem may be coresident on the same disk media as RomWBW
-slices or on stand-alone media. This makes exchanging files with modern
-OSes such as Windows, MacOS, and Linux very easy.
-
-
-ROM Distribution
-
-The RomWBW Repository (https://github.com/wwarthen/RomWBW) on GitHub is
-the official distribution location for all project source and
-documentation.
-
-RomWBW is distributed as both source code and pre-built ROM and disk
-images.
-
-The pre-built ROM images distributed with RomWBW are based on the
-default system configurations as determined by the hardware
-provider/designer. The pre-built ROM firmware images are generally
-suitable for most users.
-
-The fully-built distribution releases are available on the RomWBW
-Releases Page (https://github.com/wwarthen/RomWBW/releases) of the
-repository.
-
-On this page, you will normally see a Development Snapshot as well as
-recent stable releases. Unless you have a specific reason, I suggest you
-stick to the most recent stable release.
-
-The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM and
-Disk images as well as full source code. The other assets contain only
-source code and do not have the pre-built ROM or disk images.
-
-Distribution Directory Layout
-
-The RomWBW distribution is a compressed zip archive file organized in a
-set of directories. Each of these directories has its own ReadMe.txt
-file describing the contents in detail. In summary, these directories
-are:
-
-  -------------------------------------------------------------------------
-  DIRECTORY   DESCRIPTION
-  ----------- -------------------------------------------------------------
-  BINARY      The final output files of the build process are placed here.
-              Most importantly, the ROM images with the file names ending
-              in “.rom” and disk images ending in .img.
-
-  DOC         Contains various detailed documentation, both RomWBW
-              specifically as well as the operating systems and
-              applications.
-
-  SOURCE      Contains the source code files used to build the software and
-              ROM images.
-
-  TOOLS       Contains the programs that are used by the build process or
-              that may be useful in setting up your system.
-  -------------------------------------------------------------------------
-
-Building from Source
-
-It is also very easy to modify and build custom ROM images that fully
-tailor the firmware to your specific preferences. All tools required to
-build custom ROM firmware under Windows are included – no need to
-install assemblers, etc. The firmware can also be built using Linux or
-MacOS after confirming a few standard tools have been installed.
-
-
-Installation & Operation
-
-In general, installation of RomWBW on your platform is very simple. You
-just need to program your ROM with the correct ROM image from the RomWBW
-distribution. Subsequently, you can write disk images on your disk
-drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
-functionality.
-
-Complete instructions for installation and operation of RomWBW are found
-in the RomWBW User Guide. It is also a good idea to review the Release
-Notes for helpful release-specific information.
-
-
-Documentation
-
-There are several documents that form the core of the RomWBW
-documentation:
-
-- RomWBW User Guide is the main user guide for RomWBW, it covers the
-  major topics of how to install, manage and use RomWBW, and includes
-  additional guidance to the use of some of the operating systems
-  supported by RomWBW
-
-- RomWBW Hardware contains a description of all the hardware platforms,
-  and devices supported by RomWBW.
-
-- RomWBW Applications is a reference for the ROM-hosted and OS-hosted
-  applications created or customized to enhance the operation of RomWBW.
-
-- RomWBW Disk Catalog is a reference for the contents of the disk images
-  provided with RomWBW, with a description of many of the files on each
-  image
-
-- RomWBW System Guide discusses much of the internal design and
-  construction of RomWBW. It includes a reference for the RomWBW HBIOS
-  API functions.
-
-An online HTML version of this documentation is hosted at
-https://wwarthen.github.io/RomWBW.
-
-Each of the operating systems and ROM applications included with RomWBW
-are sophisticated tools in their own right. It is not reasonable to
-fully document their usage. However, you will find complete manuals in
-PDF format in the Doc directory of the distribution. The intention of
-this documentation is to describe the operation of RomWBW and the ways
-in which it enhances the operation of the included applications and
-operating systems.
-
-Since RomWBW is purely a software product for many different platforms,
-the documentation does NOT cover hardware construction, configuration,
-or troubleshooting – please see your hardware provider for this
-information.
-
-
-
-SUPPORT
-
-
-Getting Assistance
-
-The best way to get assistance with RomWBW or any aspect of the
-RetroBrew Computers projects is via one of the community forums:
-
-- RetroBrew Computers Forum
-- RC2014 Google Group
-- retro-comp Google Group
-
-Submission of issues and bugs are welcome at the RomWBW GitHub
-Repository.
-
-Also feel free to email Wayne Warthen at wwarthen@gmail.com. I am happy
-to provide support adapting RomWBW to new or modified systems
-
-
-
-CONTRIBUTIONS
-
-
-All source code and distributions are maintained on GitHub.
-Contributions of all kinds to RomWBW are very welcome.
-
-
-Acknowledgments
-
-I want to acknowledge that a great deal of the code and inspiration for
-RomWBW has been provided by or derived from the work of others in the
-RetroBrew Computers Community. I sincerely appreciate all of their
-contributions. The list below is probably missing many names – please
-let me know if I missed you!
-
-- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
-  became the first platform RomWBW supported. Some of his original code
-  can still be found in RomWBW.
-
-- Dan Werner wrote much of the code from which RomWBW was originally
-  derived and he has always been a great source of knowledge and advice.
-
-- Douglas Goodall contributed code, time, testing, and advice in “the
-  early days”. He created an entire suite of application programs to
-  enhance the use of RomWBW. Unfortunately, they have become unusable
-  due to internal changes within RomWBW. As of RomWBW 2.6, these
-  applications are no longer provided.
-
-- Sergey Kiselev created several hardware platforms for RomWBW including
-  the very popular Zeta.
-
-- David Giles created support for the Z180 CSIO which is now included SD
-  Card driver.
-
-- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-  AY-3-8910 sound driver, DMA support, and a long list of general code
-  and documentation enhancements.
-
-- Ed Brindley contributed some of the code that supports the RCBus
-  platform.
-
-- Spencer Owen created the RC2014 series of hobbyist kit computers which
-  has exponentially increased RomWBW usage. Some of his kits include
-  RomWBW.
-
-- Stephen Cousins has likewise created a series of hobbyist kit
-  computers at Small Computer Central and is distributing RomWBW with
-  many of them.
-
-- Alan Cox has contributed some driver code and has provided a great
-  deal of advice.
-
-- The CP/NET client files were developed by Douglas Miller.
-
-- Phillip Stevens contributed support for FreeRTOS.
-
-- Curt Mayer contributed the original Linux / MacOS build process.
-
-- UNA BIOS and FDISK80 are the products of John Coffman.
-
-- FLASH4 is a product of Will Sowerbutts.
-
-- CLRDIR is a product of Max Scane.
-
-- Tasty Basic is a product of Dimitri Theulings.
-
-- Dean Netherton contributed eZ80 CPU support, the sound driver
-  interface, and the SN76489 sound driver.
-
-- The RomWBW Disk Catalog document was produced by Mykl Orders.
-
-- Rob Prouse has created many of the supplemental disk images including
-  Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
-  Microsoft Fortran Compiler, and a Games compendium.
-
-- Martin R has provided substantial help reviewing and improving the
-  User Guide and Applications documents.
-
-- Mark Pruden has made a wide variety of contributions including:
-
-  - significant content in the Disk Catalog and User Guide
-  - creation of the Introduction and Hardware documents
-  - Z3PLUS operating system disk image
-  - COPYSL, and SLABEL utilities
-  - Display of bootable slices via “S” command during startup
-  - a feature for RomWBW configuration by NVRAM
-  - the /B bulk mode of disk assignment to the ASSIGN utility
-
-- Jacques Pelletier has contributed the DS1501 RTC driver code.
-
-- Jose Collado has contributed enhancements to the TMS driver including
-  compatibility with standard TMS register configuration.
-
-- Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
-
-- Matt Carroll has contributed a fix to XM.COM that corrects the port
-  specification when doing a send.
-
-- Dean Jenkins enhanced the build process to accommodate the Raspberry
-  Pi 4.
-
-- Tom Plano has contributed a new utility (HTALK) to allow talking
-  directly to HBIOS COM ports.
-
-- Lars Nelson has contributed several generic utilities such as a
-  universal (OS agnostic) UNARC application.
-
-- Dylan Hall added support for specifying a secondary console.
-
-- Bill Shen has contributed boot loaders for several of his systems.
-
-- Laszlo Szolnoki has contributed an EF9345 video display controller
-  driver.
-
-- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
-  that leverages RomWBW memory banking.
-
-- Les Bird has contributed support for the NABU w/ Option Board
-
-- Rob Gowin created an online documentation site via MkDocs, and
-  contributed a driver for the Xosera FPGA-based video controller.
-
-- Jörg Linder has contributed disassembled and nicely commented source
-  for ZSDOS2 and the BPBIOS utilities.
-
-
-Related Projects
-
-Outside of the hardware platforms adapted to RomWBW, there are a variety
-of projects that either target RomWBW specifically or provide a
-RomWBW-specific variation. These efforts are greatly appreciated and are
-listed below. Please contact the author if there are any other such
-projects that are not listed.
-
-Z88DK
-
-Z88DK is a software powerful development kit for Z80 computers
-supporting both C and assembly language. This kit now provides specific
-library support for RomWBW HBIOS. The Z88DK project is hosted at
-https://github.com/z88dk/z88dk.
-
-Paleo Editor
-
-Steve Garcia has created a Windows-hosted IDE that is tailored to
-development of RomWBW. The project can be found at
-https://github.com/alloidian/PaleoEditor.
-
-Z80 fig-FORTH
-
-Dimitri Theulings’ implementation of fig-FORTH for the Z80 has a
-RomWBW-specific variant. The project is hosted at
-https://github.com/dimitrit/figforth.
-
-Assembly Language Programming for the RC2014 Zed
-
-Bruce Hall has written a very nice document that describes how to
-develop assembly language applications on RomWBW. It begins with the
-setup and configuration of a new RC2014 Zed system running RomWBW. It
-describes not only generic CP/M application development, but also RomWBW
-HBIOS programming and bare metal programming. The latest copy of this
-document is hosted at http://w8bh.net/Assembly for RC2014Z.pdf.
-
-
-
-LICENSING
-
-
-License Terms
-
-RomWBW is free software: you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation, either version 3 of the License, or (at your
-option) any later version.
-
-RomWBW is distributed in the hope that it will be useful, but WITHOUT
-ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-more details.
-
-You should have received a copy of the GNU General Public License along
-with RomWBW. If not, see https://www.gnu.org/licenses/.
-
-Portions of RomWBW were created by, contributed by, or derived from the
-work of others. It is believed that these works are being used in
-accordance with the intentions and/or licensing of their creators.
-
-If anyone feels their work is being used outside of its intended
-licensing, please notify:
-
-  Wayne Warthen
-  wwarthen@gmail.com
-
-RomWBW is an aggregate work. It is composed of many individual,
-standalone programs that are distributed as a whole to function as a
-cohesive system. Each program may have its own licensing which may be
-different from other programs within the aggregate.
-
-In some cases, a single program (e.g., CP/M Operating System) is
-composed of multiple components with different licenses. It is believed
-that in all such cases the licenses are compatible with GPL version 3.
-
-RomWBW encourages code contributions from others. Contributors may
-assert their own copyright in their contributions by annotating the
-contributed source code appropriately. Contributors are further
-encouraged to submit their contributions via the RomWBW source code
-control system to ensure their contributions are clearly documented.
-
-All contributions to RomWBW are subject to this license.
+RomWBW Introduction
+Wayne Warthen (wwarthen@gmail.com)
+29 Sep 2025
+
+
+
+
+
+
+OVERVIEW
+
+
+RomWBW software provides a complete, commercial quality implementation
+of CP/M (and work-alike) operating systems and applications for modern
+Z80/180/280 retro-computing hardware systems.
+
+A wide variety of platforms are supported including those produced by
+these developer communities:
+
+- RetroBrew Computers (https://www.retrobrewcomputers.org)
+- RC2014 (https://rc2014.co.uk),
+  RC2014-Z80 (https://groups.google.com/g/rc2014-z80)
+- Retro Computing (https://groups.google.com/g/retro-comp)
+- Small Computer Central (https://smallcomputercentral.com/)
+
+A complete list of the currently supported platforms is found in RomWBW
+Hardware .
+
+
+
+DESCRIPTION
+
+
+Primary Features
+
+By design, RomWBW isolates all of the hardware specific functions in the
+ROM chip itself. The ROM provides a hardware abstraction layer such that
+all of the operating systems and applications on a disk will run on any
+RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
+Card) and move it between systems transparently.
+
+Supported hardware features of RomWBW include:
+
+- Z80 Family CPUs including Z80, Z180, and Z280
+- Banked memory services for several banking designs
+- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
+  Iomega
+- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
+- Video drivers including TMS9918, SY6545, MOS8563, HD6445, Xosera
+- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
+- Real time clock drivers including DS1302, BQ4845
+- Support for CP/NET networking using Wiznet, MT011 or Serial
+- Built-in VT-100 terminal emulation support
+
+A dynamic disk drive letter assignment mechanism allows mapping
+operating system drive letters to any available disk media.
+Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
+support the use of multiple slices (up to 256 per device). Each slice
+contains a complete CP/M filesystem and can be mapped independently to
+any drive letter. This overcomes the inherent size limitations in legacy
+OSes and allows up to 2GB of addressable storage on a single device,
+with up to 128MB accessible at any one time.
+
+
+Included Software
+
+Multiple disk images are provided in the distribution. Most disk images
+contain a complete, bootable, ready-to-run implementation of a specific
+operating system. A “combo” disk image contains multiple slices, each
+with a full operating system implementation. If you use this disk image,
+you can easily pick whichever operating system you want to boot without
+changing media.
+
+Some of the included software:
+
+- Operating Systems (CP/M 2.2, ZSDOS, NZ-COM, CP/M 3, ZPM3, Z3PLUS, QPM
+  )
+- Support for other operating systems, p-System, FreeRTOS, and FUZIX.
+- Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
+- C Compiler’s including Aztec-C, and HI-TECH C
+- Microsoft Basic Compiler, Microsoft Fortran, and Microsoft COBOL
+- Some games such as Colossal Cave, Zork, etc
+- Wordstar Word processing software
+
+Some of the provided software can be launched directly from the ROM
+firmware itself:
+
+- System Monitor
+- Operating Systems (CP/M 2.2, ZSDOS)
+- ROM BASIC (Nascom BASIC and Tasty BASIC)
+- ROM Forth
+
+A tool is provided that allows you to access a FAT-12/16/32 filesystem.
+The FAT filesystem may be coresident on the same disk media as RomWBW
+slices or on stand-alone media. This makes exchanging files with modern
+OSes such as Windows, MacOS, and Linux very easy.
+
+
+ROM Distribution
+
+The RomWBW Repository (https://github.com/wwarthen/RomWBW) on GitHub is
+the official distribution location for all project source and
+documentation.
+
+RomWBW is distributed as both source code and pre-built ROM and disk
+images.
+
+The pre-built ROM images distributed with RomWBW are based on the
+default system configurations as determined by the hardware
+provider/designer. The pre-built ROM firmware images are generally
+suitable for most users.
+
+The fully-built distribution releases are available on the RomWBW
+Releases Page (https://github.com/wwarthen/RomWBW/releases) of the
+repository.
+
+On this page, you will normally see a Development Snapshot as well as
+recent stable releases. Unless you have a specific reason, I suggest you
+stick to the most recent stable release.
+
+The asset named RomWBW-vX.X.X-Package.zip includes all pre-built ROM and
+Disk images as well as full source code. The other assets contain only
+source code and do not have the pre-built ROM or disk images.
+
+Distribution Directory Layout
+
+The RomWBW distribution is a compressed zip archive file organized in a
+set of directories. Each of these directories has its own ReadMe.txt
+file describing the contents in detail. In summary, these directories
+are:
+
+  -------------------------------------------------------------------------
+  DIRECTORY   DESCRIPTION
+  ----------- -------------------------------------------------------------
+  BINARY      The final output files of the build process are placed here.
+              Most importantly, the ROM images with the file names ending
+              in “.rom” and disk images ending in .img.
+
+  DOC         Contains various detailed documentation, both RomWBW
+              specifically as well as the operating systems and
+              applications.
+
+  SOURCE      Contains the source code files used to build the software and
+              ROM images.
+
+  TOOLS       Contains the programs that are used by the build process or
+              that may be useful in setting up your system.
+  -------------------------------------------------------------------------
+
+Building from Source
+
+It is also very easy to modify and build custom ROM images that fully
+tailor the firmware to your specific preferences. All tools required to
+build custom ROM firmware under Windows are included – no need to
+install assemblers, etc. The firmware can also be built using Linux or
+MacOS after confirming a few standard tools have been installed.
+
+
+Installation & Operation
+
+In general, installation of RomWBW on your platform is very simple. You
+just need to program your ROM with the correct ROM image from the RomWBW
+distribution. Subsequently, you can write disk images on your disk
+drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
+functionality.
+
+Complete instructions for installation and operation of RomWBW are found
+in the RomWBW User Guide. It is also a good idea to review the Release
+Notes for helpful release-specific information.
+
+
+Documentation
+
+There are several documents that form the core of the RomWBW
+documentation:
+
+- RomWBW User Guide is the main user guide for RomWBW, it covers the
+  major topics of how to install, manage and use RomWBW, and includes
+  additional guidance to the use of some of the operating systems
+  supported by RomWBW
+
+- RomWBW Hardware contains a description of all the hardware platforms,
+  and devices supported by RomWBW.
+
+- RomWBW Applications is a reference for the ROM-hosted and OS-hosted
+  applications created or customized to enhance the operation of RomWBW.
+
+- RomWBW Disk Catalog is a reference for the contents of the disk images
+  provided with RomWBW, with a description of many of the files on each
+  image
+
+- RomWBW System Guide discusses much of the internal design and
+  construction of RomWBW. It includes a reference for the RomWBW HBIOS
+  API functions.
+
+An online HTML version of this documentation is hosted at
+https://wwarthen.github.io/RomWBW.
+
+Each of the operating systems and ROM applications included with RomWBW
+are sophisticated tools in their own right. It is not reasonable to
+fully document their usage. However, you will find complete manuals in
+PDF format in the Doc directory of the distribution. The intention of
+this documentation is to describe the operation of RomWBW and the ways
+in which it enhances the operation of the included applications and
+operating systems.
+
+Since RomWBW is purely a software product for many different platforms,
+the documentation does NOT cover hardware construction, configuration,
+or troubleshooting – please see your hardware provider for this
+information.
+
+
+
+SUPPORT
+
+
+Getting Assistance
+
+The best way to get assistance with RomWBW or any aspect of the
+RetroBrew Computers projects is via one of the community forums:
+
+- RetroBrew Computers Forum
+- RC2014 Google Group
+- retro-comp Google Group
+
+Submission of issues and bugs are welcome at the RomWBW GitHub
+Repository.
+
+Also feel free to email Wayne Warthen at wwarthen@gmail.com. I am happy
+to provide support adapting RomWBW to new or modified systems
+
+
+
+CONTRIBUTIONS
+
+
+All source code and distributions are maintained on GitHub.
+Contributions of all kinds to RomWBW are very welcome.
+
+
+Acknowledgments
+
+I want to acknowledge that a great deal of the code and inspiration for
+RomWBW has been provided by or derived from the work of others in the
+RetroBrew Computers Community. I sincerely appreciate all of their
+contributions. The list below is probably missing many names – please
+let me know if I missed you!
+
+- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
+  became the first platform RomWBW supported. Some of his original code
+  can still be found in RomWBW.
+
+- Dan Werner wrote much of the code from which RomWBW was originally
+  derived and he has always been a great source of knowledge and advice.
+
+- Douglas Goodall contributed code, time, testing, and advice in “the
+  early days”. He created an entire suite of application programs to
+  enhance the use of RomWBW. Unfortunately, they have become unusable
+  due to internal changes within RomWBW. As of RomWBW 2.6, these
+  applications are no longer provided.
+
+- Sergey Kiselev created several hardware platforms for RomWBW including
+  the very popular Zeta.
+
+- David Giles created support for the Z180 CSIO which is now included SD
+  Card driver.
+
+- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver, DMA support, and a long list of general code
+  and documentation enhancements.
+
+- Ed Brindley contributed some of the code that supports the RCBus
+  platform.
+
+- Spencer Owen created the RC2014 series of hobbyist kit computers which
+  has exponentially increased RomWBW usage. Some of his kits include
+  RomWBW.
+
+- Stephen Cousins has likewise created a series of hobbyist kit
+  computers at Small Computer Central and is distributing RomWBW with
+  many of them.
+
+- Alan Cox has contributed some driver code and has provided a great
+  deal of advice.
+
+- The CP/NET client files were developed by Douglas Miller.
+
+- Phillip Stevens contributed support for FreeRTOS.
+
+- Curt Mayer contributed the original Linux / MacOS build process.
+
+- UNA BIOS and FDISK80 are the products of John Coffman.
+
+- FLASH4 is a product of Will Sowerbutts.
+
+- CLRDIR is a product of Max Scane.
+
+- Tasty Basic is a product of Dimitri Theulings.
+
+- Dean Netherton contributed multiple components:
+
+  - eZ80 CPU support
+  - Sound driver infrastructure
+  - SN76489 sound driver
+  - Native USB driver (keyboard, floppy, mass storage)
+
+- The RomWBW Disk Catalog document was produced by Mykl Orders.
+
+- Rob Prouse has created many of the supplemental disk images including
+  Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
+  Microsoft Fortran Compiler, and a Games compendium.
+
+- Martin R has provided substantial help reviewing and improving the
+  User Guide and Applications documents.
+
+- Mark Pruden has made a wide variety of contributions including:
+
+  - significant content in the Disk Catalog and User Guide
+  - creation of the Introduction and Hardware documents
+  - Z3PLUS operating system disk image
+  - Infocom text adventure game disk image
+  - COPYSL, and SLABEL utilities
+  - Display of bootable slices via “S” command during startup
+  - Optimisations of HBIOS and CBIOS to reduce overall code size
+  - a feature for RomWBW configuration by NVRAM
+  - the /B bulk mode of disk assignment to the ASSIGN utility
+
+- Jacques Pelletier has contributed the DS1501 RTC driver code.
+
+- Jose Collado has contributed enhancements to the TMS driver including
+  compatibility with standard TMS register configuration.
+
+- Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
+
+- Matt Carroll has contributed a fix to XM.COM that corrects the port
+  specification when doing a send.
+
+- Dean Jenkins enhanced the build process to accommodate the Raspberry
+  Pi 4.
+
+- Tom Plano has contributed a new utility (HTALK) to allow talking
+  directly to HBIOS COM ports.
+
+- Lars Nelson has contributed several generic utilities such as a
+  universal (OS agnostic) UNARC application.
+
+- Dylan Hall added support for specifying a secondary console.
+
+- Bill Shen has contributed boot loaders for several of his systems.
+
+- Laszlo Szolnoki has contributed an EF9345 video display controller
+  driver.
+
+- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
+  that leverages RomWBW memory banking.
+
+- Les Bird has contributed support for the NABU w/ Option Board
+
+- Rob Gowin created an online documentation site via MkDocs, and
+  contributed a driver for the Xosera FPGA-based video controller.
+
+- Jörg Linder has contributed disassembled and nicely commented source
+  for ZSDOS2 and the BPBIOS utilities.
+
+- Marshall Gates has contriubed sample program source files for all of
+  the language disk images.
+
+- Randy Merkel provided the ZSDOS Programmer’s Manual as translated by
+  Wayne Hortensius.
+
+- Henk Berends added support for the MSX platform.
+
+
+Related Projects
+
+Outside of the hardware platforms adapted to RomWBW, there are a variety
+of projects that either target RomWBW specifically or provide a
+RomWBW-specific variation. These efforts are greatly appreciated and are
+listed below. Please contact the author if there are any other such
+projects that are not listed.
+
+Z88DK
+
+Z88DK is a software powerful development kit for Z80 computers
+supporting both C and assembly language. This kit now provides specific
+library support for RomWBW HBIOS. The Z88DK project is hosted at
+https://github.com/z88dk/z88dk.
+
+Paleo Editor
+
+Steve Garcia has created a Windows-hosted IDE that is tailored to
+development of RomWBW. The project can be found at
+https://github.com/alloidian/PaleoEditor.
+
+Z80 fig-FORTH
+
+Dimitri Theulings’ implementation of fig-FORTH for the Z80 has a
+RomWBW-specific variant. The project is hosted at
+https://github.com/dimitrit/figforth.
+
+Assembly Language Programming for the RC2014 Zed
+
+Bruce Hall has written a very nice document that describes how to
+develop assembly language applications on RomWBW. It begins with the
+setup and configuration of a new RC2014 Zed system running RomWBW. It
+describes not only generic CP/M application development, but also RomWBW
+HBIOS programming and bare metal programming. The latest copy of this
+document is hosted at http://w8bh.net/Assembly for RC2014Z.pdf.
+
+
+
+LICENSING
+
+
+License Terms
+
+RomWBW is free software: you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation, either version 3 of the License, or (at your
+option) any later version.
+
+RomWBW is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+more details.
+
+You should have received a copy of the GNU General Public License along
+with RomWBW. If not, see https://www.gnu.org/licenses/.
+
+Portions of RomWBW were created by, contributed by, or derived from the
+work of others. It is believed that these works are being used in
+accordance with the intentions and/or licensing of their creators.
+
+If anyone feels their work is being used outside of its intended
+licensing, please notify:
+
+  Wayne Warthen
+  wwarthen@gmail.com
+
+RomWBW is an aggregate work. It is composed of many individual,
+standalone programs that are distributed as a whole to function as a
+cohesive system. Each program may have its own licensing which may be
+different from other programs within the aggregate.
+
+In some cases, a single program (e.g., CP/M Operating System) is
+composed of multiple components with different licenses. It is believed
+that in all such cases the licenses are compatible with GPL version 3.
+
+RomWBW encourages code contributions from others. Contributors may
+assert their own copyright in their contributions by annotating the
+contributed source code appropriately. Contributors are further
+encouraged to submit their contributions via the RomWBW source code
+control system to ensure their contributions are clearly documented.
+
+All contributions to RomWBW are subject to this license.

Source/Apps/FAT/ReadMe.md

@@ -1,7 +1,7 @@
 # RomWBW HBIOS CP/M FAT Utility ("FAT.COM")
 
 Author: Wayne Warthen \
-Updated: 6-May-2024
+Updated: 27-Aug-2025
 
 This application allows copying files between CP/M filesystems and FAT 
 filesystems (DOS, Windows, Mac, Linux, etc.).  The application runs on 
@@ -142,10 +142,10 @@ creation.
 
 | Date        | Version | Notes                                                       |
 |------------:|-------- |-------------------------------------------------------------|
-| 2-May-2019  | v0.9    | (beta) initial release                                      |
-| 7-May-2019  | v0.9.1  | (beta) added REN and DEL                                    |
-| 8-May-2019  | v0.9.2  | (beta) handle file collisions w/ user prompt                |
-| 8-Oct-2019  | v0.9.3  | (beta) fixed incorrect filename buffer size (MAX_FN)        |
+|  2-May-2019 | v0.9    | (beta) initial release                                      |
+|  7-May-2019 | v0.9.1  | (beta) added REN and DEL                                    |
+|  8-May-2019 | v0.9.2  | (beta) handle file collisions w/ user prompt                |
+|  8-Oct-2019 | v0.9.3  | (beta) fixed incorrect filename buffer size (MAX_FN)        |
 | 10-Oct-2019 | v0.9.4  | (beta) upgraded to FatFs R0.13c                             |
 | 10-Oct-2019 | v0.9.5  | (beta) added MD (make directory)                            |
 | 10-Oct-2019 | v0.9.6  | (beta) added FORMAT                                         |
@@ -153,6 +153,7 @@ creation.
 |             |         | add attributes to directory listing                         |
 | 12-Apr-2021 | v0.9.8  | (beta) support CP/NET drives                                |
 | 12-Oct-2023 | v0.9.9  | (beta) handle updated HBIOS Disk Device call                |
-| 6-Jan-2024  | v1.0.0  | updated to latest FsFat (v0.15)                             |
+|  6-Jan-2024 | v1.0.0  | updated to latest FsFat (v0.15)                             |
 |             |         | updated to latest SDCC (v4.3)                               |
-| 6-May-2024  | v1.1.0  | improve floppy format boot record                           |
+|  6-May-2024 | v1.1.0  | improve floppy format boot record                           |
+| 27-Aug-2025 | v1.2.0  | update location of RomWBW IDENT pointer                     |

Source/Apps/HTalk/htalk.asm

@@ -31,7 +31,7 @@ STKSIZ	.EQU	$FF
 ;
 ; HBIOS SYSTEM CALLS AND ID STRING ADDRESS
 ; 
-ROMWBW_ID	.EQU		$FFFE	; ROMWBW ID STRING ADDRESS
+ROMWBW_ID	.EQU		$FFFC	; ROMWBW ID STRING ADDRESS
 HBIOS_SYS	.EQU		$FFF0 	; HBIOS SYSCALL ADDRESS
 
 H_SYSGET	.EQU		$F8		;	GET SYSTEM INFO

Source/Apps/Tune/hbios.inc

@@ -1,4 +1,4 @@
-IDENT		.EQU	$FFFE		; loc of RomWBW HBIOS ident ptr
+IDENT		.EQU	$FFFC		; loc of RomWBW HBIOS ident ptr
 ;
 BF_SYSVER	.EQU	$F1		; BIOS: VER function
 BF_SYSGET	.EQU	$F8		; HBIOS: SYSGET function
@@ -7,6 +7,6 @@ BF_SND		.EQU	$50
 BF_SNDRESET	.EQU	BF_SND + 0	; RESET SOUND SYSTEM
 BF_SNDVOL	.EQU	BF_SND + 1	; REQUEST SOUND VOL - L CONTAINS VOLUME (255 MAX, 0 SILENT) - SCALED AS REQUIRED BY DRIVER (EG: MAPS TO JUST 4 BIT RESOLUTION FOR SN76489)
 BF_SNDPRD	.EQU	BF_SND + 2	; REQUEST SOUND PERIOD - HL CONTAINS DRIVER SPECIFIC VALUE
-BF_SNDNOTE	.EQU	BF_SND + 3	; REQUEST NOTE - L CONTAINS NOTE - EACH VALUE IS QUARTER NOTE
+BF_SNDNOTE	.EQU	BF_SND + 3	; REQUEST NOTE - L CONTAINS NOTE - EACH VALUE IS AN EIGHTH TONE
 BF_SNDPLAY	.EQU	BF_SND + 4	; INITIATE THE REQUESTED SOUND COMMAND
 BF_SNDQUERY	.EQU	BF_SND + 5	; E IS SUBFUNCTION

Source/Apps/Tune/tune.asm

@@ -446,7 +446,7 @@ IDBIO:
 ;
 IDBIO1:
 	; Check for RomWBW (HBIOS)
-	LD	HL,($FFFE)	; HL := HBIOS ident location
+	LD	HL,($FFFC)	; HL := HBIOS ident location
 	LD	A,'W'		; First byte of ident
 	CP	(HL)		; Compare
 	JR	NZ,IDBIO2	; Not HBIOS

Source/Apps/XM/xmhb.z80

@@ -239,7 +239,7 @@ IDBIO:
 ;
 IDBIO1:
 	; Check for RomWBW (HBIOS)
-	LD	HL,(0FFFEH)	; HL := HBIOS ident location
+	LD	HL,(0FFFCH)	; HL := HBIOS ident location
 	LD	A,'W'		; First byte of ident
 	CP	(HL)		; Compare
 	JR	NZ,IDBIO2	; Not HBIOS

Source/Apps/XM/xmhb_old.z80

@@ -180,7 +180,7 @@ IDBIO:
 ;
 IDBIO1:
 	; Check for RomWBW (HBIOS)
-	LD	HL,(0FFFEH)	; HL := HBIOS ident location
+	LD	HL,(0FFFCH)	; HL := HBIOS ident location
 	LD	A,'W'		; First byte of ident
 	CP	(HL)		; Compare
 	JR	NZ,IDBIO2	; Not HBIOS

Source/Apps/XM/xmuf.z80

@@ -175,7 +175,7 @@ IDBIO:
 ;
 IDBIO1:
 	; Check for RomWBW (HBIOS)
-	LD	HL,(0FFFEH)	; HL := HBIOS ident location
+	LD	HL,(0FFFCH)	; HL := HBIOS ident location
 	LD	A,'W'		; First byte of ident
 	CP	(HL)		; Compare
 	JR	NZ,IDBIO2	; Not HBIOS

Source/Apps/ZMD/zmdhb.z80

@@ -273,7 +273,7 @@ IDBIO:
 ;
 IDBIO1:
 	; Check for RomWBW (HBIOS)
-	LD	HL,(0FFFEH)	; HL := HBIOS ident location
+	LD	HL,(0FFFCH)	; HL := HBIOS ident location
 	LD	A,'W'		; First byte of ident
 	CP	(HL)		; Compare
 	JR	NZ,IDBIO2	; Not HBIOS

Source/Apps/assign/assign.asm

@@ -38,6 +38,8 @@
 ;   2024-12-17 [MAP] Added new /B=opt feaure to assign drives
 ;   2024-12-21 [MAP] Added CBIOS heap estimation to /B to prevent
 ;                    overflow when the drives are finally added
+;   2025-07-19 [D?N] Support for native USB drivers
+;   2025-08-09 [WBW] Support for ESPSD driver
 ;_______________________________________________________________________________
 ;
 ; ToDo:
@@ -188,7 +190,7 @@ init:
 	ldir			; do the copy
 ;
 	; determine end of CBIOS (assume HBIOS for now)
-	ld	hl,($FFFE)	; get proxy start address
+	ld	hl,($FFFC)	; get proxy start address
 	ld	(bioend),hl	; save as CBIOS end address
 ;
 	; check for UNA (UBIOS)
@@ -1179,8 +1181,9 @@ makdphwbw:	; determine appropriate dpb (WBW mode, unit number in A)
 	jr	makdph0		; jump ahead
 makdph00:
 	ld	e,MID_FD144	; assume floppy
-	cp	DIODEV_FD	; floppy?
-	jr	z,makdph0	; yes, jump ahead
+	;cp	DIODEV_FD	; floppy?
+	bit	7,c		; floppy?
+	jr	nz,makdph0	; yes, jump ahead
 	ld	e,MID_RF	; assume ram floppy
 	cp	DIODEV_RF	; ram floppy?
 	jr	z,makdph0	; yes, jump ahead
@@ -1560,7 +1563,7 @@ drvmap:
 	jr	nz,drvmapu	; do UNA mode drvmap
 ;
 		; determine device code by scanning for string
-	ld	b,16		; device table always has 16 entries
+	ld	b,devcnt	; number of entries in devtbl
 	ld	c,0		; c is used to track table entry num
 	ld	de,tmpstr	; de points to specified device name
 	ld	hl,devtbl	; hl points to first entry of devtbl
@@ -1826,7 +1829,7 @@ prtdev:
 	rst	08		; call hbios, D := device, E := unit
 	push	de		; save results
 	ld	a,d		; device to A
-	and	$0F		; mask out undesired bits
+	and	$1F		; mask out undesired bits
 	push	hl		; save HL
 	add	a,a		; multiple A by two for word table
 	ld	hl,devtbl	; point to start of device name table
@@ -2427,6 +2430,7 @@ devtbl:				; device table
 	.dw	dev04, dev05, dev06, dev07
 	.dw	dev08, dev09, dev10, dev11
 	.dw	dev12, dev13, dev14, dev15
+	.dw	dev16, dev17
 ;
 devunk	.db	"?",0
 dev00	.db	"MD",0
@@ -2444,9 +2448,11 @@ dev11	.db	"IMM",0
 dev12	.db	"SYQ",0
 dev13	.db	"CHUSB",0
 dev14	.db	"CHSD",0
-dev15	.equ	devunk
+dev15	.db	"USB",0
+dev16	.db	"ESPSD",0
+dev17	.equ	devunk
 ;
-devcnt	.equ	10		; 10 devices defined
+devcnt	.equ	18		; 18 device types defined
 ;
 udevram		.db	"RAM",0
 udevrom		.db	"ROM",0
@@ -2464,13 +2470,13 @@ stack	.equ	$		; stack top
 ; Messages
 ;
 indent	.db	"   ",0
-msgban1	.db	"ASSIGN v2.0 for RomWBW CP/M ",0
+msgban1	.db	"ASSIGN v2.2 for RomWBW CP/M ",0
 msg22	.db	"2.2",0
 msg3	.db	"3",0
-msbban2	.db	", 21-Dec-2024",0
+msbban2	.db	", 9-Aug-2025",0
 msghb	.db	" (HBIOS Mode)",0
 msgub	.db	" (UBIOS Mode)",0
-msgban3	.db	"Copyright 2024, Wayne Warthen, GNU GPL v3",0
+msgban3	.db	"Copyright 2025, Wayne Warthen, GNU GPL v3",0
 msguse	.db	"Usage: ASSIGN D:[=[{D:|<device>[<unitnum>]:[<slicenum>]}]][,...]",13,10
 	.db	"  ex. ASSIGN           (display all active assignments)",13,10
 	.db	"      ASSIGN /?        (display version and usage)",13,10

Source/Apps/cpuspd/cpuspd.asm

@@ -29,7 +29,7 @@ bf_sysres_int	.equ	$00		; reset hbios internal
 bf_sysres_warm	.equ	$01		; warm start (restart boot loader)
 bf_sysres_cold	.equ	$02		; cold start
 ;
-ident		.equ	$FFFE		; loc of RomWBW HBIOS ident ptr
+ident		.equ	$FFFC		; loc of RomWBW HBIOS ident ptr
 ;
 ;=======================================================================
 ;

Source/Apps/reboot/reboot.asm

@@ -1,299 +1,299 @@
-;==============================================================================
-; REBOOT - Allows the user to Cold or Warm Boot the RomWBW System
-; Version 1.0 12-October-2024
-;==============================================================================
-;
-; Author: MartinR (October 2024)
-;    Based **very heavily** on code by Wayne Warthen (wwarthen@gmail.com)
-;______________________________________________________________________________
-;
-; Usage:
-;   REBOOT [/C] [/W] [/?]
-;     ex: REBOOT	Display version and usage
-;         REBOOT /?	Display version and usage
-;         REBOOT /C	Cold boot RomWBW system
-;	  REBOOT /W	Warm boot RomWBW system
-;
-; Operation:
-;   Cold or warm boots a RomWBW system depending on the user option selected.
-;
-; This code will only execute on a Z80 CPU (or derivitive)
-;
-; This source code assembles with TASM V3.2 under Windows-11 using the
-; following command line:
-;	tasm -80 -g3 -l REBOOT.ASM REBOOT.COM
-;	ie: Z80 CPU; output format 'binary' named .COM (rather than .OBJ)
-;	and includes a symbol table as part of the listing file.
-;______________________________________________________________________________
-;
-; Change Log:
-;   2024-09-11 [WBW] Release of RomWBW CPU Speed Selector v1.0 used as the basis
-;   2024-10-12 [MR ] Initial release of version 1.0
-;______________________________________________________________________________
-;
-; Include Files
-;
-#include "../../ver.inc"		; Used for building RomWBW
-#include "../../HBIOS/hbios.inc"
-
-;#include "ver.inc"			; Used for testing purposes....
-;#include "hbios.inc"			; ....during code development
-;
-;===============================================================================
-;
-; General operational equates (should not requre adjustment)
-;
-stksiz		.equ	$40		; Working stack size
-;
-restart		.equ	$0000		; CP/M restart vector
-bdos		.equ	$0005		; BDOS invocation vector
-;
-bf_sysreset	.equ	$F0		; restart system
-bf_sysres_int	.equ	$00		; reset hbios internal
-bf_sysres_warm	.equ	$01		; warm start (restart boot loader)
-bf_sysres_cold	.equ	$02		; cold start
-;
-ident		.equ	$FFFE		; loc of RomWBW HBIOS ident ptr
-;
-;===============================================================================
-;
-	.org	$0100			; standard CP/M TPA executable
-;
-	; setup stack (save old value)
-	ld	(stksav),sp		; save stack
-	ld	sp,stack		; set new stack
-;
-	call	crlf
-	ld	de,str_banner		; banner
-	call	prtstr
-;
-	; initialization
-	call	init			; initialize
-	jr	nz,exit			; abort if init fails
-;
-	call	main			; do the real work
-;
-exit:
-	; clean up and return to command processor
-	call	crlf			; formatting
-	ld	sp,(stksav)		; restore stack
-	jp	restart			; return to CP/M via restart
-;
-;
-;===============================================================================
-; Main Program
-;===============================================================================
-;
-; Initialization
-;
-init:
-	; check for UNA (UBIOS)
-	ld	a,($FFFD)	; fixed location of UNA API vector
-	cp	$C3		; jp instruction?
-	jr	nz,initwbw	; if not, not UNA
-	ld	hl,($FFFE)	; get jp address
-	ld	a,(hl)		; get byte at target address
-	cp	$FD		; first byte of UNA push ix instruction
-	jr	nz,initwbw	; if not, not UNA
-	inc	hl		; point to next byte
-	ld	a,(hl)		; get next byte
-	cp	$E5		; second byte of UNA push ix instruction
-	jr	nz,initwbw	; if not, not UNA
-	jp	err_una		; UNA not supported
-;
-initwbw:
-	; get location of config data and verify integrity
-	ld	hl,(ident)	; HL := adr or RomWBW HBIOS ident
-	ld	a,(hl)		; get first byte of RomWBW marker
-	cp	'W'		; match?
-	jp	nz,err_inv	; abort with invalid config block
-	inc	hl		; next byte (marker byte 2)
-	ld	a,(hl)		; load it
-	cp	~'W'		; match?
-	jp	nz,err_inv	; abort with invalid config block
-	inc	hl		; next byte (major/minor version)
-	ld	a,(hl)		; load it
-	cp	rmj << 4 | rmn	; match?
-	jp	nz,err_ver	; abort with invalid os version
-;
-initz:
-	; initialization complete
-	xor	a		; signal success
-	ret			; return
-;
-;
-;
-main:
-	; skip to start of first command line parameter
-	ld	ix,$0081	; point to start of parm area (past length byte)
-	call	nonblank	; skip to next non-blank char
-	cp	'/'		; option prefix?
-	jr	nz,usage	; display help info & exit if nothing to do
-;
-	; process any options
-	inc	ix		; fetch next character and process
-	ld	a,(ix)
-	call	upcase		; ensure it's an upper case character
-	cp	'C'		; if it's a 'C' then
-	jr	z,cboot		; do a cold boot.
-	cp	'W'		; if it's a 'W' then
-	jr	z,wboot		; do a warm boot.
-	cp	'?'		; if it's a '?' then
-	jr	z,usage		; display usage info and exit.
-	jr	err_parm	; or not a recognised option, so report and exit.
-;
-; Handle Usage Information
-;
-usage:
-	call	crlf2		; display the options for this utility
-	ld	de,str_usage
-	call	prtstr
-	or	$FF
-	ret			; exit back out to CP/M CCP
-;
-; Handle Warm Boot
-;
-wboot:
-	ld	de,str_warmboot		; message
-	call	prtstr			; display it
-	ld	b,bf_sysreset		; system restart
-	ld	c,bf_sysres_warm	; warm start
-	call	$fff0			; call hbios
-;
-; Handle Cold Boot
-;
-cboot:
-	ld	de,str_coldboot		; message
-	call	prtstr			; display it
-	ld	b,bf_sysreset		; system restart
-	ld	c,bf_sysres_cold	; cold start
-	call	$fff0			; call hbios
-;
-;===============================================================================
-; Error Handlers
-;===============================================================================
-;
-err_una:
-	ld	de,str_err_una
-	jr	err_ret
-err_inv:
-	ld	de,str_err_inv
-	jr	err_ret
-err_ver:
-	ld	de,str_err_ver
-	jr	err_ret
-err_parm:
-	ld	de,str_err_parm
-	jr	err_ret
-
-;
-err_ret:
-	call	crlf2
-	call	prtstr
-	or	$FF			; signal error
-	ret
-;
-;===============================================================================
-; Utility Routines
-;===============================================================================
-;
-; Print character in A without destroying any registers
-;
-prtchr:
-	push	af
-	push	bc		; save registers
-	push	de
-	push	hl
-	ld	e,a		; character to print in E
-	ld	c,$02		; BDOS function to output a character
-	call	bdos		; do it
-	pop	hl		; restore registers
-	pop	de
-	pop	bc
-	pop	af
-	ret
-;
-; Start a new line
-;
-crlf2:
-	call	crlf		; two of them
-crlf:
-	push	af		; preserve AF
-	ld	a,13		; <CR>
-	call	prtchr		; print it
-	ld	a,10		; <LF>
-	call	prtchr		; print it
-	pop	af		; restore AF
-	ret
-;
-; Print a zero terminated string at (de) without destroying any registers
-;
-prtstr:
-	push	af
-	push	de
-;
-prtstr1:
-	ld	a,(de)		; get next char
-	or	a
-	jr	z,prtstr2
-	call	prtchr
-	inc	de
-	jr	prtstr1
-;
-prtstr2:
-	pop	de		; restore registers
-	pop	af
-	ret
-;
-; Get the next non-blank character from (ix)
-;
-nonblank:
-	ld	a,(ix)		; load next character
-	or	a		; string ends with a null
-	ret	z		; if null, return pointing to null
-	cp	' '		; check for blank
-	ret	nz		; return if not blank
-	inc	ix		; if blank, increment character pointer
-	jr	nonblank	; and loop
-;
-; Convert character in A to uppercase
-;
-upcase:
-	cp	'a'		; if below 'a'
-	ret	c		; ... do nothing and return
-	cp	'z' + 1		; if above 'z'
-	ret	nc		; ... do nothing and return
-	res	5,a		; clear bit 5 to make lower case -> upper case
-	ret			; and return
-;
-;===============================================================================
-; Constants
-;===============================================================================
-;
-str_banner	.db	"RomWBW Reboot Utility, Version 1.0, 12-Oct-2024\r\n"
-		.db	"   Wayne Warthen (wwarthen@gmail.com) & MartinR",0
-;
-str_warmboot	.db	"\r\n\r\nWarm booting...\r\n",0
-str_coldboot	.db	"\r\n\r\nCold booting...\r\n",0
-;
-str_err_una	.db	"  ERROR: UNA not supported by application",0
-str_err_inv	.db	"  ERROR: Invalid BIOS (signature missing)",0
-str_err_ver	.db	"  ERROR: Unexpected HBIOS version",0
-str_err_parm	.db	"  ERROR: Parameter error (REBOOT /? for usage)",0
-;
-str_usage	.db	"  Usage: REBOOT /? - Display this help info.\r\n"
-		.db	"         REBOOT /W - Warm boot system\r\n"
-		.db	"         REBOOT /C - Cold boot system\r\n"
-		.db	"         Options are case insensitive.\r\n",0
-;
-;===============================================================================
-; Working data
-;===============================================================================
-;
-stksav		.dw	0		; stack pointer saved at start
-		.fill	stksiz,0	; stack
-stack		.equ	$		; stack top
-;
-;===============================================================================
-;
+;==============================================================================
+; REBOOT - Allows the user to Cold or Warm Boot the RomWBW System
+; Version 1.0 12-October-2024
+;==============================================================================
+;
+; Author: MartinR (October 2024)
+;    Based **very heavily** on code by Wayne Warthen (wwarthen@gmail.com)
+;______________________________________________________________________________
+;
+; Usage:
+;   REBOOT [/C] [/W] [/?]
+;     ex: REBOOT	Display version and usage
+;         REBOOT /?	Display version and usage
+;         REBOOT /C	Cold boot RomWBW system
+;	  REBOOT /W	Warm boot RomWBW system
+;
+; Operation:
+;   Cold or warm boots a RomWBW system depending on the user option selected.
+;
+; This code will only execute on a Z80 CPU (or derivitive)
+;
+; This source code assembles with TASM V3.2 under Windows-11 using the
+; following command line:
+;	tasm -80 -g3 -l REBOOT.ASM REBOOT.COM
+;	ie: Z80 CPU; output format 'binary' named .COM (rather than .OBJ)
+;	and includes a symbol table as part of the listing file.
+;______________________________________________________________________________
+;
+; Change Log:
+;   2024-09-11 [WBW] Release of RomWBW CPU Speed Selector v1.0 used as the basis
+;   2024-10-12 [MR ] Initial release of version 1.0
+;______________________________________________________________________________
+;
+; Include Files
+;
+#include "../../ver.inc"		; Used for building RomWBW
+#include "../../HBIOS/hbios.inc"
+
+;#include "ver.inc"			; Used for testing purposes....
+;#include "hbios.inc"			; ....during code development
+;
+;===============================================================================
+;
+; General operational equates (should not requre adjustment)
+;
+stksiz		.equ	$40		; Working stack size
+;
+restart		.equ	$0000		; CP/M restart vector
+bdos		.equ	$0005		; BDOS invocation vector
+;
+bf_sysreset	.equ	$F0		; restart system
+bf_sysres_int	.equ	$00		; reset hbios internal
+bf_sysres_warm	.equ	$01		; warm start (restart boot loader)
+bf_sysres_cold	.equ	$02		; cold start
+;
+ident		.equ	$FFFC		; loc of RomWBW HBIOS ident ptr
+;
+;===============================================================================
+;
+	.org	$0100			; standard CP/M TPA executable
+;
+	; setup stack (save old value)
+	ld	(stksav),sp		; save stack
+	ld	sp,stack		; set new stack
+;
+	call	crlf
+	ld	de,str_banner		; banner
+	call	prtstr
+;
+	; initialization
+	call	init			; initialize
+	jr	nz,exit			; abort if init fails
+;
+	call	main			; do the real work
+;
+exit:
+	; clean up and return to command processor
+	call	crlf			; formatting
+	ld	sp,(stksav)		; restore stack
+	jp	restart			; return to CP/M via restart
+;
+;
+;===============================================================================
+; Main Program
+;===============================================================================
+;
+; Initialization
+;
+init:
+	; check for UNA (UBIOS)
+	ld	a,($FFFD)	; fixed location of UNA API vector
+	cp	$C3		; jp instruction?
+	jr	nz,initwbw	; if not, not UNA
+	ld	hl,($FFFE)	; get jp address
+	ld	a,(hl)		; get byte at target address
+	cp	$FD		; first byte of UNA push ix instruction
+	jr	nz,initwbw	; if not, not UNA
+	inc	hl		; point to next byte
+	ld	a,(hl)		; get next byte
+	cp	$E5		; second byte of UNA push ix instruction
+	jr	nz,initwbw	; if not, not UNA
+	jp	err_una		; UNA not supported
+;
+initwbw:
+	; get location of config data and verify integrity
+	ld	hl,(ident)	; HL := adr or RomWBW HBIOS ident
+	ld	a,(hl)		; get first byte of RomWBW marker
+	cp	'W'		; match?
+	jp	nz,err_inv	; abort with invalid config block
+	inc	hl		; next byte (marker byte 2)
+	ld	a,(hl)		; load it
+	cp	~'W'		; match?
+	jp	nz,err_inv	; abort with invalid config block
+	inc	hl		; next byte (major/minor version)
+	ld	a,(hl)		; load it
+	cp	rmj << 4 | rmn	; match?
+	jp	nz,err_ver	; abort with invalid os version
+;
+initz:
+	; initialization complete
+	xor	a		; signal success
+	ret			; return
+;
+;
+;
+main:
+	; skip to start of first command line parameter
+	ld	ix,$0081	; point to start of parm area (past length byte)
+	call	nonblank	; skip to next non-blank char
+	cp	'/'		; option prefix?
+	jr	nz,usage	; display help info & exit if nothing to do
+;
+	; process any options
+	inc	ix		; fetch next character and process
+	ld	a,(ix)
+	call	upcase		; ensure it's an upper case character
+	cp	'C'		; if it's a 'C' then
+	jr	z,cboot		; do a cold boot.
+	cp	'W'		; if it's a 'W' then
+	jr	z,wboot		; do a warm boot.
+	cp	'?'		; if it's a '?' then
+	jr	z,usage		; display usage info and exit.
+	jr	err_parm	; or not a recognised option, so report and exit.
+;
+; Handle Usage Information
+;
+usage:
+	call	crlf2		; display the options for this utility
+	ld	de,str_usage
+	call	prtstr
+	or	$FF
+	ret			; exit back out to CP/M CCP
+;
+; Handle Warm Boot
+;
+wboot:
+	ld	de,str_warmboot		; message
+	call	prtstr			; display it
+	ld	b,bf_sysreset		; system restart
+	ld	c,bf_sysres_warm	; warm start
+	call	$fff0			; call hbios
+;
+; Handle Cold Boot
+;
+cboot:
+	ld	de,str_coldboot		; message
+	call	prtstr			; display it
+	ld	b,bf_sysreset		; system restart
+	ld	c,bf_sysres_cold	; cold start
+	call	$fff0			; call hbios
+;
+;===============================================================================
+; Error Handlers
+;===============================================================================
+;
+err_una:
+	ld	de,str_err_una
+	jr	err_ret
+err_inv:
+	ld	de,str_err_inv
+	jr	err_ret
+err_ver:
+	ld	de,str_err_ver
+	jr	err_ret
+err_parm:
+	ld	de,str_err_parm
+	jr	err_ret
+
+;
+err_ret:
+	call	crlf2
+	call	prtstr
+	or	$FF			; signal error
+	ret
+;
+;===============================================================================
+; Utility Routines
+;===============================================================================
+;
+; Print character in A without destroying any registers
+;
+prtchr:
+	push	af
+	push	bc		; save registers
+	push	de
+	push	hl
+	ld	e,a		; character to print in E
+	ld	c,$02		; BDOS function to output a character
+	call	bdos		; do it
+	pop	hl		; restore registers
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+; Start a new line
+;
+crlf2:
+	call	crlf		; two of them
+crlf:
+	push	af		; preserve AF
+	ld	a,13		; <CR>
+	call	prtchr		; print it
+	ld	a,10		; <LF>
+	call	prtchr		; print it
+	pop	af		; restore AF
+	ret
+;
+; Print a zero terminated string at (de) without destroying any registers
+;
+prtstr:
+	push	af
+	push	de
+;
+prtstr1:
+	ld	a,(de)		; get next char
+	or	a
+	jr	z,prtstr2
+	call	prtchr
+	inc	de
+	jr	prtstr1
+;
+prtstr2:
+	pop	de		; restore registers
+	pop	af
+	ret
+;
+; Get the next non-blank character from (ix)
+;
+nonblank:
+	ld	a,(ix)		; load next character
+	or	a		; string ends with a null
+	ret	z		; if null, return pointing to null
+	cp	' '		; check for blank
+	ret	nz		; return if not blank
+	inc	ix		; if blank, increment character pointer
+	jr	nonblank	; and loop
+;
+; Convert character in A to uppercase
+;
+upcase:
+	cp	'a'		; if below 'a'
+	ret	c		; ... do nothing and return
+	cp	'z' + 1		; if above 'z'
+	ret	nc		; ... do nothing and return
+	res	5,a		; clear bit 5 to make lower case -> upper case
+	ret			; and return
+;
+;===============================================================================
+; Constants
+;===============================================================================
+;
+str_banner	.db	"RomWBW Reboot Utility, Version 1.0, 12-Oct-2024\r\n"
+		.db	"   Wayne Warthen (wwarthen@gmail.com) & MartinR",0
+;
+str_warmboot	.db	"\r\n\r\nWarm booting...\r\n",0
+str_coldboot	.db	"\r\n\r\nCold booting...\r\n",0
+;
+str_err_una	.db	"  ERROR: UNA not supported by application",0
+str_err_inv	.db	"  ERROR: Invalid BIOS (signature missing)",0
+str_err_ver	.db	"  ERROR: Unexpected HBIOS version",0
+str_err_parm	.db	"  ERROR: Parameter error (REBOOT /? for usage)",0
+;
+str_usage	.db	"  Usage: REBOOT /? - Display this help info.\r\n"
+		.db	"         REBOOT /W - Warm boot system\r\n"
+		.db	"         REBOOT /C - Cold boot system\r\n"
+		.db	"         Options are case insensitive.\r\n",0
+;
+;===============================================================================
+; Working data
+;===============================================================================
+;
+stksav		.dw	0		; stack pointer saved at start
+		.fill	stksiz,0	; stack
+stack		.equ	$		; stack top
+;
+;===============================================================================
+;
 	.end

Source/Apps/slabel/slabel.asm

@@ -35,6 +35,7 @@
 ;     table once (per device), and work out all the LBA's from this single read.
 ;     Note this doesnt omit the fact that the 3 rd sector of each slice wold need to be read regarless.
 ;     To slightly reduce some IO only slices < 64 are considered.
+;   - Output formatting misaligned with storage units enumerated as greater than 9 (ie 2 digits)
 ;
 ; This code will only execute on a Z80 CPU (or derivitive)
 ; This code requirs the use of HBIOS
@@ -45,6 +46,7 @@
 ;   2024-12-11 [MAP] Started - Reboot v1.0 used as the basis for this code
 ;   2024-12-14 [MAP] Initial 0.9 alpha with basic working functionality
 ;   2025-04-21 [MAP] Initial v1.0 release for distribution, fixing all issues
+;   2025-07-12 [MR]  Minor tweak to partially tidy up output formatting
 ;______________________________________________________________________________
 ;
 ; Include Files
@@ -66,7 +68,7 @@ bf_sysreset	.equ	$F0		; restart system
 bf_sysres_int	.equ	$00		; reset hbios internal
 bf_sysres_warm	.equ	$01		; warm start (restart boot loader)
 ;
-ident		.equ	$FFFE		; loc of RomWBW HBIOS ident ptr
+ident		.equ	$FFFC		; loc of RomWBW HBIOS ident ptr
 ;
 sigbyte1	.equ	$A5		; 1st sig byte boot info sector (bb_sig)
 sigbyte2	.equ	$5A		; 2nd sig byte boot info sector (bb_sig)
@@ -94,7 +96,7 @@ exit:
 	jp	restart			; return to CP/M via restart
 ;
 ;===============================================================================
-; Initialization
+; Initialisation
 ;
 init:
 	; check for UNA (UBIOS)
@@ -211,10 +213,10 @@ prtslc2a:
 	ld	a,c			; slice number
 	ld	(currslice),a		; save slice number
 	;
-	push	bc			; save loop
+	push	bc			; save loop counter
 	call	prtslc3			; print detals of the slice
-	pop	bc			; restore loop
-	ret	nz			; if error dont continie
+	pop	bc			; restore loop counter
+	ret	nz			; if error don't continue
 	;
 	inc	c			; next slice number
 	djnz	prtslc2a		; loop if more slices
@@ -248,15 +250,25 @@ prtslc3:
 	cp	c			; compare
 	jr	nz,prtslc5		; ignore missing signature and loop
 	;
-        ; Print volume label string at HL, '$' terminated, 16 chars max
+        ; Print slice label string at HL, '$' terminated, 16 chars max
 	ld	a,(currunit)
 	call	prtdecb			; print unit number as decimal
 	call 	pdot			; print a DOT
-	ld	a,(currslice)
+	ld	a, (currslice)		; fetch the current slice numeric
 	call	prtdecb
+;
+;-------------------------------------------------------------------------------
+; Added by MartinR, July 2025, to help neaten the output formatting.
+; Note - this is not a complete fix and will still result in misaligned output
+; where the unit number exceeds 9 (ie - uses 2 digits).
+	cp	10			; is it less than 10?
 	ld	a,' '
+	jr	nc,jr01			; If not, then we don't need an extra space printed
+	call	cout			; print the extra space	necessary
+jr01:	call	cout			; print a space
 	call	cout			; print a space
-	call	cout			; print a space
+;-------------------------------------------------------------------------------
+;
 	ld	hl,bb_label		; point to label
 	call	pvol			; print it
 	call	crlf
@@ -438,6 +450,7 @@ pdot:
 ;
 ;-------------------------------------------------------------------------------
 ; Print character in A without destroying any registers
+; Use CP/M BDOS function $02 - Console Output
 ;
 prtchr:
 cout:
@@ -687,7 +700,7 @@ diskwrite:
 ;===============================================================================
 ;
 str_banner	.db	"\r\n"
-		.db	"Slice Label, v1.0, April 2025 - M.Pruden",0
+		.db	"Slice Label, v1.1, July 2025 - M.Pruden",0
 ;
 str_err_una	.db	"  ERROR: UNA not supported by application",0
 str_err_inv	.db	"  ERROR: Invalid BIOS (signature missing)",0
@@ -706,7 +719,7 @@ str_usage	.db	"\r\n\r\n"
 		.db	"         Options are case insensitive.\r\n",0
 ;
 PRTSLC_HDR	.TEXT	"\r\n\r\n"
-		.TEXT	"Un.Sl Drive           \r\n"
+		.TEXT	"Un.Sl Label           \r\n"
 		.TEXT	"----- ----------------\r\n"
 		.DB	0
 ;

Source/Apps/startup/startup.asm

@@ -1,399 +1,399 @@
-;===============================================================================
-; STARTUP - Application run automatically at OS startup
-;
-;===============================================================================
-;
-;	Author:  Wayne Warthen (wwarthen@gmail.com)
-;_______________________________________________________________________________
-;
-; Usage:
-;   MODE [/?]
-;
-; Operation:
-;   Determines if STARTUP.CMD exists on startup drive, user 0.  If it is
-;   found, it is run via SUBMIT.
-;_______________________________________________________________________________
-;
-; Change Log:
-;   2017-12-01 [WBW] Initial release
-;_______________________________________________________________________________
-;
-; ToDo:
-;  1) Detect OS type (CP/M or ZSYS) and run different batch files as a result.
-;_______________________________________________________________________________
-;
-;===============================================================================
-; Definitions
-;===============================================================================
-;
-stksiz	.equ	$40		; Working stack size
-;
-restart	.equ	$0000		; CP/M restart vector
-bdos	.equ	$0005		; BDOS invocation vector
-;
-ident	.equ	$FFFE		; loc of RomWBW HBIOS ident ptr
-;
-rmj	.equ	2		; intended CBIOS version - major
-rmn	.equ	9		; intended CBIOS version - minor
-;
-bf_cioinit	.equ	$04	; HBIOS: CIOINIT function
-bf_cioquery	.equ	$05	; HBIOS: CIOQUERY function
-bf_ciodevice	.equ	$06	; HBIOS: CIODEVICE function
-bf_sysget	.equ	$F8	; HBIOS: SYSGET function
-;
-;===============================================================================
-; Code Section
-;===============================================================================
-;
-	.org	$100
-;
-	; setup stack (save old value)
-	ld	(stksav),sp	; save stack
-	ld	sp,stack	; set new stack
-;
-	; initialization
-	call	init		; initialize
-	jr	nz,exit		; abort if init fails
-;
-	; process
-	call 	process		; do main processing
-	jr	nz,exit		; abort on error
-;
-exit:	; clean up and return to command processor
-	call	crlf		; formatting
-	ld	sp,(stksav)	; restore stack
-	;jp	restart		; return to CP/M via restart
-	ret			; return to CP/M w/o restart
-;
-; Initialization
-;
-init:
-;
-initx
-	; initialization complete
-	xor	a		; signal success
-	ret			; return
-;
-; Process
-;
-process:
-	; skip to start of first parm
-	ld	ix,$81		; point to start of parm area (past len byte)
-	call	nonblank	; skip to next non-blank char
-	jp	z,runcmd	; no parms, do command processing
-;
-process1:
-	; process options (if any)
-	cp	'/'		; option prefix?
-	jp	nz,erruse	; invalid option introducer
-	call	option		; process option
-	ret	nz		; some options mean we are done (e.g., "/?")
-	inc	ix		; skip option character
-	call 	nonblank	; skip whitespace
-	jr	nz,process1	; continue option checking
-	jp	runcmd		; end of parms, do cmd processing
-;
-;
-;
-runcmd:
-	call	ldfil		; load executable
-	ret	nz		; abort on error
-;
-	xor	a
-	ret
-;
-; Load file for execution
-;
-ldfil:
-	ld	c,15		; BDOS function: Open File
-	ld	de,fcb		; pointer to FCB
-	call	bdos		; do it
-	inc	a		; check for err, 0xFF --> 0x00
-	jp	z,errfil	; handle file not found err
-;
-	ld	c,16		; BDOS function: Close File
-	ld	de,fcb		; pointer to FCB
-	call	bdos		; do it
-	inc	a		; check for err, 0xFF --> 0x00
-	jp	z,errfil	; handle file close err
-;
-	xor	a		; signal success
-	ret			; done
-
-	
-;
-; Handle options
-;
-option:
-;
-	inc	ix		; next char
-	ld	a,(ix)		; get it
-	cp	'?'		; is it a '?' as expected?
-	jp	z,usage		; yes, display usage
-	jp	errprm		; anything else is an error
-;
-; Display usage
-;
-usage:
-;
-	call	crlf		; formatting
-	ld	de,msgban	; point to version message part 1
-	call	prtstr		; print it
-	call	crlf2		; blank line
-	ld	de,msguse	; point to usage message
-	call	prtstr		; print it
-	or	$FF		; signal no action performed
-	ret			; and return
-;
-; Print character in A without destroying any registers
-;
-prtchr:
-	push	bc		; save registers
-	push	de
-	push	hl
-	ld	e,a		; character to print in E
-	ld	c,$02		; BDOS function to output a character
-	call	bdos		; do it
-	pop	hl		; restore registers
-	pop	de
-	pop	bc
-	ret
-;
-prtdot:
-;
-	; shortcut to print a dot preserving all regs
-	push	af		; save af
-	ld	a,'.'		; load dot char
-	call	prtchr		; print it
-	pop	af		; restore af
-	ret			; done
-;
-; Print a zero terminated string at (DE) without destroying any registers
-;
-prtstr:
-	push	de
-;
-prtstr1:
-	ld	a,(de)		; get next char
-	or	a
-	jr	z,prtstr2
-	call	prtchr
-	inc	de
-	jr	prtstr1
-;
-prtstr2:
-	pop	de		; restore registers
-	ret	
-;
-; Print the value in A in hex without destroying any registers
-;
-prthex:
-	push	af		; save AF
-	push	de		; save DE
-	call	hexascii	; convert value in A to hex chars in DE
-	ld	a,d		; get the high order hex char
-	call	prtchr		; print it
-	ld	a,e		; get the low order hex char
-	call	prtchr		; print it
-	pop	de		; restore DE
-	pop	af		; restore AF
-	ret			; done
-;
-; print the hex word value in bc
-;
-prthexword:
-	push	af
-	ld	a,b
-	call	prthex
-	ld	a,c
-	call	prthex 
-	pop	af
-	ret
-;
-; print the hex dword value in de:hl
-;
-prthex32:
-	push	bc
-	push	de
-	pop	bc
-	call	prthexword
-	push	hl
-	pop	bc
-	call	prthexword
-	pop	bc
-	ret
-;
-; Convert binary value in A to ascii hex characters in DE
-;
-hexascii:
-	ld	d,a		; save A in D
-	call	hexconv		; convert low nibble of A to hex
-	ld	e,a		; save it in E
-	ld	a,d		; get original value back
-	rlca			; rotate high order nibble to low bits
-	rlca
-	rlca
-	rlca
-	call	hexconv		; convert nibble
-	ld	d,a		; save it in D
-	ret			; done
-;
-; Convert low nibble of A to ascii hex
-;
-hexconv:
-	and	$0F	     	; low nibble only
-	add	a,$90
-	daa	
-	adc	a,$40
-	daa	
-	ret
-;
-; Print value of A or HL in decimal with leading zero suppression
-; Use prtdecb for A or prtdecw for HL
-;
-prtdecb:
-	push	hl
-	ld	h,0
-	ld	l,a
-	call	prtdecw		; print it
-	pop	hl
-	ret
-;
-prtdecw:
-	push	af
-	push	bc
-	push	de
-	push	hl
-	call	prtdec0
-	pop	hl
-	pop	de
-	pop	bc
-	pop	af
-	ret
-;
-prtdec0:
-	ld	e,'0'
-	ld	bc,-10000
-	call	prtdec1
-	ld	bc,-1000
-	call	prtdec1
-	ld	bc,-100
-	call	prtdec1
-	ld	c,-10
-	call	prtdec1
-	ld	e,0
-	ld	c,-1
-prtdec1:
-	ld	a,'0' - 1
-prtdec2:
-	inc	a
-	add	hl,bc
-	jr	c,prtdec2
-	sbc	hl,bc
-	cp	e
-	ret	z
-	ld	e,0
-	call	prtchr
-	ret
-;
-; Start a new line
-;
-crlf2:
-	call	crlf		; two of them
-crlf:
-	push	af		; preserve AF
-	ld	a,13		; <CR>
-	call	prtchr		; print it
-	ld	a,10		; <LF>
-	call	prtchr		; print it
-	pop	af		; restore AF
-	ret
-;
-; Get the next non-blank character from (HL).
-;
-nonblank:
-	ld	a,(ix)		; load next character
-	or	a		; string ends with a null
-	ret	z		; if null, return pointing to null
-	cp	' '		; check for blank
-	ret	nz		; return if not blank
-	inc	ix		; if blank, increment character pointer
-	jr	nonblank	; and loop
-;
-; Convert character in A to uppercase
-;
-ucase:
-	cp	'a'		; if below 'a'
-	ret	c		; ... do nothing and return
-	cp	'z' + 1		; if above 'z'
-	ret	nc		; ... do nothing and return
-	res	5,a		; clear bit 5 to make lower case -> upper case
-	ret			; and return
-;
-; Add the value in A to HL (HL := HL + A)
-;
-addhl:
-	add	a,l		; A := A + L
-	ld	l,a		; Put result back in L
-	ret	nc		; if no carry, we are done
-	inc	h		; if carry, increment H
-	ret			; and return
-;
-; Jump indirect to address in HL
-;
-jphl:
-	jp	(hl)
-;
-; Errors
-;
-erruse:	; command usage error (syntax)
-	ld	de,msguse
-	jr	err
-;
-errprm:	; command parameter error (syntax)
-	ld	de,msgprm
-	jr	err
-;
-errfil:	; STARTUP.CMD file not present
-	ld	de,msgfil
-	jr	err
-;
-err:	; print error string and return error signal
-	call	crlf		; print newline
-;
-err1:	; without the leading crlf
-	call	prtstr		; print error string
-;
-err2:	; without the string
-;	call	crlf		; print newline
-	or	$FF		; signal error
-	ret			; done
-;
-;===============================================================================
-; Storage Section
-;===============================================================================
-;
-fcb	.db	0		; Drive code, 0 = current drive
-	.db	"START   "	; File name, 8 chars
-	.db	"COM"		; File type, 3 chars
-	.fill	36-($-fcb),0	; zero fill remainder of fcb
-;
-cmdblk	.db	cmdlen		; length
-cmdtxt	.db	"        B:SUBMIT START"
-	.db	0		; null terminator
-cmdlen	.equ	$ - cmdtxt
-cmdend	.equ	$
-;
-stksav	.dw	0		; stack pointer saved at start
-	.fill	stksiz,0	; stack
-stack	.equ	$		; stack top
-;
-; Messages
-;
-msgban	.db	"STARTUP v1.0, 01-Dec-2017",13,10
-	.db	"Copyright (C) 2017, Wayne Warthen, GNU GPL v3",0
-msguse	.db	"Usage: STARTUP [/?]",0
-msgprm	.db	"Parameter error (STARTUP /? for usage)",0
-msgfil	.db	"STARTUP.CMD file missing",0
-;
-	.end
+;===============================================================================
+; STARTUP - Application run automatically at OS startup
+;
+;===============================================================================
+;
+;	Author:  Wayne Warthen (wwarthen@gmail.com)
+;_______________________________________________________________________________
+;
+; Usage:
+;   MODE [/?]
+;
+; Operation:
+;   Determines if STARTUP.CMD exists on startup drive, user 0.  If it is
+;   found, it is run via SUBMIT.
+;_______________________________________________________________________________
+;
+; Change Log:
+;   2017-12-01 [WBW] Initial release
+;_______________________________________________________________________________
+;
+; ToDo:
+;  1) Detect OS type (CP/M or ZSYS) and run different batch files as a result.
+;_______________________________________________________________________________
+;
+;===============================================================================
+; Definitions
+;===============================================================================
+;
+stksiz	.equ	$40		; Working stack size
+;
+restart	.equ	$0000		; CP/M restart vector
+bdos	.equ	$0005		; BDOS invocation vector
+;
+ident	.equ	$FFFC		; loc of RomWBW HBIOS ident ptr
+;
+rmj	.equ	2		; intended CBIOS version - major
+rmn	.equ	9		; intended CBIOS version - minor
+;
+bf_cioinit	.equ	$04	; HBIOS: CIOINIT function
+bf_cioquery	.equ	$05	; HBIOS: CIOQUERY function
+bf_ciodevice	.equ	$06	; HBIOS: CIODEVICE function
+bf_sysget	.equ	$F8	; HBIOS: SYSGET function
+;
+;===============================================================================
+; Code Section
+;===============================================================================
+;
+	.org	$100
+;
+	; setup stack (save old value)
+	ld	(stksav),sp	; save stack
+	ld	sp,stack	; set new stack
+;
+	; initialization
+	call	init		; initialize
+	jr	nz,exit		; abort if init fails
+;
+	; process
+	call 	process		; do main processing
+	jr	nz,exit		; abort on error
+;
+exit:	; clean up and return to command processor
+	call	crlf		; formatting
+	ld	sp,(stksav)	; restore stack
+	;jp	restart		; return to CP/M via restart
+	ret			; return to CP/M w/o restart
+;
+; Initialization
+;
+init:
+;
+initx
+	; initialization complete
+	xor	a		; signal success
+	ret			; return
+;
+; Process
+;
+process:
+	; skip to start of first parm
+	ld	ix,$81		; point to start of parm area (past len byte)
+	call	nonblank	; skip to next non-blank char
+	jp	z,runcmd	; no parms, do command processing
+;
+process1:
+	; process options (if any)
+	cp	'/'		; option prefix?
+	jp	nz,erruse	; invalid option introducer
+	call	option		; process option
+	ret	nz		; some options mean we are done (e.g., "/?")
+	inc	ix		; skip option character
+	call 	nonblank	; skip whitespace
+	jr	nz,process1	; continue option checking
+	jp	runcmd		; end of parms, do cmd processing
+;
+;
+;
+runcmd:
+	call	ldfil		; load executable
+	ret	nz		; abort on error
+;
+	xor	a
+	ret
+;
+; Load file for execution
+;
+ldfil:
+	ld	c,15		; BDOS function: Open File
+	ld	de,fcb		; pointer to FCB
+	call	bdos		; do it
+	inc	a		; check for err, 0xFF --> 0x00
+	jp	z,errfil	; handle file not found err
+;
+	ld	c,16		; BDOS function: Close File
+	ld	de,fcb		; pointer to FCB
+	call	bdos		; do it
+	inc	a		; check for err, 0xFF --> 0x00
+	jp	z,errfil	; handle file close err
+;
+	xor	a		; signal success
+	ret			; done
+
+	
+;
+; Handle options
+;
+option:
+;
+	inc	ix		; next char
+	ld	a,(ix)		; get it
+	cp	'?'		; is it a '?' as expected?
+	jp	z,usage		; yes, display usage
+	jp	errprm		; anything else is an error
+;
+; Display usage
+;
+usage:
+;
+	call	crlf		; formatting
+	ld	de,msgban	; point to version message part 1
+	call	prtstr		; print it
+	call	crlf2		; blank line
+	ld	de,msguse	; point to usage message
+	call	prtstr		; print it
+	or	$FF		; signal no action performed
+	ret			; and return
+;
+; Print character in A without destroying any registers
+;
+prtchr:
+	push	bc		; save registers
+	push	de
+	push	hl
+	ld	e,a		; character to print in E
+	ld	c,$02		; BDOS function to output a character
+	call	bdos		; do it
+	pop	hl		; restore registers
+	pop	de
+	pop	bc
+	ret
+;
+prtdot:
+;
+	; shortcut to print a dot preserving all regs
+	push	af		; save af
+	ld	a,'.'		; load dot char
+	call	prtchr		; print it
+	pop	af		; restore af
+	ret			; done
+;
+; Print a zero terminated string at (DE) without destroying any registers
+;
+prtstr:
+	push	de
+;
+prtstr1:
+	ld	a,(de)		; get next char
+	or	a
+	jr	z,prtstr2
+	call	prtchr
+	inc	de
+	jr	prtstr1
+;
+prtstr2:
+	pop	de		; restore registers
+	ret	
+;
+; Print the value in A in hex without destroying any registers
+;
+prthex:
+	push	af		; save AF
+	push	de		; save DE
+	call	hexascii	; convert value in A to hex chars in DE
+	ld	a,d		; get the high order hex char
+	call	prtchr		; print it
+	ld	a,e		; get the low order hex char
+	call	prtchr		; print it
+	pop	de		; restore DE
+	pop	af		; restore AF
+	ret			; done
+;
+; print the hex word value in bc
+;
+prthexword:
+	push	af
+	ld	a,b
+	call	prthex
+	ld	a,c
+	call	prthex 
+	pop	af
+	ret
+;
+; print the hex dword value in de:hl
+;
+prthex32:
+	push	bc
+	push	de
+	pop	bc
+	call	prthexword
+	push	hl
+	pop	bc
+	call	prthexword
+	pop	bc
+	ret
+;
+; Convert binary value in A to ascii hex characters in DE
+;
+hexascii:
+	ld	d,a		; save A in D
+	call	hexconv		; convert low nibble of A to hex
+	ld	e,a		; save it in E
+	ld	a,d		; get original value back
+	rlca			; rotate high order nibble to low bits
+	rlca
+	rlca
+	rlca
+	call	hexconv		; convert nibble
+	ld	d,a		; save it in D
+	ret			; done
+;
+; Convert low nibble of A to ascii hex
+;
+hexconv:
+	and	$0F	     	; low nibble only
+	add	a,$90
+	daa	
+	adc	a,$40
+	daa	
+	ret
+;
+; Print value of A or HL in decimal with leading zero suppression
+; Use prtdecb for A or prtdecw for HL
+;
+prtdecb:
+	push	hl
+	ld	h,0
+	ld	l,a
+	call	prtdecw		; print it
+	pop	hl
+	ret
+;
+prtdecw:
+	push	af
+	push	bc
+	push	de
+	push	hl
+	call	prtdec0
+	pop	hl
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+prtdec0:
+	ld	e,'0'
+	ld	bc,-10000
+	call	prtdec1
+	ld	bc,-1000
+	call	prtdec1
+	ld	bc,-100
+	call	prtdec1
+	ld	c,-10
+	call	prtdec1
+	ld	e,0
+	ld	c,-1
+prtdec1:
+	ld	a,'0' - 1
+prtdec2:
+	inc	a
+	add	hl,bc
+	jr	c,prtdec2
+	sbc	hl,bc
+	cp	e
+	ret	z
+	ld	e,0
+	call	prtchr
+	ret
+;
+; Start a new line
+;
+crlf2:
+	call	crlf		; two of them
+crlf:
+	push	af		; preserve AF
+	ld	a,13		; <CR>
+	call	prtchr		; print it
+	ld	a,10		; <LF>
+	call	prtchr		; print it
+	pop	af		; restore AF
+	ret
+;
+; Get the next non-blank character from (HL).
+;
+nonblank:
+	ld	a,(ix)		; load next character
+	or	a		; string ends with a null
+	ret	z		; if null, return pointing to null
+	cp	' '		; check for blank
+	ret	nz		; return if not blank
+	inc	ix		; if blank, increment character pointer
+	jr	nonblank	; and loop
+;
+; Convert character in A to uppercase
+;
+ucase:
+	cp	'a'		; if below 'a'
+	ret	c		; ... do nothing and return
+	cp	'z' + 1		; if above 'z'
+	ret	nc		; ... do nothing and return
+	res	5,a		; clear bit 5 to make lower case -> upper case
+	ret			; and return
+;
+; Add the value in A to HL (HL := HL + A)
+;
+addhl:
+	add	a,l		; A := A + L
+	ld	l,a		; Put result back in L
+	ret	nc		; if no carry, we are done
+	inc	h		; if carry, increment H
+	ret			; and return
+;
+; Jump indirect to address in HL
+;
+jphl:
+	jp	(hl)
+;
+; Errors
+;
+erruse:	; command usage error (syntax)
+	ld	de,msguse
+	jr	err
+;
+errprm:	; command parameter error (syntax)
+	ld	de,msgprm
+	jr	err
+;
+errfil:	; STARTUP.CMD file not present
+	ld	de,msgfil
+	jr	err
+;
+err:	; print error string and return error signal
+	call	crlf		; print newline
+;
+err1:	; without the leading crlf
+	call	prtstr		; print error string
+;
+err2:	; without the string
+;	call	crlf		; print newline
+	or	$FF		; signal error
+	ret			; done
+;
+;===============================================================================
+; Storage Section
+;===============================================================================
+;
+fcb	.db	0		; Drive code, 0 = current drive
+	.db	"START   "	; File name, 8 chars
+	.db	"COM"		; File type, 3 chars
+	.fill	36-($-fcb),0	; zero fill remainder of fcb
+;
+cmdblk	.db	cmdlen		; length
+cmdtxt	.db	"        B:SUBMIT START"
+	.db	0		; null terminator
+cmdlen	.equ	$ - cmdtxt
+cmdend	.equ	$
+;
+stksav	.dw	0		; stack pointer saved at start
+	.fill	stksiz,0	; stack
+stack	.equ	$		; stack top
+;
+; Messages
+;
+msgban	.db	"STARTUP v1.0, 01-Dec-2017",13,10
+	.db	"Copyright (C) 2017, Wayne Warthen, GNU GPL v3",0
+msguse	.db	"Usage: STARTUP [/?]",0
+msgprm	.db	"Parameter error (STARTUP /? for usage)",0
+msgfil	.db	"STARTUP.CMD file missing",0
+;
+	.end

Source/Build.cmd

@@ -4,15 +4,15 @@ setlocal
 :: call BuildDoc || exit /b
 call BuildProp || exit /b
 call BuildShared || exit /b
-call BuildBP || exit /b
 call BuildImages || exit /b
 call BuildROM %* || exit /b
 call BuildZRC || exit /b
 call BuildZ1RCC || exit /b
 call BuildZZRCC || exit /b
 call BuildZRC512 || exit /b
-call BuildFZ80 || exit /b
+call BuildSZ80 || exit /b
 call BuildEZ512 || exit /b
+call BuildMSX || exit /b
 
 if "%1" == "dist" (
   call Clean || exit /b

Source/BuildBP.cmd

@@ -1,4 +0,0 @@
-@echo off
-setlocal
-
-pushd BPBIOS && call Build || exit /b & popd

Source/BuildFZ80.cmd

@@ -1,4 +0,0 @@
-@echo off
-setlocal
-
-pushd FZ80 && call Build || exit /b & popd

Source/BuildMSX.cmd

@@ -0,0 +1,4 @@
+@echo off
+setlocal
+
+pushd MSX && call Build || exit /b & popd

Source/BuildSZ80.cmd

@@ -0,0 +1,4 @@
+@echo off
+setlocal
+
+pushd SZ80 && call Build || exit /b & popd

Source/BuildShared.cmd

@@ -11,6 +11,7 @@ pushd ZSDOS && call Build || exit /b & popd
 pushd ZSDOS2 && call Build || exit /b & popd
 pushd CPM3 && call Build || exit /b & popd
 pushd ZPM3 && call Build || exit /b & popd
+pushd BPBIOS && call Build || exit /b & popd
 pushd CPNET && call Build || exit /b & popd
 pushd pSys && call Build || exit /b & popd
 pushd Apps && call Build || exit /b & popd

Source/CBIOS/cbios.asm

@@ -3201,8 +3201,9 @@ MAKDPH0:	; HANDLE RAM/ROM
 	CP	DIODEV_MD	; RAM/ROM DISK?
 	JR	Z,MAKDPH0	; HANDLE SPECIAL
 	LD	DE,DPB_FD144	; PRELOAD FLOPPY DPB
-	CP	DIODEV_FD	; FLOPPY?
-	JR	Z,MAKDPH1	; IF SO, PROCEED TO DPH CREATION
+	;CP	DIODEV_FD	; FLOPPY?
+	BIT	7,C		; FLOPPY?
+	JR	NZ,MAKDPH1	; IF SO, PROCEED TO DPH CREATION
 	LD	DE,DPB_RF	; PRELOAD RAM FLOPPY DPB
 	CP	DIODEV_RF	; RAM FLOPPY?
 	JR	Z,MAKDPH1	; IF SO, PROCEED TO DPH CREATION
@@ -3381,7 +3382,7 @@ DEVUNK		.DB	"UNK$"
 	RST	08		; CALL HBIOS
 	LD	A,D		; RESULTANT DEVICE TYPE
 	PUSH	DE		; NEED TO SAVE UNIT NUMBER (IN E)
-	AND	$0F		; ISOLATE DEVICE BITS
+	AND	$1F		; ISOLATE DEVICE BITS
 	ADD	A,A		; MULTIPLY BY TWO FOR WORD TABLE
 	LD	HL,DEVTBL	; POINT TO START OF DEVICE NAME TABLE
 	CALL	ADDHLA		; ADD A TO HL TO POINT TO TABLE ENTRY
@@ -3407,6 +3408,7 @@ DEVTBL:	; DEVICE TABLE
 	.DW	DEV04, DEV05, DEV06, DEV07
 	.DW	DEV08, DEV09, DEV10, DEV11
 	.DW	DEV12, DEV13, DEV14, DEV15
+	.DW	DEV16, DEV17
 ;
 DEVUNK	.DB	"???$"
 DEV00	.DB	"MD$"
@@ -3424,7 +3426,9 @@ DEV11	.DB	"IMM$"
 DEV12	.DB	"SYQ$"
 DEV13	.DB	"CHUSB$"
 DEV14	.DB	"CHSD$"
-DEV15	.EQU	DEVUNK
+DEV15	.DB	"USB$"
+DEV16	.DB	"ESPSD$"
+DEV17	.EQU	DEVUNK
 ;
 #ENDIF
 ;

Source/Clean.cmd

@@ -26,3 +26,4 @@ pushd Doc && call Clean & popd
 pushd ZRC && call Clean & popd
 pushd Z1RCC && call Clean & popd
 pushd ZZRCC && call Clean & popd
+pushd MSX && call Clean & popd

Source/Doc/Applications.md

@@ -1332,6 +1332,11 @@ Use `CLRDIR` with caution as changes made to disks by `CLRDIR` cannot be undone.
 If `CLRDIR` is used on disk containing data then the directory area will be
 reinitialised and the data previously stored will be lost.
 
+**WARNING**: Earlier versions of the `CLRDIR` application do not
+appear to check for disk errors when it runs.  If you attempt to run
+`CLRDIR` on a drive that is mapped to a slice that does not actually fit
+on the physical disk, it may behave erratically.
+
 `\clearpage`{=latex}
 
 ## CPUSPD (CPU Speed)
@@ -1431,7 +1436,7 @@ The source code is provided in the RomWBW distribution.
 The purpose of this utility is to allow the copying of whole disk slices
 from one disk slice to another slice
 
-This tool is only supported by RomWBW HBIOS, it uses HDIOS for all its
+This tool is only supported by RomWBW HBIOS, it uses HBIOS for all its
 disk IO. UNA UBIOS is not supported by this tool.
 
 This tool is running on CP/M 2.2 or 3.0 and has access to full 64kb of
@@ -1724,7 +1729,7 @@ to format and test floppy disk media.
 
 #### Syntax
 
-`FDU`
+| `FDU`
 
 #### Usage
 
@@ -1845,7 +1850,7 @@ make it simpler to format media including floppy disks.
 
 #### Syntax
 
-`FORMAT`
+| `FORMAT`
 
 #### Notes
 
@@ -1872,16 +1877,16 @@ against HBIOS Character Units.
 
 #### Syntax
 
-`HTALK COMn:`
+| `HTALK `*<unit>*
 
 #### Usage
 
 `HTALK` operates at the HBIOS level.
 
-The parameter to `TALK` refers to a HBIOS character unit.  Upon
-execution all characters typed at the console will be sent to the
-device specified and all characters received by the specified device
-will be echoed on the console.
+The *<unit>* parameter to `TALK` is a single number referring to an HBIOS 
+character unit.  Upon execution all characters typed at the console will
+be sent to the device specified and all characters received by the 
+specified device will be echoed on the console.
 
 Press Control+Z on the console to terminate the application.
 
@@ -1908,8 +1913,8 @@ ports dynamically.
 
 #### Syntax
 
-`MODE /?`
-`MODE COM`*`<n>`*`: [`*`<baud>`*`[,`*`<parity>`*`[,`*`<databits>`*`[,`*`<stopbits>`*`]]]] [/P]`
+| `MODE /?`
+| `MODE COM`*`<n>`*`: [`*`<baud>`*`[,`*`<parity>`*`[,`*`<databits>`*`[,`*`<stopbits>`*`]]]] [/P]`
 
 `/?` displays command usage and version information
 
@@ -2024,7 +2029,7 @@ and set the time and registers of the RTC.
 
 #### Syntax
 
-`RTC`
+| `RTC`
 
 #### Usage
 
@@ -2083,7 +2088,7 @@ the `SET` command
 
 #### Syntax
 
-`SLABEL [unit.slice=label] [/?]`
+| `SLABEL [unit.slice=label] [/?]`
 
 `unit.slice` the disk unit and slice number to apply the new label to. This 
 is in the same format as when booting the system to a disk
@@ -2411,7 +2416,7 @@ shown on your console.  The `TALK` application does this.
 
 #### Syntax
 
-`TALK [TTY:|CRT:|BAT:UC1:]`
+| `TALK [TTY:|CRT:|BAT:|UC1:]`
 
 #### Usage
 
@@ -2448,7 +2453,7 @@ Z80 port of Palo Alto Tiny Basic.
 
 #### Syntax
 
-`TBASIC` [*\<filename\>*]
+| `TBASIC` [*\<filename\>*]
 
 #### Usage
 
@@ -2479,9 +2484,10 @@ displays the value of the counter.
 
 #### Syntax
 
-`TIMER`
-`TIMER /?`
-`TIMER /C`
+| `TIMER`
+| `TIMER /?`
+| `TIMER /C`
+| `TIMER /Z`
 
 #### Usage
 
@@ -2489,9 +2495,11 @@ Use `TIMER` to display the current value of the counter.
 
 Use `TIMER /C` to display the value of the counter continuously.
 
+Use `TIMER /Z` to zero the seconds counter.
+
 The display of the counter will be something like this:
 
-`13426 Ticks     268.52 Seconds`
+`2859 Ticks   24.18 Seconds   0:00:24.18 HH:MM:SS`
 
 The first number is the total number of ticks since system startup, where
 there are 50 ticks per second. The second number is the total number of
@@ -2499,15 +2507,18 @@ seconds since system startup. Numbers are displayed in decimal format.
 
 #### Notes
 
-The seconds value is displayed with a fractional value which is not a
-an actual fraction, but rather the number of ticks past the seconds
-rollover.  All values are in hex.
+Not all systems will have a system timer.  In this case, the
+`TIMER` command will output 0 for both ticks and seconds and never
+increment.
+
+The resolution of the timer is determined by the system timer
+frequency which is typically 50Hz.  This means that the seconds
+fraction will increment 0.02 seconds with each timer tick.
 
 The primary use of the `TIMER` application is to test the system
-timer functionality of your system.
-
-In theory, you could capture the value before and after some process
-you want to time.
+timer functionality of your system.  However, it can be used to
+capture the value before and after some process you want to measure
+elapsed runtime.
 
 #### Etymology
 
@@ -2532,7 +2543,7 @@ whether support for it is included in the RomWBW HBIOS configuration
 
 #### Syntax
 
-`TUNE `*`<filename>`* `*`<options>`*`
+| `TUNE `*`<filename>`* `*`<options>`*`
 
 *`<filename>`* is the name of a sound file ending in .PT2, .PT3, or
 .MYM
@@ -2667,7 +2678,7 @@ chips.
 
 #### Syntax
 
-`VGMPLAY `*`<filename>`*
+| `VGMPLAY `*`<filename>`*
 
 *`<filename>`* is the name of a sound file ending in .VGM
 
@@ -2910,7 +2921,7 @@ to Z-System compatibility.
 
 #### Syntax
 
-`ZMD` *\<mode\>\<protocol\>\<unit\>* [*\<filename\>*]
+| `ZMD` *\<mode\>\<protocol\>\<unit\>* [*\<filename\>*]
 
 where *\<mode\>* can be:\
 **`   S  -`** Send file from BBS \
@@ -2954,17 +2965,17 @@ emulation software for specific instructions on how to use XModem.
 
 #### Notes
 
-The ZMP adaptation that comes with RomWBW will default to using
+The ZMD adaptation that comes with RomWBW will default to using
 the current HBIOS console port for transfers.  Note that if you
 change your console port at the OS level (e.g., STAT CON:=UC1:),
 this does not change the HBIOS console.
 
-`ZMP` attempts to determine the best way to drive the serial port based
+`ZMD` attempts to determine the best way to drive the serial port based
 on your hardware configuration. When possible, it will bypass the
 HBIOS for faster operation. However, in many cases, it will use HBIOS
 so that flow control can be used.
 
-`ZMP` is dependent on a reliable communications channel. You must
+`ZMD` is dependent on a reliable communications channel. You must
 ensure that the serial port can be serviced fast enough by either
 using a baud rate that is low enough or ensuring that hardware flow
 control is fully functional (end to end).
@@ -2990,7 +3001,7 @@ that is independent of the console running `ZMP`.
 
 #### Syntax
 
-`ZMD` *[\<unit\>]*
+| `ZMD` *[\<unit\>]*
 
 *\<unit\>* can specify a single digit (0-9) indicating
 the RomWBW Character Unit to use for the modem port.

Source/Doc/Catalog.md

@@ -729,6 +729,7 @@ distribution.  Some provide command line help themselves.  Some are fairly obvio
 | `CRUNCH28.CFG` |                   | ZCNFG configuration file for CRUNCH & UNCR             |                                            
 | `DDTZ.COM`     |                   | Z80 debug tool (modified to use RST 6)                 |                                             
 | `DDTZ.DOC`     |                   | Documentation for DDTZ                                 |  
+| `DOWNLOAD.COM` | Grant Searle      | Grant Searle's DOWNLOAD, used by File Packager         |  
 | `EX.COM`       |                   | Batch file processor (alternative to DRI SUBMIT)       |  
 | `FIND.COM`     | Jay Cotton        | Search all drives for a file ()                        |  
 | `GENHEX.COM`   |                   | Generates an Intel Hex file from the input file        |  
@@ -769,7 +770,7 @@ distribution.  Some provide command line help themselves.  Some are fairly obvio
 
 ## OS General Files
 
-The following files are spcific files share across several OS's.  
+The following files are specific files shared across several OS's.  
 In general, there is no documentation for these applications included with 
 the RomWBW distribution.  Some provide command line help themselves.  
 Some are fairly obvious.
@@ -788,6 +789,7 @@ The following files are found in
 | `COPY.COM`     | Z                 | File copier with ZSDOS date stamping awareness        |
 | `COPY.CFG`     | Z                 | ZCNFG configuration file for COPY application         |
 | `EDITNDR.COM`  | Z3                | Edit named directory register in memory.              |
+| `HELLO.ASM`    | CPM22             | Sample assembly language source file                  |
 | `HP-RPN.HLP`   | Z3                | Help File for ZP.COM - HP RPN Calculators             |
 | `HP-ZP.HLP`    | Z3                | Help File for ZP.COM - HP ZP Calculators              |
 | `KERCPM22.COM` | CPM22             | Kermit communication application                      |
@@ -1121,7 +1123,7 @@ The following files are found in
 | `TESTAS.SUB`   | SUBMIT file to build TESTAS sample program |
 | `Z80AS.COM`    | Z80 assembler which assembles the output of COWFIX and other Z80 source files (see <https://github.com/Laci1953/Z80AS>) |
 
-## Microsoft Fortran 80 (Fortran)
+## Microsoft Fortran 80
 
 | Floppy Disk Image: **fd_fortran.img**
 | Hard Disk Image: **hd_fortran.img**
@@ -1237,6 +1239,7 @@ The following files are found in
 | `DRTCPM.OBJ`   | Startup Object File (???) |
 | `EXEC.H`       | Language include file (see manual) |
 | `FLOAT.H`      | Language include file (see manual) |
+| `HELLO.C`      | Sample C source file |
 | `HITECH.H`     | Language include file (see manual) |
 | `LIBC.LIB`     | Standard C Runtime Library |
 | `LIBF.LIB`     | Floating Point Library |
@@ -1267,6 +1270,107 @@ The following files are found in
 | `UNIXIO.H`     | Language include file (see manual) |
 | `ZAS.COM`      | The assembler - in fact a general purpose macro  assembler |
 
+## Infocom (Text Adventure Games)
+
+| Hard Disk Image: **hd_infocom.img**
+
+A collection of all Official releases of the interactive fiction games
+produced by Infocom in the 1980's
+
+The following files are found in
+
+*  /Source/Images/d_infocom
+
+| **File**     | **Description**                                    |
+|--------------|----------------------------------------------------|
+| amfv.z4      | A Mind Forever Voyaging (*)                        |
+| arthur.z6    | Arthur - The Quest for Excalibur (*)               |
+| ballyhoo.z3  | Ballyhoo                                           |
+| beyond.z5    | Beyond Zork (*)                                    |
+| border.z5    | Border Zone (*)                                    |
+| bureau.z4    | Bureaucracy (*)                                    |
+| cutthr.z3    | Cutthroats                                         |
+| deadline.z3  | Deadline                                           |
+| enchant.z3   | Enchanter                                          |
+| h2g2.z3      | The Hitchhiker's Guide to the Galaxy               |
+| hollyw.z3    | Hollywood Hijinx                                   |
+| infidel.z3   | Infidel                                            |
+| journey.z6   | Journey (*)                                        |
+| leather.z3   | Leather Goddesses of Phobos                        |
+| lurking.z3   | The Lurking Horror                                 |
+| moonmist.z3  | Moonmist                                           |
+| nordbert.z4  | Nord and Bert Couldn't Make Head or Tail of It (*) |
+| planet.z3    | Planetfall                                         |
+| plunder.z3   | Plundered Hearts                                   |
+| readme.txt   | Documentation about the Infocom games              |
+| seastalk.z3  | Seastalker                                         |
+| sherlock.z5  | Sherlock (*)                                       |
+| shogun.z6    | Shogun (*)                                         |
+| sorcerer.z3  | Sorcerer                                           |
+| spellb.z3    | Spellbreaker                                       |
+| starcros.z3  | Starcross                                          |
+| stationf.z3  | Stationfall                                        |
+| suspect.z3   | Suspect                                            |
+| suspend.z3   | Suspended                                          |
+| trinity.z4   | Trinity (*)                                        |
+| wishb.z3     | Wishbringer                                        |
+| witness.z3   | Witness                                            |
+| zork0.z6     | Zork Zero (*)                                      |
+| zork1.z3     | Zork I                                             |
+| zork2.z3     | Zork II                                            |
+| zork3.z3     | Zork III                                           |
+| zorknote.txt | Documentation about terminal config of COM files   |
+
+The above games have been curated from here <https://eblong.com/infocom/>.
+Full game documentation can be found here <https://infodoc.plover.net/>
+
+The game files are a virtual machine code commonly known as Z-Machine, they
+are portable and will run on any machine that has a Z-Machine interpreter.
+
+* All the Z3 games come with the official CP/M interpreter (the `COM` file) 
+  version C last updated by Inforcom on 5th Feb 1985. You can simply run the
+  game by running it from the `COM` program  
+* All latter games Z4, Z5,.. and above, (Marked as * in the listing above)
+  are more sophisticated and require a better interpreter. i.e. VEZZA. 
+
+#### VEZZA (User Area 15)
+
+Vezza is a modern Infocom/Inform/Z-machine text adventure interpreter for 8 bit
+z80 based computers.  What makes it modern is that it is written in hand-crafted
+z80 assembler for maximum speed, and can load not only the classics such as
+Zork 1,2 and 3 but also the later games.
+
+It can run Z1 up to Z8 inform format interactive fiction game files. To run 
+a game with Vezza just type Vezza followed by the game you want to run. e.g.
+
+`VEZZA ZORK0.Z6`
+
+**Note:** One of the bigger constraints is available RAM. An OS such as ZPM
+since it uses banked RAM does have a good amount of available RAM and was 
+used to test these games work.
+
+This tool is free but the developer accepts your support by letting
+you pay what you think is fair for the tool. If you find this useful
+consider donating at: 
+
+<https://sijnstra.itch.io/vezza>
+
+You should (test and) choose one that works on you configuration,
+and best to copy and rename it as vezza.com
+
+| **File**     | **Description**                                                   |
+|--------------|-------------------------------------------------------------------|
+| vezza-B.com  | 80x24, VT52 + Banked CP/M 3                                       |
+| vezza-FG.com | 80x25, VT100/ANSI (16 color) + CP/M 3                             |
+| vezza-C2.com | 80x24, VT100 - CP/M 2.2 large memory, no timed input              |
+| vezza-CC.com | 80x24, VT100 (256 colour) - CP/M 2.2 large memory, no timed input |
+| vezza-AV.com | 80x24, VT100 (16 colour) - CP/M 2.2 high RAM.                     |
+| vezza-AX.com | 80x25, VT100/ANSI (16 colour) - CP/M 2.2 high RAM.                |
+| vezza-RW.com | 80x24, VT100 - CP/M 2.2                                           |
+
+The above is a subset of available builds. The full repository including 
+documentation is available at <https://gitlab.com/sijnstra1/vezza/>
+
 ## MSX ROMS
 
 | Hard Disk Image: **hd_msxroms1.img**
@@ -1329,7 +1433,7 @@ The following files are found in
 | `TURBO.OVR`    | Part of TURBO Pascal           |
 | `TURBOMSG.OVR` | Part of TURBO Pascal           |
 
-## WordStar 4
+## WordStar 4 (Word processor)
 
 | Floppy Disk Image: **fd_ws4.img**
 | Hard Disk Image: **hd_ws4.img**

Source/Doc/Hardware.md

@@ -116,9 +116,11 @@ Others
 | [eZ80 for RCBus Module]^8^, 512K RAM/ROM                    | RCBus    | RCEZ80_std.rom              |        115200 |
 | [Genesis Z180 System]^7^                                    | STD      | GMZ180_std.rom              |        115200 |
 | [Heath H8 Z80 System]^5^                                    | H8       | HEATH_std.rom               |        115200 |
+| [MSX]^9^                                                    | MSX      | MSX_std.rom                 |        115200 |
 | [NABU w/ RomWBW Option Board]^5^                            | NABU     | NABU_std.rom                |        115200 |
 | [S100 Computers Z180 SBC]^4^                                | S100     | S100_std.rom                |         57600 |
-| [S100 Computers FPGA Z80 SBC]^4^                            | S100     | FZ80_std.rom                |          9600 |
+| [S100 Computers Z80 CPU]^4^                                 | S100     | SZ80_std.rom                |          9600 |
+| [S100 Computers FPGA Z80 SBC]^4^                            | S100     | SZ80_fpga.rom               |          9600 |
 | [UNA Hardware BIOS]^1^                                      | -        | UNA_std.rom                 |             - |
 | [Z80-Retro SBC]^3^                                          | -        | Z80RETRO_std.rom            |         38400 |
 | [Z180 Mark IV SBC]^1^                                       | ECB      | MK4_std.rom                 |         38400 |
@@ -131,6 +133,7 @@ Others
 | ^6^Designed by Alan Cox
 | ^7^Designed by Doug Jackson
 | ^8^Designed by Dean Netherton
+| ^9^MSX Port by Henk Berends
 
 `\clearpage`{=latex}
 
@@ -414,14 +417,56 @@ of the SIO ports, for ease of use with modern computers.
 
 `\clearpage`{=latex}
 
-## S100 Computers FPGA Z80 SBC
+## S100 Computers
+
+### S100 Computers Z80 CPU
+
+Z80-based S100 Modular System
+
+* Creator: John Monahan
+* Website: [S100 Computers Z80 CPU](http://www.s100computers.com/My%20System%20Pages/Z80%20Board/Z80%20CPU%20Board.htm)
+
+#### ROM Image File:  SZ80_std.rom
+
+|                   |               |
+|-------------------|---------------|
+| Bus               | S100          |
+| Default CPU Speed | 8.000 MHz     |
+| Interrupts        | None          |
+| System Timer      | None          |
+| Serial Default    | 9600 Baud     |
+| Memory Manager    | SZ80          |
+| ROM Size          | 0 KB          |
+| RAM Size          | 512 KB        |
+
+#### Supported Hardware
+
+- SCON: IO=0
+- ESPSD: IO=128, PRIMARY
+- ESPSD: IO=128, SECONDARY
+- MD: TYPE=RAM
+- PPIDE: MODE=STD, IO=48, MASTER
+- PPIDE: MODE=STD, IO=48, SLAVE
+- PPIDE: MODE=S100A, IO=56, MASTER
+- PPIDE: MODE=S100A, IO=56, SLAVE
+- PPIDE: MODE=S100B, IO=56, MASTER
+- PPIDE: MODE=S100B, IO=56, SLAVE
+- SD: MODE=FZ80, IO=108, UNITS=2
+
+#### Notes:
+
+- Requires Propeller Console Board (or equivalent)
+
+`\clearpage`{=latex}
+
+### S100 Computers FPGA Z80 SBC
 
 An FPGA Z80 based S100 SBC
 
-* Creator: John Monahan                                                                           |
+* Creator: John Monahan
 * Website: [S100 Computers FPGA Z80 SBC](http://www.s100computers.com/My%20System%20Pages/FPGA%20Z80%20SBC/FPGA%20Z80%20SBC.htm)
 
-#### ROM Image File:  FZ80_std.rom
+#### ROM Image File:  SZ80_fpga.rom
 
 |                   |               |
 |-------------------|---------------|
@@ -436,21 +481,26 @@ An FPGA Z80 based S100 SBC
 
 #### Supported Hardware
 
-- FP: LEDIO=255
 - DS5RTC: RTCIO=104, IO=104
 - SSER: IO=52
 - LPT: MODE=S100, IO=199
 - FV: IO=192, KBD MODE=FV, KBD IO=3
 - KBD: ENABLED
 - SCON: IO=0
+- ESPSD: IO=128, PRIMARY
+- ESPSD: IO=128, SECONDARY
 - MD: TYPE=RAM
-- PPIDE: IO=48, MASTER
-- PPIDE: IO=48, SLAVE
+- PPIDE: MODE=STD, IO=48, MASTER
+- PPIDE: MODE=STD, IO=48, SLAVE
+- PPIDE: MODE=S100A, IO=56, MASTER
+- PPIDE: MODE=S100A, IO=56, SLAVE
+- PPIDE: MODE=S100B, IO=56, MASTER
+- PPIDE: MODE=S100B, IO=56, SLAVE
 - SD: MODE=FZ80, IO=108, UNITS=2
 
 #### Notes:
 
-- Requires matching FPGA code
+- Requires matching FPGA code, see [S100 Projects RomWBW T35 Project](https://github.com/s100projects/ROMWBW_T35).
 
 `\clearpage`{=latex}
 
@@ -577,6 +627,47 @@ It also has an interface to the RetroBrew bus (ECB) for access to additional per
 
 `\clearpage`{=latex}
 
+## MSX
+
+Support for standard MSX hardware by Henk Berends
+
+The default configuration is for a European MSX 2 (PAL) with international keyboard and 512KB RAM Mapper extension.
+
+#### ROM Image File:  MSX_std.rom
+
+|                   |               |
+|-------------------|---------------|
+| Bus               | MSX           |
+| Default CPU Speed | 3.579 MHz     |
+| Interrupts        | Mode 1        |
+| System Timer      | TMS           |
+| Serial Default    | 115200 Baud   |
+| Memory Manager    | MSX           |
+| ROM Size          | 0 KB          |
+| RAM Size          | 448 KB        |
+
+#### Supported Hardware
+
+- RP5C01: IO=180
+- UART: IO=128
+- UART: IO=136
+- TMS: MODE=MSXMKY, IO=152, SCREEN=80X24, KEYBOARD=MKY, INTERRUPTS ENABLED
+- MKY: IO=168
+- MD: TYPE=RAM
+- IDE: MODE=RC, IO=16, MASTER
+- IDE: MODE=RC, IO=16, SLAVE
+- PPIDE: MODE=MSX_BEER, IO=48, MASTER
+- PPIDE: MODE=MSX_BEER, NO SLAVE
+- AY38910: MODE=MSX, IO=160, CLOCK=1789772 HZ
+
+#### Notes:
+
+- MSX 1 can be used with the TMS VDP set to 40 columns mode.
+- Storage options are the BEER IDE and SODA IDE interfaces.
+- Serial option is a 16550 UART interface.
+
+`\clearpage`{=latex}
+
 ## NABU w/ RomWBW Option Board
 
 No modifications to the NABU motherboard needed. Leave the standard NABU ROM in its socket 
@@ -1766,6 +1857,13 @@ as defined by the IEEE-696 specs.
 - MD: TYPE=RAM
 - MD: TYPE=ROM
 - SD: MODE=SC, IO=12, UNITS=1
+- ESPSD: IO=128, PRIMARY
+- ESPSD: IO=128, SECONDARY
+- ESPSD occupies 995 bytes.
+- PPIDE: MODE=S100A, IO=48, MASTER
+- PPIDE: MODE=S100A, IO=48, SLAVE
+- PPIDE: MODE=S100B, IO=48, MASTER
+- PPIDE: MODE=S100B, IO=48, SLAVE
 
 #### Notes:
 
@@ -2266,6 +2364,7 @@ the active platform and configuration.
 | RF        | RAM Floppy Disk Interface                              |
 | SD        | SD Card Interface                                      |
 | SYQ       | Iomega SparQ Drive on PPI                              |
+| ESPSD     | S100 ESP32-based SD Card Interface                     |
 
 ## Video
 

Source/Doc/Introduction.md

@@ -71,7 +71,7 @@ Some of the included software:
 * Support for other operating systems, p-System, FreeRTOS, and FUZIX.
 * Programming Tools (Z80ASM, Turbo Pascal, Forth, Cowgol)
 * C Compiler's including Aztec-C, and HI-TECH C
-* Microsoft Basic Compiler, and Microsoft Fortran
+* Microsoft Basic Compiler, Microsoft Fortran, and Microsoft COBOL
 * Some games such as Colossal Cave, Zork, etc
 * Wordstar Word processing software
 
@@ -273,8 +273,11 @@ please let me know if I missed you!
 
 * Tasty Basic is a product of Dimitri Theulings.
 
-* Dean Netherton contributed eZ80 CPU support, the sound driver
-  interface, and the SN76489 sound driver.
+* Dean Netherton contributed multiple components:
+  - eZ80 CPU support
+  - Sound driver infrastructure
+  - SN76489 sound driver
+  - Native USB driver (keyboard, floppy, mass storage)
 
 * The RomWBW Disk Catalog document was produced by Mykl Orders.
 
@@ -290,8 +293,10 @@ please let me know if I missed you!
   - significant content in the Disk Catalog and User Guide
   - creation of the Introduction and Hardware documents
   - Z3PLUS operating system disk image
+  - Infocom text adventure game disk image
   - COPYSL, and SLABEL utilities
   - Display of bootable slices via "S" command during startup
+  - Optimisations of HBIOS and CBIOS to reduce overall code size
   - a feature for RomWBW configuration by NVRAM
   - the /B bulk mode of disk assignment to the ASSIGN utility
 
@@ -334,6 +339,14 @@ please let me know if I missed you!
 * Jörg Linder has contributed disassembled and nicely commented
   source for ZSDOS2 and the BPBIOS utilities.
 
+* Marshall Gates has contriubed sample program source files for all
+  of the language disk images.
+
+* Randy Merkel provided the ZSDOS Programmer's Manual as translated
+  by Wayne Hortensius.
+
+* Henk Berends added support for the MSX platform.
+
 `\clearpage`{=latex}
 
 ## Related Projects

Source/Doc/SystemGuide.md

@@ -659,8 +659,10 @@ latter version of the SBC.
 On systems with RTC devices (that have Non-Volatile RAM), RomWBW supports storing
 some limited configuration option options inside this RAM.
 
-Several configuration options are currently supported; these are known as Switches.
-The following switch ID's are defined, and described in sections below.
+Several configuration options are currently supported; these are 
+referred to as Switches. In this case the term Switches refers to "soft"
+switches stored in NVRAM, not physical panel switches. The following 
+switch ID's are defined, and described in sections below.
 
 | Switch Number | Name         | Description                                   |      
 |---------------|--------------|-----------------------------------------------|      
@@ -683,6 +685,11 @@ the bytes in NVRAM to check for authenticity before using the configuration.
 The above data is copied into the HBIOS Configuration Block (HCB) at startup at 
 the location starting at CB_SWITCHES.
 
+Although the switch data is stored in NVRAM, it is intended that you
+use [SYSGET Subfunction 0xC0 -- Get Switches (SWITCH)] or
+[SYSSET Subfunction 0xC0 -- Set Switches (SWITCH)] to read or write
+the switch values described here.
+
 ### Boot Options (NVSW_BOOTOPTS) 
 
 16 bit Switch defining the ROM application or Disk device to boot if
@@ -705,13 +712,15 @@ automatic booting is enabled.
 
 ### Status Reset (0xFF)
 
-The Status Reset switch is not a general purpose switch, it is a control mechanism
-to allow the global status of all switches to be determined. The meaning of the switch
-is different for Read (Get Status) and Write (Reset NVRAM)
+The Status Reset switch is a virtual switch that does not have a 
+corresponding stored value.  It is a control mechanism to allow the 
+global status of all switches to be determined. The meaning of the 
+switch is different for Read (Get Status) and Write (Reset NVRAM)
 
 #### GET (Get Status)
 
-The read Get Status of switches. This returns very specific values from the function call.
+When the switch number 0xFF is read (using the Get Switches function),
+the status of the NVRAM switches will be returned as follows:
 
 | Status                                       | A Register | Z / NZ Flag  |
 |----------------------------------------------|------------|--------------|
@@ -721,8 +730,10 @@ The read Get Status of switches. This returns very specific values from the func
 
 #### SET (Reset NVRAM)
 
-Reset NVRAM to default values. This will wipe any existing data and set default
-values into NVRAM.
+When the switch number 0xFF is written (using the Set Switches 
+function), the stored values of all switches will be reset to their 
+default values.  This will wipe any existing data and set default values
+into NVRAM.
 
 # Driver Model
 
@@ -1088,6 +1099,8 @@ below enumerates their values.
 | DIODEV_SYQ      | 0x0C   | Syquest Sparq Disk                       | syq.asm    |
 | DIODEV_CHUSB    | 0x0D   | CH375/376 USB Disk                       | ch.asm     |
 | DIODEV_CHSD     | 0x0E   | CH375/376 SD Card                        | ch.asm     |
+| DIODEV_USB      | 0x0F   | CH376 Native USB Device                  | ch376.asm  |
+| DIODEV_ESPSD    | 0x10   | S100 ESP32 SD Card                       | espsd.asm  |
 
 A fixed set of media types are defined. The currently defined media 
 types identifiers are listed below. Each driver will support one or
@@ -1528,9 +1541,9 @@ Work in progress, documentation required...
 Returns device information for the RTC unit.  The Status (A) is a 
 standard HBIOS result code.
 
-Device Attribute (C) values are not yet defined.  Device Type (D) 
-indicates the specific hardware driver that handles the specified 
-character unit.  Values are listed at the start of this section. Device 
+Device Attributes (C) values are not yet defined.  Device Type (D) 
+indicates the specific hardware driver that handles the RTC unit.
+Values are listed at the start of this section.  Device 
 Number (E) indicates the physical device number assigned per driver 
 which is always 0 for RTC.
 
@@ -2276,16 +2289,16 @@ using values that correspond to musical notes.  The frequency will be
 applied when the next SNDPLAY function is invoked.  The returned Status 
 (A) is a standard HBIOS result code.
 
-The Note (HL) values correspond to quarter notes.  Increasing/decreasing
-the value by 4 results in a full note increment/decrement.  
+The Note (HL) values correspond to eighth tones.  Increasing/decreasing
+the value by 8 results in a full tone increment/decrement.  
 Increasing/decreasing the value by 48 results in a full octave 
 increment/decrement.  The value 0 corresponds to Bb/A# in octave 0.
 
 The sound chip resolution and its oscillator limit the range and 
 accuracy of the notes played. The typical range of the AY-3-8910 is six 
 octaves: Bb2/A#2 to A7, where each value is a unique tone.  Values above
-and below can still be played but each quarter tone step may not result
-in a note change.
+and below can still be played but each eighth tone step may not result
+in a tone change.
 
 The following table shows the mapping of the Note (HL) value to the 
 corresponding octave and note.
@@ -2504,9 +2517,8 @@ If the Unit specified is not a hard disk the Media ID will be returned and
 the slice parameter ignored. If there is no media in device, or the slice
 number is invaid (Parameter Out Of Range) the function will return an error status.
 
-**NOTE:
-This function was placed in HBIOS to be shared between the diffeent CP/M
-varients supported by RomWBW. It is not strictly a BIOS function,
+**NOTE:** This function was placed in HBIOS to be shared between the different CP/M
+variants supported by RomWBW. It is not strictly a BIOS function,
 and may be moved in future.
 
 `\clearpage`{=latex}

Source/Doc/UserGuide.md

@@ -992,10 +992,10 @@ whether you boot your OS from ROM or from the disk media itself.
 
 ## Drive Letter Assignment
 
-In legacy CP/M operating systems only 16 drive letters (A:-P:) available
- to be assigned to disks Drive letters were generally mapped to disk 
+In CP/M operating systems only 16 drive letters (A:-P:) available
+to be assigned to disks Drive letters were generally mapped to disk 
 drives in a completely fixed way. For example, drive A: would **always**
- refer to the first floppy disk drive.
+refer to the first floppy disk drive.
 
 RomWBW implements a much more flexible drive letter assignment mechanism 
 so that any drive letter can dynamically be assigned to any disk device, 
@@ -1117,100 +1117,6 @@ starting the operating system.  Even better, you can use an auto-submit
 batch file to customzie the assignments at startup without any user
 intervention.
 
-## Disk Operations/Commands
-
-With some understanding of how RomWBW presents disk space to the
-operating systems, we need to go over the options for actually setting
-up your disk(s) with content.
-
-### Preparing Media for First Use
-
-You can initialize the media in-place using your RomWBW system.
-Essentially, this means you are creating a set of blank directories on
-your disk so that files can be saved there.
-This is somewhat analogous to partitioning of a hard disk
-or doing a low level format of a floppy disk.
-
-Initilizing a Floppy disk is covered in the section [Floppy Disk Formatting],
-or for a Hard disk the section [Hard Disk Preparation] covers the steps to 
-manually setup a hard disk for first use. 
-
-### Clearing (Formatting) Drives 
-
-This is somewhat analogous to doing a FORMAT operation on other systems.
-
-With RomWBW you use the `CLRDIR` command to do this.
-This command is merely "clearing out" the directory space of the drive
-referred to by a drive letter and setting up the new empty directory.
-
-Refer to $doc_apps$ for more information on use of the `CLRDIR` command.
-
-Since `CLRDIR` works on drive letters, make
-absolutely sure you know what media and slice are assigned to that
-drive letter before using `CLRDIR` because `CLRDIR` will wipe out any
-pre-existing contents of the slice.
-
-After `CLRDIR` completes, the slice should be ready to use by the operating
-system via the drive letter assigned.
-Start by using the `DIR` command on the drive.
-This should return without error, but list no files.
-
-Here is an example of using `CLRDIR`.  In this example, the `ASSIGN`
-command is used to show the current drive letter assignments.  Then
-the `CLRDIR` command is used to initialize the directory of drive 'G'
-which is slice 2 of hard disk device IDE0 ("IDE0:2").
-
-```
-B>ASSIGN
-
-   A:=MD0:0
-   B:=MD1:0
-   C:=FD0:0
-   D:=FD1:0
-   E:=IDE0:0
-   F:=IDE0:1
-   G:=IDE0:2
-   H:=IDE0:3
-
-B>CLDIR G:
-CLRDIR Version 1.2B May 2024 by Max Scane
-
-Warning - this utility will overwrite the directory sectors of Drive: G
-Type CAPITAL Y to proceed, any key other key to exit. Y
-Directory cleared.
-B>
-```
-
-### Checking Disk Layout
-
-If you are not sure which disk layout is used for your existing
-media, you can use the CP/M 2.2 `STAT` command to display information
-including the number of "32  Byte Directory Entries"
-for a drive letter on the corresponding hard disk.  
-
-- If it indicates 512, your disk layout is legacy (hd512).  
-- If it indicates 1024, your disk layout is modern (hd1k).
-
-Here is an example of checking the disk layout.  
-
-```
-B>STAT E:DSK:
-
-    E: Drive Characteristics
-65408: 128 Byte Record Capacity
- 8176: Kilobyte Drive  Capacity
- 1024: 32  Byte Directory Entries
-    0: Checked  Directory Entries
-  256: Records/ Extent
-   32: Records/ Block
-   64: Sectors/ Track
-    2: Reserved Tracks
-```
-
-It is critical that you include `DSK:` after the drive letter in the
-`STAT` command line.  The important line to look at is labeled "32 Byte
-Directory Entries".
-
 # Disk Types
 
 ## RAM & ROM Disks
@@ -1335,14 +1241,14 @@ system.
 Two hard disk layout schemes exist:
 
 * Modern (hd1k)
-* Legacy (hd512)
+* Classic (hd512)
 
 You **cannot** mix disk layouts on a single disk device, 
 however It is perfectly fine for one system to have
 multiple hard disks with different layouts -- each physical disk
 device is handled separately.
 
-If you are setting up a new disk, the modern (hd1k) layout is
+If you are setting up a new disk, the Modern (hd1k) layout is
 recommended for the following reasons:
 
 * Larger number of directory entries per filesystem
@@ -1350,8 +1256,8 @@ recommended for the following reasons:
 * Reduces chances of data corruption
 * Each slice occupies exactly 8MB (an exact power of 2) in size
 
-Both the legacy and modern disk layouts continue to be fully supported
-by RomWBW.  There are no plans to deprecate the legacy layout.  
+Both the classic and modern disk layouts continue to be fully supported
+by RomWBW.  There are no plans to deprecate the classic layout.  
 
 #### Modern Layout
 
@@ -1368,14 +1274,14 @@ RomWBW does not support extended partitions -- only a single
 primary partition can be used.
 
 The existence of a partition table entry for RomWBW on
-a hard disk makes it behave in the modern mode. Removing the RomWBW 
-partition entry from a modern hard disk layout 
+a hard disk makes it behaves in the modern disk layout mode. 
+Removing the RomWBW partition entry from a modern hard disk layout 
 will cause the existing data to be unavailable and/or corrupted
 
 The CP/M filesystem in the slices of the modern disk layout 
 contain 1024 directory entries.
 
-#### Legacy Layout
+#### Classic Layout
 
 Originally, RomWBW always used the very start of the hard disk media
 for the location of the slices.  In this layout, slice 0 referred to
@@ -1384,15 +1290,16 @@ chunk of ~8MB on the disk, and so on. The number of slices is limited
 to the size of the disk media -- if you attempted to read/write to a
 slice that would exceed the disk size, you would see I/O errors. 
 
-The legacy format takes steps to allow a partition table to still be
+The classic disk layout takes steps to allow a partition table to still be
 used for other types of filesystems such as DOS/FAT.  It just does not
 use a partition table entry to determine the start of the RomWBW slices.
 
-The lack of a RomWBW partition table entry will cause legacy behaviour.
-Adding a partition table entry on an existing legacy RomWBW hard disk 
+The lack of a RomWBW partition table entry will cause the classic disk 
+layout to be used.
+Adding a partition table entry on an existing classic RomWBW hard disk 
 will cause the existing data to be unavailable and/or corrupted.
 
-The CP/M filesystem in the slices of the legacy disk layout 
+The CP/M filesystem in the slices of the classic disk layout 
 contain 512 directory entries.
 
 ### Hard Disk Slices
@@ -1466,9 +1373,9 @@ system.
 The exact number of CP/M filesystem slices that will fit on your
 specific physical hard disk can be determined as follows:
 
-- For modern (hd1k) disk layouts, it is 1024KB + (slices * 8192KB). 
+- For Modern (hd1k) disk layouts, it is 1024KB + (slices * 8192KB). 
   Or equivalent to say 1MB + (slices * 8MB).
-- For legacy (hd512) disk layouts, it is slices * 8,320KB.
+- For Classic (hd512) disk layouts, it is slices * 8,320KB.
 
 **WARNING**: In this document KB means 1024 bytes and MB means 1048576
 bytes (frequently expressed as KiB and MiB in modern terminology).
@@ -1499,7 +1406,9 @@ There are two approaches to preparing disks for use by RomWBW.
   including files to a disk.
 
 This section of the document describes the manual process of preparing
-empty disks that are ready for use by an operating system. 
+empty disks that are ready for use by an operating system.
+This is somewhat analogous to partitioning and formatting of a hard disk
+or doing a low level format of a floppy disk.
 
 Alternatively, you can use the pre-built RomWBW disk images to quickly
 create disk media that already has a large selection of files and
@@ -1611,7 +1520,7 @@ This does not mean to imply it is the only possible way.
 
 First you need to understand
 
-*  The disk layout approach (either hd1k or the legacy hd512). 
+*  The disk layout approach (either the Modern hd1k or the Classic hd512). 
    See [Hard Disk Layouts] section if you are not sure. 
    hd1k should be the preferred layout.
 *  The number of 8MB slices that you want to allocate, preferred is 64 slices.
@@ -1640,7 +1549,7 @@ The disk unit number was assigned at boot See [Device Unit Assignments]
 
 Refer to $doc_apps$ for more information on use of the `FDISK80` utility. 
 
-If you want to use the legacy hd512 layout skip down to the [Legacy (hd512)] section
+If you want to use the Classic (hd512) layout skip down to the [Classic (hd512)] section
 
 #### Modern (hd1k)
 
@@ -1702,14 +1611,14 @@ At this point, it is best to restart your system to make sure that
 the operating system is aware of the partition table updates.  Start
 CP/M 2.2 or Z-System from ROM again.
 
-#### Legacy (hd512)
+#### Classic (hd512)
 
 At this point, use the `I` command to initialize (reset) 
 the partition table to an empty state.
 
 To use the hd512 layout, use `W` to write the empty table to the disk 
 and exit.  Remember that the lack of a partition for RomWBW implies the 
-legacy (hd512) layout.
+Classic (hd512) layout.
 
 At this point, it is best to restart your system to make sure that
 the operating system is aware of the partition table updates.  Start
@@ -1727,12 +1636,7 @@ You need to initialize each slice for CP/M to use it.
 This is somewhat analogous to doing a FORMAT operation on other systems,
 and is done using the `CLRDIR` command. 
 
-This is covered in the section [Clearing (Formatting) Drives]
-
-**WARNING**: Earlier versions of the `CLRDIR` application do not
-appear to check for disk errors when it runs.  If you attempt to run
-`CLRDIR` on a drive that is mapped to a slice that does not actually fit
-on the physical disk, it may behave erratically.
+This is covered in the next section [Clearing (Formatting) Drives]
 
 Assuming you want to use additional slices, you should initialize them
 using the same process.  You may need to reassign drive letters to
@@ -1741,11 +1645,57 @@ You can use the `ASSIGN` command to handle this.
 
 ## Post Disk Preparation
 
-Once a disk (either floppy or hard disk) has been initialised and 
-formattted you may optionally;
+Once a disk has been initialised you may need to do one or more of the following;
+* Clear (Format) the drive 
 * Make the disk bootable
 * Copy system (or other) files to the disk
 
+### Clearing (Formatting) Drives
+
+This is somewhat analogous to doing a FORMAT operation on other systems.
+
+With RomWBW you use the `CLRDIR` command to do this.
+This command is merely "clearing out" the directory space of the drive
+referred to by a drive letter and setting up the new empty directory.
+
+Refer to $doc_apps$ for more information on use of the `CLRDIR` command.
+
+Since `CLRDIR` works on drive letters, make
+absolutely sure you know what media and slice are assigned to that
+drive letter before using `CLRDIR` because `CLRDIR` will wipe out any
+pre-existing contents of the slice.
+
+After `CLRDIR` completes, the drive should be ready to use by the operating
+system via the drive letter assigned.
+Start by using the `DIR` command on the drive.
+This should return without error, but list no files.
+
+Here is an example of using `CLRDIR`.  In this example, the `ASSIGN`
+command is used to show the current drive letter assignments.  Then
+the `CLRDIR` command is used to initialize the directory of drive 'G'
+which is slice 2 of hard disk device IDE0 ("IDE0:2").
+
+```
+B>ASSIGN
+
+   A:=MD0:0
+   B:=MD1:0
+   C:=FD0:0
+   D:=FD1:0
+   E:=IDE0:0
+   F:=IDE0:1
+   G:=IDE0:2
+   H:=IDE0:3
+
+B>CLDIR G:
+CLRDIR Version 1.2B May 2024 by Max Scane
+
+Warning - this utility will overwrite the directory sectors of Drive: G
+Type CAPITAL Y to proceed, any key other key to exit. Y
+Directory cleared.
+B>
+```
+
 ### Making a Disk Bootable
 
 To make a disk bootable you will need to follow the specific instructions
@@ -1776,6 +1726,38 @@ system and application files to your disks.
 Refer to [Transferring Files] for more information on getting
 files onto your disks.
 
+### Checking Disk Layout
+
+If you are not sure which disk layout is used for your existing
+media, you can use the CP/M 2.2 `STAT` command to display information
+including the number of "32  Byte Directory Entries"
+for a drive letter on the corresponding hard disk.
+
+Note: For CP/M 3 the command is `SHOW [DRIVE]`
+
+- If it indicates 512, your disk layout is Classic (hd512).
+- If it indicates 1024, your disk layout is Modern (hd1k).
+
+Here is an example of checking the disk layout.
+
+```
+B>STAT E:DSK:
+
+    E: Drive Characteristics
+65408: 128 Byte Record Capacity
+ 8176: Kilobyte Drive  Capacity
+ 1024: 32  Byte Directory Entries
+    0: Checked  Directory Entries
+  256: Records/ Extent
+   32: Records/ Block
+   64: Sectors/ Track
+    2: Reserved Tracks
+```
+
+It is critical that you include `DSK:` after the drive letter in the
+`STAT` command line.  The important line to look at is labeled "32 Byte
+Directory Entries".
+
 # Disk Images
 
 Since it would be quite a bit of work to transfer over all the files you
@@ -1806,6 +1788,7 @@ The following table shows the disk images available.
 | xxx_fortran.img   | Microsoft Fortran-80 Compiler        | No       |
 | xxx_games.img     | Games Disk for CP/M                  | No       |
 | xxx_hitechc.img   | HI-TECH Z80 CP/M C compiler          | No       |
+| xxx_infocom.img   | Infocom Games Disk                   | No       |
 | xxx_msxroms1.img  | MSX ROMs Disk 1                      | No       |
 | xxx_msxroms2.img  | MSX ROMs Disk 2                      | No       |
 | xxx_nzcom.img     | NZCOM ZCPR 3.4 Operating System      | Yes      |
@@ -1820,8 +1803,8 @@ You will find 3 sets of these .img files in the distribution.  The
 "xxx" portion of the filename will be:
 
 *  "fd_" for a floppy image.
-*  "hd1k_" for a modern layout hard disk image.
-*  "hd512_" for a legacy layout hard disk image.
+*  "hd1k_" for a Modern layout hard disk image.
+*  "hd512_" for a Classic layout hard disk image.
 
 In the case of xxx_dos65.img, only an hd512 variant is provided.  This
 is a constraint of the DOS65 distribution.
@@ -1895,7 +1878,7 @@ These partition sizes and locations were chosen to:
 The standard partition table table entries are:
 
 +---------------------------------+-------------------------------+-------------------------------+
-|                                 | **--- Modern (hd1k) ---**     | **--- Legacy (hd512) ---**    |
+|                                 | **--- Modern (hd1k) ---**     | **--- Classic (hd512) ---**    |
 |                                 +---------------+---------------+---------------+---------------+
 |                                 | Byte(s)       | Sector(s)     | Byte(s)       | Sector(s)     |
 +=================================+==============:+==============:+==============:+==============:+
@@ -1998,7 +1981,52 @@ that there are more disk (slice) images than the 6 that are included in
 the Combo Disk Images.  These supplemental disk images are identified by
 looking for the files that start with hd1k_ or hd512_.
 
-#### Adding Slices to Combo Image
+There are two approaches you can use to create custom hard disk
+images with multiple slices.
+
+- You can add/modify a configuration file and run the RomWBW
+  build process.  This requires running the RomWBW build process, but
+  will cause your custom hard disk images to be created with every
+  build.
+
+- You can manually combine the individual images using `COPY` (Windows)
+  or `cat` (Linux/MacOS).  This does not require running the RomWBW
+  build process, but will require manually recreating your custom
+  hard disk images when you upgrade to new releases of RomWBW.
+
+The following sections provide more detail on each approach.
+
+#### Building Custom Hard Disk Images
+
+The RomWBW build process builds the disk images defined in the
+`Source/Images` directory.  The resultant images are placed in the `Binary`
+directory and are ready to copy to your media.
+
+These aggregate disk images are defined using .def files.  You will see there
+is a combo.def file in the Images directory that defines the slices for the
+Combo disk image.  You can create your own .def files as desired to
+automatically create custom aggregate disk images.  When the RomWBW
+build process is run, it will automatically look for all .def files
+in the `Source/Images` directory and create aggregate disk images for
+each using the same base name as the .def file.
+
+There is an example of this in the `Images` directory called 
+`all.def.example`.  You can remove the ".example" suffix so that the 
+file is called `all.def`.  Now, if you run the RomWBW build process, it 
+will automatically generate `hd512_all.img` and `hd1k_all.img` files in 
+the `/Binary` directory. This example creates an aggregate disk image 
+with all of the possible slices.
+
+You could also modify the contents of the Combo disk image by simply
+modifying the `combo.def` configuration file.  However, it is recommended
+that you leave the Combo image alone and simply define your own.
+
+NOTE: All of the `hd1k_xxx.img` aggregate disk image files created in
+this way (including the Combo disk image) will already be prefixed with 
+`hd1k_prefix.dat`, so you do not need to add the prefix file.  They are 
+ready to write to your media.
+
+#### Combining Hard Disk Images Manually
 
 You can add slices to the Combo Disk Images simply by tacking
 slices onto the end.  For example, if you want to add a slice
@@ -2017,7 +2045,7 @@ Linus/MaxOS:
 Note that you **must** be sure to use either the hd1k_ or hd512_
 prefixed files together.  You cannot mix them.
 
-#### Creating a new Custom Image
+#### Creating a new Custom Image Manually
 
 If you want to create a completely custom hard disk image that is not
 based on the existing combo image, you can generate a disk image entirely
@@ -2446,6 +2474,7 @@ via the NZ-COM adaptation (see below).
 * [ZCPR Manual]($doc_root$/CPM/ZCPR Manual.pdf)
 * [ZCPR-DJ]($doc_root$/CPM/ZCPR-DJ.doc)
 * [ZSDOS Manual]($doc_root$/CPM/ZSDOS Manual.pdf)
+* [ZSDOS Programmer's Manual]($doc_root$/CPM/ZSDOS Programmers Manual.pdf)
 
 #### Boot Disk
 
@@ -2526,6 +2555,7 @@ Manual.pdf" document in order to use this operating system effectively.
 * [NZCOM Users Manual]($doc_root$/CPM/NZCOM Users Manual.pdf)
 * [Z-System Users Guide]($doc_root$/CPM/Z-System Users Guide.pdf)
 * [ZCPR3.3 User Guide]($doc_root$/CPM/ZCPR3.3 User Guide.pdf)
+* [ZSDOS Programmer's Manual]($doc_root$/CPM/ZSDOS Programmers Manual.pdf)
 
 #### Boot Disk
 

Source/FZ80/Bank Layout.txt

@@ -1,18 +0,0 @@
-FPGA Z80 has no real ROM.  It has a single 512K RAM chip.
-
-The ROMless startup mode treats the entire 512KB as RAM.  384KB of RAM 
-must be preloaded by the FPGA Monitor CF Loader.  There will be no ROM 
-disk available under RomWBW.  There will be a RAM Disk and it's initial 
-contents will be seeded by the image loaded by the CF Loader.
-
-Bank		Contents	Description
---------	--------	-----------
-0x0		BIOS		HBIOS Bank (operating)
-0x1		IMG0		ROM Loader, Monitor, ROM OSes
-0x2		IMG1		ROM Applications
-0x3		IMG2		Reserved
-0x4-0xB		RAMD		RAM Disk Banks
-0xC		BUF		OS Buffers (CP/M3)
-0xD		AUX		Aux Bank (CP/M 3, BPBIOS, etc.)
-0xE		USR		User Bank (CP/M TPA, etc.)
-0xF		COM		Common Bank, Upper 32KB

Source/HBIOS/Bank Layout.txt

@@ -71,7 +71,7 @@ Bank ID         Usage
 0x82            User TPA
 0x83            Common
 
-ROMless Standard Bank Layout (512K): ZRC, ZRC512, EZ512, Z1RCC, ZZRCC, FZ80
+ROMless Standard Bank Layout (512K): ZRC, ZRC512, EZ512, Z1RCC, ZZRCC
 
 Bank ID         Usage
 -------         ------

Source/HBIOS/Build.cmd

@@ -91,6 +91,7 @@ tasm -t%CPUType% -g3 -dAPPBOOT hbios.asm hbios_app.bin hbios_app.lst || exit /b
 call :asm dbgmon || exit /b
 call :asm romldr || exit /b
 
+call :asm invntdev || exit /b
 call :asm invntslc || exit /b
 call :asm eastaegg || exit /b
 call :asm nascom || exit /b
@@ -125,7 +126,7 @@ if %Platform%==S100 (
 
 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin + ..\cpm22\cpm_wbw.bin rom1.bin || exit /b
 copy /b ..\Forth\camel80.bin + nascom.bin + ..\tastybasic\src\tastybasic.bin + game.bin + eastaegg.bin + %NETBOOT% + updater.bin + sysconf.bin + usrrom.bin rom2.bin || exit /b
-copy /b %HwMon% + invntslc.bin + romfonts.bin rom3.bin
+copy /b %HwMon% + invntdev.bin + invntslc.bin + romfonts.bin rom3.bin
 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin appboot.bin || exit /b
 
 ::
@@ -268,7 +269,9 @@ call Build HEATH std || exit /b
 call Build EPITX std || exit /b
 :: call Build MON std || exit /b
 call Build NABU std || exit /b
-call Build FZ80 std || exit /b
+call Build SZ80 std || exit /b
+call Build SZ80 fpga || exit /b
 call Build UNA std || exit /b
+call Build MSX std || exit /b
 
 goto :eof

Source/HBIOS/Build.ps1

@@ -27,7 +27,7 @@ $ErrorAction = 'Stop'
 # UNA BIOS is simply imbedded, it is not built here.
 #
 
-$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "FZ80", "RCEZ80"
+$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "SZ80", "RCEZ80", "MSX"
 $PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100", "EPITX", "GMZ180"
 $PlatformListZ280 = "RCZ280"
 

Source/HBIOS/Build.sh

@@ -53,7 +53,9 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="EPITX"; ROM_CONFIG="std"; bash Build.sh
 #	ROM_PLATFORM="MON"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="NABU"; ROM_CONFIG="std"; bash Build.sh
-	ROM_PLATFORM="FZ80"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="SZ80"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="SZ80"; ROM_CONFIG="fpga"; bash Build.sh
+	ROM_PLATFORM="MSX"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
 	exit
 fi

Source/HBIOS/Config/MSX_std.asm

@@ -0,0 +1,94 @@
+;
+;==================================================================================================
+;   ROMWBW DEFAULT BUILD SETTINGS FOR MSX
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE.  THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS
+; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.
+;
+; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE
+; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE).
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
+;
+#INCLUDE "cfg_MSX.asm"
+;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+AUTOCON		.SET	FALSE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
+CPUOSC		.SET	3579545		; CPU OSC FREQ IN MHZ
+;
+RAMSIZE		.SET	512-64		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) (MSX_NOTE: SUBSTRACT 64K FROM RAM MAPPER SIZE)
+;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
+;
+CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	TRUE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) (MSX_NOTE: MSX 1 MAY NOT HAVE A RTC, MSX 2 ALWAYS HAS ONE)
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSXMKY	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
+TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9938/V9958
+;
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) (MSX_NOTE: REQUIRES SODA IDE CART)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) (MSX_NOTE: SOME MSX MACHINES DON'T HAVE A LPT PORT)
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER (MSX_NOTE: THERE ARE CARTS WITH THIS PSG LIKE THE MMM)
+AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/RCEZ80_std.asm

@@ -55,7 +55,7 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
@@ -71,6 +71,14 @@ PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80	.SET	TRUE		; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+CHNATIVEFORCE	.SET	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
+;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
 LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
@@ -82,3 +90,5 @@ SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AY38910ENABLE	.SET	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
 AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
+
+EZ80TIMER	.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]

Source/HBIOS/Config/RCZ80_std.asm

@@ -72,7 +72,7 @@ ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
@@ -92,6 +92,10 @@ SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 CHENABLE	.SET	TRUE		; CH: ENABLE CH375/376 USB SUPPORT
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE	.SET	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;

Source/HBIOS/Config/S100_std.asm

@@ -55,7 +55,7 @@ CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	1		; Z180: MEMORY WAIT STATES (0-3)
-Z180_IOWAIT	.SET	2		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_IOWAIT	.SET	3		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
@@ -66,8 +66,12 @@ SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 ;
-PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+;
+ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)

Source/HBIOS/Config/SZ80_fpga.asm

@@ -0,0 +1,81 @@
+;
+;==================================================================================================
+;   ROMWBW DEFAULT BUILD SETTINGS FOR S100 FPGA Z80
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE.  THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS
+; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.
+;
+; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE
+; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE).
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE PLATFORM_NAME	"S100 FPGA Z80", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
+;
+#INCLUDE "cfg_SZ80.asm"
+;
+CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+MEMMGR		.SET	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512|SZ80]
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+;
+DS5RTCENABLE	.SET	TRUE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+;
+SSERENABLE	.SET	TRUE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
+;
+LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+FVENABLE	.SET	TRUE		; FV: ENABLE FPGA VGA VIDEO DRIVER (FV.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+PPIDECNT	.SET	3		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE0BASE	.SET	$30		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE1MODE	.SET	PPIDEMODE_S100A	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE1BASE	.SET	$38		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE2MODE	.SET	PPIDEMODE_S100B	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE2BASE	.SET	$38		; PPIDE 2: PPI REGISTERS BASE ADR
+;
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+;
+ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)

Source/HBIOS/Config/SZ80_std.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW DEFAULT BUILD SETTINGS FOR S100 FPGA Z80
+;   ROMWBW DEFAULT BUILD SETTINGS FOR S100 Z80
 ;==================================================================================================
 ;
 ; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -43,14 +43,21 @@
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
-#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
+#DEFINE DEFSERCFG	SER_9600_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
-#INCLUDE "cfg_FZ80.asm"
+#INCLUDE "cfg_SZ80.asm"
 ;
 CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
+RAMSIZE		.SET	1024		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+MEMMGR		.SET	MM_SZ80		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512|SZ80]
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$05		; FP: PORT ADDRESS FOR FP LEDS
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
-SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 ;
-LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)

Source/HBIOS/Layout.txt

@@ -3,66 +3,73 @@ Final Output Files
 ------------------
 
 ROM Output File [512K] -> <config>.rom
-  hbios_rom [32K]
-  OSIMG  [32K]
-  OSIMG1 [32K]
-  OSIMG2 [32K]
-  romdisk - [384K]
+  HBIOS_ROM   [32K]
+  ROM1        [32K]
+  ROM2        [32K]
+  ROM3        [32K]
+  ROMDISK     [384K] (size varies with ROM in system)
 
 UPD Output File [128K] -> <config>.upd
-  hbios_rom [32K]
-  OSIMG  [32K]
-  OSIMG1 [32K]
-  OSIMG2 [32K]
+  HBIOS_ROM   [32K]
+  ROM1        [32K]
+  ROM2        [32K]
+  ROM3        [32K]
 
 COM Output File -> <config>.com
-  hbios_app [varies]
-  OSIMG_SMALL [32K]
+  HBIOS_APP   [<32K] (size varies, no padding]
+  APPBOOT     [ 20K]
 
 -------------------------
 Intermediate Output Files
 -------------------------
 
-OSIMG [32K] -> osimg.bin
-  romldr [4K]
-  dbgmon [4K]
-  ZSYS (zcpr/zsdos/cbios) [12K]
-  CPM (ccp/bdos/cbios) [12K]
+ROM1 [32K] -> rom1.bin
+  romldr      [ 4K]
+  dbgmon      [ 4K]
+  ZSYS        [12K] (zcpr/zsdos/cbios)
+  CPM         [12K] (ccp/bdos/cbios)
 
-OSIMG_SMALL [20K] -> osimg_small.bin
-  romldr [4K]
-  dbgmon [4K]
-  ZSYS (zcpr/zsdos/cbios) [12K]
-
-OSIMG1 [32K] -> osimg1.bin
+ROM2 [32K] -> rom2.bin
   camel80     [5.75K]
-  nascom      [8K]
-  tastybasic  [2.5K]
+  nascom      [8.00K]
+  tastybasic  [2.50K]
   game        [2.25K]
-  eastaegg    [0.5K]
-  netboot     [4K]
+  eastaegg    [0.50K]
+  netboot     [4.00K]
   updater.bin [3.25K]
-  sysconf.bin [2K]
-  usrrom.bin  [3.75K (padded)]
+  sysconf.bin [2.00K]
+  usrrom.bin  [0.50K]
+  slack       [3.25K]
 
-OSIMG2 [32K] -> osimg2.bin
-  s100mon     [8.25kb (optional)]
-  (OR) not populated
+ROM3 [32K] -> rom3.bin
+  hwmon       [ 8.00K]
+  invntdev    [ 2.75K]
+  invntslc    [ 0.50K]
+  fonts       [ 8.00K]
+  slack       [12.75K]
+
+APPBOOT [20K] -> appboot.bin
+  romldr      [ 4K]
+  dbgmon      [ 4K]
+  ZSYS        [12K] (zcpr/zsdos/cbios)
 
 CPM [12K] -> cpm.bin
-  ccp [2K]
-  bdos [3.5K]
-  cbios [6.5K]
+  ccp         [2.0K]
+  bdos        [3.5K]
+  cbios       [6.5K]
 
 ZSYS [12K] -> zsys.bin
-  zcpr [2K]
-  zsdos [3.5K]
-  cbios [6.5K]
+  zcpr        [2.0K]
+  zsdos       [3.5K]
+  cbios       [6.5K]
 
 -----------------
 Compilation Units
 -----------------
 
+NOTE: The following need to be reviewed.  They are probably out
+of date.
+
 hbios.asm -> hbios_rom.bin, hbios_app.bin
   std.asm
     ver.inc
@@ -76,7 +83,7 @@ hbios.asm -> hbios_rom.bin, hbios_app.bin
   bcd.asm
   dsky.asm
 
-romldr.asm -> romldr.bin:	loader?
+romldr.asm -> romldr.bin
   std.asm
     ver.inc
     hbios.inc
@@ -125,18 +132,16 @@ tastybasic.asm -> tastybasic.bin
       <config>.asm
     plt_<platform>.inc
 
-
 =======================================================================
 HBIOS Loading Modes:
   ROMBOOT: Startup from ROM Bank BID_BOOT
   APPBOOT: Startup as CP/M application
-  IMGBOOT: Startup from RAM Bank BID_USR
+  IMGBOOT: Startup from RAM Bank BID_USR (deprecated)
 =======================================================================
 
  - If not (APPBOOT), include page 0
 
  - Base Hardware Init
-   - Iff (ROMBOOT), init BBR
 
  - Install Proxy
    - Set CURBNK:
@@ -149,6 +154,6 @@ HBIOS Loading Modes:
 
  - Copy OS Image to USR Bank
    - If (ROM_MODE), copy BID_OS:0 --> BID_USR:0
-   - Else, copy BID_USR:<os image start> --> BID_USR:0
+   - Else, copy BID_BIOS:<os image start> --> BID_USR:0
 
  - Chain to BID_USR:0

Source/HBIOS/Makefile

@@ -32,7 +32,7 @@ else ifeq ($(CPUFAM),3)
 	TASM=$(BINDIR)/uz80as -t z280
 endif
 
-DEPS=prereq dbgmon.bin romldr.bin nascom.bin tastybasic.bin invntslc.bin game.bin eastaegg.bin updater.bin sysconf.bin sysconf.com usrrom.bin romfonts.bin
+DEPS=prereq dbgmon.bin romldr.bin nascom.bin tastybasic.bin invntdev.bin invntslc.bin game.bin eastaegg.bin updater.bin sysconf.bin sysconf.com usrrom.bin romfonts.bin
 
 ifeq ($(ROM_PLATFORM),UNA)
 	ROMDEPS=romldr.bin dbgmon.bin
@@ -72,7 +72,7 @@ $(OBJECTS) : $(ROMDEPS)
 	cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >appboot.bin
 	if [ $(ROM_PLATFORM) != UNA ] ; then \
 		cat camel80.bin nascom.bin tastybasic.bin game.bin eastaegg.bin $(NETBOOT) updater.bin sysconf.bin usrrom.bin >rom2.bin ; \
-		cat $(HWMON) invntslc.bin romfonts.bin >rom3.bin ; \
+		cat $(HWMON) invntdev.bin invntslc.bin romfonts.bin >rom3.bin ; \
 		for f in hbios_rom.bin rom1.bin rom2.bin rom3.bin ; do \
 			srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
 		done \
@@ -133,6 +133,7 @@ hbios_env.sh: hbios_env.com
 romldr.bin:	build.inc
 dbgmon.bin:	build.inc
 nascom.bin:	build.inc
+invntdev.bin:	build.inc
 invntslc.bin:	build.inc
 eastaegg.bin:	build.inc
 updater.bin:	build.inc

Source/HBIOS/ansi.asm

@@ -1554,4 +1554,4 @@ ANSI_DEVNUM	.DB	$FF	; TERMINAL DEVICE NUMBER
 ;	 E Light Cyan
 ;	 F Bright White
 ;=============================================================
-;
+;

Source/HBIOS/audio.inc

@@ -45,8 +45,8 @@ AUD_SCALE	.EQU	3
 ; ON ENTRY, DE IS ADDRESS OF NOTE TABLE, HL IS NOTE TO PLAY
 ; NOTE VALUE 0 MEANS B0b/A0# IN OCTAVE 0 WHICH IS THE FIRST ENTRY
 ; OF THE NOTE TABLE.  THE NOTE TABLE REPRESENTS THE FREQUENCIES
-; FOR 1 FULL OCTAVE IN QUARTER NOTES.  SINCE THERE ARE 12 NOTES
-; IN AN OCTAVE, THE TABLE HAS 48 ENTRIES FOR ALL QUARTER NOTES.
+; FOR 1 FULL OCTAVE IN EIGHTH TONES.  SINCE THERE ARE 12 HALF TONES
+; IN AN OCTAVE, THE TABLE HAS 48 ENTRIES FOR ALL EIGHTH TONES.
 ;
 ; ON EXIT, HL CONTAINS THE PERIOD VALUE TO PROGRAM INTO THE PSG
 ; DERIVED FROM THE NOTE TABLE SCALED TO THE REQUESTED OCTAVE.

Source/HBIOS/ay38910.asm

@@ -556,10 +556,10 @@ AYT_REGWR		.DB	"\r\nOUT AY-3-8910 $"
 #ENDIF
 ;
 ;======================================================================
-;	QUARTER TONE FREQUENCY TABLE
+;	EIGHTH TONE FREQUENCY TABLE
 ;======================================================================
 ;
-; THE FOLLOWING TABLE MAPS A FULL OCTAVE OF QUARTER-NOTES
+; THE FOLLOWING TABLE MAPS A FULL OCTAVE OF EIGHTH-TONES
 ; STARTING AT A# IN OCTAVE 0 TO THE CORRESPONDING PERIOD
 ; VALUE TO USE ON THE PSG TO ACHIEVE THE DESIRED NOTE FREQUENCY.
 ;

Source/HBIOS/cfg_DUO.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -282,18 +283,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$88		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -354,6 +358,8 @@ SYQMODE		.SET	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -375,6 +381,9 @@ AYMODE		.SET	AYMODE_DUO	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+SPKPORT		.SET	RTCIO		; SPK: THE PORT WITH THE SPEAKER IO BIT
+SPKSHADOW	.SET	HB_RTCVAL	; SPK: THE SHADOW VALUE FOR THE PORT THAT HAS TO BE MAINTAINED
+SPKMASK		.SET	%00000100	; SPK: THE BIT MASK TO ACTUALLY TOGGLE
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.SET	$40		; DMA: DMA BASE ADDRESS

Source/HBIOS/cfg_DYNO.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -297,18 +298,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$4C		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -338,6 +342,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_EPITX.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_EPITX	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_EPITX	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -293,18 +294,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_EPITX	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_EPITX	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$40		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	2		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -364,6 +368,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_EZZ80.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -302,18 +303,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -373,6 +377,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_GMZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_GMZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_GMZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -292,18 +293,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -363,6 +367,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_HEATH.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_HEATH	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_HEATH	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -302,18 +303,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -363,6 +367,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_MASTER.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_NONE	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.EQU	PLT_NONE	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.EQU	CPU_NONE	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.EQU	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.EQU	BIOS_NONE	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -361,18 +362,21 @@ IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.EQU	PPIDEMODE_NONE	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.EQU	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.EQU	PPIDEMODE_NONE	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.EQU	PPIDEMODE_NONE	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -441,6 +445,15 @@ SYQMODE		.EQU	IMMMODE_NONE	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.EQU	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDTRACE	.EQU	1		; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+ESPSD_USECD	.EQU	FALSE		; ESPSD: ENABLE CARD DETECT SIGNAL USAGE
+ESPSDCNT	.EQU	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD0BASE	.EQU	$80		; ESPSD 0: ESP32 INTERFACE IO BASE ADR
+ESPSD0DUAL	.EQU	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
+ESPSD1BASE	.EQU	$82		; ESPSD 1: ESP32 INTERFACE IO BASE ADR
+ESPSD1DUAL	.EQU	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -463,6 +476,9 @@ AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC
 AY_FORCE	.EQU	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+SPKPORT		.EQU	RTCIO		; SPK: THE PORT WITH THE SPEAKER IO BIT
+SPKSHADOW	.EQU	HB_RTCVAL	; SPK: THE SHADOW VALUE FOR THE PORT THAT HAS TO BE MAINTAINED
+SPKMASK		.EQU	%00000100	; SPK: THE BIT MASK TO ACTUALLY TOGGLE
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
@@ -500,3 +516,14 @@ EZ80_WSMD_TYP	.EQU	EZ80WSMD_CALC	; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
 EZ80_FLSH_WS		.EQU	1		; WAIT STATES FOR ON CHIP FLASH (0-7)
 EZ80_FLSH_MIN_NS	.EQU	60		; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
 EZ80_FWSMD_TYP		.EQU	EZ80WSMD_CALC	; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)
+
+CHNATIVEENABLE	.EQU	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE	.EQU	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE	.EQU	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE	.EQU	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80	.EQU	FALSE		; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+
+_CH376_DATA_PORT	.EQU	$FF88	; CH376: DATA PORT
+_CH376_COMMAND_PORT	.EQU	$FF89	; CH376: COMMAND PORT
+_USB_MODULE_LEDS	.EQU	$FF8A	; CH376: LED CONTROL PORT
+

Source/HBIOS/cfg_MBC.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -276,18 +277,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -342,6 +346,8 @@ SYQMODE		.SET	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -362,6 +368,9 @@ AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.SET	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
 ;
 SPKENABLE	.SET	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+SPKPORT		.SET	RTCIO		; SPK: THE PORT WITH THE SPEAKER IO BIT
+SPKSHADOW	.SET	HB_RTCVAL	; SPK: THE SHADOW VALUE FOR THE PORT THAT HAS TO BE MAINTAINED
+SPKMASK		.SET	%00000100	; SPK: THE BIT MASK TO ACTUALLY TOGGLE
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS

Source/HBIOS/cfg_MK4.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -287,18 +288,21 @@ IDE2B8BIT	.SET	FALSE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	2		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$14		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -335,6 +339,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_MON.asm

@@ -51,8 +51,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_MON		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_MON		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -299,18 +300,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -370,6 +374,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_MSX.asm

@@ -0,0 +1,408 @@
+;
+;==================================================================================================
+;   ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: MSX
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD,
+; YOU SHOULD OVERRIDE SETTINGS YOU WANT USING A CONFIGURATION FILE IN
+; THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
+;
+; THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.  IT IS MAINTAINED BY THE
+; AUTHORS OF ROMWBW.  TO OVERRIDE SETTINGS YOU SHOULD USE A
+; CONFIGURATION FILE IN THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.  TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE PLATFORM_NAME	"MSX Computer", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+#DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
+;
+#INCLUDE "cfg_MASTER.asm"
+;
+PLATFORM	.SET	PLT_MSX		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80|MSX]
+CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	TRUE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
+BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.SET	FALSE		; ENABLE FONT COMPRESSION
+TICKFREQ	.SET	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.SET	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.SET	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+BOOT_PRETTY	.SET	FALSE		; BOOT WITH PRETTY PLATFORM NAME
+BT_REC_TYPE	.SET	BT_REC_NONE	; BOOT RECOVERY METHOD TO USE: BT_REC_[NONE|FORCE|SBCB0|SBC1B|SBCRI|DUORI]
+AUTOCON		.SET	FALSE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+STRICTPART	.SET	TRUE		; ENFORCE STRICT PARTITION TABLE VALIDATION
+;
+CPUSPDCAP	.SET	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.SET	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.SET	3579545		; CPU OSC FREQ IN MHZ
+INTMODE		.SET	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+RAMSIZE		.SET	512-64		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMFONTS	.SET	FALSE		; LOAD FONTS FROM ROM
+APP_BNKS	.SET	$FF		; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
+MEMMGR		.SET	MM_MSX		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512|MSX]
+RAMBIAS		.SET	2		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+MPGSEL_0	.SET	$FC		; MEM MGR BANK 0 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
+MPGSEL_1	.SET	$FD		; MEM MGR BANK 1 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
+MPGSEL_2	.SET	$FE		; MEM MGR BANK 2 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
+MPGSEL_3	.SET	$FF		; MEM MGR BANK 3 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
+;
+RTCIO		.SET	$C0		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.SET	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.SET	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.SET	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.SET	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.SET	$88		; CTC BASE I/O ADDRESS
+CTCTIMER	.SET	FALSE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.SET	CTCMODE_TIM16	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.SET	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.SET	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.SET	3		; TIMER CHANNEL (0-3)
+CTCOSC		.SET	CPUOSC		; CTC CLOCK FREQUENCY
+;
+PCFENABLE	.SET	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.SET	$F0		; PCF8584 BASE I/O ADDRESS
+PCFCLK		.SET	PCFCLK_8	; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
+PCFTRNS		.SET	PCFTRNS_90	; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15]
+;
+EIPCENABLE	.SET	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.SET	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
+;
+WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
+;
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
+FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.SET	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+FPSW_INV	.SET	FALSE		; FP: SWITCH BITS ARE INVERTED
+;
+DIAGLVL		.SET	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.SET	FALSE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.SET	LEDMODE_STD	; LEDMODE_[STD|SC|RTC|NABU]
+LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.SET	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.SET	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.SET	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.SET	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.SET	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.SET	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.SET	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.SET	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.SET	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.SET	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+GM7303ENABLE	.SET	FALSE		; ENABLES THE GM7303 BOARD WITH 16X2 LCD
+;
+BOOTCON		.SET	0		; BOOT CONSOLE DEVICE
+SECCON		.SET	$FF		; SECONDARY CONSOLE DEVICE
+CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.SET	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.SET	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.SET	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.SET	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.SET	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYKBLOUT	.SET	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDINTS		.SET	FALSE		; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.SET	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
+DSRTCCHG	.SET	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.SET	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.SET	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.SET	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.SET	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.SET	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.SET	TRUE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.SET	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
+;
+DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+;
+SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
+SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
+SSERSTATUS	.SET	$FF		; SSER: STATUS PORT
+SSERDATA	.SET	$FF		; SSER: DATA PORT
+SSERIRDY	.SET	%00000001	; SSER: INPUT READY BIT MASK
+SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
+SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
+SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
+;
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.SET	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.SET	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.SET	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.SET	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.SET	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.SET	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.SET	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTCNT		.SET	2		; UART: NUMBER OF CHIPS TO DETECT (1-8)
+UARTOSC		.SET	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UART4UART	.SET	FALSE		; UART: SUPPORT 4UART ECB BOARD
+UART4UARTBASE	.SET	$C0		; UART: BASE IO ADDRESS OF 4UART ECB BOARD
+UART0BASE	.SET	$80		; UART 0: REGISTERS BASE ADR
+UART0CFG	.SET	DEFSERCFG	; UART 0: SERIAL LINE CONFIG
+UART1BASE	.SET	$88		; UART 1: REGISTERS BASE ADR
+UART1CFG	.SET	DEFSERCFG	; UART 1: SERIAL LINE CONFIG
+UART2BASE	.SET	$FF		; UART 2: REGISTERS BASE ADR
+UART2CFG	.SET	DEFSERCFG	; UART 2: SERIAL LINE CONFIG
+UART3BASE	.SET	$FF		; UART 3: REGISTERS BASE ADR
+UART3CFG	.SET	DEFSERCFG	; UART 3: SERIAL LINE CONFIG
+UART4BASE	.SET	$FF		; UART 4: REGISTERS BASE ADR
+UART4CFG	.SET	DEFSERCFG	; UART 4: SERIAL LINE CONFIG
+UART5BASE	.SET	$FF		; UART 5: REGISTERS BASE ADR
+UART5CFG	.SET	DEFSERCFG	; UART 5: SERIAL LINE CONFIG
+UART6BASE	.SET	$FF		; UART 6: REGISTERS BASE ADR
+UART6CFG	.SET	DEFSERCFG	; UART 6: SERIAL LINE CONFIG
+UART7BASE	.SET	$FF		; UART 7: REGISTERS BASE ADR
+UART7CFG	.SET	DEFSERCFG	; UART 7: SERIAL LINE CONFIG
+;
+ASCIENABLE	.SET	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+Z2UENABLE	.SET	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+ACIADEBUG	.SET	FALSE		; ACIA: ENABLE DEBUG OUTPUT
+ACIACNT		.SET	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
+ACIA0BASE	.SET	$80		; ACIA 0: REGISTERS BASE ADR
+ACIA0CLK	.SET	CPUOSC		; ACIA 0: OSC FREQ IN HZ
+ACIA0DIV	.SET	1		; ACIA 0: SERIAL CLOCK DIVIDER
+ACIA0CFG	.SET	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
+ACIA1BASE	.SET	$40		; ACIA 1: REGISTERS BASE ADR
+ACIA1CLK	.SET	CPUOSC		; ACIA 1: OSC FREQ IN HZ
+ACIA1DIV	.SET	1		; ACIA 1: SERIAL CLOCK DIVIDER
+ACIA1CFG	.SET	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
+;
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.SET	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIOINTS		.SET	TRUE		; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
+SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.SET	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.SET	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.SET	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.SET	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.SET	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.SET	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.SET	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.SET	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.SET	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.SET	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.SET	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSXMKY	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMS80COLS	.SET	TRUE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9938/V9958
+TMSTIMENABLE	.SET	TRUE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.SET	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
+FVENABLE	.SET	FALSE		; FV: ENABLE FPGA VGA VIDEO DRIVER (FV.ASM)
+;
+MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.SET	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.SET	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.SET	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.SET	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.SET	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.SET	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.SET	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.SET	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.SET	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.SET	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE0BASE	.SET	$10		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.SET	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.SET	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.SET	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.SET	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.SET	IDEMODE_RC	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE1BASE	.SET	$18		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.SET	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.SET	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.SET	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.SET	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.SET	IDEMODE_RC	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
+IDE2BASE	.SET	$20		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.SET	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_MSX	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B|MSX]
+PPIDE0BASE	.SET	$30		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_MSX	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B|MSX]
+PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_MSX	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B|MSX]
+PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.SET	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.SET	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.SET	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.SET	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.SET	2		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.SET	$3E		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.SET	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.SET	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.SET	$3C		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.SET	TRUE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.SET	FALSE		; CH 1: ENABLE SD DISK
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+;
+PPPENABLE	.SET	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.SET	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.SET	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.SET	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.SET	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.SET	$90		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.SET	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.SET	FALSE		; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
+PPACNT		.SET	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.SET	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.SET	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.SET	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.SET	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
+IMMCNT		.SET	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.SET	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.SET	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.SET	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.SET	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
+SYQCNT		.SET	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.SET	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
+PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+;
+UFENABLE	.SET	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+;
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.SET	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.SET	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.SET	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
+;
+AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.SET	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.SET	AYMODE_MSX	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
+AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
+;
+SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.SET	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
+;
+YM2612ENABLE	.SET	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.SET	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_N8.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -289,18 +290,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	N8_PPI0		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	N8_PPI0		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -337,6 +341,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_NABU.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_NABU	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_NABU	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -302,18 +303,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -373,6 +377,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_RCEZ80.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCEZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_RCEZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_EZ80	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -250,7 +251,7 @@ VDUENABLE	.SET	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.SET	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.SET	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
 TMS80COLS	.SET	FALSE		; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
@@ -300,18 +301,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -374,6 +378,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -406,6 +412,12 @@ EZ80TMR_NONE	.SET	0		; DO NOT USE ON-BOARD TIMER TO GENERATE TICKS
 EZ80TMR_INT	.SET	1		; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
 EZ80TMR_FIRM	.SET	2		; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
 ;
+CHNATIVEENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE USB DRIVER
+CHSCSIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE)
+CHUFIENABLE	.SET	FALSE		; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE)
+CHNATIVEFORCE	.SET	FALSE		; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE)
+CHNATIVEEZ80	.SET	TRUE		; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE
+
 EZ80UARTENABLE	.SET	TRUE		; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
 EZ80RTCENABLE	.SET	TRUE		; EZ80 ON CHIP RTC
 EZ80TIMER	.SET	EZ80TMR_FIRM	; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]

Source/HBIOS/cfg_RCZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -297,18 +298,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -371,6 +375,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_RCZ280.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -307,18 +308,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -381,6 +385,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_RCZ80.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -305,18 +306,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -376,6 +380,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_RPH.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -277,18 +278,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	RPH_PPI0	; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -318,6 +322,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_S100.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_S100	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_S100	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -84,7 +85,7 @@ MPGENA		.SET	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
 Z180_BASE	.SET	$C0		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.SET	1		; Z180: MEMORY WAIT STATES (0-3)
-Z180_IOWAIT	.SET	2		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_IOWAIT	.SET	3		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 Z180_TIMER	.SET	TRUE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
 ;
 RTCIO		.SET	$0C		; RTC LATCH REGISTER ADR
@@ -296,19 +297,22 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
-PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDECNT	.SET	2		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_S100A	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE0BASE	.SET	$30		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1MODE	.SET	PPIDEMODE_S100B	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE1BASE	.SET	$30		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_NONE	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -358,6 +362,15 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDTRACE	.SET	1		; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+ESPSD_USECD	.SET	TRUE		; ESPSD: ENABLE CARD DETECT SIGNAL USAGE
+ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD0BASE	.SET	$80		; ESPSD 0: ESP32 INTERFACE IO BASE ADR
+ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
+ESPSD1BASE	.SET	$82		; ESPSD 1: ESP32 INTERFACE IO BASE ADR
+ESPSD1DUAL	.SET	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_SBC.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -277,18 +278,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$20		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$14		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -326,6 +330,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.SET	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -348,6 +354,9 @@ AYMODE		.SET	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|
 AY_FORCE	.SET	FALSE		; AY: BYPASS AUTO-DETECT, FORCED PRESENT
 ;
 SPKENABLE	.SET	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+SPKPORT		.SET	RTCIO		; SPK: THE PORT WITH THE SPEAKER IO BIT
+SPKSHADOW	.SET	HB_RTCVAL	; SPK: THE SHADOW VALUE FOR THE PORT THAT HAS TO BE MAINTAINED
+SPKMASK		.SET	%00000100	; SPK: THE BIT MASK TO ACTUALLY TOGGLE
 ;
 DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.SET	$E0		; DMA: DMA BASE ADDRESS

Source/HBIOS/cfg_SCZ180.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -297,18 +298,21 @@ IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$20		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1MODE	.SET	PPIDEMODE_STD	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_STD	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -368,6 +372,8 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_SZ80.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: FZ80
+;   ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: SZ80
 ;==================================================================================================
 ;
 ; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -42,15 +42,16 @@
 ; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
 ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
 ;
-#DEFINE PLATFORM_NAME	"S100 FPGA Z80", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
+#DEFINE PLATFORM_NAME	"S100 Z80", " [", CONFIG, "]"	; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
 #DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
 #DEFINE DEFSERCFG	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL CONFIGURATION
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_FZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_SZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -105,7 +106,7 @@ SKZDIV		.SET	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
 WDOGMODE	.SET	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 WDOGIO		.SET	$6E		; WATCHDOG REGISTER ADR
 ;
-FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_ENABLE	.SET	FALSE		; FP: ENABLES FRONT PANEL LEDS
 FPLED_IO	.SET	$FF		; FP: PORT ADDRESS FOR FP LEDS
 FPLED_INV	.SET	FALSE		; FP: LED BITS ARE INVERTED
 FPLED_DSKACT	.SET	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
@@ -165,9 +166,9 @@ SIMRTCENABLE	.SET	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
 DS7RTCENABLE	.SET	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
 DS7RTCMODE	.SET	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
 ;
-DS5RTCENABLE	.SET	TRUE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
+DS5RTCENABLE	.SET	FALSE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
-SSERENABLE	.SET	TRUE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
+SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SSERCFG		.SET	SER_9600_8N1	; SSER: SERIAL LINE CONFIG
 SSERSTATUS	.SET	$34		; SSER: STATUS PORT
 SSERDATA	.SET	$35		; SSER: DATA PORT
@@ -259,7 +260,7 @@ VGAENABLE	.SET	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
 SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 EFENABLE	.SET	FALSE		; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
-FVENABLE	.SET	TRUE		; FV: ENABLE FPGA VGA VIDEO DRIVER (FV.ASM)
+FVENABLE	.SET	FALSE		; FV: ENABLE FPGA VGA VIDEO DRIVER (FV.ASM)
 ;
 MDENABLE	.SET	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
@@ -299,21 +300,24 @@ IDE2DATHI	.SET	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
 IDE2A8BIT	.SET	TRUE		; IDE 2A (MASTER): 8 BIT XFER
 IDE2B8BIT	.SET	TRUE		; IDE 2B (MASTER): 8 BIT XFER
 ;
-PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDECNT	.SET	2		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_S100A	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$30		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
-PPIDE1BASE	.SET	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1MODE	.SET	PPIDEMODE_S100B	; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
+PPIDE1BASE	.SET	$30		; PPIDE 1: PPI REGISTERS BASE ADR
 PPIDE1A8BIT	.SET	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
 PPIDE1B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2MODE	.SET	PPIDEMODE_NONE	; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE2BASE	.SET	$00		; PPIDE 2: PPI REGISTERS BASE ADR
 PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
-PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2B8BIT	.SET	FALSE		; PPIDE 2B (SLAVE): 8 BIT XFER
 ;
-SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_FZ80	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_T35	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -345,7 +349,7 @@ PIOCNT		.SET	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 PIO0BASE	.SET	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.SET	$BC		; PIO 1: REGISTERS BASE ADR
 ;
-LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 LPTMODE		.SET	LPTMODE_S100	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.SET	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.SET	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -373,6 +377,15 @@ SYQMODE		.SET	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
 SYQ0BASE	.SET	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
 SYQ1BASE	.SET	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
 ;
+ESPSDENABLE	.SET	TRUE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+ESPSDTRACE	.SET	1		; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+ESPSDCNT	.SET	1		; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
+ESPSD_USECD	.SET	TRUE		; ESPSD: ENABLE CARD DETECT SIGNAL USAGE
+ESPSD0BASE	.SET	$80		; ESPSD 0: ESP32 INTERFACE IO BASE ADR
+ESPSD0DUAL	.SET	TRUE		; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
+ESPSD1BASE	.SET	$82		; ESPSD 1: ESP32 INTERFACE IO BASE ADR
+ESPSD1DUAL	.SET	TRUE		; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_UNA.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "../UBIOS/ubios.inc"
 ;
-;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
 BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;

Source/HBIOS/cfg_Z80RETRO.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_Z80RETRO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_Z80RETRO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -263,12 +264,13 @@ IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_Z80R	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_Z80R	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
@@ -298,6 +300,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_ZETA.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -232,12 +233,13 @@ IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -268,6 +270,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_ZETA2.asm

@@ -49,8 +49,9 @@
 ;
 #INCLUDE "cfg_MASTER.asm"
 ;
-PLATFORM	.SET	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80]
+PLATFORM	.SET	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|SZ80]
 CPUFAM		.SET	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
+NMOSCPU		.SET	FALSE		; NMOS CPU (ENABLES INT STATUS BUG WORKAROUND)
 BIOS		.SET	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.SET	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -243,12 +244,13 @@ IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 PPIDETRACE	.SET	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPIDECNT	.SET	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0MODE	.SET	PPIDEMODE_STD	; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B]
 PPIDE0BASE	.SET	$60		; PPIDE 0: PPI REGISTERS BASE ADR
 PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -279,6 +281,8 @@ IMMENABLE	.SET	FALSE		; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
 ;
 SYQENABLE	.SET	FALSE		; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
 ;
+ESPSDENABLE	.SET	FALSE		; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
+;
 PIO_4P		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.SET	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/ch376-native/Makefile

@@ -0,0 +1,107 @@
+SHELL := /bin/sh
+SHELLFLAGS := -c -e -x
+.ONESHELL:
+MAKEFLAGS += --warn-undefined-variables
+MAKEFLAGS += --no-builtin-rules
+MAKEFLAGS += --always-make
+ZCCRELFLAGS := -SO3 --max-allocs-per-node600000 --allow-unsafe-read --opt-code-speed
+
+SRC := ./source-doc/
+LIBS := -I./$(SRC)base-drv/
+ZCCFLAGS := +z80 -vn -startup=0 -clib=sdcc_iy  -compiler=sdcc -Cs--std=c23 -Cs--Werror  $(ZCCRELFLAGS) $(LIBS)
+
+ZCC_PATH := $(shell command -v zcc)
+DOCKER_PATH := $(shell command -v docker)
+ZCC := $(shell command -v zcc >/dev/null 2>&1 && echo zcc || echo 'docker run -w /host/${PWD} -v /:/host/ -u $(shell id -u ${USER}):$(shell id -g ${USER}) -t z88dk/z88dk:20250224 zcc')
+
+ifeq ($(ZCC_PATH),)
+    ifeq ($(DOCKER_PATH),)
+			.DEFAULT_GOAL := skip
+    else
+        $(info ZCC is set to use Docker to run zcc)
+    endif
+else
+    $(info ZCC is set to $(ZCC_PATH))
+endif
+
+ASSDIR := ./
+
+all: $(ASSDIR)base-drv.s $(ASSDIR)scsi-drv.s $(ASSDIR)ufi-drv.s $(ASSDIR)keyboard.s
+
+skip:
+	@echo "Unable to compile ch376 native to assembly.  Install docker or z88dk."
+	exit 0
+
+clean:
+	@rm -rf base-drv/*.s
+	rm -rf base-drv/*.asm
+	rm -rf scsi-drv/*.s
+	rm -rf scsi-drv/*.asm
+	rm -rf ufi-drv/*.s
+	rm -rf ufi-drv/*.asm
+	rm -rf keyboard/*.s
+	rm -rf keyboard/*.asm
+	rm ufi-drv.s
+	rm scsi-drv.s
+	rm base-drv.s
+	rm keyboard.s
+
+.PRECIOUS: $(ASSDIR)%.c.asm
+$(ASSDIR)%.c.s: $(ASSDIR)%.c.asm
+	@mkdir -p $(dir $@)
+	echo "Converting $< to $@"
+	${SRC}convert-for-uz80as.sh $< $@
+
+define compile
+	@set -e
+	mkdir -p $(dir $@)
+	$(ZCC) $(ZCCFLAGS) --c-code-in-asm --assemble-only $< -o $@
+	echo "Compiled $(notdir $@) from $(notdir $<)"
+endef
+
+FIRMWARE_ALT = kyb-init ch376_init scsi-init ufi-init hbios-driver-storage
+
+define build_subsystem =
+$$(ASSDIR)$(1).s:
+	@echo "Creating $(1).s"
+	echo "; Generated File -- not to be modify directly" > $$(ASSDIR)$(1).s
+	for dep in $$^; do
+		dep=$$$${dep#*/}
+		dep=$$$${dep#*/}
+		filename=$$$${dep##*/}
+		basename=$$$${filename%.*.*}
+		if echo "$(FIRMWARE_ALT)" | grep -w -q "$$$${basename}"; then
+			if [ -n "$$$${dep%%*.asm}" ]; then
+				echo '#include "'ch376-native/$(1)/$$$${dep}'"' >> $$(ASSDIR)$(1).s
+			else
+				echo '#include "'ch376-native/source-doc/$(1)/$$$${dep}'"' >> $$(ASSDIR)$(1).s
+			fi
+		else
+			echo '#IF (!CHNATIVEEZ80)' >> $$(ASSDIR)$(1).s
+			if [ -n "$$$${dep%%*.asm}" ]; then
+				echo '#include "'ch376-native/$(1)/$$$${dep}'"' >> $$(ASSDIR)$(1).s
+			else
+				echo '#include "'ch376-native/source-doc/$(1)/$$$${dep}'"' >> $$(ASSDIR)$(1).s
+			fi
+			echo '#ENDIF' >> $$(ASSDIR)$(1).s
+		fi
+	done
+
+$$(ASSDIR)$(1)/%.c.asm: $$(SRC)$(1)/%.c; $$(compile)
+# $$(ASSDIR)$(1)/%.asm: $$(SRC)$(1)/%.asm; echo $$@ $$<
+
+$(1)_C_FILES := $$(wildcard $$(SRC)$(1)/*.c)
+$(1)_ASM_FILES := $$(wildcard $$(SRC)$(1)/*.asm)
+$(1)_C_S_FILES := $$(patsubst ./source-doc/%, ./%, $$($(1)_C_FILES:.c=.c.s))
+./$(1).s: $$($(1)_C_S_FILES) $$($(1)_ASM_FILES)
+endef
+
+$(eval $(call build_subsystem,base-drv))
+$(eval $(call build_subsystem,scsi-drv))
+$(eval $(call build_subsystem,keyboard))
+$(eval $(call build_subsystem,ufi-drv))
+
+.PHONY: format
+format: SHELL:=/bin/bash
+format:
+	@find \( -name "*.c" -o -name "*.h" \) -exec echo "formating {}" \; -exec clang-format -i {} \;

Source/HBIOS/ch376-native/base-drv.asm

@@ -0,0 +1,106 @@
+
+DELAY_FACTOR		.EQU	640
+
+CMD01_RD_USB_DATA0	.EQU	$27	; Read data block from current USB interrupt endpoint buffer or host endpoint receive buffer
+					; output: length, data stream
+
+CMD10_WR_HOST_DATA	.EQU	$2C 	; Write a data block to the send buffer of the USB host endpoint
+					; input: length, data stream
+
+CH_CMD_RD_USB_DATA0	.EQU	CMD01_RD_USB_DATA0
+CH_CMD_WR_HOST_DATA	.EQU	CMD10_WR_HOST_DATA
+
+; HL -> timeout
+; returns
+; L -> error code
+
+; ---------------------------------
+; Function ch_wait_int_and_get_status
+; ---------------------------------
+_ch_wait_and_get_status
+	ld	bc, DELAY_FACTOR
+
+keep_waiting:
+	ld	a, $FF
+	in	a, (_CH376_COMMAND_PORT & $FF)
+	rlca
+	jp	nc, _ch_get_status
+
+	dec	bc
+	ld	a, b
+	or	c
+	jr	nz, keep_waiting
+
+	dec	hl
+	ld	a, h
+	or	l
+	jr	nz, _ch_wait_and_get_status
+
+	call	_delay
+	ld	a, $FF
+	in	a, (_CH376_COMMAND_PORT & $FF)
+	bit	4, a			; _CH376_COMMAND_PORT & PARA_STATE_BUSY
+
+	ld	l, $0C 			; USB_ERR_CH376_BLOCKED;
+	ret	nz
+
+	ld	l, $0D 			; USB_ERR_CH376_TIMEOUT
+	ret
+
+; uint8_t ch_read_data(uint8_t *buffer) __sdcccall(1);
+_ch_read_data:
+	push	hl
+	ld	l, CH_CMD_RD_USB_DATA0
+	call	_ch_command
+	pop	hl
+
+	call	_delay
+	ld	bc, _CH376_DATA_PORT
+	in	a, (c)
+
+	or	a
+	ret	z
+
+	ld	e, a
+	push	af
+read_block:
+	call	_delay
+	in	a, (c)
+	ld	(hl), a
+	inc	hl
+	dec	e
+	jr	nz, read_block
+
+	pop	af
+	ret
+
+;const uint8_t *ch_write_data(const uint8_t *buffer, uint8_t length)
+_ch_write_data:
+	ld	l, CH_CMD_WR_HOST_DATA
+	call	_ch_command
+
+	ld	iy, 2
+	add	iy, sp
+	ld	l, (iy+0)
+	ld	h, (iy+1)
+	ld	a, (iy+2)
+
+	ld	bc, _CH376_DATA_PORT
+
+; _CH376_DATA_PORT = length;
+	call	_delay
+	out	(c), a
+
+	or	a
+	ret	z
+
+	ld	d, a
+write_block:
+	call	_delay
+	ld	a, (hl)
+	out	(c), a
+	inc	hl
+	dec	d
+	jr	nz, write_block
+
+	ret

Source/HBIOS/ch376-native/base-drv.s

@@ -0,0 +1,39 @@
+; Generated File -- not to be modify directly
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/ch376.c.s"
+#ENDIF
+#include "ch376-native/base-drv/ch376_init.c.s"
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/class_hub.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/critical-section.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/dev_transfers.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/enumerate.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/enumerate_hub.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/enumerate_storage.c.s"
+#ENDIF
+#include "ch376-native/base-drv/hbios-driver-storage.c.s"
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/protocol.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/transfers.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/usb-base-drv.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/usb_state.c.s"
+#ENDIF
+#IF (!CHNATIVEEZ80)
+#include "ch376-native/base-drv/work-area.c.s"
+#ENDIF

Source/HBIOS/ch376-native/base-drv/.gitignore

@@ -0,0 +1 @@
+*.asm

Source/HBIOS/ch376-native/base-drv/ch376.c.s

@@ -0,0 +1,769 @@
+;
+; Generated from source-doc/base-drv/ch376.c.asm -- not to be modify directly
+;
+; 
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15248 (Linux)
+;--------------------------------------------------------
+; Processed by Z88DK
+;--------------------------------------------------------
+	
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+;--------------------------------------------------------
+; Externals used
+;--------------------------------------------------------
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	
+#IF 0
+	
+; .area _INITIALIZED removed by z88dk
+	
+	
+#ENDIF
+	
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+;source-doc/base-drv/ch376.c:6: void ch_command(const uint8_t command) __z88dk_fastcall {
+; ---------------------------------
+; Function ch_command
+; ---------------------------------
+_ch_command:
+;source-doc/base-drv/ch376.c:8: while ((CH376_COMMAND_PORT & PARA_STATE_BUSY) && --counter != 0)
+	ld	b,$ff
+l_ch_command_00102:
+	ld	a, +((_CH376_COMMAND_PORT) / 256)
+	in	a, (((_CH376_COMMAND_PORT) & $FF))
+	bit	4, a
+	jr	Z,l_ch_command_00104
+	djnz	l_ch_command_00102
+l_ch_command_00104:
+;source-doc/base-drv/ch376.c:19: CH376_COMMAND_PORT = command;
+	ld	a, l
+	ld	bc,_CH376_COMMAND_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:20: }
+	ret
+;source-doc/base-drv/ch376.c:24: usb_error ch_long_get_status(void) { return ch_wait_and_get_status(5000); }
+; ---------------------------------
+; Function ch_long_get_status
+; ---------------------------------
+_ch_long_get_status:
+	ld	hl,$1388
+	jp	_ch_wait_and_get_status
+;source-doc/base-drv/ch376.c:26: usb_error ch_short_get_status(void) { return ch_wait_and_get_status(100); }
+; ---------------------------------
+; Function ch_short_get_status
+; ---------------------------------
+_ch_short_get_status:
+	ld	hl,$0064
+	jp	_ch_wait_and_get_status
+;source-doc/base-drv/ch376.c:28: usb_error ch_very_short_status(void) { return ch_wait_and_get_status(10); }
+; ---------------------------------
+; Function ch_very_short_status
+; ---------------------------------
+_ch_very_short_status:
+	ld	hl,$000a
+	jp	_ch_wait_and_get_status
+;source-doc/base-drv/ch376.c:30: usb_error ch_get_status(void) {
+; ---------------------------------
+; Function ch_get_status
+; ---------------------------------
+_ch_get_status:
+;source-doc/base-drv/ch376.c:31: ch_command(CH_CMD_GET_STATUS);
+	ld	l,$22
+	call	_ch_command
+;source-doc/base-drv/ch376.c:32: uint8_t ch_status = CH376_DATA_PORT;
+	ld	a, +((_CH376_DATA_PORT) / 256)
+	in	a, (((_CH376_DATA_PORT) & $FF))
+;source-doc/base-drv/ch376.c:34: if (ch_status >= USB_FILERR_MIN && ch_status <= USB_FILERR_MAX)
+	cp	$41
+	jr	C,l_ch_get_status_00102
+	cp	$b5
+	jr	NC,l_ch_get_status_00102
+;source-doc/base-drv/ch376.c:35: return ch_status;
+	ld	l, a
+	jr	l_ch_get_status_00126
+l_ch_get_status_00102:
+;source-doc/base-drv/ch376.c:37: if (ch_status == CH_CMD_RET_SUCCESS)
+	cp	$51
+	jr	NZ,l_ch_get_status_00105
+;source-doc/base-drv/ch376.c:38: return USB_ERR_OK;
+	ld	l,$00
+	jr	l_ch_get_status_00126
+l_ch_get_status_00105:
+;source-doc/base-drv/ch376.c:40: if (ch_status == CH_USB_INT_SUCCESS)
+	cp	$14
+	jr	NZ,l_ch_get_status_00107
+;source-doc/base-drv/ch376.c:41: return USB_ERR_OK;
+	ld	l,$00
+	jr	l_ch_get_status_00126
+l_ch_get_status_00107:
+;source-doc/base-drv/ch376.c:43: if (ch_status == CH_USB_INT_CONNECT)
+	cp	$15
+	jr	NZ,l_ch_get_status_00109
+;source-doc/base-drv/ch376.c:44: return USB_INT_CONNECT;
+	ld	l,$81
+	jr	l_ch_get_status_00126
+l_ch_get_status_00109:
+;source-doc/base-drv/ch376.c:46: if (ch_status == CH_USB_INT_DISK_READ)
+	cp	$1d
+	jr	NZ,l_ch_get_status_00111
+;source-doc/base-drv/ch376.c:47: return USB_ERR_DISK_READ;
+	ld	l,$1d
+	jr	l_ch_get_status_00126
+l_ch_get_status_00111:
+;source-doc/base-drv/ch376.c:49: if (ch_status == CH_USB_INT_DISK_WRITE)
+	cp	$1e
+	jr	NZ,l_ch_get_status_00113
+;source-doc/base-drv/ch376.c:50: return USB_ERR_DISK_WRITE;
+	ld	l,$1e
+	jr	l_ch_get_status_00126
+l_ch_get_status_00113:
+;source-doc/base-drv/ch376.c:52: if (ch_status == CH_USB_INT_DISCONNECT) {
+	cp	$16
+	jr	NZ,l_ch_get_status_00115
+;source-doc/base-drv/ch376.c:53: ch_cmd_set_usb_mode(5);
+	ld	l,$05
+	call	_ch_cmd_set_usb_mode
+;source-doc/base-drv/ch376.c:54: return USB_ERR_NO_DEVICE;
+	ld	l,$05
+	jr	l_ch_get_status_00126
+l_ch_get_status_00115:
+;source-doc/base-drv/ch376.c:57: if (ch_status == CH_USB_INT_BUF_OVER)
+	cp	$17
+	jr	NZ,l_ch_get_status_00117
+;source-doc/base-drv/ch376.c:58: return USB_ERR_DATA_ERROR;
+	ld	l,$04
+	jr	l_ch_get_status_00126
+l_ch_get_status_00117:
+;source-doc/base-drv/ch376.c:60: ch_status &= $2F;
+	and	$2f
+;source-doc/base-drv/ch376.c:62: if (ch_status == $2A)
+	cp	$2a
+	jr	NZ,l_ch_get_status_00119
+;source-doc/base-drv/ch376.c:63: return USB_ERR_NAK;
+	ld	l,$01
+	jr	l_ch_get_status_00126
+l_ch_get_status_00119:
+;source-doc/base-drv/ch376.c:65: if (ch_status == $2E)
+	cp	$2e
+	jr	NZ,l_ch_get_status_00121
+;source-doc/base-drv/ch376.c:66: return USB_ERR_STALL;
+	ld	l,$02
+	jr	l_ch_get_status_00126
+l_ch_get_status_00121:
+;source-doc/base-drv/ch376.c:68: ch_status &= $23;
+	and	$23
+;source-doc/base-drv/ch376.c:70: if (ch_status == $20)
+	cp	$20
+	jr	NZ,l_ch_get_status_00123
+;source-doc/base-drv/ch376.c:71: return USB_ERR_TIMEOUT;
+	ld	l,$03
+	jr	l_ch_get_status_00126
+l_ch_get_status_00123:
+;source-doc/base-drv/ch376.c:73: if (ch_status == $23)
+	sub	$23
+	jr	NZ,l_ch_get_status_00125
+;source-doc/base-drv/ch376.c:74: return USB_TOKEN_OUT_OF_SYNC;
+	ld	l,$07
+	jr	l_ch_get_status_00126
+l_ch_get_status_00125:
+;source-doc/base-drv/ch376.c:76: return USB_ERR_UNEXPECTED_STATUS_FROM_;
+	ld	l,$08
+l_ch_get_status_00126:
+;source-doc/base-drv/ch376.c:77: }
+	ret
+;source-doc/base-drv/ch376.c:79: void ch_cmd_reset_all(void) { ch_command(CH_CMD_RESET_ALL); }
+; ---------------------------------
+; Function ch_cmd_reset_all
+; ---------------------------------
+_ch_cmd_reset_all:
+	ld	l,$05
+	jp	_ch_command
+;source-doc/base-drv/ch376.c:98: uint8_t ch_probe(void) {
+; ---------------------------------
+; Function ch_probe
+; ---------------------------------
+_ch_probe:
+	push	ix
+	ld	ix,0
+	add	ix,sp
+	dec	sp
+;source-doc/base-drv/ch376.c:100: do {
+	ld	(ix-1),$05
+l_ch_probe_00103:
+;source-doc/base-drv/ch376.c:83: ch_command(CH_CMD_CHECK_EXIST);
+	ld	l,$06
+	call	_ch_command
+;source-doc/base-drv/ch376.c:84: CH376_DATA_PORT = (uint8_t)~$55;
+	ld	a,$aa
+	ld	bc,_CH376_DATA_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:85: delay();
+	call	_delay
+;source-doc/base-drv/ch376.c:86: complement = CH376_DATA_PORT;
+	ld	a, +((_CH376_DATA_PORT) / 256)
+	in	a, (((_CH376_DATA_PORT) & $FF))
+;source-doc/base-drv/ch376.c:87: return complement == $55;
+	sub	$55
+	jr	NZ,l_ch_probe_00102
+;source-doc/base-drv/ch376.c:101: if (ch_cmd_check_exist())
+;source-doc/base-drv/ch376.c:102: return true;
+	ld	l,$01
+	jr	l_ch_probe_00107
+l_ch_probe_00102:
+;source-doc/base-drv/ch376.c:104: delay_short();
+	call	_delay_short
+;source-doc/base-drv/ch376.c:105: } while (--i != 0);
+	dec	(ix-1)
+	jr	NZ,l_ch_probe_00103
+;source-doc/base-drv/ch376.c:107: return false;
+	ld	l,$00
+l_ch_probe_00107:
+;source-doc/base-drv/ch376.c:108: }
+	inc	sp
+	pop	ix
+	ret
+;source-doc/base-drv/ch376.c:110: usb_error ch_cmd_set_usb_mode(const uint8_t mode) __z88dk_fastcall {
+; ---------------------------------
+; Function ch_cmd_set_usb_mode
+; ---------------------------------
+_ch_cmd_set_usb_mode:
+	ld	c, l
+;source-doc/base-drv/ch376.c:111: uint8_t result = 0;
+	ld	b,$00
+;source-doc/base-drv/ch376.c:113: CH376_COMMAND_PORT = CH_CMD_SET_USB_MODE;
+	ld	a,$15
+	push	bc
+	ld	bc,_CH376_COMMAND_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:114: delay();
+	call	_delay
+	pop	bc
+;source-doc/base-drv/ch376.c:115: CH376_DATA_PORT = mode;
+	ld	a, c
+	push	bc
+	ld	bc,_CH376_DATA_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:116: delay();
+	call	_delay
+	pop	bc
+;source-doc/base-drv/ch376.c:120: while (result != CH_CMD_RET_SUCCESS && result != CH_CMD_RET_ABORT && --count != 0) {
+	ld	c,$7f
+l_ch_cmd_set_usb_mode_00103:
+	ld	a, b
+	sub	$51
+	jr	NZ,l_ch_cmd_set_usb_mode_00146
+	ld	a,$01
+	jr	l_ch_cmd_set_usb_mode_00147
+l_ch_cmd_set_usb_mode_00146:
+	xor	a
+l_ch_cmd_set_usb_mode_00147:
+	ld	e,a
+	bit	0,a
+	jr	NZ,l_ch_cmd_set_usb_mode_00105
+	ld	a, b
+	sub	$5f
+	jr	Z,l_ch_cmd_set_usb_mode_00105
+	dec	c
+	jr	Z,l_ch_cmd_set_usb_mode_00105
+;source-doc/base-drv/ch376.c:121: result = CH376_DATA_PORT;
+	ld	a, +((_CH376_DATA_PORT) / 256)
+	in	a, (((_CH376_DATA_PORT) & $FF))
+	ld	b, a
+;source-doc/base-drv/ch376.c:122: delay();
+	push	bc
+	call	_delay
+	pop	bc
+	jr	l_ch_cmd_set_usb_mode_00103
+l_ch_cmd_set_usb_mode_00105:
+;source-doc/base-drv/ch376.c:125: return (result == CH_CMD_RET_SUCCESS) ? USB_ERR_OK : USB_ERR_FAIL;
+	ld	a, e
+	or	a
+	jr	Z,l_ch_cmd_set_usb_mode_00108
+	ld	l,$00
+	jr	l_ch_cmd_set_usb_mode_00109
+l_ch_cmd_set_usb_mode_00108:
+	ld	l,$0e
+l_ch_cmd_set_usb_mode_00109:
+;source-doc/base-drv/ch376.c:126: }
+	ret
+;source-doc/base-drv/ch376.c:128: uint8_t ch_cmd_get_ic_version(void) {
+; ---------------------------------
+; Function ch_cmd_get_ic_version
+; ---------------------------------
+_ch_cmd_get_ic_version:
+;source-doc/base-drv/ch376.c:129: ch_command(CH_CMD_GET_IC_VER);
+	ld	l,$01
+	call	_ch_command
+;source-doc/base-drv/ch376.c:130: return CH376_DATA_PORT & $1f;
+	ld	a, +((_CH376_DATA_PORT) / 256)
+	in	a, (((_CH376_DATA_PORT) & $FF))
+	and	$1f
+	ld	l, a
+;source-doc/base-drv/ch376.c:131: }
+	ret
+;source-doc/base-drv/ch376.c:133: void ch_issue_token(const uint8_t toggle_bit, const uint8_t endpoint, const ch376_pid pid) {
+; ---------------------------------
+; Function ch_issue_token
+; ---------------------------------
+_ch_issue_token:
+	push	ix
+	ld	ix,0
+	add	ix,sp
+;source-doc/base-drv/ch376.c:134: ch_command(CH_CMD_ISSUE_TKN_X);
+	ld	l,$4e
+	call	_ch_command
+;source-doc/base-drv/ch376.c:135: CH376_DATA_PORT = toggle_bit;
+	ld	a,(ix+4)
+	ld	bc,_CH376_DATA_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:136: CH376_DATA_PORT = endpoint << 4 | pid;
+	ld	a,(ix+5)
+	add	a, a
+	add	a, a
+	add	a, a
+	add	a, a
+	or	(ix+6)
+	ld	bc,_CH376_DATA_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:137: }
+	pop	ix
+	ret
+;source-doc/base-drv/ch376.c:139: void ch_issue_token_in(const endpoint_param *const endpoint) __z88dk_fastcall {
+; ---------------------------------
+; Function ch_issue_token_in
+; ---------------------------------
+_ch_issue_token_in:
+;source-doc/base-drv/ch376.c:140: ch_issue_token(endpoint->toggle ? $80 : $00, endpoint->number, CH_PID_IN);
+	ld	e,l
+	ld	d,h
+	ld	a, (hl)
+	rrca
+	and	$07
+	ld	b, a
+	ex	de, hl
+	ld	a, (hl)
+	and	$01
+	jr	Z,l_ch_issue_token_in_00103
+	ld	a,$80
+	jr	l_ch_issue_token_in_00104
+l_ch_issue_token_in_00103:
+	xor	a
+l_ch_issue_token_in_00104:
+	ld	h,$09
+	ld	l,b
+	push	hl
+	push	af
+	inc	sp
+	call	_ch_issue_token
+	pop	af
+	inc	sp
+;source-doc/base-drv/ch376.c:141: }
+	ret
+;source-doc/base-drv/ch376.c:143: void ch_issue_token_out(const endpoint_param *const endpoint) __z88dk_fastcall {
+; ---------------------------------
+; Function ch_issue_token_out
+; ---------------------------------
+_ch_issue_token_out:
+;source-doc/base-drv/ch376.c:144: ch_issue_token(endpoint->toggle ? $40 : $00, endpoint->number, CH_PID_OUT);
+	ld	e,l
+	ld	d,h
+	ld	a, (hl)
+	rrca
+	and	$07
+	ld	b, a
+	ex	de, hl
+	ld	a, (hl)
+	and	$01
+	jr	Z,l_ch_issue_token_out_00103
+	ld	a,$40
+	jr	l_ch_issue_token_out_00104
+l_ch_issue_token_out_00103:
+	xor	a
+l_ch_issue_token_out_00104:
+	ld	h,$01
+	ld	l,b
+	push	hl
+	push	af
+	inc	sp
+	call	_ch_issue_token
+	pop	af
+	inc	sp
+;source-doc/base-drv/ch376.c:145: }
+	ret
+;source-doc/base-drv/ch376.c:147: void ch_issue_token_out_ep0(void) { ch_issue_token($40, 0, CH_PID_OUT); }
+; ---------------------------------
+; Function ch_issue_token_out_ep0
+; ---------------------------------
+_ch_issue_token_out_ep0:
+	ld	a,$01
+	push	af
+	inc	sp
+	xor	a
+	ld	d,a
+	ld	e,$40
+	push	de
+	call	_ch_issue_token
+	pop	af
+	inc	sp
+	ret
+;source-doc/base-drv/ch376.c:149: void ch_issue_token_in_ep0(void) { ch_issue_token($80, 0, CH_PID_IN); }
+; ---------------------------------
+; Function ch_issue_token_in_ep0
+; ---------------------------------
+_ch_issue_token_in_ep0:
+	ld	a,$09
+	push	af
+	inc	sp
+	xor	a
+	ld	d,a
+	ld	e,$80
+	push	de
+	call	_ch_issue_token
+	pop	af
+	inc	sp
+	ret
+;source-doc/base-drv/ch376.c:151: void ch_issue_token_setup(void) { ch_issue_token(0, 0, CH_PID_SETUP); }
+; ---------------------------------
+; Function ch_issue_token_setup
+; ---------------------------------
+_ch_issue_token_setup:
+	ld	a,$0d
+	push	af
+	inc	sp
+	xor	a
+	push	af
+	inc	sp
+	xor	a
+	push	af
+	inc	sp
+	call	_ch_issue_token
+	pop	af
+	inc	sp
+	ret
+;source-doc/base-drv/ch376.c:153: usb_error ch_data_in_transfer(uint8_t *buffer, int16_t buffer_size, endpoint_param *const endpoint) {
+; ---------------------------------
+; Function ch_data_in_transfer
+; ---------------------------------
+_ch_data_in_transfer:
+	push	ix
+	ld	ix,0
+	add	ix,sp
+;source-doc/base-drv/ch376.c:157: if (buffer_size == 0)
+	ld	a,(ix+7)
+	or	(ix+6)
+	jr	NZ,l_ch_data_in_transfer_00102
+;source-doc/base-drv/ch376.c:158: return USB_ERR_OK;
+	ld	l,$00
+	jp	l_ch_data_in_transfer_00111
+l_ch_data_in_transfer_00102:
+;source-doc/base-drv/ch376.c:160: USB_MODULE_LEDS = $01;
+	ld	a,$01
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:161: do {
+	ld	c,(ix+8)
+	ld	b,(ix+9)
+l_ch_data_in_transfer_00107:
+;source-doc/base-drv/ch376.c:162: ch_issue_token_in(endpoint);
+	ld	l,c
+	ld	h,b
+	push	hl
+	call	_ch_issue_token_in
+;source-doc/base-drv/ch376.c:164: result = ch_long_get_status();
+	call	_ch_long_get_status
+	ld	a, l
+	pop	bc
+	ld	l, a
+;source-doc/base-drv/ch376.c:165: CHECK(result);
+	or	a
+	jr	NZ,l_ch_data_in_transfer_00110
+;source-doc/base-drv/ch376.c:167: endpoint->toggle = !endpoint->toggle;
+	ld	e, c
+	ld	d, b
+	ld	l, e
+	ld	h, d
+	ld	a, (hl)
+	and	$01
+	xor	$01
+	and	$01
+	ld	l, a
+	ld	a, (de)
+	and	$fe
+	or	l
+	ld	(de), a
+;source-doc/base-drv/ch376.c:169: count = ch_read_data(buffer);
+	push	bc
+	ld	l,(ix+4)
+	ld	h,(ix+5)
+	call	_ch_read_data
+	ld	e, a
+	pop	bc
+;source-doc/base-drv/ch376.c:171: if (count == 0) {
+	ld	a, e
+;source-doc/base-drv/ch376.c:172: USB_MODULE_LEDS = $00;
+	or	a
+	jr	NZ,l_ch_data_in_transfer_00106
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:173: return USB_ERR_DATA_ERROR;
+	ld	l,$04
+	jr	l_ch_data_in_transfer_00111
+l_ch_data_in_transfer_00106:
+;source-doc/base-drv/ch376.c:176: buffer += count;
+	ld	a,(ix+4)
+	add	a, e
+	ld	(ix+4),a
+	jr	NC,l_ch_data_in_transfer_00148
+	inc	(ix+5)
+l_ch_data_in_transfer_00148:
+;source-doc/base-drv/ch376.c:177: buffer_size -= count;
+	ld	d,$00
+	ld	a,(ix+6)
+	sub	e
+	ld	(ix+6),a
+	ld	a,(ix+7)
+	sbc	a, d
+	ld	(ix+7),a
+;source-doc/base-drv/ch376.c:178: } while (buffer_size > 0);
+	xor	a
+	cp	(ix+6)
+	sbc	a,(ix+7)
+	jp	PO, l_ch_data_in_transfer_00149
+	xor	$80
+l_ch_data_in_transfer_00149:
+	jp	M, l_ch_data_in_transfer_00107
+;source-doc/base-drv/ch376.c:180: USB_MODULE_LEDS = $00;
+	ld	a,$00
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:181: return USB_ERR_OK;
+	ld	l,$00
+	jr	l_ch_data_in_transfer_00111
+;source-doc/base-drv/ch376.c:183: done:
+l_ch_data_in_transfer_00110:
+;source-doc/base-drv/ch376.c:184: USB_MODULE_LEDS = $00;
+	ld	a,$00
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:185: return result;
+l_ch_data_in_transfer_00111:
+;source-doc/base-drv/ch376.c:186: }
+	pop	ix
+	ret
+;source-doc/base-drv/ch376.c:189: usb_error ch_data_in_transfer_n(uint8_t *const buffer, uint8_t *const buffer_size, endpoint_param *const endpoint) {
+; ---------------------------------
+; Function ch_data_in_transfer_n
+; ---------------------------------
+_ch_data_in_transfer_n:
+	push	ix
+	ld	ix,0
+	add	ix,sp
+;source-doc/base-drv/ch376.c:193: USB_MODULE_LEDS = $01;
+	ld	a,$01
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:195: ch_issue_token_in(endpoint);
+	ld	l,(ix+8)
+	ld	h,(ix+9)
+	call	_ch_issue_token_in
+;source-doc/base-drv/ch376.c:197: CHECK(ch_long_get_status());
+	call	_ch_long_get_status
+	ld	a,l
+	or	a
+	jr	NZ,l_ch_data_in_transfer_n_00103
+;source-doc/base-drv/ch376.c:199: endpoint->toggle = !endpoint->toggle;
+	ld	l,(ix+8)
+	ld	h,(ix+9)
+	ld	a, (hl)
+	and	$01
+	xor	$01
+	and	$01
+	ld	c, a
+	ld	a, (hl)
+	and	$fe
+	or	c
+	ld	(hl), a
+;source-doc/base-drv/ch376.c:201: count = ch_read_data(buffer);
+	ld	l,(ix+4)
+	ld	h,(ix+5)
+	call	_ch_read_data
+;source-doc/base-drv/ch376.c:203: *buffer_size = count;
+	ld	c,(ix+6)
+	ld	b,(ix+7)
+	ld	(bc), a
+;source-doc/base-drv/ch376.c:205: USB_MODULE_LEDS = $00;
+	ld	a,$00
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:207: return USB_ERR_OK;
+	ld	l,$00
+	jr	l_ch_data_in_transfer_n_00104
+;source-doc/base-drv/ch376.c:208: done:
+l_ch_data_in_transfer_n_00103:
+;source-doc/base-drv/ch376.c:209: USB_MODULE_LEDS = $00;
+	ld	a,$00
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:210: return result;
+l_ch_data_in_transfer_n_00104:
+;source-doc/base-drv/ch376.c:211: }
+	pop	ix
+	ret
+;source-doc/base-drv/ch376.c:213: usb_error ch_data_out_transfer(const uint8_t *buffer, int16_t buffer_length, endpoint_param *const endpoint) {
+; ---------------------------------
+; Function ch_data_out_transfer
+; ---------------------------------
+_ch_data_out_transfer:
+	push	ix
+	ld	ix,0
+	add	ix,sp
+	dec	sp
+;source-doc/base-drv/ch376.c:216: const uint8_t max_packet_size = calc_max_packet_size(endpoint->max_packet_sizex);
+	ld	c,(ix+8)
+	ld	b,(ix+9)
+	ld	e, c
+	ld	d, b
+	inc	de
+	ld	a, (de)
+	ld	(ix-1),a
+;source-doc/base-drv/ch376.c:218: USB_MODULE_LEDS = $02;
+	ld	a,$02
+	push	bc
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+	pop	bc
+;source-doc/base-drv/ch376.c:220: while (buffer_length > 0) {
+l_ch_data_out_transfer_00103:
+	xor	a
+	cp	(ix+6)
+	sbc	a,(ix+7)
+	jp	PO, l_ch_data_out_transfer_00139
+	xor	$80
+l_ch_data_out_transfer_00139:
+	jp	P, l_ch_data_out_transfer_00105
+;source-doc/base-drv/ch376.c:221: const uint8_t size = max_packet_size < buffer_length ? max_packet_size : buffer_length;
+	ld	d,(ix-1)
+	ld	e,$00
+	ld	a, d
+	sub	(ix+6)
+	ld	a, e
+	sbc	a,(ix+7)
+	jp	PO, l_ch_data_out_transfer_00140
+	xor	$80
+l_ch_data_out_transfer_00140:
+	jp	P, l_ch_data_out_transfer_00109
+	jr	l_ch_data_out_transfer_00110
+l_ch_data_out_transfer_00109:
+	ld	d,(ix+6)
+	ld	e,(ix+7)
+l_ch_data_out_transfer_00110:
+;source-doc/base-drv/ch376.c:222: buffer             = ch_write_data(buffer, size);
+	push	bc
+	push	de
+	push	de
+	inc	sp
+	ld	l,(ix+4)
+	ld	h,(ix+5)
+	push	hl
+	call	_ch_write_data
+	pop	af
+	inc	sp
+	pop	de
+	pop	bc
+	ld	(ix+4),l
+	ld	(ix+5),h
+;source-doc/base-drv/ch376.c:223: buffer_length -= size;
+	ld	e,$00
+	ld	a,(ix+6)
+	sub	d
+	ld	(ix+6),a
+	ld	a,(ix+7)
+	sbc	a, e
+	ld	(ix+7),a
+;source-doc/base-drv/ch376.c:224: ch_issue_token_out(endpoint);
+	ld	l,c
+	ld	h,b
+	push	hl
+	call	_ch_issue_token_out
+;source-doc/base-drv/ch376.c:226: CHECK(ch_long_get_status());
+	call	_ch_long_get_status
+	ld	a, l
+	pop	bc
+	ld	l, a
+	or	a
+	jr	NZ,l_ch_data_out_transfer_00106
+;source-doc/base-drv/ch376.c:228: endpoint->toggle = !endpoint->toggle;
+	ld	e, c
+	ld	d, b
+	ld	l, e
+	ld	h, d
+	ld	a, (hl)
+	and	$01
+	xor	$01
+	and	$01
+	ld	l, a
+	ld	a, (de)
+	and	$fe
+	or	l
+	ld	(de), a
+	jr	l_ch_data_out_transfer_00103
+l_ch_data_out_transfer_00105:
+;source-doc/base-drv/ch376.c:231: USB_MODULE_LEDS = $00;
+	ld	a,$00
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:232: return USB_ERR_OK;
+	ld	l,$00
+	jr	l_ch_data_out_transfer_00107
+;source-doc/base-drv/ch376.c:234: done:
+l_ch_data_out_transfer_00106:
+;source-doc/base-drv/ch376.c:235: USB_MODULE_LEDS = $00;
+	ld	a,$00
+	ld	bc,_USB_MODULE_LEDS
+	out	(c), a
+;source-doc/base-drv/ch376.c:236: return result;
+l_ch_data_out_transfer_00107:
+;source-doc/base-drv/ch376.c:237: }
+	inc	sp
+	pop	ix
+	ret
+;source-doc/base-drv/ch376.c:239: void ch_set_usb_address(const uint8_t device_address) __z88dk_fastcall {
+; ---------------------------------
+; Function ch_set_usb_address
+; ---------------------------------
+_ch_set_usb_address:
+;source-doc/base-drv/ch376.c:240: ch_command(CH_CMD_SET_USB_ADDR);
+	push	hl
+	ld	l,$13
+	call	_ch_command
+	pop	hl
+;source-doc/base-drv/ch376.c:241: CH376_DATA_PORT = device_address;
+	ld	a, l
+	ld	bc,_CH376_DATA_PORT
+	out	(c), a
+;source-doc/base-drv/ch376.c:242: }
+	ret